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bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

符合 Qi v1.2 标准的 bq5105xB 高效无线电源接收器

和电池充电器

1 特性

3 说明

1

•

单级无线电源接收器

和锂离子/锂聚合物电池充电器

bq5105x 器件是符合 Qi 标准的高效无线电源接收器，

具有集成的锂离子/锂聚合物电池充电控制器，可用于

便携式应用。bq5105xB 器件提供高效交流/直流电源

转换，集成了符合 Qi v1.2 通信协议所需的数字控制

器，并提供了安全高效锂离子和锂聚合物电池充电所需

的所有必需控制算法。通过搭配使用 bq500212A 发送

器侧控制器，bq5105x 可为直接电池充电器解决方案

提供完整的无线电源传输系统。通过使用近场感应式电

力传输，嵌入在便携式器件内的接收器线圈能够接收发

送器线圈所发出的电能。来自接收器线圈的交流信号继

而被整流和调节以将电能直接应用到电池。为了稳定电

能传输过程，建立了接收器到发送器的全局反馈机制。

这个反馈使用 Qi v1.2 通信协议建立。

–

在单个小型封装内将无线电源接收器、整流器和

电池充电器组合在一起

–

4.20V、4.35V 和 4.40V 输出电压选项

支持高达 1.5A 的充电电流

93% 峰值交流至直流 (AC-DC) 充电效率

•

稳健耐用架构

–

20V 最大输入电压容差，具有输入过压保护

热关断及过流保护

温度监控和故障检测

•

符合 WPC v1.2 Qi 行业标准

功率级输出跟踪整流器和电池电压以确保整个充电

周期内的最大效率

bq5105xB 器件在单个封装内集成了低阻抗同步整流

器、低压降稳压器 (LDO)、数字控制、充电器控制器

及精准电压和电流环路。整个功率级（整流器与

LDO）均使用低阻抗 N-MOSFET（100mΩ 常用导通

电阻）以确保高效率与低功耗。

•

采用小型 DSGBA 和 VQFN 封装

2 应用

•

电池组

手机和智能电话

耳机

器件信息⁽¹⁾

便携式媒体播放器

其他手持式器件

器件型号

bq51050B

bq51051B

bq51052B

封装

VQFN (20)

DSBGA (28)

封装尺寸（标称值）

4.50mm x 3.50mm

3.00mm x 1.90mm

(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附

录。

典型应用电路原理图

bq5105xB

AD-EN

AD

BAT

C_COMM1

C_BOOT1

C₄

C₃

COMM1

BOOT1

AC1

D₁

RECT

C₁

R₄

TI

TX

COIL

Wireless

Power

Transmitter

RX

COIL

PACK+

C₂

NTC

TS/CTRL

AC2

BOOT2

COMM2

R_OS

PACK-

C_BOOT2

CHG

C_COMM2

C_CLAMP2

C_CLAMP1

CLAMP2

CLAMP1

ILIM

TERM

EN2

Tri-State

Bi-State

HOST

R₅

FOD

PGND

R₁

R_FOD

Copyright

©

2016, Texas Instruments Incorporated

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

English Data Sheet: SLUSB42

bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

www.ti.com.cn

8.4 Device Functional Modes........................................ 27

Application and Implementation ........................ 28

9.1 Application Information............................................ 28

9.2 Typical Application .................................................. 28

1

2

3

4

5

6

7

特性.......................................................................... 1

应用.......................................................................... 1

说明.......................................................................... 1

修订历史记录 ........................................................... 2

Device Options....................................................... 4

Pin Configuration and Functions......................... 4

Specifications......................................................... 6

7.1 Absolute Maximum Ratings ...................................... 6

7.2 ESD Ratings.............................................................. 6

7.3 Recommended Operating Conditions....................... 6

7.4 Thermal Information.................................................. 6

7.5 Electrical Characteristics........................................... 7

7.6 Typical Characteristics............................................ 10

Detailed Description ............................................ 13

8.1 Overview ................................................................. 13

8.2 Functional Block Diagram ....................................... 14

8.3 Feature Description................................................. 14

9

10 Power Supply Recommendations ..................... 33

11 Layout................................................................... 33

11.1 Layout Guidelines ................................................. 33

11.2 Layout Example .................................................... 33

12 器件和文档支持 ..................................................... 34

12.1 文档支持................................................................ 34

12.2 相关链接................................................................ 34

12.3 接收文档更新通知 ................................................. 34

12.4 社区资源................................................................ 34

12.5 商标....................................................................... 34

12.6 静电放电警告......................................................... 34

12.7 Glossary................................................................ 34

13 机械、封装和可订购信息....................................... 34

8

4 修订历史记录

注：之前版本的页码可能与当前版本有所不同。

Changes from Revision E (March 2015) to Revision F

Page

•

在整个文档中将所有 Qi v1.1 和 WPC v1.1 更改为 Qi v1.2 和 WPC v1.2 .............................................................................. 1

Added the Adaptive Communication Limit section............................................................................................................... 24

Deleted R₁= 29.402 kΩ R₃= 14.302 kΩ and added a link to SLUS629 in the Internal Temperature Sense (TS

Function of the TS/CTRL Pin) section ................................................................................................................................. 25

Changes from Revision D (January 2014) to Revision E

Page

•

已添加 ESD 额定值表，特性说明部分、器件功能模式、应用和实施部分、电源建议部分、布局部分、器件和文档

支持部分，以及机械、封装和可订购信息部分...................................................................................................................... 1

已添加 bq51052B 4.40V 选项................................................................................................................................................. 1

Updated pinout images........................................................................................................................................................... 4

Added thermal pad description in Pin Functions table ........................................................................................................... 4

Added AD voltage to Recommended Operating Conditions .................................................................................................. 6

Changed RECT overvoltage specification name from V_RECTto V_OVP..................................................................................... 7

Changed to I_{LIM_SHORT, OK}from I_{LIM_SC}for clarity...................................................................................................................... 7

Added V_OREGfor bq51052B .................................................................................................................................................... 8

Added minimum current for K_ILIM............................................................................................................................................ 8

Changed K_ILIMTYP value from 300 to 314 (min / max also changed)................................................................................... 8

Added I_BULKspec for charging minimum and maximum......................................................................................................... 8

Added V_RECHfor bq51052B .................................................................................................................................................... 8

Added new spec I_Termination...................................................................................................................................................... 8

Changed to VTSB from VTS for clarity................................................................................................................................... 8

Changed from I_TS-Biasfor clarity............................................................................................................................................... 8

Deleted V_0C-Fas redundant..................................................................................................................................................... 8

Changed typical JEITA regulation on bq51050B from 4.10 V to 4.06 V ................................................................................ 8

Changed to clarify CTRL pin high and low levels................................................................................................................... 8

•

2

bq51050B, bq51051B, bq51052B

www.ti.com.cn

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

•

Changed Thermal shutdown name to T_J-SDfor clarity ............................................................................................................ 9

Added section to describe Adapter Enable function............................................................................................................... 9

Changed Synchronous rectifer switchover name to I_BAT-SRfor clarity..................................................................................... 9

Added synchronous mode entry for bq51052B...................................................................................................................... 9

Deleted note regarding internal junction monitor reducing current - it is not applicable. ..................................................... 19

Added section on modified JEITA profile for bq51052B....................................................................................................... 21

Changed TS/CTRL function to correct Termination Packet value........................................................................................ 22

Added Taper mode completion for Termination Packet....................................................................................................... 22

Changed Beta value from 4500 to 3380 to match NTC datasheet ...................................................................................... 25

Changed received power maximum error from 250 mW to 375 mW to comply with latest WPC v1.2 specification........... 27

Changes from Revision C (February 2013) to Revision D

Page

•

Changed the ABSOLUTE MAXIMUM RATINGS - moved AC1 and AC2 onto a single row with a Min value of –0.8 ......... 6

Added section: Details of a Qi Wireless Power System and bq5105xB Power Transfer Flow Diagrams............................ 15

Changed text in the Battery Charge Profile section ............................................................................................................. 19

Changed Battery failure Conditions in Table 1..................................................................................................................... 22

Changed Equation 3 and Equation 4 ................................................................................................................................... 25

Changed R₂= 7.81 kΩ To: R₁= 29.402 kΩ ......................................................................................................................... 25

Changed R₃= 13.98 kΩ To: R₃= 14.302 kΩ in the Internal Temperature Sense (TS Function of the TS/CTRL Pin)

section .................................................................................................................................................................................. 25

•

Changed T_HOT= 0°C To: T_HOT= 60°C.................................................................................................................................. 25

Changed Equation 6............................................................................................................................................................. 29

Changes from Revision B (September 2012) to Revision C

Page

•

完整数据表第一版................................................................................................................................................................... 1

Changes from Revision A (August 2012) to Revision B

Page

•

将最后一条特性要点由“1.9 x 3.0mm WCSP 和 4.5 x 3.5mm QFN 封装选项”更改为“采用小型 WCSP 和 QFN 封装”......... 1

更改了图表 1 并将标题从：无线充电联盟（WPC 或 Qi）感应充电系统，改为：典型系统方框图显示 bq5105xB 被用

作一个无线电源锂离子/锂聚合物电池充电器 .......................................................................................................................... 1

•

补充说明：如需了解产品详细信息和设计资源，请访问 ti.com/wirelesspower....................................................................... 1

Changes from Original (August 2012) to Revision A

Page

•

Changed Regulated BAT(output) voltage............................................................................................................................... 8

Changed Recharge threshold for bq51052B.......................................................................................................................... 8

Deleted I_TS-Bias-Max.................................................................................................................................................................... 8

Changed V_COLDto V_OCand values ......................................................................................................................................... 8

Changed V_45Cvalues.............................................................................................................................................................. 8

Changed V_60Cvalues.............................................................................................................................................................. 8

Changed Figure 25............................................................................................................................................................... 21

Changed Figure 25............................................................................................................................................................... 22

3

bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

www.ti.com.cn

5 Device Options

DEVICE

FUNCTION

V_RECT-OVP

15 V

V_RECT-REG

Track

V_BAT-REG

4.20 V

NTC MONITORING

JEITA

bq51050B

bq51051B

bq51052B

4.20-V Li-Ion Wireless Battery Charger

4.35-V Li-Ion Wireless Battery Charger

4.40-V Li-Ion Wireless Battery Charger

15 V

Track

4.35 V

JEITA

15 V

Track

4.40 V

Modified JEITA

6 Pin Configuration and Functions

YFP Package

28-Pin DSBGA

Top View

RHL Package

20-Pin VQFN With Exposed Thermal Pad

Top View

1

2

3

4

A

B

C

D

E

F

PGND

AC1

BOOT1

BAT

2

3

4

5

6

7

8

9

19

18

17

16

15

14

13

12

AC2

BOOT2

BAT

AC2

RECT

BAT

AC1

RECT

BAT

AC1

BOOT1

BAT

RECT

BOOT2

CLAMP2

COMM2

FOD

Thermal

Pad

CLAMP1

COMM1

CHG

AD-EN

AD

TS/CTRL

ILIM

COMM2

TS/CTRL

ILIM

CLAMP2

FOD

CLAMP1

AD-EN

TERM

COMM1

CHG

The exposed thermal pad should be

connected to ground.

G

EN2

AD

4

bq51050B, bq51051B, bq51052B

www.ti.com.cn

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

Pin Functions

DSBGA VQFN

I/O

DESCRIPTION

NAME

AC1

B3, B4

B1, B2

2

I

Input power from receiver coil.

AC2

19

If AD functionality is used, connect this pin to the wired adapter input. When V_AD-Presis applied to

this pin wireless charging is disabled and AD_ENn is driven low. Connect a 1-µF capacitor from AD

to PGND. If unused, the capacitor is not required and AD should be connected directly to PGND.

AD

G4

9

8

I

AD-EN

F3

D1

D2

D3

D4

C4

C1

F4

E3

O

Push-pull driver for external PFET when wired charging is active. Float if not used.

BAT

4

O

Output pin, delivers power to the battery while applying the internal charger profile.

BOOT1

BOOT2

CHG

3

17

7

O

Bootstrap capacitors for driving the high-side FETs of the synchronous rectifier. Connect a 10-nF

ceramic capacitor from BOOT1 to AC1 and from BOOT2 to AC2.

Open-drain output – active when BAT is enabled. Float if not used.

CLAMP1

5

Open-drain FETs which are used for a non-power dissipative overvoltage AC clamp protection.

When the RECT voltage goes above 15 V, both switches will be turned on and the capacitors will

act as a low impedance to protect the device from damage. If used, capacitors are used to connect

CLAMP1 to AC1 and CLAMP2 to AC2. Recommended connections are 0.47-µF capacitors.

CLAMP2

COMM1

COMM2

E2

E4

E1

16

6

O

Open-drain outputs used to communicate with primary by varying reflected impedance. Connect a

capacitor from COMM1 to AC1 and a capacitor from COMM2 to AC2 for capacitive load modulation.

For resistive modulation connect COMM1 and COMM2 to RECT through a single resistor. See

Communication Modulator for more information.

15

Used to set priority between wireless power and wired power. EN2 low enables wired charging

source if AD input voltage is present. EN2 high disables wired charging source and wireless power

is enabled if present.

EN2

FOD

ILIM

G2

F2

G1

11

14

12

I

Input for the rectified power measurement. See WPC v1.2 Compatibility for details.

Programming pin for the battery charge current. The total resistance from ILIM to PGND (R_ILIM) sets

I/O the charge current. Figure 32 shows R_ILIMto be R₁+ R_FOD. Details can be found in Electrical

Characteristics and Battery Charge Current Setting Calculations.

A1

A2

A3

A4

PGND

1, 20

–

Power ground

Filter capacitor for the internal synchronous rectifier. Connect a ceramic capacitor to PGND.

Depending on the power levels, the value may be from 4.7 μF to 22 μF.

RECT

TERM

C2, C3

18

10

O

I

Input that is used to set the termination threshold. Termination current is the battery current level

below which the charge process will cease. The termination current is set as a percentage of the

charge current. See Battery Charge Current Setting Calculations for more details.

G3

Temperature Sense (TS) and Control (CTRL) pin functionality. For the TS functionality connect

TS/CTRL to ground through a Negative Temperature Coefficient (NTC) resistor. If an NTC function

is not desired, connect to PGND with a 10-kΩ resistor. As a CTRL pin pull low to send end power

transfer (EPT) fault to the transmitter or pull up to an internal rail to send EPT termination to the

transmitter. See Internal Temperature Sense (TS Function of the TS/CTRL Pin) for more details.

TS/CTRL

—

F1

—

13

I

PAD

—

The exposed thermal pad should be connected to ground (PGND).

5

bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

www.ti.com.cn

7 Specifications

7.1 Absolute Maximum Ratings⁽¹⁾⁽²⁾

over operating free-air temperature range (unless otherwise noted)

MIN

–0.3

–0.8

–0.3

MAX

UNIT

RECT, COMM1, COMM2, BAT, CHG, CLAMP1, CLAMP2

AC1, AC2

20

30

26

7

V

Input voltage

AD, AD-EN

V

BOOT1, BOOT2

V

EN2, TERM, FOD, TS/CTRL, ILIM

V

A(RMS)

A

Input current

AC1, AC2

BAT

2

Output current

1.5

15

1.0

150

CHG

mA

A

Output sink current

COMM1, COMM2

Junction temperature, T_J

Storage temperature, T_stg

–40

–65

°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to the VSS terminal, unless otherwise noted.

7.2 ESD Ratings

VALUE

±2000

±500

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

V_(ESD)

Electrostatic discharge

V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

4

MAX UNIT

V_IN

I_IN

Input voltage range

Input current

RECT

10

1.5

0.8

15

V

A

Internal Rectifier (voltage monitored at RECT node)

bq51050B, bq51051B

bq51052B

I_BAT

BAT(output) current

BAT

A

V_AD

Adapter voltage

Sink current

AD

V

I_AD-EN

I_COMM

T_J

AD-EN

COMM

1

mA

°C

COMM sink current

Junction temperature

500

125

0

7.4 Thermal Information

bq51050B, bq51051B, bq51052B

THERMAL METRIC⁽¹⁾

YFP (DSGBA)

RHL (VQFN)

20 PINS

37.7

UNIT

28 PINS

58.9

0.2

R_θJA

R_θJC(top)

R_θJB

ψ_JT

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W

35.5

9.1

13.6

Junction-to-top characterization parameter

Junction-to-board characterization parameter

1.4

0.5

ψ_JB

8.9

13.5

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

6

bq51050B, bq51051B, bq51052B

www.ti.com.cn

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

Thermal Information (continued)

bq51050B, bq51051B, bq51052B

THERMAL METRIC⁽¹⁾

YFP (DSGBA)

28 PINS

n/a

RHL (VQFN)

20 PINS

2.7

UNIT

R_θJC(bot)

Junction-to-case (bottom) thermal resistance

°C/W

7.5 Electrical Characteristics

Over junction temperature range 0°C ≤ T_J≤ 125°C and recommended supply voltage (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_UVLO

Undervoltage lockout

V_RECT: 0 V → 3 V

2.6

2.7

2.8

V

mV

V

V_HYS-UVLO

V_OVP

V_HYS-OVP

Hysteresis on UVLO

V_RECT: 3 V → 2 V

V_RECT: 5 V → 16 V

V_RECT: 16 V → 5 V

250

15

Input overvoltage threshold

Hysteresis on OVP

14.5

15.5

150

5.11

mV

V

(1)

V_RECT-REG

V_RECTregulation voltage

I_LOADHysteresis for dynamic V_RECTthresholds as a %

of I_ILIM

I_LOAD

I_LOADfalling

5%

300

8.3

3.1

V_BAT= 3.5 V,

V_TRACK

Tracking V_RECTregulation above V_BAT

mV

V

I_BAT≥ 500 mA

V_RECT-REV= V_BAT– V_RECT

V_BAT= 10 V

,

V_RECT-REV

V_RECT-DPM

Rectifier reverse voltage protection at the BAT(output)

9

Rectifier undervoltage protection, restricts I_BATat

V_RECT-DPM

3

3.2

V

QUIESCENT CURRENT

I_BAT= 0 mA, 0°C ≤ T_J≤ 85°C

I_BAT= 300 mA, 0°C ≤ T_J≤ 85°C

8

2

10

3

mA

Active chip quiescent current consumption from RECT

(when wireless power is present)

I_RECT

Quiescent current at the BAT when wireless power is

disabled (Standby)

I_Q

V_BAT= 4.2 V, 0°C ≤ T_J≤ 85°C

12

20

µA

ILIM SHORT PROTECTION

bq51050B,

bq51051B

Highest value of ILIM resistor considered a fault

(short).

Monitored for I_BAT> I_{LIM_SHORT, OK}

R_ILIM: 200 Ω → 50 Ω. I_BAT

latches off, cycle power to

reset

120

235

R_ILIM-SHORT

Ω

bq51052B

t_DGL-Short

Deglitch time transition from ILIM short to I_BATdisable

1

145

75

ms

mA

bq51050B,

bq51051B

110

55

165

95

I_{LIM_SHORT,}

I_LIM-SHORT,OKenables the I_ILIMshort comparator when

I_BATis greater than this value

I_BAT: 0 mA → 200 mA

I_BAT: 200 mA → 0 mA

OK

bq51052B

I_LIM-SHORT,

Hysteresis for I_LIM-SHORT,OKcomparator

Maximum output current limit

30

mA

A

OK

HYSTERESIS

Maximum I_BATthat will be delivered for up

to 1 ms when ILIM is shorted to PGND

I_BAT-CL

2.4

BATTERY SHORT PROTECTION

V_BAT(SC)

BAT pin short-circuit detection/precharge threshold

V_BAT: 3 V → 0.5 V, no deglitch

V_BAT: 0.5 V → 3 V

bq51050B,

0.75

0.8

0.85

V

V_BAT(SC)-HYSV_BAT(SC)hysteresis

100

mV

12

18

22

25

Source current to BAT pin during short-circuit

detection

bq51051B

I_BAT(SC)

V_BAT= 0 V

mA

bq51052B

VOLTAGE REGULATION PHASE

bq51050B,

0.35 *

I_BULK

bq51051B

I_BATthreshold during Voltge Regulation Phase that

changes V_RECTlevel from V_BAT+V_TRACKto V_RECT-REG

I_EndTrack

I_BATdecreasing

0.05 *

I_BULK

bq51052B

(1) V_RECT-REGis overridden when rectifier foldback mode is active (V_RECT-REG-V_TRACK).

7

bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

www.ti.com.cn

Electrical Characteristics (continued)

Over junction temperature range 0°C ≤ T_J≤ 125°C and recommended supply voltage (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

PRECHARGE

V_LOWV

Precharge to fast charge transition threshold

V_BAT: 2 V → 4 V

2.9

3.0

3.1

V

V_LOWV> V_BAT> V_BAT(SC)

I_BAT: 50 mA – 300 mA

Precharge current as a percentage of the programmed

K_PRECHG

18%

20%

23%

charge current setting (I_BULK

I_BATduring precharge

Precharge time-out

)

I_PRECHG

V_LOWV> V_BAT> V_BAT(SC), I_BULK= 500 mA

V_BAT(SC)< V_BAT< V_LOWV

100

30

mA

min

ms

t_precharge

t_DGL1(LOWV)

t_DGL2(LOWV)

OUTPUT

Deglitch time, pre- to fast-charge

Deglitch time, fast- to precharge

25

bq51050B

4.16

4.30

4.36

4.20

4.35

4.40

110

4.22

V_OREG

Regulated BAT(output) voltage

Drop-out voltage, RECT to BAT

I_BAT= 1000 mA

I_BAT= 1 A

bq51051B

bq51052B

4.37

4.44

190

V

V_DO

mV

R_LIM= K_ILIM/ I_IBULK(500

mA - 1.5 A)

bq51050B,

bq51051B

K_ILIM

Current programming factor

Battery charging current limits

303

314

321

AΩ

R_LIM= K_ILIM/ I_IBULK(500

mA - 1.0 A)

bq51052B

bq51050B,

bq51051B

500

1,500

1,000

I_BULK

K_ILIM303 to 321

mA

bq51052B

t_fast-charge

I_BAT-R

Fast-charge timer

V_LOWV< V_BAT< V_BAT-REG

10

hours

mA

Battery charge current limit programming range

Current limit during communication

1500

420

I_COMM-CL

330

200

390

mA

TERMINATION

Programmable termination current as a percentage of

I_IBULK

K_TERM

I_TERM-Th

I_TERM

R_TERM= %I_IBULKx K_TERM(I_BULK= 500 mA)

240

100

50

280

55

Ω/%

mA

µA

Termination current from BAT, defined with K_TERM, as I_BATdecreasing, R_TERM= 2.4k Ω, I_BULK

the current that terminates the charge cycle

=

1000 mA

Constant current at the TERM pin to bias the

termination reference

40

V_BAT-REGV_BAT-REGV_BAT-REG

–135mV –110mV –90mV

bq51050B

bq51051B

bq51052B

V

V_BAT-REGV_BAT-REGV_BAT-REG

–125mV –95mV –70mV

V_RECH

Recharge threshold

V_BAT-REGV_BAT-REGV_BAT-REG

–125mV

–95mV

–70mV

I_Termination

Termination current setting limits

120

mA

V

TS / CTRL FUNCTIONALITY

I_TSB< 100 µA (periodically

Internal TS bias voltage (V_TSis the voltage at the

TS/CTRL pin, V_TSBis the internal bias voltage)

V_TSB

2

2.2

2.4

driven see t_TS/CTRL-Meas

V_TS: 50% → 60%

V_TS: 60% → 50%

V_TS: 40% → 50%

V_TS: 50% → 40%

V_TS: 25% → 15%

V_TS: 15% → 25%

V_TS: 20% → 5%

V_TS: 5% → 20%

)

V_0C-R

Rising threshold

57

58.7

2.4

47.8

2

60 %V_TSB

%V_TSB

V_0C-Hyst

V_10C

V_10C-Hyst

V_45C

V_45C-Hyst

V_60C

Hysteresis on 0°C Comparator

Rising threshold

46

18

12

49 %V_TSB

%V_TSB

Hysteresis on 10°C Comparator

Falling threshold

19.6

3

21 %V_TSB

%V_TSB

Hysteresis on 45°C Comparator

Falling threshold

13.1

1

14 %V_TSB

%V_TSB

V_60C-Hyst

Hysteresis on 60°C Comparator

I_BULKreduction percentage at 45°C (in full JEITA mode

- N/A for bq51052B)

I_45C

V_TS: 25% → 15%, I_BAT= I_BULK

45%

50%

55%

bq51050B

bq51051B

bq51052B

4.06

4.2

V_O-J

Voltage regulation during JEITA temperature range

Voltage on CTRL pin for a high

V

4.2

V_CTRL-HI

0.2

5

8

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Electrical Characteristics (continued)

Over junction temperature range 0°C ≤ T_J≤ 125°C and recommended supply voltage (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

V_CTRL-LOW

t_TS/CTRL-Meas

t_TS-Deglitch

Voltage on CTRL pin for a low

0

0.1

V

Time period of TS/CTRL measurements (when V_TSBis TS bias voltage is only driven when

being driven internally)

24

10

20

ms

kΩ

communication packets are sent

Deglitch time for all TS comparators

Pullup resistor for the NTC network. Pulled up to the

TS bias LDO.

NTC-Pullup

18

22

Nominal resistance requirement at 25°C of the NTC

resistor

NTC-R_NOM

NTC-Beta

10

kΩ

Beta requirement for accurate temperature sensing

through the above specified thresholds

3380

Ω

THERMAL PROTECTION

T_J-SD

Thermal shutdown temperature

Thermal shutdown hysteresis

155

20

°C

T_J-Hys

OUTPUT LOGIC LEVELS ON CHG

V_OL

Open-drain CHG pin

I_SINK= 5 mA

500

1

mV

µA

V_CHG= 20 V,

0°C ≤ T_J≤ 85°C

I_OFF,CHG

CHG leakage current when disabled

COMM PIN

R_DS-

COMM1 and COMM2

V_RECT= 2.6 V

1

2

Ω

ON(COMM)

f_COMM

Signaling frequency on COMM pin

COMM pin leakage current

kb/s

µA

V_COMM1= 20 V,

V_COMM2= 20 V

I_OFF,COMM

1

CLAMP PIN

R_DS-

CLAMP1 and CLAMP2

0.75

Ω

ON(CLAMP)

ADAPTER ENABLE

V_AD-Pres

V_AD-PresH

I_AD

V_ADRising threshold voltage. EN-UVLO

V_AD0 V → 5 V

3.5

3.6

3.8

V

V_AD-Preshysteresis, EN-HYS

Input leakage current

V_AD5 V → 0 V

400

mV

µA

V_RECT= 0 V, V_AD= 5 V

60

Pullup resistance from AD-EN to BAT when adapter

mode is disabled and VBAT > VAD, EN-OUT

R_AD

V_AD= 0 V, V_BAT= 5 V

200

4.5

350

Ω

Voltage difference between V_ADand V_AD-ENwhen

adapter mode is enabled, EN-ON

V_AD-Diff

V_AD= 5 V, 0°C ≤ T_J≤ 85°C

3

5

V

SYNCHRONOUS RECTIFIER

bq51050B,

bq51051B

80

20

115

50

140

65

I_BATat which the synchronous rectifier enters half

synchronous mode, SYNC_EN

I_BAT-SR

I_BAT200 mA → 0 mA

bq51052B

mA

V

bq51050B,

bq51051B

25

I_BAT-SRH

Hysteresis for I_BAT,SR(full-synchronous mode enabled) I_BAT0 mA → 200 mA

bq51052B

28

High-side diode drop when the rectifier is in half

synchronous mode

V_HS-DIODE

I_AC-VRECT= 250 mA, and T_J= 25°C

0.7

EN2

V_IL

Input low threshold for EN2

Input high threshold for EN2

EN2 pulldown resistance

0.4

V

V_IH

1.3

R_{PD, EN}

ADC

200

kΩ

0 W – 5 W received power after calibration

of Rx magnetics losses

P_owerREC

Received power measurement

0.25

W

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7.6 Typical Characteristics

100

90

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

Pre-charge & fast charge mode

Taper mode

0

1

2

3

4

5

0.00

1.00

2.00

3.00

4.00

5.00

Output Power (W)

Figure 1. Rectifier Efficiency

Output Power (W)

Figure 2. IC Efficiency (AC Input to DC Output)

5.50

5.00

4.50

4.00

3.50

3.00

2.50

2.00

1.50

6.0

5.0

4.0

3.0

Vrect

Vbat

Pre-charge & fast charge mode

2.0

Taper mode

Precharge & fast charge mode

Taper mode

R_ILIM=600W

1.0

0.00

0.20

0.40

Output Current (A)

Figure 3. V_RECT, V_BATversus Output Current

0.60

0.80

1.00

0.0

0.1

0.2

0.3

0.4

0.5

0.6

Output Current (A)

Figure 4. V_RECTversus Output Current at R_ILIM=600 Ω (I_LIM

=

523 mA)

0.008

70

Pre-charge & fast charge mode

0.007

0.006

0.005

0.004

0.003

0.002

0.001

0

Taper mode

60

50

40

30

20

10

0

0.2

0.4

Output Current (A)

Figure 5. Output Ripple versus Output Current

0.6

0.8

1

1.2

0

1

2

3

4

Output Power (W)

Figure 6. System Efficiency (DC Input to DC Output)

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Typical Characteristics (continued)

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0

3

3.3

3.6

3.9

4.2

4.5

0

0.06

0.12

0.18

0.24

0.3

V_BAT(V)

I_BATduring Taper Mode (A)

D001

Figure 7. bq51052B 300-mA Fast Charge Efficiency (DC

Input to DC Output)

Figure 8. bq51052B 300-mA Taper Charge Efficiency (DC

Input to DC Output)

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0

100%

90%

80%

70%

60%

50%

40%

30%

20%

10%

0

3

3.3

3.6

3.9

4.2

4.5

0

0.2

0.4

0.6

0.8

1

V_BAT(V)

I_BATduring Taper Mode (A)

D001

Figure 9. bq51052B 800-mA Fast Charge Efficiency (DC

Input to DC Output)

Figure 10. bq51052B 800-mA Taper Charge Efficiency (DC

Input to DC Output)

V_RECT

V_BAT

I_BAT

Figure 11. Battery Insertion in Precharge Mode

Figure 12. Battery Insertion in Fast-Charge Mode

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Typical Characteristics (continued)

V_RECT

V_TS/CTRL

V_BAT

I_BAT

Figure 13. TS Fault

Figure 14. TS Ground Fault

V_TS/CTRL

V_RECT

V_BAT

I_BAT

V_BAT

I_BAT

Figure 16. JEITA Functionality (Rising Temp) -

bq51050B/bq51051B

Figure 15. Precharge to Fast-Charge Transition

V_RECT

V_TS/CTRL

V_BAT

I_BAT

V_BAT

I_BAT

Figure 18. Battery Short to Precharge Mode Transition

Figure 17. JEITA Functionality (Falling Temp) -

bq51050B/bq51051B

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8 Detailed Description

8.1 Overview

8.1.1 A Brief Description of the Wireless System

A wireless system consists of a charging pad (primary, transmitter) and the secondary-side equipment. There are

coils in the charging pad and in the secondary equipment which magnetically couple to each other when the

equipment is placed on the charging pad. Power is transferred from the primary to the secondary by transformer

action between the coils. Control over the amount of power transferred is achieved by changing the frequency of

the primary drive.

The secondary can communicate with the primary by changing the load seen by the primary. This load variation

results in a change in the primary coil current, which is measured and interpreted by a processor in the charging

pad. The communication is digital - packets are transferred from the secondary to the primary. Differential bi-

phase encoding is used for the packets. The rate is 2-kbps.

Various types of communication packets have been defined. These include identification and authentication

packets, error packets, control packets, power usage packets, end of power packet and efficiency packets.

The primary coil is powered off most of the time. It wakes up occasionally to see if a secondary is present. If a

secondary authenticates itself to the primary, the primary remains powered up. The secondary maintains full

control over the power transfer using communication packets.

Power

bq5105x

Voltage/

Current

Conditioning

System

AC to DC

Drivers

Rectification

Communication

LI-Ion

Battery

Charger

Controller

V/I

Sense

Controller

bq500210

Transmitter

Receiver

Figure 19. WPC Wireless Power Charging System Indicating the Functional Integration of the bq5105x

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8.2 Functional Block Diagram

RECT

I

BAT

V_OUT,FB

V_REF,ILIM

V_ILIM

_

+

_

+ V_OUT,REG

V_REF,IABS

V_IABS,FB

+

_

ILIM

V_IN,FB

+

_

V_IN,DPM

AD

+

_

VREF_AD,OVP

BOOT2

BOOT1

_

+

VREF_AD,UVLO

AD-EN

FOD

AC1

AC2

Sync

Rectifier

Control

V_REF,TS-BIAS

V_FOD

+

_

COMM1

COMM2

+

_

TS_0

V_BG,REF

V_IN,FB

V_OUT,FB

V_ILIM

TS_10

+

_

DATA_

OUT

V_IABS,FB

TS_45

TS_60

ADC

+

_

TS/CTRL

CLAMP1

CLAMP2

V_IABS,REF

V_IC,TEMP

V_FOD

+

_

Digital Control

and Charger

+

_

TS_DETECT

VREF_100MV

50µ A

V_RECT

V_OVP,REF

+

_

OVP

+

_

CHG

TERM

EN2

ILIM

200kW

PGND

Copyright

8.3 Feature Description

8.3.1 Using the bq5105x as a Wireless Li-Ion/Li-Pol Battery Charger (With Reference to Functional Block

Diagram)

Functional Block Diagram is the schematic of a system which uses the bq5105x as a direct battery charger.

When the system shown in Functional Block Diagram is placed on the charging pad (transmitter), the receiver

coil couples to the magnetic flux generated by the coil in the charging pad which consequently induces a voltage

in the receiver coil. The internal synchronous rectifier feeds this voltage to the RECT pin which has the filter

capacitor C₃.

14

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ZHCSAX2F –JULY 2012–REVISED JUNE 2017

Feature Description (continued)

The bq5105x identifies and authenticates itself to the primary using the COMM pins by switching on and off the

COMM FETs and hence switching in and out C_COMM. If the authentication is successful, the transmitter will

remain powered on. The bq5105x measures the voltage at the RECT pin, calculates the difference between the

actual voltage and the desired voltage V_RECT-REGand sends back error packets to the primary. This process goes

on until the RECT voltage settles at V_RECT-REG

.

During power-up, the LDO is held off until the V_RECT-REGthreshold converges. The voltage control loop ensures

that the output (BAT) voltage is maintained at V_BAT-REG. The values of V_BATand V_RECTare dependant on the

battery charge mode. The bq5105x continues to monitor the V_RECTand V_BATand sends error packets to the

primary every 250 ms. The bq5105x regulates the V_RECTvoltage very close to battery voltage, this voltage

tracking process minimizes the voltage difference across the internal LDO and maximizes the charging efficiency.

If a large transient occurs, the feedback to the primary speeds up to every 32 ms in order to converge on an

operating point in less time.

8.3.2 Details of a Qi Wireless Power System and bq5105xB Power Transfer Flow Diagrams

The bq5105xB integrates a fully compliant WPC v1.2 communication algorithm in order to streamline receiver

designs (no extra software development required). Other unique algorithms such as Dynamic Rectifier Control

are also integrated to provide best-in-class system performance. This section provides a high level overview of

these features by illustrating the wireless power transfer flow diagram from start-up to active operation.

During start-up operation, the wireless power receiver must comply with proper handshaking to be granted a

power contract from the TX. The TX will initiate the handshake by providing an extended digital ping. If an RX is

present on the TX surface, the RX will then provide the signal strength, configuration and identification packets to

the TX (see volume 1 of the WPC specification for details on each packet). These are the first three packets sent

to the TX. The only exception is if there is a shutdown condition on the EN1/EN2, AD, or TS/CTRL pins where

the Rx will shut down the TX immediately. Once the TX has successfully received the signal strength,

configuration and identification packets, the RX will be granted a power contract and is then allowed to control

the operating point of the power transfer. With the use of the bq5105xB Dynamic Rectifier Control algorithm, the

RX will inform the TX to adjust the rectifier voltage above 5 V before enabling the output supply. This method

enhances the transient performance during system start-up. See Figure 20 for the start-up flow diagram details.

15

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ZHCSAX2F –JULY 2012–REVISED JUNE 2017

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Feature Description (continued)

Çó towered

wiꢀhouꢀ ꢁó

!cꢀive

Çó 9xꢀended 5igiꢀal ting

{end 9tÇ packeꢀ wiꢀh

reason value

9ꢂ2ꢄ!5ꢄÇ{ꢄ/Çꢁ[ 9tÇ

/ondiꢀion?

ò9{

ꢂꢃ

Ldenꢀificaꢀion &

/onfiguraꢀion & {{, ꢁeceived

by Çó?

ꢂꢃ

ò9{

tower /onꢀracꢀ 9sꢀablished.

!ll proceeding conꢀrol is

dicꢀaꢀed by ꢀhe ꢁó.

{end conꢀrol error packeꢀ ꢀo

increase ë_ꢁ9/Ç

ë_ꢁ9/Ç< ë_{ꢁ9/Ç-ꢁ9D}

?

ò9{

ꢂꢃ

{ꢀarꢀup operaꢀing poinꢀ

esꢀablished. 9nable ꢀhe ꢁó

ouꢀpuꢀ.

ꢁó !cꢀive tower

Çransfer {ꢀage

Figure 20. Wireless Power Start-up Flow Diagram

16

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ZHCSAX2F –JULY 2012–REVISED JUNE 2017

Feature Description (continued)

Once the start-up procedure has been established, the RX will enter the active power transfer stage. This is

considered the “main loop” of operation. The Dynamic Rectifier Control algorithm will determine the rectifier

voltage target based on a percentage of the maximum output current level setting (set by K_ILIMand the I_ILIM

resistance to PGND). The RX will send control error packets in order to converge on these targets. As the output

current changes, the rectifier voltage target will dynamically change. As a note, the feedback loop of the WPC

system is relatively slow where it can take up to 90 ms to converge on a new rectifier voltage target. It should be

understood that the instantaneous transient response of the system is open loop and dependent on the RX coil

output impedance at that operating point. More details on this will be covered in the section Receiver Coil Load-

Line Analysis. The “main loop” will also determine if any conditions are true and will then discontinue the power

transfer. Figure 21 shows the active power transfer loop.

wó !ctive ꢁoꢀer

Çransfer {tage

wó {hutdoꢀn

conditions per

the 9ꢁÇ Çable?

Çó ꢁoꢀered

ꢀithout wó

!ctive

{end 9ꢁÇ packet ꢀith

reason value

ò9{

bh

ë_.!Ç< ë_[ꢂíë

bh

ë_w9/Çtarget = ë_w9/Ç-w9D

{end control error packets

to convergeꢃ

ꢃ

ë_w9/Çtarget = ë_.!Ç+ ë_Çw!/Y

{end control error packets

to convergeꢃ

ꢃ

L_.!Ç> Y_ꢁw9/ID% of L_.Ü[Y

?

bh

ë_w9/Çtarget = ë_w9/Ç-w9D

ꢃ

{end control error packets

to convergeꢃ

ꢄeasure wectified ꢁoꢀer

and {end ëalue to Çó

Ç9wꢄ {Ç!Ç9

Figure 21. Active Power Transfer Flow Diagram

17

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Feature Description (continued)

tower

Çransfer

{end 9tÇ /harge

/ompleꢂe

ë_.!Ç> ë_ꢁ9/I

?

ò9{

ë_L[Lꢀ< ë_Ç9ꢁꢀ

?

ò9{

bh

ë_ꢁ9/ÇÇargeꢂ = ë_{ꢁ9/Ç-ꢁ9D}

L_.!Ç= L_.!Ç({/)

ë_.!Ç< ë_.!Ç({/)

ò9{

bh

ë_ꢁ9/ÇÇargeꢂ = ë_{ꢁ9/Ç-ꢁ9D}

L_ꢃÜÇ= L_tꢁ9/ID

ë_.!Ç({/)< ë_.!Ç< ë_[ꢃíë

ò9{

bh

ë_[ꢃíë< ë_.!Ç< ë_ꢃꢁ9D

bh

ë_ꢁ9/ÇÇargeꢂ = ë_.!Ç+ ë_Çꢁ!/Y

L_.!Ç= L_.Ü[Y

L_.!Ç< L_9ndÇrack

?

ë_ꢁ9/ÇÇargeꢂ = ë_{ꢁ9/Ç-ꢁ9D}

bh

!5 ꢄ Ç{ꢄ/Çꢁ[

9tÇ /ondiꢂion?

ò9{

{end 9tÇ

Figure 22. TERM STATE Flow Diagram of bq5105XB

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ZHCSAX2F –JULY 2012–REVISED JUNE 2017

Feature Description (continued)

8.3.3 Battery Charge Profile

The battery is charged in three phases: precharge, fast-charge constant current and constant voltage. A voltage-

based battery pack thermistor monitoring input (TS function of the TS/CTRL pin) is included that monitors battery

temperature for safe charging. The TS function for bq51050B and bq51051B is JEITA compatible. The TS

function for the bq51052B modifies the current regulation differently than standard JEITA. See Battery-Charger

Safety and JEITA Guidelines for more details.

The rectifier voltage follows BAT voltage plus V_TRACKfor any battery voltage above V_LOWVto full regulation

voltage and most of the taper charging phase. If the battery voltage is below V_LOWVthe rectifier voltage increases

to V_RECT-REG

.

If I_BATis less than I_EndTrack(a percentage of I_BULK) during taper mode, the rectifier voltage increases to V_RECT-REG

.

The charge profile for the bq51050B and bq51051B is shown in Figure 23 while the bq51052B is shown in

Figure 24.

tre-charge

thase

/urrenꢀ wegulaꢀion thase

ëolꢀage wegulaꢀion thase

ë_w9/Ç-w9D

ë_w9/Ç= ë_.!Ç+ ë_Çw!/Y

ë_w9/Ç= ë_w9/Ç-w9D

ë_ꢁw9D

L_.!Ç= L_.Ü[Y

ë_.!Ç= ë_ꢁw9D

L_.ulk

ë_w9/Ç

=

ë_.!Ç+ ë_Çw!/Y

ë_.!Ç

ë_[ꢁíë

ë_.!Ç({/)

ë_.!Ç

L_9ndÇrack

L_.!Ç= Çaper

L_Ç9wꢂ-Çh

L_tw9/ID

L_.!Ç({/)

L_.!Ç

L_.!Ç= ꢁff

9xits

ë_w9/Ç-Çw!/Y

ë_w9/Ç-w9D

ë_w9/Ç-Çw!/Y

Çó hff

Figure 23. bq51050B and bq51051B Li-Ion Battery Charge Profile

tre-charge

thase

/urrenꢀ wegulaꢀion thase

L_.!Ç= L_.Ü[Y

ëolꢀage wegulaꢀion thase

ë_w9/Ç= ë_.!Ç+ ë_Çw!/Y

ë_w9/Ç-w9D

ë_ꢁw9D

ë_w9/Ç= ë_w9/Ç-w9D

ë_.!Ç= ë_ꢁw9D

L_.ulk

ë_w9/Ç

=

ë_.!Ç+ ë_Çw!/Y

ë_.!Ç

ë_[ꢁíë

ë_.!Ç({/)

ë_.!Ç

L_.!Ç= Çaper

L_Ç9wꢂ-Çh

L_tw9/ID

L_.!Ç({/)

L_.!Ç

L_.!Ç= ꢁff

ë_w9/Ç-w9D

ë_w9/Ç-Çw!/Y

Çó hff

Figure 24. bq51052B Li-Ion Battery Charge Profile

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Feature Description (continued)

8.3.4 Battery Charging Process

8.3.4.1 Precharge Mode (V_BAT≤ V_LOWV

)

The bq5105X enters precharge mode when V_BAT≤ V_LOWV. Upon entering precharge mode, battery charge

current limit is set to I_PRECHG. During precharge mode, the charge current is regulated to K_PRECHGpercent of the

fast charge current (I_BULK) setting. For example, if IBULK is set to 800 mA, then the precharge current would

have a typical value of 160 mA.

If the battery is deeply discharged or shorted (V_BAT< V_BAT(SC)), the bq5105X applies I_BAT(SC)current to bring the

battery voltage up to acceptable charging levels. Once the battery rises above V_BAT(SC), the charge current is

regulated to I_PRECHG

.

Under normal conditions, the time spent in this precharge region is a very short percentage of the total charging

time and this does not affect the overall charging efficiency for very long.

8.3.4.2 Fast Charge Mode / Constant Voltage Mode

Once V_BAT> V_LOWV, the bq5105x enters fast charge mode (Current Regulation Phase) where charge current is

regulated using the internal MOSFETs between RECT and BAT. Once the battery voltage charges up to V_BAT-

_REG, the bq5105x enters constant voltage (CV) phase and regulates battery voltage to V_OREGand the charging

current is reduced.

Once I_BATfalls below the termination threshold (I_TERM-Th), the charger sends an EPT (Charge Complete)

notification to the TX and enters high impedance mode.

8.3.4.3 Battery Charge Current Setting Calculations

8.3.4.3.1 R_ILIMCalculations

The bq5105x includes a means of providing hardware overcurrent protection by means of an analog current

regulation loop. The hardware current limit provides an extra level of safety by clamping the maximum allowable

output current (for example, a current compliance). The calculation for the total R_ILIMresistance is as follows:

Y_L[La

w₁=

t w_Ch5

w_L[La= w₁+ w_Ch5

L_.Ü[Y=

L_.Ü[Y

w_L[La

(1)

Where I_BULKis the programmed battery charge current during fast charge mode. When referring to the application

diagram shown in Figure 32, R_ILIMis the sum of R_FODand R₁(the total resistance from the ILIM pin to PGND).

8.3.4.3.2 Termination Calculations

The bq5105X includes a programmable upper termination threshold. The upper termination threshold is

calculated using Equation 2:

w_Ç9wa

Y_Ç9wa

w_Ç9wa= Y_Ç9wa* %L_.Ü[Y

%L_.Ü[Y=

(2)

The K_TERMconstant is specified in Electrical Characteristics as 240 Ω/%. The upper termination threshold is set

as a percentage of the charge current setting (I_BULK).

For example, if R_ILIMis set to 314 Ω, I_BULKwill be 1 A (314 ÷ 314). If the upper termination threshold is desired to

be 100 mA, this would be 10% of I_BULK. The R_TERMresistor would then equal 2.4 kΩ (240 × 10).

Termination can be disabled by floating the TERM pin. If the TERM pin is grounded the termination function is

effectively disabled. However, due to offsets of internal comparators, termination may occur at low battery

currents.

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Feature Description (continued)

8.3.4.4 Battery-Charger Safety and JEITA Guidelines

The bq5105x continuously monitors battery temperature by measuring the voltage between the TS/CTRL pin and

PGND. A negative temperature coefficient thermistor (NTC) and an external voltage divider typically develop this

voltage. The bq5105x compares this voltage against its internal thresholds to determine if charging is allowed. To

initiate a charge cycle, the voltage on TS/CTRL pin (V_TS) must be within the V_T1to V_T4thresholds. If V_TSis

outside of this range, the bq5105x suspends charge and waits until the battery temperature is within the V_T1to

V_T4range. Additional information on the Temperature Sense function can be found in Internal Temperature

Sense (TS Function of the TS/CTRL Pin).

8.3.4.4.1 bq51050B and bq51051B JEITA

If V_TSis within the ranges of V_T1and V_T2or V_T3and V_T4, the charge current is reduced to I_BULK/2. If V_TSis within

the range of V_T1and V_T3, the maximum charge voltage regulation is V_OREG. If V_TSis within the range of V_T3and

V_T4, the maximum charge voltage regulation is reduced to "NEW SPEC". Figure 25 summarizes the operation.

/harge /urrent: L_.Ü[Y

L_.Ü[Yꢁ 2

0 !

/harge ëoltage: ë_ꢀw9D

ë_ꢀ-W

0 ë

Ç1

(0° /)

Ç2

(10° /)

Ç3

(45° /)

Ç4

(60° /)

Figure 25. JEITA Compatible TS Profile for bq51050B and bq51051B

8.3.4.4.2 bq51052B Modified JEITA

The bq51052B has a modififed JEITA profile. The maximum charge current is not modified between V_T1and V_T2

or between V_T3and V_T4, it remains at I_BULK. The maximum charge voltage is reduced to V_O-Jwhen the V_TSis

between V_T3and V_T4.

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Feature Description (continued)

/harge /urrent: L_.Ü[Y

0 !

/harge ëoltage: ë_ꢀw9D

ë_ꢀ-W

0 ë

Ç1

(0° /)

Ç2

(10° /)

Ç3

(45° /)

Ç4

(60° /)

Figure 26. JEITA Compatible TS Profile for bq51052B

8.3.4.5 Input Overvoltage

If, for some condition (for example, a change in position of the equipment on the charging pad), the rectifier

voltage suddenly increases in potential, the voltage-control loop inside the bq5105x becomes active, and

prevents the output from going beyond V_BAT-REG. The receiver then starts sending back error packets every 32

ms until the RECT voltage comes back to an acceptable level, and then maintains the error communication every

250 ms.

If the input voltage increases in potential beyond V_OVP, the device switches off the internal FET and

communicates to the primary to bring the voltage back to V_RECT-REG. In addition a proprietary voltage protection

circuit is activated by means of C_CLAMP1and C_CLAMP2that protects the device from voltages beyond the maximum

rating.

8.3.4.6 End Power Transfer Packet (WPC Header 0x02)

The WPC allows for a special command to terminate power transfer from the TX termed End Power Transfer

(EPT) packet. WPC v1.2 specifies the reasons for sending a termination packet and their data field value. In

Table 1, the CONDITION column corresponds to the stimulus causing the bq5105x device to send the

hexidecimal code in the VALUE column.

Table 1. Termination Packets

REASON

VALUE

0x00

0x01

0x02

0x03

0x04

0x05

CONDITION

Unknown

AD > V_AD-Pres, TS/CTRL = V_CTRL-HI

I_BATfalls below I_TERM-Thduring Taper mode

T_J> 150°C or R_ILIM< R_ILIM-SHORT

TS < V_HOT, TS > V_COLD, or TS/CTRL < V_CTRL-LOW

Not Sent

Charge Complete

Internal Fault

Overtemperature

Overvoltage

Overcurrent

Not Sent

Battery is not coming out of precharge mode after Precharge time-out, or

fast charge time-out has occured.

Battery failure

0x06

Reconfigure

0x07

0x08

Not Sent

No Response

V_RECTtarget does not converge

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8.3.4.7 Status Output

The bq5105x provides one status output, CHG. This output is an open-drain NMOS device that is rated to 20 V.

The open-drain FET connected to the CHG pin will be turned on whenever the output (BAT) of the charger is

enabled. As a note, the output of the charger supply will not be enabled if the V_RECT-REGdoes not converge to the

no-load target voltage.

8.3.4.8 Communication Modulator

The bq5105x provides two identical, integrated communication FETs which are connected to the pins COMM1

and COMM2. These FETs are used for modulating the secondary load current which allows bq5105x to

communicate error control and configuration information to the transmitter.There are two methods to implement

load modulation, capacitive and resistive.

Capacitive load modulation is more commonly used. Capacitive load modulation is shown in Figure 27. In this

case, a capacitor is connected from COMM1 to AC1 and from COMM2 to AC2. When the COMM switches are

closed there is effectively a 22 nF capacitor connected between AC1 and AC2. Connecting a capacitor in

between AC1 and AC2 modulates the impedance seen by the coil, which will be reflected to the primary and

interpreted by the controller as a change in current.

AC1

AC2

47 nF

COMM1

COMM2

COMM_DRIVE

Figure 27. Capacitive Load Modulation

Figure 28 shows how the COMM pins can be used for resistive load modulation. Each COMM pin can handle at

most a 24 Ω communication resistor. Therefore, if a COMM resistor between 12 Ω and 24 Ω is required, COMM1

and COMM2 pins must be connected in parallel. bq5105x does not support a COMM resistor less than 12 Ω.

RECTIFIER

24 W

COMM1

COMM2

COMM_DRIVE

Figure 28. Resistive Load Modulation

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8.3.4.9 Adaptive Communication Limit

The Qi communication channel is established through backscatter modulation as described in the previous

sections. This type of modulation takes advantage of the loosely coupled inductor relationship between the RX

and TX coils. Essentially, the switching in-and-out of the communication capacitor or resistor adds a transient

load to the RX coil in order to modulate the TX coil voltage and current waveform (amplitude modulation). The

consequence of this technique is that a load transient (load current noise) from the mobile device has the same

signature. To provide noise immunity to the communication channel, the output load transients must be isolated

from the RX coil. The proprietary feature Adaptive Communication Limit achieves this by dynamically adjusting

the current limit of the regulator.

This can be seen in Figure 12. In this plot, an output load is limited to 400 mA during communications time. The

pulses on V_RECTindicate that a communication packet event is occurring. The regulator limits the load to a

constant 400 mA and, therefore, preserves communication.

8.3.4.10 Synchronous Rectification

The bq5105x provides an integrated, self-driven synchronous rectifier that enables high-efficiency AC to DC

power conversion. The rectifier consists of an all NMOS H-Bridge driver where the back gates of the diodes are

configured to be the rectifier when the synchronous rectifier is disabled. During the initial start-up of the WPC

system the synchronous rectifier is not enabled. At this operating point, the DC rectifier voltage is provided by the

diode rectifier. Once V_RECTis greater than V_UVLO, half synchronous mode will be enabled until the load current

surpasses I_BAT-SR. Above I_BAT-SRthe full synchronous rectifier stays enabled until the load current drops back

below the hysteresis level (I_BAT-SRH) where half synchronous mode is re-enabled.

8.3.4.11 Internal Temperature Sense (TS Function of the TS/CTRL Pin)

The bq5105x includes a ratiometric battery temperature sense circuit. The temperature sense circuit has two

ratiometric thresholds which represent hot and cold conditions. An external temperature sensor is recommended

to provide safe operating conditions to the receiver product. This pin is best used when monitoring the battery

temperature.

The circuits in Figure 29 allow for any NTC resistor to be used with the given V_HOTand V_COLDthresholds. The

thermister characteristics and threshold temperatures selected will determine which circuit is best for an

application.

ë_Ç{.

20 lQ

w₂

20 lQ

w₂

Ç{ꢀ/Çw[

w₁

w₃

/

3

/

3

bÇ/

Figure 29. NTC Circuit Options for Safe Operation of the Wireless Receiver Power Supply

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The resistors R1 and R3 can be solved by resolving the system of equations at the desired temperature

thresholds. The two equations are:

æ

ç

è

ö

÷

ø

R₃

R

+ R

1

TCOLD

(

)

NTC

R + R

+ R

(

NTC

)

3

NTC

1

TCOLD

%V_COLD

=

´100

æ

ç

è

ö

÷

ø

R₃

R

+ R

(

)

1

TCOLD

+ R2

R + R

+ R

1

(

)

3

NTC

TCOLD

(3)

(4)

æ

ö

÷

ø

R₃

R

+ R

1

THOT

(

NTC

)

NTC

ç

è

R + R

+ R

)

3

NTC

1

THOT

%V_HOT

=

´100

æ

ö

÷

ø

R₃

R

+ R

(

)

1

THOT

ç

è

+ R2

R + R

+ R

(

)

3

NTC

1

THOT

Where:

R_NTC

1

b

-

(

)

TCOLD

To

= R_oe

TCOLD

1

b

-

(

)

THOT

To

R_NTC

= R_oe

THOT

T_COLDand T_HOTare the desired temperature thresholds in degrees Kelvin. R_ois the nominal resistance at T₀

(25°C) and β is the temperature coefficient of the NTC resistor. For an example solution for part number ERT-

JZEG103JA see the BQ5105XB NTC Calculator Tool, (SLUS629).

Where,

T_COLD= 0°C (273.15°K)

T_HOT= 60°C (333.15°K)

β = 3380

R_o= 10 kΩ

The plot of the percent V_TSBversus temperature is shown in Figure 30:

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Figure 30. Example Solution for Panasonic Part # ERT-JZEG103JA

Figure 31 shows the periodic biasing scheme used for measuring the TS state. An internal TS_READ signal

enables the TS bias voltage for 25 ms. During this period the TS comparators are read (each comparator has a

10-ms deglitch) and appropriate action is taken based on the temperature measurement. After this 25-ms period

has elapsed the TS_READ signal goes low, which causes the TS/CTRL pin to become high impedance. During

the next 100-ms period, the TS voltage is monitored and compared to V_CTRL-HI. If the TS voltage is greater than

V_CTRL-HIthen a secondary device is driving the TS/CTRL pin and a CTRL = 1 is detected.

240ms

Figure 31. Timing Diagram for TS Detection Circuit

8.3.4.11.1 TS/CTRL Function

The TS/CTRL pin offers three functions:

•

NTC temperature monitoring

Charge done indication

Fault indication

When an NTC resistor is connected between the TS/CTRL pin and PGND, the NTC function is allowed to

operate. This functionality can effectively be disabled by connecting a 10 kΩ resistor from TS/CRTL to PGND. If

the TS/CTRL pin is pulled above V_CTRL-HI, the RX is shut down with the indication of a charge complete

condition. If the TS/CTRL pin is pulled below V_CTRL-LOW, the RX is shut down with the indication of a fault.

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8.3.4.11.2 Thermal Protection

The bq5105x includes thermal shutdown protection. If the die temperature reaches T_J-SD, the LDO is shut off to

prevent any further power dissipation. Once the temperature falls T_J-Hysbelow T_J-SD, operation can continue.

8.3.4.12 WPC v1.2 Compatibility

The bq5105x is a WPC v1.2 compatible device. In order to enable a Power Transmitter to monitor the power loss

across the interface as one of the possible methods to limit the temperature rise of Foreign Objects, the bq5105x

reports its Received Power to the Power Transmitter. The Received Power equals the power that is available

from the output of the Power Receiver plus any power that is lost in producing that output power. For example,

the power loss includes (but is not limited to) the power loss in the Secondary Coil and series resonant capacitor,

the power loss in the Shielding of the Power Receiver, the power loss in the rectifier, the power loss in any post-

regulation stage, and the eddy current loss in metal components or contacts within the Power Receiver. In the

WPC v1.2 specification, foreign object detection (FOD) is enforced, that means the bq5105x will send received

power information with known accuracy to the transmitter.

WPC v1.2 defines Received Power as “the average amount of power that the Power Receiver receives through

its Interface Surface, in the time window indicated in the Configuration Packet”.

A Receiver will be certified as WPC v1.2 only after meeting the following requirement. The device under test

(DUT) is tested on a Reference Transmitter whose transmitted power is calibrated, the receiver must send a

received power such that:

0 < (TX PWR) REF – (RX PWR out) DUT < 375 mW

(5)

This 250 mW bias ensures that system will remain interoperable.

WPC v1.2 Transmitters will be tested to see if they can detect reference Foreign Objects with a Reference

receiver. The WPC v1.2 specification allows much more accurate sensing of Foreign Objects than WPC v1.0.

A Transmitter can be certified as a WPC v1.2 only after meeting the following requirement. A Transmitter is

tested to see if it can prevent some reference Foreign Objects (disc, coin, foil) from exceeding their threshold

temperature (60°C, 80°C).

8.4 Device Functional Modes

The general modes of battery charging are described above in the Feature Description. The bq5105x devices

have several functional modes. Start-up refers to the initial power transfer and communication between the

receiver (bq5105x circuit) and the transmitter. Power transfer refers to any time that the TX and RX are

communicating and power is being delivered from the TX to the RX. Charge termination covers intentional

termination (charge complete) and unintentional termination (removal of the RX from the TX, over temperature or

other fault conditions).

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9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

9.1 Application Information

The bq51050B is an integrated wireless power receiver and charger in a single device. The device complies with

the WPC v1.2 specifications for a wireless power receiver. When paired with a WPC v1.2 compliant transmitter, it

can provide up to 5-W of power for battery charging. There are several tools available for the design of the

system. These tools may be obtained by checking the product page at www.ti.com/product/bq51050b.

9.2 Typical Application

9.2.1 bq51050B Used as a Wireless Power Receiver and Li-Ion/Li-Pol Battery Charger

The following application discussion covers the requirements for setting up the bq51050B in a Qi-compliant

system for charging a battery.

bq5105xB

AD-EN

AD

BAT

C_COMM1

C₄

C₃

COMM1

BOOT1

AC1

C_BOOT1

D₁

RECT

C₁

R₄

TI

TX

COIL

Wireless

Power

Transmitter

RX

COIL

PACK+

C₂

NTC

TS/CTRL

AC2

BOOT2

COMM2

R_OS

PACK-

C_BOOT2

CHG

C_COMM2

C_CLAMP2

C_CLAMP1

CLAMP2

CLAMP1

ILIM

TERM

EN2

Tri-State

Bi-State

HOST

R₅

PGND

FOD

R₁

R_FOD

Figure 32. Typical Application Schematic

9.2.1.1 Design Requirements

This application is for a 4.2-V Lithium-Ion battery to be charged at 800 mA. Because this is planned for a WPC

v1.2 solution, any of the Qi-certified transmitters can be used interchangeably so no discussion of the TX is

required. To charge a 4.20-V Li-Ion battery, the bq51050B will be chosen. Each of the components from the

application drawing will be examined. Temperature sensing of the battery must be done with JEITA

specifications. An LED indicator is required to notify the user if charging is active.

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Typical Application (continued)

9.2.1.2 Detailed Design Procedure

9.2.1.2.1 Series and Parallel Resonant Capacitor Selection

Shown in Figure 33, the capacitors C1 (series) and C2 (parallel) make up the dual resonant circuit with the

receiver coil. These two capacitors must be sized correctly per the WPC v1.2 specification. Figure 33 shows the

equivalent circuit of the dual resonant circuit:

/₁(/_s)

[•[

/₂(/_d)

Figure 33. Dual Resonant Circuit with the Receiver Coil

The power receiver design requirements in volume 1 of the WPC v1.2 specification highlights in detail the sizing

requirements. To summarize, the receiver designer will be required take inductance measurements with a fixed

test fixture. The test fixture is shown in Figure 34:

Magnetic

Interface

Surface

Attractor

(example)

Secondary Coil

Shielding (optional)

Mobile

Device

Spacer

d

z

Primary Shielding

Figure 34. WPC v1.2 Receiver Coil Test Fixture for the Inductance Measurement Ls’

The primary shield is to be 50 mm × 50 mm × 1 mm of Ferrite material PC44 from TDK Corp. The gap (dZ) is to

be 3.4 mm. The receiver coil, as it will be placed in the final system (for example, the back cover and battery

must be included if the system calls for this), is to be placed on top of this surface and the inductance is to be

measured at 1-V RMS and a frequency of 100 kHz. This measurement is termed Ls’. The measurement termed

Ls is the free-space inductance. Each capacitor can then be calculated using Equation 6:

1

C₁=

(2p´ ¦s)²´L'_s

æ

ö^-1

÷

ø

1

C = (¦ ´ 2p)²´L -

ç

2

D

s

C₁

è

(6)

Where f_Sis 100 kHz +5/–10% and f_Dis 1 MHz ±10%. C₁must be chosen first prior to calculating C₂. The quality

factor must be greater than 77 and can be determined by Equation 7:

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Typical Application (continued)

2p´ ¦_D´Ls

Q =

R

(7)

Where R is the DC resistance of the receiver coil. All other constants are defined above.

For this application, we will design with an inductance measurement (L) of 11 µH and an Ls' of 16 µH with a DC

resistance of 191 mΩ. Plugging Ls' into Equation 6 above, we get a value for C₁to be 158.3 nF. The range on

the capacitance is about 144 nF to 175 nF. To build the resulting value, the optimum solution is usually found

with 3 capacitors in parallel. This allows for more precise selection of values, lower effective resistance and

better thermal results. To get 158 nF, choose from standard values. In this case, the values are 68 nF, 47 nF and

39 nF for a total of 154 nF. Well in the required range. Now that C₁is chosen, the value of C₂can be calculated.

The result of this calculation is 2.3 nF. The practical solution for this is 2 capacitors, a 2.2 nF capacitor and a 100

pF capacitor. In all cases, these capacitors must have at least a 25-V rating. Solving for the quality factor (Q) this

solution shows a rating over 500.

9.2.1.2.2 COMM, CLAMP and BOOT Capacitors

For most applications, the COMM, CLAMP and BOOT capacitors will be chosen to match the Evaluation Module.

The BOOT capacitors are used to allow the internal rectifier FETs to turn on and off properly. These capacitors

are on the AC1 or AC2 lines to the Boot nodes and should have a minimum of 10-V rating. A 10-nF capacitor

with a 10-V rating is chosen.

The CLAMP capacitors are used to aid the clamping process to protect against overvoltage. Choosing a 0.47-µF

capacitor with a 25-V rating is appropriate for most applications.

The COMM capacitors are used to facilitate the communication from the RX to the TX. This selection can vary a

bit more than the BOOT and CLAMP capacitors. In general, a 22-nF capacitor is recommended. Based on the

results of testing of the communication robustness, a change to a 47-nF capacitor may be in order. The larger

the capacitor the larger the deviation will be on the coil which sends a stronger signal to the TX. This also

decreases the efficiency somewhat. In this case, choose the 22-nF capacitor with the 25-V rating.

9.2.1.2.3 Charging and Termination Current

The Design Requirements show an 800-mA charging current and an 80-mA termination current.

Setting the charge current (I_BULK) is done by selecting the R₁and R_FOD. Solving Equation 1 results in R_ILIMof 393

Ω. Setting R_FODto 200 Ω as a starting point before the FOD calibration is recommended. This leaves 205 Ω for

R₁. Using standard resistor values (or resistors in series / parallel) can improve accuracy.

Setting the termination current is done with Equation 2. Because 80 mA is 10% of the I_BULK(800mA), the R_TERM

is calculated as (240 * 10) or 2.4 kΩ.

9.2.1.2.4 Adapter Enable

The AD pin will be tied to the external USB power source to allow for an external source to power the system.

AD_EN is tied to the gate of Q1 (CSD75205W1015). This allows the bq51050B to sense when power is applied

to the AD pin. The EN2 pin controls whether the wired source will be enabled or not. EN2 is tied to the system

host to allow it to control the use of the USB power. If wired power is enabled and present, the AD pin will

disable the BAT output and then enable Q1 through the AD_EN pin. An external charger is required to take

control of the battery charging.

9.2.1.2.5 Charge Indication and Power Capacitors

The CHG pin is open-drain. D₁and R₄are selected as a 2.1-V forward bias capable of 2 mA and a 100-Ω

current-limiting resistor.

RECT is used to smooth the internal AC to DC conversion. Two 10-µF capacitors and a 0.1-µF capacitor are

chosen. The rating is 25 V.

BAT capacitors are 1.0 µF and 0.1 µF.

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Typical Application (continued)

9.2.1.3 Application Curves

V_RECT

V_BAT

I_BAT

Figure 35. Battery Insertion During Precharge

Figure 36. Precharge to Fast-Charge Transition

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ZHCSAX2F –JULY 2012–REVISED JUNE 2017

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Typical Application (continued)

9.2.2 Application for Wired Charging

The application discussed below will cover the same requirements as the first example and will add a DC supply

with a secondary charger. This solution covers using a standard DC supply or a USB port as the supply.

R₈

D₂

bq24040

IN

OUT

TS

R₉

ISET

VSS

/CHG

ISET2

NC

C₆

R₆

C₇

D₃

CSD75207W15

Q1

PRETERM

/PG

USB or

AC Adapter

Input

R₇

bq5105xB

C₅

AD-EN

AD

BAT

C_COMM1

COMM1

C_BOOT1

C₄

D₁

BOOT1

RECT

C₁

AC1

R₄

C₃

TI

TX

COIL

Wireless

Power

Transmitter

RX

COIL

PACK+

C₂

NTC

TS/CTRL

AC2

BOOT2

C_BOOT2

R_OS

PACK-

COMM2

C_COMM2

CHG

CLAMP2

C_CLAMP2

TERM

EN2

Tri-State

Bi-State

CLAMP1

C_CLAMP1

HOST

R₅

FOD

PGND

ILIM

R₁

R_FOD

Copyright

Figure 37. bq51050B Wireless Power Receiver and Wired Charger

9.2.2.1 Design Requirements

The requirements for this solution are identical to the first application so all common components are identical.

This solution adds a wired charger and a blocking back-back FET (Q1).

The addition of a wired charger is simply enabled. The AD pin on the bq5105x is tied to the input of the DC

supply. When the bq5105x senses a voltage greater than V_AD-Preson the AD pin, the BAT pin will be disabled

(high impedance). Once the BAT pin is disabled, the AD_EN pin will transition and enable Q1. If wireless power

is not present, the functionality of AD and AD_EN remains and wired charging can take place.

9.2.2.2 Detailed Design Procedure

9.2.2.2.1 Blocking Back-Back FET

Q1 is recommended to eliminate the potential for both wired and wireless systems to drive current to the

simultaneously. The charge current and DC voltage level will set up parmerters for the blocking FET. The

requirements for this system are 1 A for the wired charger and 5 V DC. The CSD75207W15 is chosen for its low

RON and small size.

The wired charger in this solution is the bq24040. See the bq24040 datasheet (SLUS941) for specific component

selection.

32

bq51050B, bq51051B, bq51052B

www.ti.com.cn

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

10 Power Supply Recommendations

The bq51050B requires a Qi-compatible transmitter as its power supply.

11 Layout

11.1 Layout Guidelines

•

Keep the trace resistance as low as possible on AC1, AC2, and BAT.

Detection and resonant capacitors need to be as close to the device as possible.

COMM, CLAMP, and BOOT capacitors need to be placed as close to the device as possible.

Via interconnect on PGND net is critical for appropriate signal integrity and proper thermal performance.

High frequency bypass capacitors need to be placed close to RECT and OUT pins.

ILIM and FOD resistors are important signal paths and the loops in those paths to PGND must be minimized.

For the RHL package, connect the thermal pad to ground to help dissipate heat.

Signal and sensing traces are the most sensitive to noise; the sensing signal amplitudes are usually

measured in mV, which is comparable to the noise amplitude. Make sure that these traces are not being

interfered by the noisy and power traces. AC1, AC2, BOOT1, BOOT2, COMM1, and COMM2 are the main

source of noise in the board. These traces should be shielded from other components in the board. It is

usually preferred to have a ground copper area placed underneath these traces to provide additional

shielding. Also, make sure they do not interfere with the signal and sensing traces. The PCB should have a

ground plane (return) connected directly to the return of all components through vias (two vias per capacitor

for power-stage capacitors, one via per capacitor for small-signal components).

For a 1-A fast charge current application, the current rating for each net is as follows:

•

AC1 = AC2 = 1.2 A

OUT = 1 A

RECT = 100 mA (RMS)

COMMx = 300 mA

CLAMPx = 500 mA

All others can be rated for 10 mA or less

11.2 Layout Example

/[!ꢁt2

capaciꢀor

.hhÇ2

.!Ç

.hhÇ2

capaciꢀor

!/2

L[Lꢁ

9b2

!/1-!/2 capaciꢀors

tDb5

Ç9wꢁ

!5

ꢂ/ID

/hꢁꢁ1

!/1

.hhÇ1

capaciꢀor

.!Ç

.hhÇ1

/[!ꢁt2

capaciꢀor

.!Ç capaciꢀors

Figure 38. bq5105x Layout Example

33

bq51050B, bq51051B, bq51052B

ZHCSAX2F –JULY 2012–REVISED JUNE 2017

www.ti.com.cn

12 器件和文档支持

12.1 文档支持

12.1.1 相关文档


型号：	BQ51052BYFPT
厂家：	TEXAS INSTRUMENTS
描述：	符合 Qi (WPC) 标准的 BQ51052B 集成无线电源锂离子电池充电器接收器 \| YFP \| 28 \| 0 to 125 电池 PC 无线
文件：	总44页 (文件大小：2165K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BQ51052BYFPT [TI]

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