CAXC4T774QRSVRQ1 [TI]

具有三态输出和独立方向控制输入汽车类的 4 位双电源总线收发器 | RSV | 16 | -40 to 125;
CAXC4T774QRSVRQ1
型号: CAXC4T774QRSVRQ1
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有三态输出和独立方向控制输入汽车类的 4 位双电源总线收发器 | RSV | 16 | -40 to 125

总线收发器
文件: 总38页 (文件大小:2428K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN74AXC4T774-Q1  
ZHCSKT5D FEBRUARY 2020 REVISED MARCH 2021  
SN74AXC4T774-Q1 具有独立方向、可配置电压转换和三态输出的汽车4 位  
双电源总线收发器  
SN74AXC4T774-Q1 器件旨在实现数据总线之间的异  
步通信。根据方向控制输入 (DIRx) 的逻辑电平该器  
1 特性  
• 符合面向汽车应用AEC-Q100 标准  
• 完全可配置的双轨设计实现各个端口0.65V 至  
3.6V 的电源电压范围内运行  
• 工作温度范围40°C +125°C  
• 独立方向控制引脚支持可配置升降转换  
• 无干扰电源定序  
1.8V 转换3.3V 支持高310Mbps 的转  
换速率  
VCC 隔离特性:  
– 如果任何一VCC 输入低100mV则所有  
I/O 输出均禁用且处于高阻抗状态  
Ioff 支持局部断电模式运行  
• 兼AVC 系列电平转换器  
• 闩锁性能超100mAJESD 78 II 类规范的  
要求  
件将数据从 A 总线传输至 B 总线或者将数据从 B 总  
线传输至 A 总线。输出使能输入 (OE) 用于禁用输出,  
从而有效隔离总线。 SN74AXC4T774-Q1 器件旨在使  
控制引脚DIRx OEVCCA 为基准。  
为了确保电平转换I/O 在上电或断电期间处于高阻抗  
状态OE 引脚应通过上拉电阻器连接VCCA。  
该器件完全符合使用 Ioff 电流的部分断电应用的规范要  
求。当器件断电时Ioff 保护电路可确保不从输入、输  
出或偏置到特定电压的组I/O 获取多余电流也不向  
其提供多余电流。  
VCC 隔离特性能确保当 VCCA VCCB 低于 100mV  
可通过禁用 I/O 端口的输出来将其设为高阻抗状  
态。  
无干扰电源时序使电源轨能以任何顺序打开或关断从  
而提供强大的电源时序性能。  
ESD 保护性能超JEDEC JS-001 规范要求  
8000V 人体放电模型  
1000V 充电器件模型  
器件信息  
封装(1)  
封装尺寸标称值)  
器件型号  
2 应用  
SN74AXC4T774QPWRQ1  
TSSOP (16) 5.00mm × 4.40mm  
• 信息娱乐系统音响主机  
ADAS 融合  
ADAS 前置摄像头  
SN74AXC4T774QBQBRQ1 WQFN (16)  
SN74AXC4T774QRSVRQ1 UQFN (16)  
2.50mm × 3.50mm  
2.60mm x 1.80mm  
• 混合动力汽车/电动汽车电池管理  
远程信息处理控制单元  
(1) 如需了解所有可用封装请参阅数据表末尾的可订购产品附  
录。  
3 说明  
One of Four Transceivers  
VCCA  
VCCB  
SN74AXC4T774-Q1 是一款使用两个独立可配置电源  
轨的四位同相总线收发器。 VCCA VCCB 电源电压  
低至 0.65V 该器件可正常工作。A 端口用于跟踪  
VCCA该端口可支持 0.65V 3.6V 范围内的任何电  
源电压。B 端口用于跟踪 VCCB该端口也可支持  
0.65V 3.6V 围内的任何电源电压。此外,  
SN74AXC4T774-Q1 还与单电源系统兼容。  
DIRx  
OE  
Bx  
Ax  
功能模块图  
本文档旨在为方便起见提供有TI 产品中文版本的信息以确认产品的概要。有关适用的官方英文版本的最新信息请访问  
www.ti.com其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前请务必参考最新版本的英文版本。  
English Data Sheet: SCES918  
 
 
 
 
SN74AXC4T774-Q1  
ZHCSKT5D FEBRUARY 2020 REVISED MARCH 2021  
www.ti.com.cn  
Table of Contents  
7.1 Load Circuit and Voltage Waveforms........................16  
8 Detailed Description......................................................18  
8.1 Overview...................................................................18  
8.2 Functional Block Diagram.........................................18  
8.3 Feature Description...................................................18  
8.4 Device Functional Modes..........................................19  
9 Application and Implementation..................................20  
9.1 Application Information............................................. 20  
9.2 Typical Application.................................................... 20  
10 Power Supply Recommendations..............................22  
11 Layout...........................................................................22  
11.1 Layout Guidelines................................................... 22  
11.2 Layout Example...................................................... 22  
12 Device and Documentation Support..........................23  
12.1 Documentation Support.......................................... 23  
12.2 接收文档更新通知................................................... 23  
12.3 支持资源..................................................................23  
12.4 Trademarks.............................................................23  
12.5 静电放电警告.......................................................... 23  
12.6 术语表..................................................................... 23  
13 Mechanical, Packaging, and Orderable  
1 特性................................................................................... 1  
2 应用................................................................................... 1  
3 说明................................................................................... 1  
4 Revision History.............................................................. 2  
5 Pin Configuration and Functions...................................3  
6 Specifications.................................................................. 4  
6.1 Absolute Maximum Ratings........................................ 4  
6.2 ESD Ratings............................................................... 4  
6.3 Recommended Operating Conditions.........................5  
6.4 Thermal Information....................................................5  
6.5 Electrical Characteristics.............................................6  
6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V.......... 7  
6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V.......... 7  
6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V........ 8  
6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V............ 9  
6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V.......... 9  
6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V...... 10  
6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V........ 11  
6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V........ 11  
6.14 Operating Characteristics: TA = 25°C..................... 13  
6.15 Typical Characteristics............................................15  
7 Parameter Measurement Information..........................16  
Information.................................................................... 23  
4 Revision History  
以前版本的页码可能与当前版本的页码不同  
Changes from Revision C (July 2020) to Revision D (March 2021)  
Page  
BQB (WQFN) 封装选项的状态从预发改为生产。..................................................................................1  
Changes from Revision B (June 2020) to Revision C (July 2020)  
Page  
• 向器件信添加BQB (WQFN) 封装选项....................................................................................................1  
• 更新了整个文档的表、图和交叉参考的编号格式................................................................................................ 1  
Changes from Revision A (April 2020) to Revision B (June 2020)  
Page  
RSV 器件状态从“预发布”更改为“正在供货”...............................................................................................1  
Changes from Revision * (February 2020) to Revision A (April 2020)  
Page  
• 将器件状态从“预告信息”更改为“量产数据”................................................................................................ 1  
Copyright © 2021 Texas Instruments Incorporated  
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SN74AXC4T774-Q1  
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5 Pin Configuration and Functions  
DIR1  
DIR2  
A1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCCA  
VCCB  
B1  
2
DIR2  
A1  
15 VCCB  
14 B1  
13 B2  
12 B3  
11 B4  
10 GND  
3
4
5
6
7
A2  
A2  
B2  
Thermal  
Pad  
A3  
A3  
B3  
A4  
A4  
B4  
DIR3  
DIR3  
DIR4  
GND  
OE  
5-2. BQB Package 16-Pin WQFN Transparent  
5-1. PW Package 16-Pin TSSOP Top View  
Top View  
16 15 14 13  
1
2
3
4
12  
B1  
A1  
A2  
A3  
A4  
11 B2  
10  
B3  
B4  
9
5
6
7
8
5-3. RSV Package 16-Pin UQFN Transparent Top View  
Pin Functions  
PIN  
NAME  
A1  
NO.  
TYPE  
DESCRIPTION  
PW  
3
RSV  
1
BQB  
3
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
I/O  
Input/output A1. Referenced to VCCA  
Input/output A2. Referenced to VCCA  
Input/output A3. Referenced to VCCA  
Input/output A4. Referenced to VCCA  
Input/output B1. Referenced to VCCB  
Input/output B2. Referenced to VCCB  
Input/output B3. Referenced to VCCB  
Input/output B4. Referenced to VCCB  
.
.
.
.
.
.
.
.
A2  
4
2
4
A3  
5
3
5
A4  
6
4
6
B1  
14  
13  
12  
11  
12  
11  
10  
9
14  
13  
12  
11  
B2  
B3  
B4  
Direction-control input for port 1. Referenced to  
VCCA  
DIR1  
DIR2  
DIR3  
DIR4  
1
2
7
8
15  
16  
5
1
2
7
8
I
I
I
I
.
Direction-control input for port 2. Referenced to  
VCCA  
.
Direction-control input for port 3. Referenced to  
VCCA  
.
Direction-control input for port 4. Referenced to  
VCCA  
6
.
Tri-state output enable. Pull OE high to place all  
OE  
9
7
8
9
I
outputs in tri-state mode. Referenced to VCCA  
.
GND  
VCCA  
10  
16  
10  
16  
Ground  
A-port power supply voltage. 0.65 V VCCA  
3.6 V  
14  
B-port power supply voltage. 0.65 V VCCB  
VCCB  
15  
13  
15  
3.6 V  
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6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
50  
MAX UNIT  
VCCA Supply voltage A  
VCCB Supply voltage B  
4.2  
4.2  
V
V
I/O Ports (A Port)  
I/O Ports (B Port)  
Control Inputs  
A Port  
4.2  
VI  
Input Voltage(2)  
4.2  
V
4.2  
4.2  
VO  
VO  
Voltage applied to any output in the high-impedance or power-off state(2)  
Voltage applied to any output in the high or low state(2) (3)  
V
V
B Port  
4.2  
A Port  
VCCA + 0.2  
VCCB + 0.2  
B Port  
IIK  
IOK  
IO  
Input clamp current  
VI < 0  
mA  
mA  
Output clamp current  
VO < 0  
50  
Continuous output current  
Continuous current through VCC or GND  
Junction Temperature  
50 mA  
100 mA  
150 °C  
150 °C  
50  
100  
Tj  
Tstg  
Storage temperature  
65  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under  
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device  
reliability.  
(2) The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The output positive-voltage rating may be exceeded up to 4.2 V maximum if the output current rating is observed.  
6.2 ESD Ratings  
VALUE  
±8000  
±1000  
UNIT  
Human body model (HBM), per AEC Q100-002(1)  
Charged device model (CDM), per AEC Q100-011  
V(ESD)  
Electrostatic discharge  
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.  
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6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)(1) (2)  
MIN  
0.65  
MAX UNIT  
VCCA  
VCCB  
Supply voltage A  
Supply voltage B  
3.6  
3.6  
V
V
0.65  
VCCI = 0.65 V - 0.75 V  
VCCI = 0.76 V - 1 V  
VCCI = 1.1 V - 1.95 V  
VCCI = 2.3 V - 2.7 V  
VCCI = 3 V - 3.6 V  
VCCI x 0.70  
VCCI x 0.70  
VCCI x 0.65  
1.6  
Data Inputs  
2
VIH  
High-level input voltage  
VCCA = 0.65 V - 0.75 V  
VCCA = 0.76 V - 1 V  
VCCA = 1.1 V - 1.95 V  
VCCA = 2.3 V - 2.7 V  
VCCA = 3 V - 3.6 V  
VCCI = 0.65 V - 0.75 V  
VCCI = 0.76 V - 1 V  
VCCI = 1.1 V - 1.95 V  
VCCI = 2.3 V - 2.7 V  
VCCI = 3 V - 3.6 V  
VCCA x 0.70  
VCCA x 0.70  
VCCA x 0.65  
1.6  
Control Inputs(DIRx,  
OE), Referenced to VCCA  
2
VCCI x 0.30  
VCCI x 0.30  
VCCI x 0.35  
0.7  
Data Inputs  
0.8  
VIL  
Low-level input voltage  
V
VCCA = 0.65 V - 0.75 V  
VCCA = 0.76 V - 1 V  
VCCA = 1.1 V - 1.95 V  
VCCA = 2.3 V - 2.7 V  
VCCA = 3 V - 3.6 V  
VCCA x 0.30  
VCCA x 0.30  
VCCA x 0.35  
0.7  
Control Inputs(DIRx,  
OE), Referenced to VCCA  
0.8  
VI  
Input voltage(1)  
Output voltage  
0
0
0
3.6  
V
V
Active State  
Tri-State  
VCCO  
VO  
3.6  
Δt/  
Input transition rise and fall time  
Operating free-air temperature  
10 ns/V  
125 °C  
Δv(2)  
TA  
40  
(1) VCCI is the VCC associated with the input port.VCCO is the VCC associated with the output port.  
(2) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, SCBA004.  
6.4 Thermal Information  
SN74AXC4T774-Q1  
THERMAL METRIC(1)  
PW (TSSOP) RSV (UQFN) BQB (WQFN)  
UNIT  
16 PINS  
118.2  
48.6  
64.5  
7.3  
16 PINS  
130.8  
69.1  
59.9  
3.9  
16 PINS  
73.7  
70.9  
43.5  
4.9  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
YJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
YJB  
63.9  
NA  
58.3  
NA  
43.5  
21.2  
RθJC(bottom)  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
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6.5 Electrical Characteristics  
over operating free-air temperature range (unless otherwise noted) (1) (2) (4)  
Operating free-air temperature (TA)  
40°C to 85°C 40°C to 125°C  
PARAMETER  
TEST CONDITIONS  
VCCA  
VCCB  
UNIT  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
VCCO  
0.1  
VCCO  
0.1  
0.7 V - 3.6 V  
0.7 V - 3.6 V  
IOH = 100 µA  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
0.55  
0.58  
0.65  
0.85  
1.05  
1.2  
0.55  
0.58  
0.65  
0.85  
1.05  
1.2  
IOH = 50 µA  
IOH = 200 µA  
IOH = 500 µA  
High-level output  
voltage  
VOH  
VI = VIH  
V
IOH = 3 mA  
IOH = 6 mA  
IOH = 8 mA  
IOH = 9 mA  
IOH = 12 mA  
IOL = 100 µA  
IOL = 50 µA  
IOL = 200 µA  
IOL = 500 µA  
IOL = 3 mA  
1.4 V  
1.4 V  
1.65 V  
2.3 V  
1.65 V  
2.3 V  
1.75  
2.3  
1.75  
2.3  
3 V  
3 V  
0.7 V - 3.6 V  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
0.7 V - 3.6 V  
0.65 V  
0.76 V  
0.85 V  
1.1 V  
0.1  
0.1  
0.1  
0.1  
0.18  
0.2  
0.18  
0.2  
Low-level output  
voltage  
VOL  
VI = VIL  
0.25  
0.35  
0.45  
0.55  
0.7  
0.25  
0.35  
0.45  
0.55  
0.7  
V
IOL = 6 mA  
1.4 V  
1.4 V  
IOL = 8 mA  
1.65 V  
2.3 V  
1.65 V  
2.3 V  
IOL = 9 mA  
IOL = 12 mA  
3 V  
3 V  
Control inputs (DIRx, OE):VI =  
VCCA or GND  
0.65 V- 3.6 V  
0.65 V- 3.6 V  
0.65 V- 3.6 V  
0.65 V- 3.6 V  
0.5  
4
1
8
µA  
µA  
0.5  
4  
1  
8  
Input leakage  
current  
II  
Data Inputs (Ax, Bx),VI = VCCI  
or GND  
A Port: VI or VO = 0 V - 3.6 V 0 V  
0 V - 3.6 V  
0 V  
4
4
8
8
4  
4  
8  
8  
Partial power  
down current  
Ioff  
µA  
µA  
B Port: VI or VO = 0 V - 3.6 V 0 V - 3.6 V  
Tri-state output A or B Port, VI = VCCI or GND,  
IOZ  
3.6 V  
3.6 V  
4
8
4  
8  
current (3)  
VO = VCCO or GND, OE = VIH  
0.65 V- 3.6 V  
0 V  
0.65 V- 3.6 V  
3.6 V  
15  
27  
VCCA supply  
current  
VI = VCCI  
IO = 0  
ICCA  
µA  
µA  
2  
12  
or GND  
3.6 V  
0 V  
10  
15  
10  
18  
27  
18  
0.65 V- 3.6 V  
0 V  
0.65 V- 3.6 V  
3.6 V  
VCCB supply  
current  
VI = VCCI  
IO = 0  
ICCB  
or GND  
3.6 V  
0 V  
2  
12  
ICCA  
ICCB  
+
Combined  
supply current  
VI = VCCI  
IO = 0  
0.65 V- 3.6 V  
3.3 V  
0.65 V- 3.6 V  
3.3 V  
21  
40  
µA  
pF  
pF  
or GND  
Control Input  
Capacitance  
Ci  
VI = 3.3 V or GND  
4.5  
6.5  
4.5  
6.5  
Data I/O  
Capacitance  
OE = VCCA, VO = 1.65V DC +1  
MHz -16 dBm sine wave  
Cio  
3.3 V  
3.3 V  
(1) VCCI is the VCC associated with the input port.  
(2) VCCO is the VCC associated with the output port.  
(3) For I/O ports, the parameter IOZ includes the input leakage current.  
(4) All typical data is taken at 25°C.  
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6.6 Switching Characteristics, VCCA = 0.7 ± 0.05 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
BPort Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions  
UNIT  
0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
172  
172  
172  
172  
205  
205  
189  
189  
287  
287  
309  
309  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
120  
120  
141  
141  
205  
205  
161  
161  
287  
287  
219  
219  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
88  
88  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
51  
51  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
46  
46  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
56  
56  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
78  
78  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
221  
221  
9
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
109  
109  
205  
205  
145  
145  
287  
287  
177  
177  
51  
16  
12  
9
51  
16  
12  
9
9
205  
205  
102  
102  
287  
287  
133  
133  
205  
205  
99  
205  
205  
102  
102  
287  
287  
132  
132  
205  
205  
113  
113  
287  
287  
165  
165  
205  
205  
176  
176  
287  
287  
418  
418  
OE  
OE  
OE  
OE  
tdis Disable time  
ns  
ns  
99  
287  
287  
127  
127  
ten Enable time  
6.7 Switching Characteristics, VCCA = 0.8 ± 0.04 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
141  
141  
120  
120  
114  
114  
156  
156  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
96  
96  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
73  
73  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
39  
39  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
29  
29  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
28  
28  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
29  
29  
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
40  
40  
9
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
Propagation  
delay  
tpd  
ns  
96  
76  
39  
16  
11  
96  
76  
39  
16  
12  
9
9
114  
114  
131  
131  
114  
114  
116  
116  
114  
114  
71  
114  
114  
67  
114  
114  
68  
114  
114  
70  
70  
114  
114  
84  
84  
OE  
OE  
tdis Disable time  
ns  
71  
67  
68  
Copyright © 2021 Texas Instruments Incorporated  
Submit Document Feedback  
7
Product Folder Links: SN74AXC4T774-Q1  
 
 
SN74AXC4T774-Q1  
ZHCSKT5D FEBRUARY 2020 REVISED MARCH 2021  
www.ti.com.cn  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
161  
161  
258  
258  
0.5  
0.5  
0.5  
0.5  
161  
161  
174  
174  
0.5  
0.5  
0.5  
0.5  
161  
161  
137  
137  
0.5  
0.5  
0.5  
0.5  
161  
161  
90  
0.5  
0.5  
0.5  
0.5  
161  
161  
73  
0.5  
0.5  
0.5  
0.5  
161  
161  
71  
0.5  
0.5  
0.5  
0.5  
161  
161  
77  
0.5  
0.5  
0.5  
0.5  
161  
161  
106  
106  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
OE  
A
B
ten Enable time  
ns  
OE  
90  
73  
71  
77  
6.8 Switching Characteristics, VCCA = 0.9 ± 0.045 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
109  
109  
88  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
76  
76  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
60  
60  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
33  
33  
33  
33  
83  
83  
51  
51  
94  
94  
70  
74  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
23  
23  
16  
16  
83  
83  
46  
46  
94  
94  
52  
54  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
21  
21  
11  
12  
83  
83  
46  
46  
94  
94  
45  
47  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
21  
21  
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
24  
24  
9
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
73  
60  
88  
73  
60  
9
9
83  
83  
83  
83  
83  
46  
46  
94  
94  
43  
43  
83  
83  
54  
54  
94  
94  
51  
51  
OE  
OE  
OE  
OE  
83  
83  
83  
tdis Disable time  
ns  
ns  
138  
138  
94  
112  
112  
94  
97  
97  
94  
94  
94  
94  
ten Enable time  
203  
203  
140  
140  
110  
110  
Copyright © 2021 Texas Instruments Incorporated  
8
Submit Document Feedback  
Product Folder Links: SN74AXC4T774-Q1  
 
SN74AXC4T774-Q1  
ZHCSKT5D FEBRUARY 2020 REVISED MARCH 2021  
www.ti.com.cn  
6.9 Switching Characteristics, VCCA = 1.2 ± 0.1 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
50  
50  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
39  
39  
39  
39  
28  
29  
95  
95  
39  
40  
87  
87  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
33  
33  
33  
33  
28  
29  
78  
79  
39  
40  
70  
70  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
20  
20  
20  
20  
28  
29  
33  
34  
39  
40  
51  
55  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
14  
14  
15  
15  
28  
29  
26  
27  
39  
40  
38  
42  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
12  
12  
11  
12  
28  
29  
25  
26  
39  
40  
33  
36  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
12  
12  
7
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
51  
51  
8
7
28  
28  
29  
23  
24  
39  
40  
26  
28  
28  
29  
26  
26  
39  
40  
25  
26  
OE  
OE  
OE  
OE  
29  
tdis Disable time  
ns  
ns  
123  
124  
39  
40  
ten Enable time  
124  
124  
6.10 Switching Characteristics, VCCA = 1.5 ± 0.1 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V 1.5 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX  
)
PARAMETER  
FROM  
TO  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
16  
16  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
16  
16  
29  
29  
19  
20  
91  
92  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
16  
16  
23  
23  
19  
20  
74  
75  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
15  
15  
14  
14  
19  
20  
29  
30  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
11  
11  
11  
11  
19  
20  
22  
23  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
6
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
Propagation  
delay  
tpd  
ns  
47  
7
47  
9
7
6
19  
19  
20  
20  
22  
19  
20  
20  
19  
19  
20  
20  
20  
OE  
OE  
20  
tdis Disable time  
ns  
120  
120  
Copyright © 2021 Texas Instruments Incorporated  
Submit Document Feedback  
9
Product Folder Links: SN74AXC4T774-Q1  
 
 
SN74AXC4T774-Q1  
ZHCSKT5D FEBRUARY 2020 REVISED MARCH 2021  
www.ti.com.cn  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
24  
25  
28  
29  
0.5  
0.5  
0.5  
0.5  
24  
25  
29  
30  
0.5  
0.5  
0.5  
0.5  
24  
25  
33  
33  
0.5  
0.5  
0.5  
0.5  
24  
25  
41  
42  
0.5  
0.5  
0.5  
0.5  
24  
25  
31  
33  
0.5  
0.5  
0.5  
0.5  
24  
25  
27  
29  
0.5  
0.5  
0.5  
0.5  
24  
25  
22  
24  
0.5  
0.5  
0.5  
0.5  
24  
25  
19  
21  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
OE  
A
B
ten Enable time  
ns  
OE  
6.11 Switching Characteristics, VCCA = 1.8 ± 0.15 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V 1.5 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX  
)
PARAMETER  
FROM  
TO  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
12  
12  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
11  
12  
28  
28  
17  
18  
90  
90  
19  
20  
20  
22  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
11  
12  
21  
21  
17  
18  
73  
74  
19  
20  
20  
22  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
11  
12  
12  
12  
17  
18  
28  
29  
19  
20  
32  
34  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
9
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
7
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
56  
10  
10  
17  
18  
21  
22  
19  
20  
27  
29  
8
6
5
56  
9
7
6
17  
17  
18  
19  
20  
19  
20  
24  
26  
17  
18  
16  
17  
19  
20  
20  
22  
17  
18  
18  
18  
19  
20  
18  
19  
OE  
OE  
OE  
OE  
18  
tdis Disable time  
ns  
ns  
117  
119  
19  
20  
ten Enable time  
21  
22  
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6.12 Switching Characteristics, VCCA = 2.5 ± 0.2 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Conditions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
30  
30  
13  
14  
89  
89  
14  
16  
14  
15  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
9
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
7
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
7
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
6
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
6
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
A
B
Propagation  
delay  
tpd  
ns  
78  
21  
21  
13  
14  
72  
72  
14  
16  
13  
15  
10  
10  
13  
14  
26  
28  
14  
16  
14  
16  
8
7
6
5
78  
8
7
6
5
13  
13  
14  
19  
21  
14  
16  
15  
17  
13  
14  
18  
19  
14  
16  
16  
18  
13  
14  
14  
15  
14  
16  
15  
17  
13  
14  
17  
17  
14  
16  
15  
16  
OE  
OE  
OE  
OE  
14  
tdis Disable time  
ns  
ns  
115  
117  
14  
16  
ten Enable time  
15  
16  
6.13 Switching Characteristics, VCCA = 3.3 ± 0.3 V  
See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
Test Condtions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V 1.5 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX  
)
PARAMETER  
FROM  
TO  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
10  
10  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
9
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
9
9
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
8
8
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
6
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
6
6
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
5
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
0.5  
5
5
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
A
B
B
A
A
B
Propagation  
delay  
tpd  
ns  
221  
221  
16  
40  
40  
16  
16  
89  
89  
24  
24  
16  
16  
72  
72  
12  
12  
16  
16  
26  
27  
10  
10  
16  
16  
19  
20  
7
6
5
7
6
5
16  
16  
17  
18  
16  
16  
14  
14  
16  
16  
16  
16  
OE  
OE  
16  
tdis Disable time  
ns  
115  
117  
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See Figure 5 and Table 1 for test circuit and loading. See Figure 6, Figure 7, and Figure 8 for measurement waveforms.  
B-Port Supply Voltage (VCCB  
)
PARAMETER  
FROM  
TO  
Test Condtions 0.7 ± 0.05 V 0.8 ± 0.04 V 0.9 ± 0.045 V 1.2 ± 0.1 V  
MIN MAX MIN MAX MIN MAX MIN MAX  
1.5 ± 0.1 V  
MIN MAX  
1.8 ± 0.15 V  
MIN MAX  
2.5 ± 0.2 V  
MIN MAX  
3.3 ± 0.3 V  
MIN MAX  
UNIT  
0.5  
0.5  
0.5  
0.5  
12  
13  
13  
14  
0.5  
0.5  
0.5  
0.5  
12  
13  
12  
12  
0.5  
0.5  
0.5  
0.5  
12  
13  
11  
12  
0.5  
0.5  
0.5  
0.5  
12  
13  
11  
12  
0.5  
0.5  
0.5  
0.5  
12  
13  
11  
12  
0.5  
0.5  
0.5  
0.5  
12  
13  
12  
13  
0.5  
0.5  
0.5  
0.5  
12  
13  
12  
13  
0.5  
0.5  
0.5  
0.5  
12  
13  
12  
13  
40°C to 85°C  
40°C to 125°C  
40°C to 85°C  
40°C to 125°C  
OE  
A
B
ten Enable time  
ns  
OE  
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6.14 Operating Characteristics: TA = 25°C  
PARAMETER  
TEST CONDITIONS  
VCCA  
0.7 V  
VCCB  
0.7 V  
MIN  
TYP  
2.4  
MAX UNIT  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
2.3  
2.2  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (A to B: outputs f = 1 MHz  
2.2  
pF  
2.2  
enabled)  
trise = tfall = 1 ns  
2.2  
2.4  
3.0  
1.5  
1.5  
1.5  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (A to B: outputs f = 1 MHz  
1.5  
pF  
pF  
pF  
1.5  
disabled)  
trise = tfall = 1 ns  
1.5  
1.6  
2.0  
CpdA  
13.4  
15.0  
14.0  
20.7  
29.6  
40.2  
65.8  
91.7  
1.3  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (B to A: outputs f = 1 MHz  
enabled)  
trise = tfall = 1 ns  
1.1  
1.1  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (B to A: outputs f = 1 MHz  
1.0  
1.0  
disabled)  
trise = tfall = 1 ns  
1.0  
1.0  
1.0  
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MAX UNIT  
PARAMETER  
TEST CONDITIONS  
VCCA  
0.7 V  
VCCB  
0.7 V  
MIN  
TYP  
13.4  
13.8  
14.9  
20.6  
29.6  
40.3  
66.2  
92.5  
1.3  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
0.7 V  
0.8 V  
0.9 V  
1.2 V  
1.5 V  
1.8 V  
2.5 V  
3.3 V  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (A to B: outputs f = 1 MHz  
enabled)  
pF  
pF  
pF  
pF  
trise = tfall = 1 ns  
1.2  
1.1  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (A to B: outputs f = 1 MHz  
disabled)  
1.1  
1.1  
trise = tfall = 1 ns  
1.1  
1.1  
1.1  
CpdB  
2.5  
2.4  
2.3  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (B to A: outputs f = 1 MHz  
enabled)  
2.2  
2.3  
trise = tfall = 1 ns  
2.3  
2.5  
3.0  
1.6  
1.5  
1.5  
Power Dissipation Capacitance CL = 0, RL = Open  
per transceiver (B to A: outputs f = 1 MHz  
disabled)  
1.5  
1.5  
trise = tfall = 1 ns  
1.5  
1.6  
2.0  
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6.15 Typical Characteristics  
3.4  
3.2  
3
1.25  
1.2  
VCC = 1.8V  
VCC = 2.5V  
VCC = 3.3V  
1.15  
1.1  
1.05  
1
2.8  
2.6  
2.4  
2.2  
2
0.95  
0.9  
0.85  
0.8  
0.75  
0.7  
1.8  
1.6  
1.4  
0.65  
0.6  
VCC = 0.7V  
VCC = 1.2V  
0.55  
0
0.5  
1
1.5  
2
2.5  
IOH (mA)  
3
3.5  
4
4.5  
5
0
2
4
6
8
10  
IOH (mA)  
12  
14  
16  
18  
20  
D001  
D001  
6-2. Typical (TA=25°C) Output High Voltage (VOH  
)
6-1. Typical (TA=25°C) Output High Voltage (VOH  
vs Source Current (IOH  
)
vs Source Current (IOH  
)
)
700  
650  
600  
550  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
220  
200  
180  
160  
140  
120  
100  
80  
60  
40  
VCC = 1.8V  
VCC = 2.5V  
VCC = 3.3V  
VCC = 0.7V  
VCC = 1.2V  
20  
0
-50  
0
0
2
4
6
8
10  
IOL (mA)  
12  
14  
16  
18  
20  
0
0.5  
1
1.5  
2
2.5  
IOL (mA)  
3
3.5  
4
4.5  
5
D001  
D001  
6-3. Typical (TA=25°C) Output High Voltage (VOL) 6-4. Typical (TA=25°C) Output High Voltage (VOL  
)
vs Sink Current (IOL  
)
vs Sink Current (IOL)  
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7 Parameter Measurement Information  
7.1 Load Circuit and Voltage Waveforms  
Unless otherwise noted, all input pulses are supplied by generators having the following characteristics:  
f = 1 MHz  
ZO = 50 Ω  
dv/dt 1 ns/V  
Measurement Point  
2 x VCCO  
Open  
GND  
S1  
RL  
Output Pin  
Under Test  
(1)  
CL  
RL  
A. CL includes probe and jig capacitance.  
7-1. Load Circuit  
7-1. Load Circuit Conditions  
Parameter  
VCCO  
RL  
CL  
S1  
VTP  
N/A  
N/A  
N/A  
Δt/  
Δv  
Input transition rise or fall rate  
15 pF  
15 pF  
15 pF  
Open  
Open  
Open  
0.65 V 3.6 V  
1.1 V 3.6 V  
1 MΩ  
2 kΩ  
20 kΩ  
tpd  
Propagation (delay) time  
0.65 V 0.95  
V
15 pF  
15 pF  
15 pF  
2 × VCCO  
2 × VCCO  
2 × VCCO  
0.3 V  
0.15 V  
0.1 V  
3 V 3.6 V  
1.65 V 2.7 V  
1.1 V 1.6 V  
2 kΩ  
2 kΩ  
2 kΩ  
ten, tdis Enable time, disable time  
0.65 V 0.95  
15 pF  
2 × VCCO  
0.1 V  
20 kΩ  
V
15 pF  
15 pF  
15 pF  
GND  
GND  
GND  
0.3 V  
0.15 V  
0.1 V  
3 V 3.6 V  
1.65 V 2.7 V  
1.1 V 1.6 V  
2 kΩ  
2 kΩ  
2 kΩ  
ten, tdis Enable time, disable time  
0.65 V 0.95  
15 pF  
GND  
0.1 V  
20 kΩ  
V
(1)  
VCCI  
(1)  
VCCI  
Input A, B  
100 kHz  
VCCI / 2  
VCCI / 2  
Input A, B  
500 ps/V œ 10 ns/V  
0 V  
VOH  
0 V  
VOH  
(2)  
tpd  
tpd  
(2)  
Output B, A  
Ensure Monotonic  
Rising and Falling Edge  
(2)  
VOL  
Output B, A  
VCCI / 2  
VCCI / 2  
(2)  
VOL  
1. VCCI is the supply pin associated with the input port.  
2. VOH and VOL are typical output voltage levels that occur  
with specified RL, CL, and S1  
1. VCCI is the supply pin associated with the input port.  
2. VOH and VOL are typical output voltage levels that occur  
with specified RL, CL, and S1  
7-3. Input Transition Rise or Fall Rate  
7-2. Propagation Delay  
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VCCA  
OE  
VCCA / 2  
VCCA / 2  
GND  
tdis  
ten  
(3)  
VCCO  
Output(1)  
VCCO / 2  
VOL + VTP  
(4)  
VOL  
(4)  
VOH  
VOH - VTP  
Output(2)  
VCCO / 2  
GND  
A. Output waveform on the condition that input is driven to a valid Logic Low.  
B. Output waveform on the condition that input is driven to a valid Logic High.  
C. VCCO is the supply pin associated with the output port.  
D. VOH and VOL are typical output voltage levels with specified RL, CL, and S1.  
7-4. Enable Time And Disable Time  
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8 Detailed Description  
8.1 Overview  
The SN74AXC4T774-Q1 is a 4-bit, dual-supply noninverting bidirectional voltage level translation device. Ax pins  
and control pins (DIRx and OE) are reference to VCCA logic levels, and Bx pins are referenced to VCCB logic  
levels. The A port is able to accept I/O voltages ranging from 0.65 V to 3.6 V, while the B port can accept I/O  
voltages from 0.65 V to 3.6 V. A high on DIR allows data transmission from A to B and a low on DIR allows data  
transmission from B to A when OE is set to low. When OE is set to high, both Ax and Bx pins are in the high-  
impedance state. See 8.4 for a summary of the operation of the control logic.  
8.2 Functional Block Diagram  
One of Four Transceivers  
VCCA  
VCCB  
DIRx  
OE  
Bx  
Ax  
8.3 Feature Description  
8.3.1 Standard CMOS Inputs  
Standard CMOS inputs are high impedance and are typically modeled as a resistor in parallel with the input  
capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum  
input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the  
Electrical Characteristics, using ohm's law (R = V ÷ I).  
Signals applied to the inputs need to have fast edge rates, as defined by Δt/Δv in Recommended Operating  
Conditions to avoid excessive current consumption and oscillations. If a slow or noisy input signal is required, a  
device with a Schmitt-trigger input should be used to condition the input signal prior to the standard CMOS input.  
8.3.2 Balanced High-Drive CMOS Push-Pull Outputs  
A balanced output allows the device to sink and source similar currents. The high drive capability of this device  
creates fast edges into light loads so routing and load conditions should be considered to prevent ringing.  
Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without  
being damaged. The electrical and thermal limits defined in the Absolute Maximum Ratings must be followed at  
all times.  
8.3.3 Partial Power Down (Ioff)  
The inputs and outputs for this device enter a high-impedance state when the device is powered down, inhibiting  
current backflow into the device. The maximum leakage into or out of any input or output pin on the device is  
specified by Ioff in the Electrical Characteristics.  
8.3.4 VCC Isolation  
The inputs and outputs for this device enter a high-impedance state when either supply is <100 mV.  
8.3.5 Over-voltage Tolerant Inputs  
Input signals to this device can be driven above the supply voltage so long as they remain below the maximum  
input voltage value specified in the Recommended Operating Conditions.  
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8.3.6 Glitch-free Power Supply Sequencing  
Either supply rail may be powered on or off in any order without producing a glitch on the I/Os (that is, where the  
output erroneously transitions to VCC when it should be held low). Glitches of this nature can be misinterpreted  
by a peripheral as a valid data bit, which could trigger a false device reset of the peripheral, a false device  
configuration of the peripheral, or even a false data initialization by the peripheral. For more information  
regarding the power up glitch performance of the AXC family of level translators, see the Glitch Free Power  
Sequencing With AXC Level Translators application report  
8.3.7 Negative Clamping Diodes  
The inputs and outputs to this device have negative clamping diodes as depicted in 8-1.  
CAUTION  
Voltages beyond the values specified in the Absolute Maximum Ratings table can cause damage to  
the device. The input negative-voltage and output voltage ratings may be exceeded if the input and  
output clamp-current ratings are observed.  
VCC  
Device  
Input  
Output  
Logic  
GND  
-IIK  
-IOK  
8-1. Electrical Placement of Clamping Diodes for Each Input and Output  
8.3.8 Fully Configurable Dual-Rail Design  
The VCCA and VCCB pins can be supplied at any voltage from 0.65 V to 3.6 V, making the device suitable for  
translating between any of the voltage nodes (0.7 V, 0.8 V, 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V).  
8.3.9 Supports High-Speed Translation  
The SN74AXC4T774-Q1 device can support high data-rate applications. The translated signal data rate can be  
up to 310 Mbps when the signal is translated from 1.8 V to 3.3 V.  
8.4 Device Functional Modes  
8-1. Function Table  
(Each Transceiver)  
Port Status  
CONTROL INPUTS(1) (2)  
OE DIR  
OPERATION  
A PORT  
B PORT  
Input (Hi-Z)  
L
L
L
H
X
Output (Enabled)  
Input (Hi-Z)  
Input (Hi-Z)  
B data to A bus  
A data to B bus  
Isolation  
Output (Enabled)  
Input (Hi-Z)  
H
(1) Input circuits of the data I/Os are always active.  
(2) Pins configured as inputs should not be left floating.  
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9 Application and Implementation  
Note  
Information in the following applications sections is not part of the TI component specification, and TI  
does not warrant its accuracy or completeness. TIs customers are responsible for determining  
suitability of components for their purposes, as well as validating and testing their design  
implementation to confirm system functionality.  
9.1 Application Information  
The SN74AXC4T774-Q1 device can be used in level-translation applications for interfacing devices or systems  
operating at different interface voltages with one another. The SN74AXC4T774-Q1 device is ideal for use in  
applications where a push-pull driver is connected to the data I/Os. The max data rate can be up to 310 Mbps  
when device translates a signal from 1.8 V to 3.3 V.  
One example application is shown in 9-1, where the SN74AXC4T774-Q1 device is used to translate a low  
voltage SPI signal from an SoC to a higher voltage signal to properly drive the inputs of a GPS module, and vice  
versa.  
9.2 Typical Application  
Pullup Resistors keep device disabled  
during power up. OE inputs may also  
be tied to GND to keep device enabled  
0.7 V  
3.3 V  
0.1 µF  
0.1 µF  
VCCA  
VCCB  
DIR1  
DIR3  
DIR2  
DIR4  
GPS  
Module  
GPIO1  
OE  
SN74AXC4T774-Q1  
SoC  
CLK  
SDI  
SDO  
CS  
CLK  
SDO  
SDI  
B1  
A1  
A2  
A3  
A4  
B2  
B3  
B4  
CS  
GND  
9-1. Serial Peripheral Interface (SPI) Application  
9.2.1 Design Requirements  
For this design example, use the parameters listed in 9-1.  
9-1. Design Parameters  
DESIGN PARAMETERS  
EXAMPLE VALUES  
Input voltage range  
0.65 V to 3.6 V  
0.65 V to 3.6 V  
Output voltage range  
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9.2.2 Detailed Design Procedure  
To begin the design process, determine the following:  
Input voltage range  
Use the supply voltage of the device that is driving the SN74AXC4T774-Q1 device to determine the input  
voltage range. For a valid logic-high, the value must exceed the high-level input voltage (VIH) of the input  
port. For a valid logic low the value must be less than the low-level input voltage (VIL) of the input port.  
Output voltage range  
Use the supply voltage of the device that the SN74AXC4T774-Q1 device is driving to determine the output  
voltage range.  
9.2.3 Application Curve  
9-2. Up Translation at 2.5 MHz (0.7 V to 3.3 V)  
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10 Power Supply Recommendations  
Always apply a ground reference to the GND pins first. This device is designed for glitch free power sequencing  
without any supply sequencing requirements such as ramp order or ramp rate.  
This device was designed with various power supply sequencing methods in mind to help prevent unintended  
triggering of downstream devices. For more information regarding the power up glitch performance of the AXC  
family of level translators, see the Glitch Free Power Sequencing With AXC Level Translators application report  
11 Layout  
11.1 Layout Guidelines  
To ensure reliability of the device, following common printed-circuit board layout guidelines are recommended:  
Use bypass capacitors on the power supply pins and place them as close to the device as possible. A 0.1 µF  
capacitor is recommended, but transient performance can be improved by having both 1 µF and 0.1 µF  
capacitors in parallel as bypass capacitors.  
The high drive capability of this device creates fast edges into light loads so routing and load conditions  
should be considered to prevent ringing.  
11.2 Layout Example  
Legend  
Via to VCCA  
Via to VCCB  
A
B
G
Via to GND  
Copper Traces  
SN74AXC4T774RSV  
0.1µF  
G
G
A
0.1µF  
16 15 14 13  
B
CLK from SoC  
1
2
3
4
12  
11  
10  
9
CLK to Module  
MOSI to Module  
MISO from Module  
SS to Module  
B1  
B2  
B3  
B4  
A1  
MOSI from SoC A2  
MISO to SoC  
A3  
SS from SoC A4  
5
6
7
8
G
G
11-1. Layout Example  
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12 Device and Documentation Support  
12.1 Documentation Support  
12.1.1 Related Documentation  
For related documentation see the following:  
Texas Instruments, Implications of Slow or Floating CMOS Inputs application report  
Texas Instruments, Power Sequencing for AXC Family of Devices application report  
Texas Instruments, SN74AXC4T774 Evaluation Module Tool Folder  
12.2 接收文档更新通知  
要接收文档更新通知请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册即可每周接收产品信息更  
改摘要。有关更改的详细信息请查看任何已修订文档中包含的修订历史记录。  
12.3 支持资源  
TI E2E支持论坛是工程师的重要参考资料可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解  
答或提出自己的问题可获得所需的快速设计帮助。  
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范并且不一定反映 TI 的观点请参阅  
TI 《使用条款》。  
12.4 Trademarks  
TI E2Eis a trademark of Texas Instruments.  
所有商标均为其各自所有者的财产。  
12.5 静电放电警告  
静电放(ESD) 会损坏这个集成电路。德州仪(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理  
和安装程序可能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级大至整个器件故障。精密的集成电路可能更容易受到损坏这是因为非常细微的参  
数更改都可能会导致器件与其发布的规格不相符。  
12.6 术语表  
TI 术语表  
本术语表列出并解释了术语、首字母缩略词和定义。  
13 Mechanical, Packaging, and Orderable Information  
The following pages include mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Apr-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
CAXC4T774QBQBRQ1  
CAXC4T774QRSVRQ1  
SN74AXC4T774QPWRQ1  
ACTIVE  
ACTIVE  
ACTIVE  
WQFN  
UQFN  
BQB  
RSV  
PW  
16  
16  
16  
3000 RoHS & Green  
3000 RoHS & Green  
2000 RoHS & Green  
NIPDAU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 125  
-40 to 125  
-40 to 125  
4T774Q  
NIPDAUAG  
NIPDAU  
25ZR  
TSSOP  
4T774Q  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
1-Apr-2021  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74AXC4T774-Q1 :  
Catalog : SN74AXC4T774  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Jun-2023  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CAXC4T774QBQBRQ1  
CAXC4T774QRSVRQ1  
WQFN  
UQFN  
BQB  
RSV  
PW  
16  
16  
16  
3000  
3000  
2000  
180.0  
178.0  
330.0  
12.4  
13.5  
12.4  
2.8  
2.1  
6.9  
3.8  
2.9  
5.6  
1.2  
0.75  
1.6  
4.0  
4.0  
8.0  
12.0  
12.0  
12.0  
Q1  
Q1  
Q1  
SN74AXC4T774QPWRQ1 TSSOP  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
16-Jun-2023  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CAXC4T774QBQBRQ1  
CAXC4T774QRSVRQ1  
SN74AXC4T774QPWRQ1  
WQFN  
UQFN  
BQB  
RSV  
PW  
16  
16  
16  
3000  
3000  
2000  
210.0  
189.0  
356.0  
185.0  
185.0  
356.0  
35.0  
36.0  
35.0  
TSSOP  
Pack Materials-Page 2  
PACKAGE OUTLINE  
RSV0016A  
UQFN - 0.55 mm max height  
S
C
A
L
E
5
.
0
0
0
ULTRA THIN QUAD FLATPACK - NO LEAD  
1.85  
1.75  
A
B
PIN 1 INDEX AREA  
2.65  
2.55  
C
0.55  
0.45  
SEATING PLANE  
0.05 C  
0.05  
0.00  
2X 1.2  
SYMM  
(0.13) TYP  
5
8
0.45  
0.35  
15X  
4
9
SYMM  
2X 1.2  
12X 0.4  
1
0.25  
16X  
12  
0.15  
0.07  
0.05  
C A B  
13  
16  
0.55  
0.45  
PIN 1 ID  
(45° X 0.1)  
4220314/C 02/2020  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
RSV0016A  
UQFN - 0.55 mm max height  
ULTRA THIN QUAD FLATPACK - NO LEAD  
SYMM  
(0.7)  
16  
SEE SOLDER MASK  
DETAIL  
13  
12  
16X (0.2)  
1
SYMM  
12X (0.4)  
(2.4)  
(R0.05) TYP  
9
4
15X (0.6)  
5
8
(1.6)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE: 25X  
0.05 MIN  
ALL AROUND  
0.05 MAX  
ALL AROUND  
METAL UNDER  
SOLDER MASK  
METAL EDGE  
EXPOSED METAL  
SOLDER MASK  
OPENING  
EXPOSED  
METAL  
SOLDER MASK  
OPENING  
NON SOLDER MASK  
DEFINED  
SOLDER MASK DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4220314/C 02/2020  
NOTES: (continued)  
3. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
RSV0016A  
UQFN - 0.55 mm max height  
ULTRA THIN QUAD FLATPACK - NO LEAD  
(0.7)  
16  
13  
16X (0.2)  
1
12  
SYMM  
12X (0.4)  
(2.4)  
(R0.05) TYP  
4
9
15X (0.6)  
5
8
SYMM  
(1.6)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 MM THICK STENCIL  
SCALE: 25X  
4220314/C 02/2020  
NOTES: (continued)  
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
PACKAGE OUTLINE  
PW0016A  
TSSOP - 1.2 mm max height  
S
C
A
L
E
2
.
5
0
0
SMALL OUTLINE PACKAGE  
SEATING  
PLANE  
C
6.6  
6.2  
TYP  
A
0.1 C  
PIN 1 INDEX AREA  
14X 0.65  
16  
1
2X  
5.1  
4.9  
4.55  
NOTE 3  
8
9
0.30  
16X  
4.5  
4.3  
NOTE 4  
1.2 MAX  
0.19  
B
0.1  
C A B  
(0.15) TYP  
SEE DETAIL A  
0.25  
GAGE PLANE  
0.15  
0.05  
0.75  
0.50  
A
20  
0 -8  
DETAIL A  
TYPICAL  
4220204/A 02/2017  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed 0.15 mm per side.  
4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side.  
5. Reference JEDEC registration MO-153.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
PW0016A  
TSSOP - 1.2 mm max height  
SMALL OUTLINE PACKAGE  
SYMM  
16X (1.5)  
(R0.05) TYP  
16  
1
16X (0.45)  
SYMM  
14X (0.65)  
8
9
(5.8)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE: 10X  
METAL UNDER  
SOLDER MASK  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL  
EXPOSED METAL  
EXPOSED METAL  
0.05 MAX  
ALL AROUND  
0.05 MIN  
ALL AROUND  
NON-SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
15.000  
(PREFERRED)  
SOLDER MASK DETAILS  
4220204/A 02/2017  
NOTES: (continued)  
6. Publication IPC-7351 may have alternate designs.  
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
PW0016A  
TSSOP - 1.2 mm max height  
SMALL OUTLINE PACKAGE  
16X (1.5)  
SYMM  
(R0.05) TYP  
16  
1
16X (0.45)  
SYMM  
14X (0.65)  
8
9
(5.8)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
SCALE: 10X  
4220204/A 02/2017  
NOTES: (continued)  
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
9. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
GENERIC PACKAGE VIEW  
BQB 16  
2.5 x 3.5, 0.5 mm pitch  
WQFN - 0.8 mm max height  
PLASTIC QUAD FLATPACK - NO LEAD  
This image is a representation of the package family, actual package may vary.  
Refer to the product data sheet for package details.  
4226161/A  
www.ti.com  
PACKAGE OUTLINE  
WQFN - 0.8 mm max height  
PLASTIC QUAD FLAT PACK-NO LEAD  
BQB0016A  
A
2.6  
2.4  
B
3.6  
3.4  
PIN 1 INDEX AREA  
C
0.8  
0.7  
SEATING PLANE  
0.08 C  
1.1  
0.9  
0.05  
0.00  
(0.2) TYP  
2X 0.5  
8
9
10X 0.5  
7
10  
SYMM  
2X  
2.5  
2.1  
1.9  
15  
2
0.30  
0.18  
16X  
0.5  
0.3  
16  
1
PIN 1 ID  
(OPTIONAL)  
SYMM  
16X  
0.1  
C A B  
0.05  
C
4224640/A 11/2018  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
WQFN - 0.8 mm max height  
BQB0016A  
PLASTIC QUAD FLAT PACK-NO LEAD  
(2.3)  
(1)  
2X (0.5)  
1
16  
10X (0.5)  
2
15  
SYMM  
2X  
(2.5)  
(2)  
(3.3)  
2X  
(0.75)  
10  
7
16X (0.24)  
16X (0.6)  
(Ø0.2) VIA  
TYP  
9
8
SYMM  
(R0.05) TYP  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE: 20X  
0.07 MAX  
ALL AROUND  
METAL UNDER  
SOLDER MASK  
0.07 MIN  
ALL AROUND  
METAL  
EXPOSED METAL  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
EXPOSED METAL  
NON-SOLDER MASK  
SOLDER MASK  
DEFINED  
DEFINED  
(PREFERRED)  
4224640/A 11/2018  
NOTES: (continued)  
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature  
number SLUA271 (www.ti.com/lit/slua271)  
.
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown  
on this view. It is recommended that vias under paste be filled, plugged or tented.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
WQFN - 0.8 mm max height  
BQB0016A  
PLASTIC QUAD FLAT PACK-NO LEAD  
(2.3)  
(0.95)  
2X (0.5)  
1
16  
10X (0.5)  
2
15  
SYMM  
2X  
(2.5)  
(1.79) (3.3)  
10  
7
16X (0.24)  
16X (0.6)  
EXPOSED METAL  
9
8
SYMM  
(R0.05) TYP  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
EXPOSED PAD  
85% PRINTED COVERAGE BY AREA  
SCALE: 20X  
4224640/A 11/2018  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
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