CC2540TF256RHAR [TI]
具有工业级工作温度范围的低功耗 (LE) Bluetooth® 无线 MCU | RHA | 40 | -40 to 125;
| 型号： | CC2540TF256RHAR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有工业级工作温度范围的低功耗 (LE) Bluetooth® 无线 MCU | RHA | 40 | -40 to 125 无线 外围集成电路 |
| 文件： | 总37页 (文件大小：1431K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CC2540T
ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
CC2540T 扩展工业温度 Bluetooth® 智能无线 MCU
1 器件概述
1.1 特性
1
• 真正的单芯片蓝牙低能耗 (BLE) 解决方
• 外设
– 具有 8 通道和可配置分辨率的 12 位模数转换器
案：CC2540T 既能够运行应用程序，也能够运行
BLE 协议栈，包括可连接各类传感器等元件的外设
(ADC)
• 工作温度最高达 125°C
• 6mm × 6mm 封装
• 射频 (RF)
– 集成超低功耗比较器
– 通用定时器（1 个 16 位，2 个 8 位）
– 21 个通用 I/O (GPIO) 引脚
（19 x 4mA，2 x 20mA）
– Bluetooth®低能耗技术
– 优异的链路预算（最高可达 97dB）， 支持 不带
外部前端的远距离应用
– 具有捕捉功能的 32kHz 睡眠定时器
– 2 个功能强大、支持几种串行协议的通用异步接
收发器 (UART)
– 精确的数字接收信号强度指示器 (RSSI)
– 适用于符合全球射频规范的系统：
– 全速 USB 接口
•
ETSI EN 300 328 和 EN 300 440 2 类（欧
洲）
– 红外 (IR) 生成电路
– 功能强大的 5 通道直接内存访问 (DMA)
– 高级加密标准 (AES) 安全协处理器
– 电池监视器和温度传感器
•
•
FCC CFR47 第 15 部分（美国）
ARIB STD-T66（日本）
• 布局
– 每个 CC2540T 均包含唯一的 48 位 IEEE 地址
– 极少的外部组件
– 提供参考设计
• 符合针对单模式蓝牙低能耗 (BLE) 解决方案的符合
蓝牙4.0 协议的堆栈
– 完全功率优化堆栈，包括控制器和主机
– 6mm x 6mm VQFN40 封装
•
•
•
•
GAP：中央设备、外设、观察者或广播者（包
括组合角色）
• 低功耗
– 有源模式 RX 低至 19.6mA
– 有源模式 TX (–6dBm)：24mA
– 功率模式 1（3µs 唤醒时间）：235μA
– 功率模式 2（睡眠定时器打开）：0.9µA
– 功率模式 3（外部中断）：0.4µA
– 宽电源电压范围 (2V-3.6V)
属性协议 (ATT) 和通用属性配置文件
(GATT)：客户端和服务器
对称式对多重处理 (SMP)：AES-128 加密和
解密
L2CAP
– 示例 应用 和配置文件
– 在所有功率模式下具有完全 RAM 和寄存器保持
•
•
针对 GAP 中心 和外围作用 的一般应用
距离临近、加速计、简单关键字和电池 GATT
服务
• 兼容 TPS62730，
工作模式下功耗较低
– RX 低至 15.8mA（3V 电源）
– TX (–6dBm)：18.6mA (3V 电源)
• 微控制器
– 多重配置选项
•
•
单芯片配置，允许应用在 CC2540T 上运行
针对外部微处理器所运行 应用程序 的网络处
理器接口
– 高性能、低功耗的 8051 微控制器内核
– 256KB 系统内可编程闪存
– 8KB SRAM
– BTool：评估、开发和测试的 Windows PC 应用
• 开发工具
– CC2540T 迷你开发套件
– SmartRF™软件
– 由用于 8051 的 IAR Embedded Workbench™软
件提供支持
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SWRS172
CC2540T
ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
www.ti.com.cn
1.2 应用
•
•
•
•
•
2.4GHz 蓝牙低能耗系统
照明
•
•
•
•
•
电动工具
维护
电机监控
无线 HMI 和远程显示
USB 软件狗
智能手机连接
接近传感
电缆更换
1.3 说明
CC2540T 器件是一款真正具备成本效益的低功耗无线 MCU，适用于蓝牙低能耗 应用。CC2540T 可在总物
料成本低廉的前提下构建耐用的 BLE 主控或受控节点，工作温度最高可达 125°C。CC2540T 将一款性能出
色的 RF 收发器、一个符合行业标准的增强型 8051 MCU、系统内置可编程闪存存储器、8KB RAM 及其他
功能强大的支持 特性 及外设组合在一起。CC2540T 适用于要求超低功耗的系统。提供有超低功耗睡眠模
式。运行模式间的切换时间短，有助于实现更低功耗。
CC2540TF256 与德州仪器的 (TI) 蓝牙低能耗协议栈相结合，提供市面上最灵活、最经济高效的单模式蓝牙
低能耗解决方案。
表 1-1. 器件信息(1)
产品型号
CC2540TF256RHAR
封装
封装尺寸（标称值）
6.00mm x 6.00mm
6.00mm x 6.00mm
VQFN (40)
VQFN (40)
CC2540TF256RHAT
(1) 更多信息请参见节 8，机械封装和可订购信息。
2
器件概述
版权 © 2014–2015, Texas Instruments Incorporated
CC2540T
www.ti.com.cn
ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
1.4 功能方框图
图 1-1 所示为 CC2540T 器件的功能框图。
VDD (2 V–3.6 V)
WATCHDOG
TIMER
ON-CHIP VOLTAGE
RESET_N
RESET
REGULATOR
DCOUPL
XOSC_Q2
XOSC_Q1
32-MHz
POWER-ON RESET
BROWN OUT
CRYSTAL OSC
CLOCK MUX
and
CALIBRATION
P2_4
P2_3
P2_2
P2_1
P2_0
32.768-kHz
CRYSTAL OSC
SLEEP TIMER
HIGH-
32-kHz
SPEED
DEBUG
INTERFACE
RC-OSC
RC-OSC
POWER MANAGEMENT CONTROLLER
PDATA
XRAM
IRAM
SFR
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
8051 CPU
CORE
MEMORY
ARBITRATOR
FLASH
FLASH
UNIFIED
DMA
IRQ CTRL
FLASH CTRL
1 KB SRAM
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
ANALOG COMPARATOR
OP-AMP
FIFOCTRL
RADIO REGISTERS
AES
ENCRYPTION
AND
DECRYPTION
DS
ADC
Link Layer Engine
AUDIO/DC
DEMODULATOR
MODULATOR
USB_N
USB_P
USB
USART 0
USART 1
RECEIVE
TRANSMIT
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
RF_P
RF_N
TIMER 3 (8-Bit)
TIMER 4 (8-Bit)
DIGITAL
ANALOG
MIXED
B0301-05
图 1-1. 功能方框图
版权 © 2014–2015, Texas Instruments Incorporated
器件概述
3
CC2540T
ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
www.ti.com.cn
内容
1
器件概述.................................................... 1
1.1 特性 ................................................... 1
1.2 应用 ................................................... 2
1.3 说明 ................................................... 2
1.4 功能方框图............................................ 3
修订历史记录............................................... 4
Terminal Configuration and Functions.............. 5
3.1 Pin Attributes ......................................... 6
Specifications ............................................ 7
4.1 Absolute Maximum Ratings .......................... 7
4.2 ESD Ratings.......................................... 7
4.3 Recommended Operating Conditions ................ 7
4.4 Electrical Characteristics ............................. 8
4.20 SPI AC Characteristics.............................. 15
4.21 Debug Interface AC Characteristics ................ 16
4.22 Timer Inputs AC Characteristics .................... 17
4.23 DC Characteristics .................................. 17
4.24 Typical Characteristics .............................. 18
4.25 Typical Current Savings............................. 20
Detailed Description ................................... 21
5.1 Overview ............................................ 21
5.2 Functional Block Diagram........................... 21
5.3 Block Descriptions................................... 22
Applications, Implementation, and Layout........ 25
6.1 Application Information.............................. 25
6.2 Input/Output Matching............................... 26
6.3 Crystal ............................................... 26
2
3
5
6
4
4.5
Thermal Resistance Characteristics for RHA
Package .............................................. 8
6.4
On-Chip 1.8-V Voltage Regulator Decoupling ...... 26
Power-Supply Decoupling and Filtering............. 26
4.6 General Characteristics .............................. 9
4.7 RF Receive Section .................................. 9
4.8 RF Transmit Section ................................ 10
4.9 Current Consumption With TPS62730.............. 10
4.10 32-MHz Crystal Oscillator ........................... 11
4.11 32.768-kHz Crystal Oscillator ....................... 11
4.12 32-kHz RC Oscillator................................ 11
4.13 16-MHz RC Oscillator ............................... 12
4.14 RSSI Characteristics ................................ 12
4.15 Frequency Synthesizer Characteristics ............. 12
4.16 Analog Temperature Sensor ........................ 12
4.17 Comparator Characteristics ......................... 12
4.18 ADC Characteristics................................. 13
4.19 Control Input AC Characteristics.................... 14
6.5
6.6 Reference Design ................................... 27
器件和文档支持 .......................................... 28
7.1 文档支持............................................. 28
7.2 德州仪器 (TI) 低功耗射频网站....................... 28
7.3 德州仪器 (TI) 低功耗射频开发者网络 ............... 28
7.4 低功耗射频电子新闻简报 ............................ 29
7.5 商标.................................................. 29
7.6 静电放电警告 ........................................ 29
7.7 出口管制提示 ........................................ 29
7.8 Glossary ............................................. 29
机械、封装和可订购信息................................ 29
8.1 封装信息............................................. 29
7
8
2 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from July 2, 2015 to November 30, 2015
Page
•
•
•
•
已更改 中的部分项特性 .............................................................................................................. 1
Changed from Handling Ratings table to ESD Ratings table .................................................................. 7
Added MIN value for output power in the RF Transmit Section table ....................................................... 10
Added Bluetooth Low Energy Light Reference Design to the document. ................................................... 27
4
修订历史记录
Copyright © 2014–2015, Texas Instruments Incorporated
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CC2540T
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ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
3 Terminal Configuration and Functions
The CC2540T pinout is shown in Figure 3-1, and a short description of the pins follows in Section 3.1.
40 39 38 37 36 35 34 33 32 31
DGND_USB
USB_P
USB_N
DVDD_USB
P1_5
R_BIAS
1
2
30
29
28
27
26
25
24
23
22
21
AVDD4
AVDD1
AVDD2
RF_N
3
4
5
GND
Ground Pad
P1_4
RF_P
6
P1_3
7
AVDD3
P1_2
XOSC_Q2
XOSC_Q1
8
P1_1
9
10
DVDD2
AVDD5
11 12 13 14 15 16 17 18 19 20
P0076-05
NOTE: The exposed ground pad must be connected to a solid ground plane, as this is the ground connection for the chip.
Figure 3-1. CC2540T
RHA Package (VQFN)
Top View
Copyright © 2014–2015, Texas Instruments Incorporated
Terminal Configuration and Functions
5
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ZHCSCZ3A –JULY 2014–REVISED NOVEMBER 2015
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3.1 Pin Attributes
Table 3-1. Pin Attributes
NAME
NO.
28
27
24
29
21
31
40
TYPE
DESCRIPTION
AVDD1
AVDD2
AVDD3
AVDD4
AVDD5
AVDD6
Power (analog)
Power (analog)
Power (analog)
Power (analog)
Power (analog)
Power (analog)
2-V to 3.6-V analog power-supply connection
2-V to 3.6-V analog power-supply connection
2-V to 3.6-V analog power-supply connection
2-V to 3.6-V analog power-supply connection
2-V to 3.6-V analog power-supply connection
2-V to 3.6-V analog power-supply connection
1.8-V digital power-supply decoupling. Do not use for supplying external
circuits.
DCOUPL
Power (digital)
DGND_USB
DVDD_USB
DVDD1
DVDD2
GND
1
Ground pin
Power (digital)
Power (digital)
Power (digital)
Ground
Connect to GND
4
2-V to 3.6-V digital power-supply connection
39
10
—
19
18
17
16
15
14
13
12
11
9
2-V to 3.6-V digital power-supply connection
2-V to 3.6-V digital power-supply connection
The ground pad must be connected to a solid ground plane.
P0_0
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Digital I/O
Port 0.0
P0_1
Port 0.1
P0_2
Port 0.2
P0_3
Port 0.3
P0_4
Port 0.4
P0_5
Port 0.5
P0_6
Port 0.6
P0_7
Port 0.7
P1_0
Port 1.0: 20-mA drive capability
P1_1
Port 1.1: 20-mA drive capability
P1_2
8
Port 1.2
Port 1.3
Port 1.4
Port 1.5
Port 1.6
Port 1.7
Port 2.0
Port 2.1
Port 2.2
P1_3
7
P1_4
6
P1_5
5
P1_6
38
37
36
35
34
33
32
30
20
26
P1_7
P2_0
P2_1
P2_2
P2_3/ XOSC32K_Q2
P2_4/ XOSC32K_Q1
RBIAS
RESET_N
Digital I/O, Analog I/O Port 2.3/32.768 kHz XOSC
Digital I/O, Analog I/O Port 2.4/32.768 kHz XOSC
Analog I/O
External precision bias resistor for reference current
Digital input
Reset, active-low
Negative RF input signal to LNA during RX
Negative RF output signal from PA during TX
RF_N
RF_P
RF I/O
RF I/O
25
Positive RF input signal to LNA during RX
Positive RF output signal from PA during TX
USB_N
3
2
Digital I/O
Digital I/O
Analog I/O
Analog I/O
USB N
USB_P
USB P
XOSC_Q1
XOSC_Q2
22
23
32-MHz crystal oscillator pin 1 or external-clock input
32-MHz crystal oscillator pin 2
6
Terminal Configuration and Functions
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4 Specifications
4.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)(2)
MIN
MAX
UNIT
Supply voltage
All supply pins must have the same voltage
–0.3
3.9
V
VDD + 0.3,
Voltage on any digital pin
–0.3
V
≤ 3.9
Input RF level
Tstg
10
dBm
°C
Storage temperature
–40
125
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to VSS, unless otherwise noted.
4.2 ESD Ratings
VALUE
UNIT
Human Body Model (HBM), per ANSI/ESDA/JEDEC JS001(1)
±2000
V
Electrostatic discharge (ESD)
performance
VESD
Charged Device Model (CDM),
All pins
±750
V
per JESD22-C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
4.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
Operating ambient temperature range, TA
Operating supply voltage
–40
2
125
3.6
°C
V
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Specifications
7
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4.4 Electrical Characteristics
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
Power mode 1. Digital regulator on; 16-MHz RCOSC and 32-MHz
crystal oscillator off; 32.768-kHz XOSC, POR, BOD and sleep timer
active; RAM and register retention
235
Power mode 2. Digital regulator off; 16-MHz RCOSC and 32-MHz
crystal oscillator off; 32.768-kHz XOSC, POR, and sleep timer active;
RAM and register retention
µA
0.9
Core current
consumption
Icore
Power mode 3. Digital regulator off; no clocks; POR active; RAM and
register retention
0.4
Low MCU activity: 32-MHz XOSC running. No radio or peripherals. No
flash access, no RAM access.
6.7
mA
Timer 1. Timer running, 32-MHz XOSC used
Timer 2. Timer running, 32-MHz XOSC used
Timer 3. Timer running, 32-MHz XOSC used
Timer 4. Timer running, 32-MHz XOSC used
Sleep timer, including 32.753-kHz RCOSC
ADC, when converting
90
90
60
µA
Peripheral current
consumption(1)
Iperi
70
0.6
1.2
mA
(1) Adds to core current Icore for each peripheral unit activated.
4.5 Thermal Resistance Characteristics for RHA Package
NAME
RΘJC
RΘJB
RΘJA
RΘJMA
PsiJT
DESCRIPTION
°C/W(1) (2)
AIR FLOW (m/s)(3)
Junction-to-case
16.1
5.5
0.00
0.00
0.00
0.00
0.00
0.00
Junction-to-board
Junction-to-free air
Junction-to-moving air
Junction-to-package top
Junction-to-board
30.6
0.2
5.4
PsiJB
1.0
(1) °C/W = degrees Celsius per watt.
(2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [RΘJC] value, which is based on a
JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these
EIA/JEDEC standards:
•
•
•
•
JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air)
JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages
JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements
Power dissipation of 2 W and an ambient temperature of 70ºC is assumed.
(3) m/s = meters per second.
8
Specifications
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4.6 General Characteristics
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
WAKE-UP AND TIMING
Digital regulator on, 16-MHz RCOSC and 32-MHz crystal
oscillator off. Start-up of 16-MHz RCOSC
Power mode 1 → Active
4
120
410
µs
µs
µs
Digital regulator off, 16-MHz RCOSC and 32-MHz crystal
oscillator off. Start-up of regulator and 16-MHz RCOSC
Power mode 2 or 3 → Active
Crystal ESR = 16 Ω. Initially running on 16-MHz RCOSC,
with 32-MHz XOSC OFF
Active → TX or RX
With 32-MHz XOSC initially on
160
150
µs
µs
RX/TX turnaround
RADIO PART
RF frequency range
Data rate and modulation format
Programmable in 2-MHz steps
2402
2480
MHz
1 Mbps, GFSK, 250-kHz deviation
4.7 RF Receive Section
Measured on the TI CC2540 EM reference design with TA = 25°C, VDD = 3 V, fc = 2440 MHz
1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, and 0.1% BER(1)
.
PARAMETER
Receiver sensitivity(2)
Receiver sensitivity(2)
Saturation(3)
Co-channel rejection(3)
Adjacent-channel rejection(3)
Alternate-channel rejection(3)
Blocking(3)
Frequency error tolerance(4)
Symbol rate error tolerance(5)
TEST CONDITIONS
MIN TYP
MAX
UNIT
dBm
dBm
dBm
dB
High-gain mode
Standard mode
–93
–87
6
–5
±1 MHz
±2 MHz
–5
30
dB
dB
–30
dBm
kHz
ppm
Including both initial tolerance and drift
–250
–80
250
80
Conducted measurement with a 50-Ω single-ended load.
Complies with EN 300 328, EN 300 440 class 2, FCC CFR47,
Part 15 and ARIB STD-T-66
Spurious emission. Only largest spurious
emission stated within each band.
–75
dBm
RX mode, standard mode, no peripherals active, low MCU
activity, MCU at 250 kHz
19.6
22.1
RX mode, high-gain mode, no peripherals active, low MCU
activity, MCU at 250 kHz
Current consumption
mA
RX mode, high-gain mode, no peripherals active, low MCU
activity, MCU at 250 kHz;
TA = –40°C to 125°C, VDD = 2 V to 3.6 V, and fc = 2402 MHz
to 2480 MHz
30.5
(1) 0.1% BER maps to 30.8% PER
(2) The receiver sensitivity setting is programmable using a TI BLE stack vendor-specific API command. The default value is standard
mode.
(3) Results based on standard gain mode
(4) Difference between center frequency of the received RF signal and local oscillator frequency
(5) Difference between incoming symbol rate and the internally generated symbol rate
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4.8 RF Transmit Section
Measured on the TI CC2540 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Delivered to a single-ended 50-Ω load through a balun using
maximum recommended output power setting
1
4
Output power
dBm
Delivered to a single-ended 50-Ω load through a balun using minimum
recommended output power setting
–23
27
Programmable output power
range
Delivered to a single-ended 50 Ω load through a balun
dB
Conducted measurement with a 50-Ω single-ended load. Complies
with EN 300 328, EN 300 440 class 2, FCC CFR47, Part 15 and ARIB
STD-T-66(1)
Spurious emissions
–41
dBm
TX mode, –23-dBm output power, no peripherals active, low MCU
activity, MCU at 250 kHz
21.1
23.8
27
TX mode, –6-dBm output power, no peripherals active, low MCU
activity, MCU at 250 kHz
TX mode, 0-dBm output power, no peripherals active, low MCU
activity, MCU at 250 kHz
Current consumption
mA
TX mode, 4-dBm output power, no peripherals active, low MCU
activity, MCU at 250 kHz
31.6
TX mode, 4-dBm output power, no peripherals active, low MCU
activity, MCU at 250 kHz;
TA = –40°C to 125°C, VDD = 2 V to 3.6 V, and fc = 2402 MHz to
2480 MHz
39.6
Differential impedance as seen from the RF port (RF_P and RF_N)
toward the antenna
Optimum load impedance
70 + j30
Ω
(1) Designs with antenna connectors that require conducted ETSI compliance at 64 MHz should insert an LC resonator in front of the
antenna connector. Use a 1.6-nH inductor in parallel with a 1.8-pF capacitor. Connect both from the signal trace to a good RF ground.
4.9 Current Consumption With TPS62730
Measured on the TI CC2540TPS62730 EM reference design with TA = 25°C, VDD = 3 V, and fc = 2440 MHZ.
1 Mbps, GFSK, 250-kHz deviation, Bluetooth low energy mode, 1% BER(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
RX mode, standard mode, no peripherals active, low MCU activity,
MCU at 1 MHZ
15.8
RX mode, high-gain mode, no peripherals active, low MCU activity,
MCU at 1 MHZ
17.8
16.5
18.6
21
TX mode, –23-dBm output power, no peripherals active, low MCU activity,
MCU at 1 MHZ
Current consumption
mA
TX mode, –6-dBm output power, no peripherals active, low MCU activity,
MCU at 1 MHZ
TX mode, 0-dBm output power, no peripherals active, low MCU activity,
MCU at 1 MHZ
TX mode, 4-dBm output power, no peripherals active, low MCU activity,
MCU at 1 MHZ
24.6
(1) 0.1% BER maps to 30.8% PER
10
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4.10 32-MHz Crystal Oscillator
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
Crystal frequency
TEST CONDITIONS
MIN
TYP
MAX UNIT
32
MHz
Crystal frequency accuracy
requirement(1)
–40
40
ppm
ESR
C0
Equivalent series resistance
Crystal shunt capacitance
Crystal load capacitance
Start-up time
6
1
60
7
Ω
pF
pF
ms
CL
10
16
0.25
The crystal oscillator must be in power down for
a guard time before it is used again. This
requirement is valid for all modes of operation.
The need for power-down guard time can vary
with crystal type and load.
Power-down guard time
3
ms
(1) Including aging and temperature dependency, as specified by [1]
4.11 32.768-kHz Crystal Oscillator
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
TEST CONDITIONS
MIN
TYP MAX UNIT
Crystal frequency
32.768
kHz
ppm
kΩ
pF
Crystal frequency accuracy requirement(1)
Equivalent series resistance
Crystal shunt capacitance
Crystal load capacitance
Start-up time
–40
40
ESR
C0
40 130
0.9
12
2
CL
16
pF
0.4
s
(1) Including aging and temperature dependency, as specified by [1]
4.12 32-kHz RC Oscillator
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
Calibrated frequency(1)
TEST CONDITIONS
MIN
TYP
MAX UNIT
32.753
±0.2%
0.4
kHz
Frequency accuracy after calibration
Temperature coefficient(2)
Supply-voltage coefficient(3)
Calibration time(4)
%/°C
%/V
ms
3
2
(1) The calibrated 32-kHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 977.
(2) Frequency drift when temperature changes after calibration
(3) Frequency drift when supply voltage changes after calibration
(4) When the 32-kHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator
is performed while SLEEPCMD.OSC32K_CALDIS is set to 0.
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4.13 16-MHz RC Oscillator
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
Frequency(1)
TEST CONDITIONS
MIN
TYP
16
MAX
UNIT
MHz
Uncalibrated frequency accuracy
Calibrated frequency accuracy
Start-up time
±18%
±0.6%
10
µs
µs
Initial calibration time(2)
50
(1) The calibrated 16-MHz RC oscillator frequency is the 32-MHz XTAL frequency divided by 2.
(2) When the 16-MHz RC oscillator is enabled, it is calibrated when a switch from the 16-MHz RC oscillator to the 32-MHz crystal oscillator
is performed while SLEEPCMD.OSC_PD is set to 0.
4.14 RSSI Characteristics
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
TEST CONDITIONS
High-gain mode
MIN
TYP MAX
–99 to –44
UNIT
Useful RSSI range(1)
dBm
Standard mode
High-gain mode
–90 to –35
Absolute uncalibrated RSSI accuracy(1)
Step size (LSB value)
±4
1
dB
dB
(1) Assuming CC2540 EM reference design. Other RF designs give an offset from the reported value.
4.15 Frequency Synthesizer Characteristics
Measured on the TI CC2540 EM reference design with TA = 25°C, VDD = 3 V and fc = 2440 MHz.
PARAMETER
TEST CONDITIONS
At ±1-MHz offset from carrier
MIN
TYP
–109
–112
–119
MAX
UNIT
Phase noise, unmodulated
carrier
At ±3-MHz offset from carrier
At ±5-MHz offset from carrier
dBc/Hz
4.16 Analog Temperature Sensor
Measured on the TI CC2540 EM reference design with TA = 25°C and VDD = 3 V.
PARAMETER
TEST CONDITIONS
MIN
TYP
1480
4.5
1
MAX
UNIT
12-bit
/ 1°C
/ 0.1 V
°C
Output
Temperature coefficient
Voltage coefficient
Measured using integrated ADC, internal band-gap
voltage reference, and maximum resolution
Initial accuracy without calibration
Accuracy using 1-point calibration
Current consumption when enabled
±10
±5
°C
0.5
mA
4.17 Comparator Characteristics
TA = 25°C, VDD = 3 V. All measurement results are obtained using the CC2540T reference designs, post-calibration.
PARAMETER
Common-mode maximum voltage
Common-mode minimum voltage
Input offset voltage
TEST CONDITIONS
MIN
TYP
VDD
–0.3
1
MAX
UNIT
V
mV
µV/°C
mV/V
nA
Offset versus temperature
Offset versus operating voltage
Supply current
16
4
230
0.15
Hysteresis
mV
12
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4.18 ADC Characteristics
TA = 25°C and VDD = 3 V
PARAMETER
TEST CONDITIONS
VDD is voltage on AVDD5 pin
VDD is voltage on AVDD5 pin
VDD is voltage on AVDD5 pin
Simulated using 4-MHz clock speed
Peak-to-peak, defines 0 dBFS
Single-ended input, 7-bit setting
Single-ended input, 9-bit setting
Single-ended input, 10-bit setting
Single-ended input, 12-bit setting
Differential input, 7-bit setting
Differential input, 9-bit setting
Differential input, 10-bit setting
Differential input, 12-bit setting
10-bit setting, clocked by RCOSC
12-bit setting, clocked by RCOSC
7-bit setting, both single and differential
MIN
0
TYP
MAX
VDD
VDD
VDD
UNIT
V
Input voltage
External reference voltage
0
V
External reference voltage differential
0
V
Input resistance, signal
Full-scale signal(1)
197
2.97
5.7
kΩ
V
7.5
9.3
10.3
6.5
ENOB(1)
Effective number of bits
bits
8.3
10
11.5
9.7
10.9
0–20
Useful power bandwidth
Total harmonic distortion
kHz
dB
Single ended input, 12-bit setting, –6
dBFS(1)
–75.2
–86.6
THD
Differential input, 12-bit setting, –6
dBFS(1)
Single-ended input, 12-bit setting(1)
Differential input, 12-bit setting(1)
70.2
79.3
Single-ended input, 12-bit setting, –6
dBFS(1)
Signal to nonharmonic ratio
dB
dB
78.8
88.9
>84
>84
Differential input, 12-bit setting, –6
dBFS(1)
Differential input, 12-bit setting, 1-kHz
sine (0 dBFS), limited by ADC resolution
CMRR
Common-mode rejection ratio
Crosstalk
Single ended input, 12-bit setting, 1-kHz
sine (0 dBFS), limited by ADC resolution
dB
Offset
Midscale
–3
0.68%
0.05
0.9
mV
Gain error
12-bit setting, mean(1)
12-bit setting, maximum(1)
12-bit setting, mean(1)
12-bit setting, maximum(1)
DNL
INL
Differential nonlinearity
Integral nonlinearity
LSB
LSB
4.6
13.3
10
12-bit setting, mean, clocked by RCOSC
12-bit setting, max, clocked by RCOSC
Single ended input, 7-bit setting(1)
Single ended input, 9-bit setting(1)
Single ended input, 10-bit setting(1)
Single ended input, 12-bit setting(1)
Differential input, 7-bit setting(1)
Differential input, 9-bit setting(1)
Differential input, 10-bit setting(1)
Differential input, 12-bit setting(1)
29
35.4
46.8
57.5
66.6
40.7
51.6
61.8
70.8
SINAD
(–THD+N)
Signal-to-noise-and-distortion
dB
(1) Measured with 300-Hz sine-wave input and VDD as reference.
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ADC Characteristics (continued)
TA = 25°C and VDD = 3 V
PARAMETER
TEST CONDITIONS
7-bit setting
MIN
TYP
20
MAX
UNIT
9-bit setting
10-bit setting
12-bit setting
36
Conversion time
µs
68
132
1.2
4
Power consumption
mA
mV/V
mV/10°C
V
Internal reference VDD coefficient
Internal reference temperature coefficient
Internal reference voltage
0.4
1.24
4.19 Control Input AC Characteristics
TA = –40°C to 125°C, VDD = 2 V to 3.6 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
The undivided system clock is 32 MHz when crystal oscillator is used.
The undivided system clock is 16 MHz when calibrated 16-MHz RC
oscillator is used.
System clock, fSYSCLK
tSYSCLK = 1 / fSYSCLK
16
32
MHz
See item 1 in Figure 4-1. This is the shortest pulse that is recognized
as a complete reset pin request. Note that shorter pulses may be
recognized but do not lead to complete reset of all modules within the
chip.
RESET_N low duration
Interrupt pulse duration
1
µs
ns
See item 2 in Figure 4-1. This is the shortest pulse that is recognized
as an interrupt request.
20
RESET_N
1
2
Px.n
T0299-01
Figure 4-1. Control Input AC Characteristics
14
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4.20 SPI AC Characteristics
TA = –40°C to 125°C, VDD = 2 V to 3.6 V
PARAMETER
TEST CONDITIONS
MIN
250
250
TYP
MAX UNIT
Master, RX and TX
Slave, RX and TX
Master
t1
SCK period
ns
SCK duty cycle
SSN low to SCK
50%
Master
63
63
63
63
t2
t3
ns
ns
Slave
Master
SCK to SSN high
Slave
t4
t5
t6
t7
MOSI early out
MOSI late out
MISO setup
MISO hold
Master, load = 10 pF
Master, load = 10 pF
Master
7
ns
ns
ns
ns
ns
ns
ns
ns
10
90
10
Master
SCK duty cycle
MOSI setup
MOSI hold
Slave
50%
t10
t11
t9
Slave
35
10
Slave
MISO late out
Slave, load = 10 pF
Master, TX only
Master, RX and TX
Slave, RX only
Slave, RX and TX
95
8
4
Operating frequency
MHz
8
4
SCK
t2
t3
SSN
t4
t5
MOSI
D0
X
D1
t6
t7
MISO
X
D0
X
T0478-01
Figure 4-2. SPI Master AC Characteristics
SCK
t2
t3
SSN
t8
t9
MISO
D0
X
D1
t10
t11
MOSI
X
D0
X
T0479-01
Figure 4-3. SPI Slave AC Characteristics
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4.21 Debug Interface AC Characteristics
TA = –40°C to 125°C, VDD = 2 V to 3.6 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
12
UNIT
MHz
ns
fclk_dbg
Debug clock frequency (see Figure 4-4)
Allowed high pulse on clock (see Figure 4-4)
Allowed low pulse on clock (see Figure 4-4)
t1
t2
35
35
ns
EXT_RESET_N low to first falling edge on debug
clock (see Figure 4-6)
t3
t4
t5
167
83
ns
ns
ns
Falling edge on clock to EXT_RESET_N high
(see Figure 4-6)
EXT_RESET_N high to first debug command
(see Figure 4-6)
83
t6
t7
t8
Debug data setup (see Figure 4-5)
Debug data hold (see Figure 4-5)
Clock-to-data delay (see Figure 4-5)
2
4
ns
ns
ns
Load = 10 pF
30
Time
DEBUG_CLK
P2_2
t1
t2
1/fclk_dbg
T0436-01
Figure 4-4. Debug Clock–Basic Timing
Time
DEBUG_CLK
P2_2
RESET_N
t3
t4
t5
T0437-01
Figure 4-5. Debug Enable Timing
16
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Time
DEBUG_CLK
P2_2
DEBUG_DATA
(to CC2540)
P2_1
DEBUG_DATA
(from CC2540)
P2_1
t6
t7
t8
T0438-02
Figure 4-6. Data Setup and Hold Timing
4.22 Timer Inputs AC Characteristics
TA = –40°C to 125°C, VDD = 2 V to 3.6 V
PARAMETER
TEST CONDITIONS
MIN TYP
MAX
UNIT
Synchronizers determine the shortest input pulse that can be
recognized. The synchronizers operate at the current system clock
rate (16 MHz or 32 MHz).
Input capture pulse duration
1.5
tSYSCLK
4.23 DC Characteristics
TA = 25°C, VDD = 3 V
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V
Logic-0 input voltage
0.5
Logic-1 input voltage
2.5
–50
–50
V
Logic-0 input current
Input equals 0 V
Input equals VDD
50
50
nA
nA
kΩ
V
Logic-1 input current
I/O-pin pullup and pulldown resistors
Logic-0 output voltage, 4-mA pins
Logic-1 output voltage, 4-mA pins
20
Output load 4 mA
Output load 4 mA
0.5
2.4
V
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4.24 Typical Characteristics
21
20.5
20
33
32.5
32
19.5
19
31.5
31
18.5
18
30.5
30
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (èC)
Temperature (èC)
Gain = Standard Setting
Input = –70 dBm
VCC = 3 V
TX Power Setting = 4 dBm
VCC = 3 V
Figure 4-7. RX Current in Wait for Sync vs Temperature
Figure 4-8. TX Current vs Temperature
-72
-74
-76
-78
-80
-82
-84
-86
-88
-90
-92
7
6
5
4
3
2
1
0
-1
-2
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
Temperature (èC)
Temperature (èC)
Gain = Standard Setting
VCC = 3 V
TX Power Setting = 4 dBm
VCC = 3 V
Figure 4-9. RX Sensitivity vs Temperature
Figure 4-10. TX Power vs Temperature
19.7
32
31.9
31.8
31.7
31.6
31.5
31.4
31.3
31.2
31.1
31
19.68
19.66
19.64
19.62
19.6
19.58
19.56
19.54
19.52
19.5
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Supply Voltage (V)
Supply Voltage (V)
Gain = Standard Setting
Input = –70 dBm
TA = 25°C
TA = 25°C
TX Power Setting = 4 dBm
Figure 4-11. RX Current in Wait for Sync vs Supply Voltage
Figure 4-12. TX Current vs Supply Voltage
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Typical Characteristics (continued)
-87
-87.2
-87.4
-87.6
-87.8
-88
5
4.8
4.6
4.4
4.2
4
-88.2
-88.4
-88.6
-88.8
-89
3.8
3.6
3.4
3.2
3
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
Supply Voltage (V)
Supply Voltage (V)
Gain = Standard Setting
TA = 25°C
TA = 25°C
TX Power Setting = 4 dBm
Figure 4-14. TX Power vs Supply Voltage
Figure 4-13. RX Sensitivity vs Supply Voltage
70
60
50
40
30
20
10
0
-87
-87.2
-87.4
-87.6
-87.8
-88
-88.2
-88.4
-88.6
-88.8
-89
-10
2400
2420
2440
2460
2480
2400
2420
2440
2460
2480
Frequency (MHz)
Frequency (MHz)
Gain = Standard Setting
TA = 25°C
TA = 25°C
Wanted
Signal at
2426 MHz
with –67
VCC = 3 V
dBm Level
Figure 4-15. RX Sensitivity vs Frequency
VCC = 3 V
Gain = Standard Setting
Figure 4-16. RX Interferer Rejection (Selectivity) vs Interferer
Frequency
5
4.8
4.6
4.4
4.2
4
3.8
3.6
3.4
3.2
3
2400
2420
2440
2460
2480
Frequency (MHz)
TA = 25°C
TX Power Setting = 4 dBm
VCC = 3 V
Figure 4-17. TX Power vs Frequency
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Table 4-1. Output Power and Current Consumption(1)(2)
TYPICAL
CURRENT CONSUMPTION
(mA)
TYPICAL CURRENT
CONSUMPTION
WITH TPS62730 (mA)
TYPICAL
OUTPUT POWER (dBm)
4
0
32
27
24
21
24.6
21
–6
–23
18.5
16.5
(1) Measured on Texas Instruments CC2540 EM reference design with TA = 25°C, VDD = 3 V and
fc = 2440 MHz. See SWRU191 for recommended register settings.
(2) Measured on Texas Instruments CC2540TPS62730 EM reference design with TA = 25°C, VDD = 3 V
and fc = 2440 MHz. See SWRU191 for recommended register settings.
4.25 Typical Current Savings
CC2540 Current Consumption
TX 4dBm
CC2540 Current Consumption
RX SG CLKCONMOD0x80
35
30
25
20
40
35
25
20
15
10
5
40
35
30
25
20
15
10
5
30
25
DC/DC ON
DC/DC ON
20
15
10
DC/DC OFF
DC/DC OFF
15
10
5
Current Savings
% Current Savings
5
0
0
0
0
2.1
2.4
2.7
3
3.3
3.6
2.1
2.4
2.7
3
3.3
3.6
Supply (V)
Supply (V)
Figure 4-18. Current Savings in TX at Room Temperature
Figure 4-19. Current Savings in RX at Room Temperature
See the application note (SWRA365) for information regarding the CC2540T and TPS62730 como board and the
current savings that can be achieved using the como board.
20
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5 Detailed Description
5.1 Overview
The modules of the CC2540T device can be roughly divided into one of three categories:
•
•
•
CPU-related modules
Modules related to power, test, and clock distribution
Radio-related modules
A short description of each module is given in the following subsections.
5.2 Functional Block Diagram
A block diagram of the CC2540T is shown in Figure 5-1.
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VDD (2 V–3.6 V)
DCOUPL
WATCHDOG
TIMER
ON-CHIP VOLTAGE
REGULATOR
RESET_N
RESET
XOSC_Q2
XOSC_Q1
32-MHz
POWER-ON RESET
BROWN OUT
CRYSTAL OSC
CLOCK MUX
and
CALIBRATION
P2_4
P2_3
P2_2
P2_1
P2_0
32.768-kHz
CRYSTAL OSC
SLEEP TIMER
HIGH-
32-kHz
SPEED
DEBUG
INTERFACE
RC-OSC
RC-OSC
POWER MANAGEMENT CONTROLLER
PDATA
XRAM
IRAM
SFR
P1_7
P1_6
P1_5
P1_4
P1_3
P1_2
P1_1
P1_0
8051 CPU
CORE
MEMORY
ARBITRATOR
FLASH
FLASH
UNIFIED
DMA
IRQ CTRL
FLASH CTRL
1 KB SRAM
P0_7
P0_6
P0_5
P0_4
P0_3
P0_2
P0_1
P0_0
ANALOG COMPARATOR
OP-AMP
FIFOCTRL
RADIO REGISTERS
AES
ENCRYPTION
AND
DECRYPTION
DS
ADC
Link Layer Engine
AUDIO/DC
DEMODULATOR
MODULATOR
USB_N
USB_P
USB
USART 0
USART 1
RECEIVE
TRANSMIT
TIMER 1 (16-Bit)
TIMER 2
(BLE LL TIMER)
RF_P
RF_N
TIMER 3 (8-Bit)
TIMER 4 (8-Bit)
DIGITAL
ANALOG
MIXED
B0301-05
Figure 5-1. CC2540T Block Diagram
5.3 Block Descriptions
5.3.1 CPU and Memory
The 8051 CPU core is a single-cycle 8051-compatible core. It has three different memory access busses
(SFR, DATA, and CODE/XDATA), a debug interface, and an 18-input extended interrupt unit.
22
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The memory arbiter is at the heart of the system, as it connects the CPU and DMA controller with the
physical memories and all peripherals through the SFR bus. The memory arbiter has four memory-access
points, access of which can map to one of three physical memories: an SRAM, flash memory, with
XREG/SFR registers. It is responsible for performing arbitration and sequencing between simultaneous
memory accesses to the same physical memory.
The SFR bus is drawn conceptually in Figure 5-1 as a common bus that connects all hardware
peripherals to the memory arbiter. The SFR bus in the block diagram also provides access to the radio
registers in the radio register bank, even though these are indeed mapped into XDATA memory space.
The 8-KB SRAM maps to the DATA memory space and to parts of the XDATA memory spaces. The
SRAM is an ultralow-power SRAM that retains its contents even when the digital part is powered off
(power modes 2 and 3).
The 256-KB flash block provides in-circuit programmable non-volatile program memory for the device,
and maps into the CODE and XDATA memory spaces.
5.3.2 Peripherals
Writing to the flash block is performed through a flash controller that allows page-wise erasure and
4-bytewise programming. See the User's Guide (SWRU191) for details on the flash controller.
A versatile five-channel DMA controller is available in the system, accesses memory using the XDATA
memory space, and thus has access to all physical memories. Each channel (trigger, priority, transfer
mode, addressing mode, source and destination pointers, and transfer count) is configured with DMA
descriptors that can be located anywhere in memory. Many of the hardware peripherals (AES core, flash
controller, USARTs, timers, ADC interface, and so forth) can be used with the DMA controller for efficient
operation by performing data transfers between a single SFR or XREG address and flash/SRAM.
Each CC2540T contains a unique 48-bit IEEE address that can be used as the public device address for a
Bluetooth device. Designers are free to use this address, or provide their own, as described in the
Bluetooth specification.
The interrupt controller services a total of 18 interrupt sources, divided into six interrupt groups, each of
which is associated with one of four interrupt priorities. I/O and sleep timer interrupt requests are serviced
even if the device is in a sleep mode (power modes 1 and 2) by bringing the CC2540T back to the active
mode.
The debug interface implements a proprietary two-wire serial interface that is used for in-circuit
debugging. Through this debug interface, it is possible to erase or program the entire flash memory,
control which oscillators are enabled, stop and start execution of the user program, execute instructions
on the 8051 core, set code breakpoints, and single-step through instructions in the code. Using these
techniques, it is possible to perform in-circuit debugging and external flash programming elegantly.
The I/O controller is responsible for all general-purpose I/O pins. The CPU can configure whether
peripheral modules control certain pins or whether they are under software control, and if so, whether
each pin is configured as an input or output and if a pullup or pulldown resistor in the pad is connected.
Each peripheral that connects to the I/O pins can choose between two different I/O pin locations to ensure
flexibility in various applications.
The sleep timer is an ultralow-power timer that can either use an external 32.768-kHz crystal oscillator or
an internal 32.753-kHz RC oscillator. The sleep timer runs continuously in all operating modes except
power mode 3. Typical applications of this timer are as a real-time counter or as a wake-up timer to get
out of power modes 1 or 2.
A built-in watchdog timer allows the CC2540T to reset itself if the firmware hangs. When enabled by
software, the watchdog timer must be cleared periodically; otherwise, it resets the device when it times
out.
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Timer 1 is a 16-bit timer with timer/counter/PWM functionality. It has a programmable prescaler, a 16-bit
period value, and five individually programmable counter/capture channels, each with a 16-bit compare
value. Each of the counter and capture channels can be used as a PWM output or to capture the timing of
edges on input signals. It can also be configured in IR generation mode, where it counts timer 3 periods
and the output is ANDed with the output of timer 3 to generate modulated consumer IR signals with
minimal CPU interaction.
Timer 2 is a 40-bit timer used by the Bluetooth low energy stack. It has a 16-bit counter with a
configurable timer period and a 24-bit overflow counter that can be used to keep track of the number of
periods that have transpired. A 40-bit capture register is also used to record the exact time at which a
start-of-frame delimiter is received or transmitted, or it is used to record the exact time at which
transmission ends. There are two 16-bit timer-compare registers and two 24-bit overflow-compare
registers that can be used to give exact timing for the start of RX or TX to the radio or general interrupts.
Timer 3 and timer 4 are 8-bit timers with timer/counter/PWM functionality. They have a programmable
prescaler, an 8-bit period value, and one programmable counter channel with an 8-bit compare value.
Each of the counter channels can be used as PWM output.
USART 0 and USART 1 are each configurable as either an SPI master or slave, or as a UART. They
provide double buffering on both RX and TX and hardware flow control and are thus well suited to high-
throughput full-duplex applications. Each USART has its own high-precision baud-rate generator, which
leaves the ordinary timers free for other uses. When configured as SPI slaves, the USARTs sample the
input signal using SCK directly instead of using some oversampling scheme, and are thus well-suited for
high data rates.
The AES encryption/decryption core allows the user to encrypt and decrypt data using the AES
algorithm with 128-bit keys. The AES core also supports ECB, CBC, CFB, OFB, CTR, and CBC-MAC, as
well as hardware support for CCM.
The ADC supports 7 to 12 bits of resolution with a corresponding range of bandwidths from 30-kHz to
4-kHz, respectively. DC and audio conversions with up to eight input channels (I/O controller pins) are
possible. The inputs can be selected as single-ended or differential. The reference voltage can be internal,
AVDD, or a single-ended or differential external signal. The ADC also has a temperature-sensor input
channel. The ADC can automate the process of periodic sampling or conversion over a sequence of
channels.
The ultralow-power analog comparator enables applications to wake up from PM2 or PM3 based on an
analog signal. Both inputs are brought out to pins; the reference voltage must be provided externally. The
comparator output is connected to the I/O controller interrupt detector and can be treated by the MCU as a
regular I/O pin interrupt.
24
Detailed Description
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6 Applications, Implementation, and Layout
NOTE
Information in the following Applications section is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes. Customers should validate and test
their design implementation to confirm system functionality.
6.1 Application Information
Few external components are required for the operation of the CC2540T. A typical application circuit is
shown in Figure 6-1.
32-kHz Crystal(1)
C331
2-V to 3.6-V Power Supply
C401
C321
R301
RBIAS 30
DGND_USB
USB_P
USB_N
DVDD_USB
P1_5
1
2
3
4
5
6
7
8
9
L251
C252
AVDD4 29
AVDD1 28
AVDD2 27
Antenna
(50 W)
C251
C261
L252
L253
C253
RF_N
RF_P
26
25
CC2540T
L261
C262
P1_4
DIE ATTACH PAD
AVDD3 24
P1_3
XOSC_Q2
23
22
P1_2
XOSC_Q1
P1_1
AVDD5 21
10 DVDD2
XTAL1
C221
C231
Power Supply Decoupling Capacitors are Not Shown
Digital I/O Not Connected
S0383-03
(1) 32-kHz crystal is mandatory when running the chip in low-power modes, except if the link layer is in the standby
state (Vol. 6 Part B Section 1.1, see [1]).
NOTE: Different antenna alternatives will be provided as reference designs.
Figure 6-1. CC2540T Application Circuit
Copyright © 2014–2015, Texas Instruments Incorporated
Applications, Implementation, and Layout
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Table 6-1. Overview of External Components (Excluding Supply Decoupling Capacitors)
COMPONENT
C221
C231
C251
C252
C253
C261
C262
C321
C331
C401
L251
DESCRIPTION
32-MHz XTAL loading capacitor
VALUE
12 pF
12 pF
18 pF
1 pF
32-MHz XTAL loading capacitor
Part of the RF matching network
Part of the RF matching network
Part of the RF matching network
Part of the RF matching network
Part of the RF matching network
32-kHz XTAL loading capacitor
32-kHz XTAL loading capacitor
Decoupling capacitor for the internal digital regulator
Part of the RF matching network
Part of the RF matching network
Part of the RF matching network
Part of the RF matching network
Resistor used for internal biasing
1 pF
18 pF
1 pF
15 pF
15 pF
1 µF
2 nH
L252
1 nH
L253
3 nH
L261
2 nH
R301
56 kΩ
6.2 Input/Output Matching
When using an unbalanced antenna such as a monopole, a balun should be used to optimize
performance. The balun can be implemented using low-cost discrete inductors and capacitors. The
recommended balun shown consists of C262, L261, C252, and L252.
6.3 Crystal
An external 32-MHz crystal, XTAL1, with two loading capacitors (C221 and C231) is used for the 32-MHz
crystal oscillator. See Section 4.10 for details. The load capacitance seen by the 32-MHz crystal is given
by Equation 1:
1
CL =
+ Cparasitic
1
1
+
C221 C231
(1)
XTAL2 is an optional 32.768-kHz crystal, with two loading capacitors (C321 and C331) used for the
32.768-kHz crystal oscillator. The 32.768-kHz crystal oscillator is used in applications where both very low
sleep-current consumption and accurate wake-up times are needed. The load capacitance seen by the
32.768-kHz crystal is given by Equation 2:
1
CL =
+ Cparasitic
1
1
+
C321 C331
(2)
A series resistor may be used to comply with the ESR requirement.
6.4 On-Chip 1.8-V Voltage Regulator Decoupling
The 1.8-V on-chip voltage regulator supplies the 1.8-V digital logic. This regulator requires a decoupling
capacitor (C401) for stable operation.
6.5 Power-Supply Decoupling and Filtering
Proper power-supply decoupling must be used for optimum performance. The placement and size of the
decoupling capacitors and the power supply filtering are very important to achieve the best performance in
an application. TI provides a compact reference design that should be followed very closely (see
Section 6.6).
26
Applications, Implementation, and Layout
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6.6 Reference Design
Bluetooth Low Energy Light Reference Design
This reference design is an example of using the SimpleLink™ Bluetooth low energy CC2540T high
temperature range, wireless microcontroller in lighting applications. The board includes RGBW LEDs
controlled by the CC2540T and is USB powered. The board can be controlled out-of-the-box by the TI
BLE Multitool smart phone app.
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7 器件和文档支持
7.1 文档支持
7.1.1 相关文档
以下文档介绍了 CC2540T 处理器。在 www.ti.com 内提供这些文档的副本。
[1]
SWRU191 《CC253x 适用于 2.4GHz IEEE 802.15.4
《Bluetooth® Core 技术规范，核心版本 4.0》
和
ZigBee® 应用程序的片上系统解决方
案，CC2540/41 适用于 2.4Ghz 蓝牙低能耗应用的片上系统 应用程序》
SWRA365 使用 TPS62730 节省 CC254x 电流
7.1.2 社区资源
下列链接提供到 TI 社区资源的连接。 链接的内容由各个分销商“按照原样”提供。 这些内容并不构成 TI 技术
规范和标准且不一定反映 TI 的观点；请见 TI 的使用条款。
TI E2E™ 在线社区 TI 工程师对工程师 (E2E) 社区。 此社区的创建目的是为了促进工程师之间协作。 在
e2e.ti.com 中，您可以咨询问题、共享知识、探索思路，在同领域工程师的帮助下解决问题。
德州仪器 (TI) 嵌入式处理器维基网站 德州仪器 (TI) 嵌入式处理器维基网站。 此网站的建立是为了帮助开发
人员从德州仪器 (TI) 的嵌入式处理器入门并且也为了促进与这些器件相关的硬件和软件的总体
知识的创新和增长。
7.2 德州仪器 (TI) 低功耗射频网站
•
•
•
论坛、视频和博客
射频设计帮助
E2E 交流互动
访问 www.ti.com/lprf-forum 立即体验。
7.3 德州仪器 (TI) 低功耗射频开发者网络
德州仪器 (TI) 建立了一个大型低功耗射频开发合作伙伴网络，帮助客户加快应用开发。此网络中包括推荐的
公司、射频顾问和独立设计工作室，他们可提供一系列硬件模块产品和设计服务，其中包括：
•
•
•
射频电路、低功耗射频和 ZigBee®设计服务
低功耗射频和 ZigBee 模块解决方案以及开发工具
射频认证服务和射频电路制造
是否需要有关模块、工程服务或开发工具的帮助？
请搜索低功耗射频开发者网络工具查找适合的合作伙伴。
www.ti.com/lprfnetwork
28
器件和文档支持
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7.4 低功耗射频电子新闻简报
通过低功耗射频电子新闻简报，用户能够了解到最新的产品、新闻稿、开发者相关新闻以及关于德州仪器
(TI) 低功耗射频产品其它新闻和活动。低功耗射频电子新闻简报文章包含可获取更多在线信息的链接。
访问
www.ti.com/lprfnewsletter 立即注册
7.5 商标
SmartRF, SimpleLink, E2E are trademarks of Texas Instruments.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
IAR Embedded Workbench is a trademark of IAR Systems AB.
ZigBee is a registered trademark of ZigBee Alliance, Inc.
All other trademarks are the property of their respective owners.
7.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
7.7 出口管制提示
接收方同意：如果美国或其他适用法律限制或禁止将通过非披露义务的披露方获得的任何产品或技术数据
（其中包括软件）（见美国、欧盟和其他出口管理条例之定义）、或者其他适用国家条例限制的任何受管制
产品或此项技术的任何直接产品出口或再出口至任何目的地，那么在没有事先获得美国商务部和其他相关政
府机构授权的情况下，接收方不得在知情的情况下，以直接或间接的方式将其出口。
7.8 Glossary
TI Glossary This glossary lists and explains terms, acronyms, and definitions.
8 机械、封装和可订购信息
8.1 封装信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知
且不对本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2014–2015, Texas Instruments Incorporated
机械、封装和可订购信息
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CC2540TF256RHAR
CC2540TF256RHAT
ACTIVE
VQFN
VQFN
RHA
40
40
2500 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
-40 to 125
-40 to 125
CC2540T
F256
Samples
Samples
ACTIVE
RHA
250 RoHS & Green NIPDAU | NIPDAUAG Level-3-260C-168 HR
CC2540T
F256
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
23-Jun-2023
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Jun-2023
TRAY
L - Outer tray length without tabs
KO -
Outer
tray
height
W -
Outer
tray
width
Text
P1 - Tray unit pocket pitch
CW - Measurement for tray edge (Y direction) to corner pocket center
CL - Measurement for tray edge (X direction) to corner pocket center
Chamfer on Tray corner indicates Pin 1 orientation of packed units.
*All dimensions are nominal
Device
Package Package Pins SPQ Unit array
Max
matrix temperature
(°C)
L (mm)
W
K0
P1
CL
CW
Name
Type
(mm) (µm) (mm) (mm) (mm)
CC2540TF256RHAR
CC2540TF256RHAR
CC2540TF256RHAT
CC2540TF256RHAT
RHA
RHA
RHA
RHA
VQFN
VQFN
VQFN
VQFN
40
40
40
40
2500
2500
250
35 X 14
35 X 14
35 X 14
35 X 14
150
150
150
150
315 135.9 7620
315 135.9 7620
315 135.9 7620
315 135.9 7620
8.8
8.8
8.8
8.8
7.9
7.9
7.9
7.9
8.15
8.15
8.15
8.15
250
Pack Materials-Page 1
GENERIC PACKAGE VIEW
RHA 40
6 x 6, 0.5 mm pitch
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4225870/A
www.ti.com
PACKAGE OUTLINE
RHA0040H
VQFN - 1 mm max height
S
C
A
L
E
2
.
2
0
0
PLASTIC QUAD FLATPACK - NO LEAD
6.1
5.9
B
0.5
0.3
A
0.3
0.2
DETAIL
OPTIONAL TERMINAL
TYPICAL
PIN 1 INDEX AREA
6.1
5.9
(0.1)
SIDE WALL DETAIL
OPTIONAL METAL THICKNESS
C
1 MAX
SEATING PLANE
0.08 C
0.05
0.00
(0.2) TYP
2X 4.5
EXPOSED
THERMAL PAD
11
20
36X 0.5
10
21
SEE SIDE WALL
DETAIL
2X
41
SYMM
4.5
4.5 0.1
SEE TERMINAL
DETAIL
1
30
0.3
0.2
40X
40
31
PIN 1 ID
(OPTIONAL)
0.1
0.05
C A B
SYMM
0.5
0.3
40X
4219055/B 08/22/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
RHA0040H
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
4.5)
SYMM
40
31
40X (0.6)
1
30
40X (0.25)
4X
(1.27)
(
0.2) TYP
VIA
(0.73)
(5.8)
TYP
4X
41
SYMM
(1.46)
36X (0.5)
10
21
(R0.05)
TYP
11
(0.73) TYP
4X (1.46)
20
4X (1.27)
(5.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:12X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED METAL
EXPOSED METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4219055/B 08/22/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
RHA0040H
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(1.46) TYP
9X ( 1.26)
(R0.05) TYP
40
31
40X (0.6)
1
30
40X (0.25)
41
(1.46)
TYP
SYMM
(5.8)
36X (0.5)
10
21
METAL
TYP
11
20
SYMM
(5.8)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 41:
70% PRINTED SOLDER COVERAGE BY AREA
SCALE:15X
4219055/B 08/22/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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