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CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

CC2564MODx Bluetooth^®Host Controller Interface (HCI) Module

1 Device Overview

1.1 Features

1

– Independent Buffering for Low Energy Allows

Large Numbers of Multiple Connections Without

Affecting BR or EDR Performance

– Built-In Coexistence and Prioritization Handling

for BR, EDR, and Low Energy

• Module Solution Based on TI's CC2564B Dual-

Mode Bluetooth^®, Available in Two Variants:

– CC2564MODA With Integrated Antenna

– CC2564MODN With External Antenna

• Fully Certified Module for FCC, IC, CE, and

Bluetooth 4.1

• Best-in-Class Bluetooth (RF) Performance (TX

Power, RX Sensitivity, Blocking)

– FCC (Z64-2564N), IC (451I-2564N) Modular

Grant (see Section 6.2.1.3, Section 7.1.1, and

Section 7.1.2)

– Class 1.5 TX Power up to +10 dBm

– –93 dbm Typical RX Sensitivity

– Internal Temperature Detection and

Compensation to Ensure Minimal Variation in

RF Performance Over Temperature, No

External Calibration Required

– Improved Adaptive Frequency Hopping (AFH)

Algorithm With Minimum Adaptation Time

– CE Certified as Summarized in the Declaration

of Conformity (see Section 7.1.3)

– Bluetooth 4.1 Controller Subsystem Qualified

(CC2564MODN: QDID 55257; CC2564MODA:

QDID 64631). Compliant up to the HCI Layer

• Highly Optimized for Design Into Small Form

Factor Systems and Flexibility:

– Provides Longer Range, Including Twice the

Range of Other Low-Energy-Only Solutions

– CC2564MODA

• Advanced Power Management for Extended

Battery Life and Ease of Design

– Integrated Chip Antenna

– Module Footprint: 35 Terminals, 0.8-mm

Pitch, 7 mm × 14 mm × 1.4 mm (Typical)

– On-Chip Power Management, Including Direct

Connection to Battery

– Low Power Consumption for Active, Standby,

and Scan Bluetooth Modes

– Shutdown and Sleep Modes to Minimize Power

Consumption

– CC2564MODN

– Single-Ended 50-Ω RF Interface

– Module Footprint: 33 Terminals, 0.8-mm

Pitch, 7 mm × 7 mm × 1.4 mm (Typical)

• BR and EDR Features Include:

– Up to Seven Active Devices

• Physical Interfaces:

– UART Interface With Support for Maximum

Bluetooth Data Rates

– Scatternet: Up to Three Piconets

Simultaneously, One as Master and Two as

Slaves

– Up to Two Synchronous Connection Oriented

(SCO) Links on the Same Piconet

– Support for All Voice Air-Coding—Continuously

Variable Slope Delta (CVSD), A-Law, µ-Law,

and Transparent (Uncoded)

– Assisted Mode for HFP 1.6 Wideband Speech

(WBS) Profile or A2DP Profile to Reduce Host

Processing and Power

– UART Transport Layer (H4) With Maximum

Rate of 4 Mbps

– Three-Wire UART Transport Layer (H5) With

Maximum Rate of 4 Mbps

– Fully Programmable Digital Pulse-Code

Modulation (PCM)–I2S Codec Interface

• CC256x Bluetooth Hardware Evaluation Tool:

PC-Based Application to Evaluate RF Performance

of the Device and Configure Service Pack

– Support of Multiple Bluetooth Profiles With

Enhanced QoS

• Low Energy Features Include:

– Support of up to 10 Simultaneous Connections

– Multiple Sniff Instances Tightly Coupled to

Achieve Minimum Power Consumption

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

www.ti.com

1.2 Applications

•

Mobile Accessories

•

Test and Measurement

Industrial: Cable Replacement

Wireless Sensors

Sports and Fitness Applications

Wireless Audio Solutions

Set-Top Boxes and Remote Controls

Toys

Automotive Aftermarket

Wellness and Health

1.3 Description

The CC2564MODx module from Texas Instruments™ is a complete Bluetooth^®BR/EDR, and low energy

HCI solution that reduces design effort, cost, and time to market. The CC2564MODx module includes TI's

seventh-generation core and provides a versatile, product-proven solution that is Bluetooth 4.1-compliant.

The module is also certified for FCC, IC, and CE, requiring no prior RF experience to develop with this

device; and the device includes a royalty-free software stack compatible with several host MCUs and

MPUs. The CC2564MODx module provides best-in-class RF performance with transmit power and receive

sensitivity that provides twice the range and higher throughput than other Bluetooth-low-energy-only

solutions.

Furthermore, TI’s power-management hardware and software algorithms provide significant power savings

in all commonly used Bluetooth BR/EDR and low energy modes of operation.

The TI dual-mode Bluetooth stack software is certified and provided royalty free for TI's MSP430™ and

MSP432™ ARM^®Cortex^®-M3 and ARM^®Cortex^®-M4 MCUs, and Linux^®based MPUs. Other processors

can be supported through TI's third party. The iPod^®(MFi) protocol is supported by add-on software

packages. Multiple profiles and sample applications, including the following, are supported:

•

Serial port profile (SPP)

Advanced audio distribution profile (A2DP)

Audio/video remote control profile (AVRCP)

Hands-free profile (HFP)

Human interface device (HID)

Generic attribute profile (GATT)

Several Bluetooth low energy profiles and services

For more information, see TI Dual-Mode Bluetooth Stack.

In addition to software, the BOOST-CC2564MODA and CC2564MODxEM evaluation boards are available

for each variant. For more information on TI’s wireless platform solutions for Bluetooth, see TI's wireless-

connectivity/dual-mode-bluetooth page.

Device Information⁽¹⁾

PART NUMBER

CC2564MODNCMOET

PACKAGE

MOE (33)

MOG (35)

BODY SIZE

7.0 mm × 7.0 mm × 1.4 mm (Typical)

7.0 mm × 14.0 mm × 1.4 mm (Typical)

CC2564MODNCMOER

CC2564MODACMOG

(1) For more information on these devices, see Section 8.2.

space

2

Device Overview

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SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

1.4 Functional Block Diagram

VDD_IN VDD_IO

UART

PCM

Antenna

Filter

CC2564B

nSHUTD

32.768 kHz

Slow Clock

38.4 MHz

XTAL

Figure 1-1. CC2564MODA Functional Block Diagram

VDD_IN VDD_IO

UART

PCM

Antenna

Filter

CC2564B

nSHUTD

32.768 kHz

Slow Clock

38.4 MHz

XTAL

Figure 1-2. CC2564MODN Functional Block Diagram

Device Overview

3

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Table of Contents

1

Device Overview ......................................... 1

1.1 Features .............................................. 1

1.2 Applications........................................... 2

1.3 Description............................................ 2

1.4 Functional Block Diagram ............................ 3

Revision History ......................................... 4

Terminal Configuration and Functions.............. 5

3.1 Pin Diagram .......................................... 5

3.2 Pin Attributes ......................................... 6

3.3 Connections for Unused Signals ..................... 7

Specifications ............................................ 8

4.1 Absolute Maximum Ratings .......................... 8

4.2 ESD Ratings.......................................... 8

4.3 Power-On Hours...................................... 8

4.4 Recommended Operating Conditions ................ 8

4.5 Power Consumption Summary ....................... 9

4.6 Electrical Characteristics............................ 10

4.7 Timing and Switching Characteristics............... 11

Detailed Description ................................... 19

5.1 Overview ............................................ 19

5.2 Functional Block Diagram........................... 19

5.3 Functional Blocks ................................... 20

5.4 Bluetooth BR and EDR Description................. 20

5.5 Bluetooth low energy Description ................... 20

5.6 Bluetooth Transport Layers ......................... 21

5.7 Host Controller Interface ............................ 21

5.8 Digital Codec Interface .............................. 23

5.9 Assisted Modes ..................................... 25

Applications, Implementation, and Layout........ 31

6.1 Reference Design Schematics ..................... 31

6.2 Layout .............................................. 32

6.3 Soldering Recommendations ....................... 42

Device and Documentation Support ............... 43

7.1 Device Certification and Qualification ............... 43

7.2 Tools and Software ................................. 43

7.3 Device Nomenclature ............................... 46

7.4 Documentation Support ............................. 46

7.5 Related Links........................................ 48

7.6 Community Resources.............................. 48

7.7 Trademarks.......................................... 48

7.8 Electrostatic Discharge Caution..................... 48

7.9 Glossary ............................................. 48

2

3

6

7

4

5

8

Mechanical, Packaging, and Orderable

Information .............................................. 49

8.1 Mechanical Data .................................... 49

8.2 Packaging and Ordering ............................ 51

2 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from December 28, 2015 to January 16, 2017

Page

•

Changed Section 1.1 ................................................................................................................. 1

Changed Section 1.3 ................................................................................................................ 2

Added Table 3-2 ...................................................................................................................... 7

Changed Section 7.................................................................................................................. 43

Added Figure 7-1.................................................................................................................... 46

Changed Table 8-1.................................................................................................................. 51

Changes from November 4, 2015 to December 28, 2015

Page

•

Added CC2564MODA device variant ............................................................................................. 1

Added applications in Section 1.2 ................................................................................................. 2

Changed VBAT to VDD_IN Figure 5-1 and Figure 5-2 .......................................................................... 3

Changed storage temperature range in Section 4.1 ............................................................................. 8

Changed restrictions on verification of parameters in Section 4.7.4.1 ....................................................... 15

Changed restrictions on verification of parameters in Section 4.7.4.2 ....................................................... 18

Changed values for Adjacent channel power |M-N| = 2 and Adjacent channel power |M-N| > 2 in Table 4-15........ 18

Added "Includes a 128-bit hardware encryption accelerator as defined by the Bluetooth specifications" in

Section 5.4 ........................................................................................................................... 20

Changed Figure 5-10 .............................................................................................................. 29

Changed Figure 5-11 ............................................................................................................... 30

Changed Section 6.2.2.1 .......................................................................................................... 41

•

4

Revision History

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SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

3 Terminal Configuration and Functions

3.1 Pin Diagram

Figure 3-1 shows the top view of the terminal designations for the CC2564MODA device.

19

AUD_IN

20

AUD_OUT

12

VDD_IN

21

AUD_CLK

11

NC

22

AUD_FSYNC

10

NC

23

NC

9

GND

24

TX_DBG

CC2564MODA

8

SLOW_CLK_IN

25

GNDPAD

26

7

GNDPAD

GND

27

GNDPAD

28

GNDPAD

29

GNDPAD

30

GNDPAD

31

GNDPAD

32

GNDPAD

33

GNDPAD

34

GNDPAD

35

GNDPAD

SWRS160-006

Figure 3-1. CC2564MODA Pin Diagram (Top View)

Figure 3-2 shows the top view of the terminal designations for the CC2564MODN device.

19

AUD_IN

20

AUD_OUT

12

VDD_IN

21

AUD_CLK

11

NC

22

AUD_FSYNC

10

NC

23

NC

9

GND

24

TX_DBG

CC2564MODN

8

SLOW_CLK_IN

7

25

26

27

28

29

GNDPAD

GND

30

31

32

33

SWRS160-006

Figure 3-2. CC2564MODN Pin Diagram (Top View)

Terminal Configuration and Functions

5

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3.2 Pin Attributes

Table 3-1 describes the pin attributes.

Table 3-1. Pin Attributes

PULL AT DEF.

RESET

I/O

NO.

NAME

HCI_CTS

ESD⁽¹⁾(V)

DESCRIPTION

DIR.⁽²⁾

Type⁽³⁾

HCI UART clear-to-send. The device can send data

when HCI_CTS is low.

1

750

PU

I

8 mA

2

3

HCI_TX

HCI_RX

750

PU

O

I

8 mA

HCI UART data transmit

HCI UART data receive

HCI UART request-to-send. Host can send data when

HCI_RTS is low.

4

HCI_RTS

750

PU

O

8 mA

5

7

8

9

GND

1000

Ground

GND

SLOW_CLK_IN

GND

I

32.768-kHz clock in

Ground

Fail-safe

12

13

VDD_IN

GND

Main power supply for the module (2.2 to 4.8 V)

Ground

BT_ANT

NC

500

I/O

Bluetooth RF I/O (CC2564MODN only)

Not connected (CC2564MODA only)

Ground

14

15

16

17

18

19

20

21

22

GND

nSHUTD

GND

PD

I

Shutdown input (active low)

Ground

VDD_IO

AUD_IN

AUD_OUT

AUD_CLK

AUD_FSYNC

1000

500

I

I/O power supply (1.8 V nominal)

PD

I

4 mA

PCM data input

PCM data output

PCM clock

Fail-safe

O

I/O

HY, 4 mA

4 mA

PCM frame sync

TI internal debug messages. TI

recommends leaving a test point.

24

TX_DBG

1000

PU

O

2 mA

25

26

27

28

29

30

31

32

33

34

35

GNDPAD

1000

Ground

Ground (CC2564MODA only)

(1) ESD: Human Body Model (HBM). JEDEC 22-A114 2-wire method. CDM: All pins pass 500 V except BT_ANT, which passes 400 V.

(2) I = input; O = output; I/O = bidirectional

(3) I/O Type: Digital I/O cells. HY = input hysteresis, current = typical output current

6

Terminal Configuration and Functions

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SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

3.3 Connections for Unused Signals

Table 3-2 lists the connections for unused signals.

Table 3-2. Connections for Unused Signals

NUMBER

ESD⁽¹⁾

(V)

PULL AT

RESET

I/O

FUNCTION

DEF. DIR.⁽²⁾

DESCRIPTION

Not connected

Type⁽³⁾

6

NC

I

10

11

23

O

Not connected

O

500

PD

I/O

4 mA

(1) ESD: Human Body Model (HBM). JEDEC 22-A114 2-wire method. CDM: All pins pass 500 V except BT_ANT, which passes 400 V.

(2) I = input; O = output; I/O = bidirectional

(3) I/O Type: Digital I/O cells. HY = input hysteresis, current = typical output current

Terminal Configuration and Functions

7

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4 Specifications

Unless otherwise indicated, all measurements are taken at the device pins of the TI test evaluation board

(EVB). All specifications are over process, voltage, and temperature, unless otherwise indicated.

All values apply to the CC2564MODA and CC2564MODN devices, unless otherwise indicated.

4.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise indicated). All parameters are measured as follows: VDD_IN =

3.6 V and VDD_IO = 1.8 V (unless otherwise indicated).⁽¹⁾

MIN

–0.5

MAX

4.8

UNIT

V

VDD_IN

VDD_IO

Supply voltage

2.145

2.1

V

Input voltage to analog pins⁽²⁾

Input voltage to all other pins

Operating ambient temperature⁽³⁾

Bluetooth RF inputs

V

–0.5 VDD_IO + 0.5

V

–30

85

10

°C

dBm

°C

T_stg

Storage temperature

–40

100

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) Analog pin: BT_ANT

(3) The module supports a temperature range of –30°C to +85°C because of the operating conditions of the crystal.

4.2 ESD Ratings

VALUE UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

±500

V_(ESD)

Electrostatic discharge

V

Charged device model (CDM), per JEDEC specification JESD22-

C101⁽²⁾

±500

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

4.3 Power-On Hours⁽¹⁾

DEVICE

CONDITIONS

POWER-ON HOURS

15,400 (7 years)

Duty cycle = 25% active and 75% sleep

T_A= 70ºC

CC2564MODx

(1) This information is provided solely to give the customer an estimation of the POH under certain specified conditions, and is not intended

to – and does not – extend the warranty for the device under TI’s Standard Terms and Conditions.

4.4 Recommended Operating Conditions

MIN

2.2

MAX UNIT

VDD_IN

VDD_IO

V_IH

Power supply voltage

I/O power supply voltage

High-level input voltage

4.8

1.92

V

1.62

Condition: Default

0.65 × VDD_IO

VDD_IO

0.35 ×

VDD_IO

V_IL

Low-level input voltage

0

1

V

t_rand t_f

I/O input rise and fall times,10% to 90% — asynchronous mode

10

ns

I/O input rise and fall times, 10% to 90% — synchronous mode

(PCM)

2.5

Voltage dips on VDD_IN (V_(BAT)

duration = 577 µs to 2.31 ms, period = 4.6 ms

)

400

85

mV

°C

(1)

Maximum ambient operating temperature

–30

(1) A crystal-based solution is limited by the temperature range required for the crystal to meet 20 ppm.

8

Specifications

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4.5 Power Consumption Summary

4.5.1 Static Current Consumption

OPERATIONAL MODE

Shutdown mode⁽¹⁾

MIN

TYP

1

MAX

7

UNIT

µA

Deep sleep mode⁽²⁾

40

105

1

µA

Total I/O current consumption in active mode

Continuous transmission—GFSK⁽³⁾

Continuous transmission—EDR⁽⁴⁾⁽⁵⁾

mA

107

112.5

(1) V_(BAT)+ V_IO+ V_(SHUTDOWN)

(2) V_(BAT)+ V_IO

(3) At maximum output power (10 dBm)

(4) At maximum output power (8 dBm)

(5) Both π / 4 DQPSK and 8DPSK

4.5.2 Dynamic Current Consumption

4.5.2.1 Current Consumption for Different Bluetooth BR and EDR Scenarios

Conditions: VDD_IN = 3.6 V, 25°C, nominal unit, 8-dBm output power

OPERATIONAL MODE

MASTER AND SLAVE

AVERAGE CURRENT

UNIT

Synchronous connection oriented (SCO) link HV3

Master and slave

13.7

13.2

10

mA

µA

Extended SCO (eSCO) link EV3 64 kbps, no retransmission Master and slave

eSCO link 2-EV3 64 kbps, no retransmission

GFSK full throughput: TX = DH1, RX = DH5

EDR full throughput: TX = 2-DH1, RX = 2-DH5

EDR full throughput: TX = 3-DH1, RX = 3-DH5

Sniff, four attempts, 1.28 seconds

Master and slave

40.5

41.2

145

320

Page or inquiry scan 1.28 seconds, 11.25 ms

µA

Page (1.28 seconds) and inquiry (2.56 seconds) scans,

11.25 ms

Master and slave

445

µA

A2DP source

Master

13.9

15.2

16.9

18.1

mA

A2DP sink

Assisted A2DP source

Assisted A2DP sink

Assisted WBS EV3; retransmit effort = 2;

maximum latency = 8 ms

Master and slave

17.5 and 18.5

11.9 and 13

mA

Assisted WBS 2EV3; retransmit effort = 2;

maximum latency = 12 ms

Specifications

9

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4.5.2.2 Current Consumption for Different Low Energy Scenarios

Conditions: VDD_IN = 3.6 V, 25°C, nominal unit, 8-dBm output power

AVERAGE

CURRENT

MODE

DESCRIPTION

UNIT

Advertising in all three channels

1.28-seconds advertising interval

15 bytes advertise data

Advertising, nonconnectable

114

138

324

µA

Advertising in all three channels

1.28-seconds advertising interval

15 bytes advertise data

Advertising, discoverable

Scanning

µA

Listening to a single frequency per window

1.28-seconds scan interval

11.25-ms scan window

Connected (master role)

Connected (slave role)

500-ms connection interval

0-ms slave connection latency

Empty TX and RX LL packets

169 (master)

199 (slave)

4.6 Electrical Characteristics

RATING

CONDITION

At 2, 4, 8 mA

At 0.1 mA

MIN

MAX

VDD_IO

UNIT

0.8 × VDD_IO

High-level output voltage, V_OH

Low-level output voltage, V_OL

I/O input impedance

V

VDD_IO – 0.2

VDD_IO

At 2, 4, 8 mA

At 0.1 mA

0

1

0.2 × VDD_IO

0.2

V

Resistance

MΩ

pF

ns

Capacitance

5

10

Output rise and fall times, 10% to 90% (digital pins)

C_L= 20 pF

PU

PD

PU

PD

Typical = 6.5

Typical = 27

Typical = 100

3.5

9.5

50

9.7

55

PCM-I2S bus, TX_DBG

µA

I/O pull currents

All others

300

360

50

10

Specifications

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4.7 Timing and Switching Characteristics

4.7.1 Device Power Supply

The power-management hardware and software algorithms of the TI Bluetooth HCI module provide

significant power savings, which is a critical parameter in an MCU-based system.

The power-management module is optimized for drawing extremely low currents.

4.7.1.1 Power Sources

The TI Bluetooth HCI module requires two power sources:

•

VDD_IN: main power supply for the module

VDD_IO: power source for the 1.8-V I/O ring

The HCI module includes several on-chip voltage regulators for increased noise immunity and can be

connected directly to the battery.

4.7.1.2 Power Supply Sequencing

The device includes the following power-up requirements (see Figure 4-1):

•

nSHUTD must be low. VDD_IN and VDD_IO are don't-care when nSHUTD is low. However, signals

are not allowed on the I/O pins if I/O power is not supplied, because the I/Os are not fail-safe.

Exceptions are SLOW_CLK_IN and AUD_xxx, which are fail-safe and can tolerate external voltages

with no VDD_IO and VDD_IN.

•

VDD_IO and VDD_IN must be stable before releasing nSHUTD.

The slow clock must be stable within 2 ms of nSHUTD going high.

The device indicates that the power-up sequence is complete by asserting RTS low, which occurs up to

100 ms after nSHUTD goes high. If RTS does not go low, the device is not powered up. In this case,

ensure that the sequence and requirements are met.

Shut down

before

VDD_IO

removed

20 µs maximum

nSHUTD

VDD_IO

VDD_IN

2 ms maximum

slow clock

100 ms

HCI_RTS

CC256x ready

SWRS160-008

Figure 4-1. Power-Up and Power-Down Sequence

Specifications

11

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4.7.1.3 Power Supplies and Shutdown – Static States

The nSHUTD signal puts the device in ultra-low power mode and performs an internal reset to the device.

The rise time for nSHUTD must not exceed 20 µs; nSHUTD must be low for a minimum of 5 ms.

To prevent conflicts with external signals, all I/O pins are set to the high-impedance (Hi-Z) state during

shutdown and power up of the device. The internal pull resistors are enabled on each I/O pin, as

described in Section 3.2. Table 4-1 describes the static operation states.

Table 4-1. Power Modes

(1)

VDD_IN

VDD_IO⁽¹⁾

nSHUTD⁽¹⁾

PM_MODE

COMMENTS

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

1

2

3

None

Asserted

Shutdown

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

None

Deasserted

Asserted

Not allowed

Shutdown

I/Os are defined as tri-state with

internal pullup or pulldown enabled.

Present

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

4

5

6

None

Present

None

Deasserted

Asserted

Not allowed

Shutdown

Present

I/O state is undefined.

I/O state is undefined. I/O voltages are

not allowed on nonfail-safe pins.

None

Deasserted

Not allowed

I/Os are defined as tri-state with

internal pullup or pulldown enabled.

7

8

Present

Asserted

Shutdown

Active

Deasserted

See Section 4.7.1.4

(1) The terms None or Asserted can imply any of the following conditions: directly pulled to ground or driven low, pulled to ground through a

pulldown resistor, or left NC or floating (high-impedance output stage).

4.7.1.4 I/O States in Various Power Modes

CAUTION

Some device I/Os are not fail-safe (see Section 3.2). Fail-safe means that the

pins do not draw current from an external voltage applied to the pin when I/O

power is not supplied to the device. External voltages are not allowed on these

I/O pins when the I/O supply voltage is not supplied because of possible

damage to the device.

Table 4-2 lists the I/O states in various power modes.

Table 4-2. I/O States in Various Power Modes

SHUT DOWN⁽¹⁾

I/O State

DEFAULT ACTIVE⁽¹⁾

I/O State Pull

DEEP SLEEP⁽¹⁾

I/O State

I/O NAME

Pull

PU

PD

PU

Pull

HCI_RX

Z

I

PU

I

O

I

PU

HCI_TX

O-H

HCI_RTS

HCI_CTS

AUD_CLK

AUD_FSYNC

AUD_IN

O-H

I

PU

PD

PU

PD

I

AUD_OUT

TX_DBG

Z

O

Z

(1) I = input, O = output, Z = Hi-Z, — = no pull, PU = pullup, PD = pulldown, H = high, L = low

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4.7.1.5 nSHUTD Requirements

Table 4-3. nSHUTD Requirements

PARAMETER

MIN

1.42

0

MAX UNIT

(1)

V_IH

V_IL

Operation mode level

Shutdown mode level

1.98

0.4

V

Minimum time for nSHUT_DOWN low to reset the device

Rise and fall times

5

ms

µs

t_rand t_f

20

(1) An internal 300-kΩ pulldown retains shut-down mode when no external signal is applied to this pin.

4.7.2 Clock Specifications

Table 4-4. Slow Clock Requirements

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

UNIT

Input slow clock frequency

32768

Hz

Bluetooth

ANT

±250

±50

Input slow clock accuracy

(Initial + temp + aging)

ppm

t_rand Input transition time t_rand t_f

200

85%

ns

t_f

(10% to 90%)

Frequency input duty cycle

15%

50%

0.65 ×

VDD_IO

V_IH

V_IL

VDD_IO

V peak

Slow clock input voltage limits

Square wave, DC-coupled

0.35 ×

VDD_IO

0

1

Input impedance

Input capacitance

MΩ

5

pF

4.7.3 Peripherals

4.7.3.1 UART

Figure 4-2 shows the UART timing diagram.

HCI_RTS

t1

t2

t6

HCI_RX

HCI_CTS

t3

t4

HCI_TX

Start bit

Stop bit

10 bits

td_uart_swrs064

Figure 4-2. UART Timing

Specifications

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Table 4-5 lists the UART timing characteristics.

Table 4-5. UART Timing Characteristics

SYMBOL

CHARACTERISTICS

CONDITION

MIN

37.5

–2.5

–12.5

0

TYP

MAX UNIT

Baud rate

4000

1.5%

kbps

Baud rate accuracy per byte

Baud rate accuracy per bit

CTS low to TX_DATA on

CTS high to TX_DATA off

CTS-high pulse width

Receive and transmit

12.5%

t3

t4

t6

t1

t2

2

µs

byte

bit

Hardware flow control

1

0

RTS low to RX_DATA on

RTS high to RX_DATA off

µs

Interrupt set to 1/4 FIFO

16

byte

Figure 4-3 shows the UART data frame.

tb

TX

STR

D0

D1

Dn

PAR

STP

D2

td_uart_swrs064

Figure 4-3. Data Frame

Table 4-6 describes the symbols used in Figure 4-3.

Table 4-6. Data Frame Key

SYMBOL

DESCRIPTION

STR

Start bit

D0...Dn

PAR

Data bits (LSB first)

Parity bit (optional)

Stop bit

STP

4.7.3.2 PCM

Figure 4-4 shows the interface timing for the PCM.

T_clk

T_w

AUD_CLK

t_is

t_ih

AUD_IN / FSYNC_IN

t_op

AUD_OUT / FSYNC_OUT

td_aud_swrs064

Figure 4-4. PCM Interface Timing

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Table 4-7 lists the associated PCM master parameters.

Table 4-7. PCM Master

SYMBOL

PARAMETER

CONDITION

MIN

MAX

UNIT

244.14

(4.096 MHz)

15625

(64 kHz)

T_clk

Cycle time

ns

T_w

t_is

High or low pulse width

AUD_IN setup time

50% of T_clkmin

ns

25

0

t_ih

AUD_IN hold time

t_op

AUD_OUT propagation time

FSYNC_OUT propagation time

40-pF load

0

10

0

Table 4-8 lists the associated PCM slave parameters.

Table 4-8. PCM Slave

SYMBOL

PARAMETER

CONDITION

MIN

MAX

UNIT

66.67

(15 MHz)

T_clk

Cycle time

ns

T_w

T_is

T_ih

t_is

High or low pulse width

AUD_IN setup time

40% of T_clk

ns

8

0

8

0

AUD_IN hold time

AUD_FSYNC setup time

AUD_FSYNC hold time

AUD_OUT propagation time

t_ih

t_op

40-pF load

21

4.7.4 RF Performance

4.7.4.1 Bluetooth BR and EDR RF Performance

All parameters in this section are verified using a 38.4-MHz XTAL and an RF load of 50 Ω at the BT_ANT

port. These parameters are verified in a conducted mode and do not include antenna performance.

Table 4-9. Bluetooth Receiver—In-Band Signals

BLUETOOTH

SPECIFICATION

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

UNIT

Operation frequency range

Channel spacing

2402

2480

MHz

Ω

1

50

Input impedance

GFSK, BER = 0.1%

–93

–70

Sensitivity, dirty TX on⁽¹⁾

π /4-DQPSK, BER = 0.01%

8DPSK, BER = 0.01%

π / 4-DQPSK

–92.5

–85.5

1E–7

dBm

–70

1E–5

–20

BER error floor at sensitivity + 10

dB, dirty TX off

8DPSK

GFSK, BER = 0.1%

–5

–10

Maximum usable input power

Intermodulation characteristics

π / 4-DQPSK, BER = 0.1%

8DPSK, BER = 0.1%

Level of interferers (for n = 3, 4, and 5)

dBm

–30

–39

(1) Sensitivity degradation up to 3 dB may occur for minimum and typical values where the Bluetooth frequency is a harmonic of the fast

clock.

Specifications

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Table 4-9. Bluetooth Receiver—In-Band Signals (continued)

BLUETOOTH

SPECIFICATION

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

UNIT

GFSK, co-channel

EDR, co-channel

8

9.5

11

13

π / 4-DQPSK

8DPSK

16.5

–10

–5

21

GFSK, adjacent ±1 MHz

EDR, adjacent ±1 MHz, (image)

GFSK, adjacent +2 MHz

EDR, adjacent, +2 MHz

GFSK, adjacent –2 MHz

EDR, adjacent –2 MHz

0

π / 4-DQPSK

0

8DPSK

5

–38

–28

–22

–45

–44

–10

–63

–30

–25

–20

–13

–40

–33

C/I performance⁽²⁾

Image = –1 MHz

π / 4-DQPSK

dB

8DPSK

π / 4-DQPSK

8DPSK

GFSK, adjacent ≥ |±3| MHz

EDR, adjacent ≥ |±3| MHz

π / 4-DQPSK

8DPSK

RF return loss

dB

RX mode LO leakage

Frf = (received RF – 0.6 MHz)

dBm

(2) Numbers show ratio of desired signal to interfering signal. Smaller numbers indicate better C/I performance.

Table 4-10. Bluetooth Transmitter—GFSK

BLUETOOTH

SPECIFICATION

CHARACTERISTICS

Maximum RF output power⁽¹⁾

MIN

TYP

MAX

UNIT

10

30

dBm

Gain control range

dB

Power control step

2

8

2 to 8

≤ –20

≤ –40

Adjacent channel power |M–N| = 2

Adjacent channel power |M–N| > 2

–35

–45

dBm

(1) To modify maximum output power, use an HCI VS command.

Table 4-11. Bluetooth Transmitter—EDR

BLUETOOTH

SPECIFICATION

CHARACTERISTICS

MIN

TYP

MAX

UNIT

π / 4-DQPSK

VDD_IN = V_(BAT)

8

EDR output

power

dBm

8DPSK

EDR relative power

–2

2

1

8

–4 to +1

2 to 8

Gain control range

30

dB

Power control step

Adjacent channel power |M–N| = 1

Adjacent channel power |M–N| = 2

Adjacent channel power |M–N| > 2

–30

–23

–42

≤ –26 dBc

≤ –20 dBm

≤ –40 dBm

(1)

(1) Adjacent channel power measurements take into account specification exception of three bands, as defined by the Test Suite Structure

(TSS) and Test Purposes (TP) Bluetooth Documentation Specification.

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Table 4-12. Bluetooth Modulation—GFSK

BLUETOOTH

SPECIFICATION

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

UNIT

–20 dB bandwidth

GFSK

925

≤ 1000 kHz

Mod data = 4 1s,

4 0s:

111100001111...

F1

avg

Δf1avg

165

140 to 175 kHz

Modulation

characteristics

Δf2max ≥ limit for at least

99.9% of all Δf2max

Mod data =

1010101...

130

> 115 kHz

> 80%

F2

max

Δf2avg, Δf1avg

DH1

88%

–25

–35

25

35

< ±25

kHz

Absolute carrier

frequency drift

DH3 and DH5

< ±40

kHz/

< 20

Drift rate

20

50 µs

Initial carrier frequency

tolerance

f0–fTX

–75

+75

< ±75 kHz

Table 4-13. Bluetooth Modulation—EDR

BLUETOOTH

UNIT

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

SPECIFICATION

Carrier frequency stability

–10

–75

10

75

≤ 10 kHz

±75 kHz

20%

Initial carrier frequency tolerance

π / 4-DQPSK

6%

(1)

RMS DEVM

8DPSK

13%

π / 4-DQPSK

8DPSK

30%

20%

30%

99% DEVM⁽¹⁾

20%

π / 4-DQPSK

8DPSK

14%

16%

35%

(1)

Peak DEVM

25%

(1) MAX performance refers to maximum TX power.

Specifications

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4.7.4.2 Bluetooth low energy RF Performance

All parameters in this section are verified using a 38.4-MHz XTAL and an RF load of 50 Ω at the BT_ANT

port. These parameters are verified in a conducted mode and do not include antenna performance.

Table 4-14. Bluetooth low energy Receiver—In-Band Signals

BLUETOOTH

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

low energy UNIT

SPECIFICATION

Operation frequency range

Channel spacing

2402

2480

MHz

Ω

2

50

Input impedance

Sensitivity, dirty TX on⁽¹⁾

PER = 30.8%; dirty TX on

GMSK, PER = 30.8%

–93

≤ –70

≥ –10

dBm

Maximum usable input power

–10

Level of interferers

(for n = 3, 4, 5)

Intermodulation characteristics

–30

≥ –50

dBm

GMSK, co-channel

8

–5

≤ 21

≤ 15

GMSK, adjacent ±1 MHz

GMSK, adjacent +2 MHz

GMSK, adjacent –2 MHz

GMSK, adjacent ≥ |±3| MHz

Frf = (received RF – 0.6 MHz)

C/I performance⁽²⁾

Image = –1 MHz

–45

–22

–47

–63

≤ –17

≤ –15

≤ –27

dB

RX mode LO leakage

dBm

(1) Sensitivity degradation up to 3 dB may occur where the Bluetooth low energy frequency is a harmonic of the fast clock.

(2) Numbers show wanted signal-to-interfering signal ratio. Smaller numbers indicate better C/I performance.

Table 4-15. Bluetooth low energy Transmitter

BLUETOOTH

low energy UNIT

SPECIFICATION

CHARACTERISTICS

MIN

TYP

MAX

CC2564MODN

10

8⁽²⁾

–35

–45

≤10

RF output power (VDD_IN = VBAT)⁽¹⁾

dBm

CC2564MODA

Adjacent channel power |M-N| = 2

Adjacent channel power |M-N| > 2

≤ –20

≤ –30

(1) To modify maximum output power, use an HCI VS command.

(2) Required to meet the power spectral density (PSD) as defined by clause 5.3.3.2 in ETSI EN 300 328 V1.9.1. The integrated antenna

gain is 1.69 dBi.

Table 4-16. Bluetooth low energy Modulation

BLUETOOTH

CHARACTERISTICS

CONDITION

MIN

TYP

MAX

low energy UNIT

SPECIFICATION

Mod data = 4 1s, 4 0s:

1111000011110000...

Δf1 avg

Δf1avg

250

225 to 275 kHz

Modulation

Δf2max ≥ limit for at least Mod data =

Δf2 max characteristics

210

0.9

≥ 185 kHz

≥ 0.8

99.9% of all Δf2max

1010101...

Δf2avg, Δf1avg

Absolute carrier frequency

drift

–25

25

15

25

≤ ±50 kHz

kHz/

≤ 20

Drift rate

50 ms

Initial carrier frequency

tolerance

≤ ±100 kHz

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5 Detailed Description

5.1 Overview

Table 5-1. Technology and Assisted Modes Supported

ASSISTED MODES

SUPPORTED⁽¹⁾

TECHNOLOGY SUPPORTED

MODULE

DESCRIPTION

HFP 1.6

A2DP

BR/EDR

LE

ANT

(WBS)

Bluetooth 4.1 + Bluetooth low energy

Bluetooth 4.1 + ANT

√

CC2564MODx⁽²⁾

√

(1) The assisted modes (HFP 1.6 and A2DP) are not supported simultaneously. Furthermore, the assisted modes are not supported

simultaneously with Bluetooth low energy or ANT.

(2) The device does not support simultaneous operation of LE and ANT.

5.2 Functional Block Diagram

VDD_IN VDD_IO

UART

PCM

Antenna

Filter

CC2564B

nSHUTD

32.768 kHz

Slow Clock

38.4 MHz

XTAL

Figure 5-1. CC2564MODN Functional Block Diagram

VDD_IN VDD_IO

UART

PCM

Antenna

Filter

CC2564B

nSHUTD

32.768 kHz

Slow Clock

38.4 MHz

XTAL

Figure 5-2. CC2564MODA Functional Block Diagram

Detailed Description

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5.3 Functional Blocks

The TI Bluetooth HCI module architecture comprises a DRP and a point-to-multipoint baseband core. The

architecture is based on a single-processor ARM^®ARM7TDMI™ core. The module includes several on-

chip peripherals to enable easy communication with a host system and the Bluetooth BR/EDR/LE core.

5.4 Bluetooth BR and EDR Description

The CC2564MODx is Bluetooth 4.1 compliant up to the HCI level (for the technology supported, see

Table 5-1):

•

Up to seven active devices

Scatternet: Up to 3 piconets simultaneously, 1 as master and 2 as slaves

Up to two synchronous connection oriented (SCO) links on the same piconet

Very fast AFH algorithm for asynchronous connection-oriented link (ACL) and extended SCO (eSCO)

link

•

Supports typically 10-dBm TX power without an external power amplifier (PA), thus improving

Bluetooth link robustness

Digital radio processor (DRP™) single-ended 50-Ω I/O for easy RF interfacing with external antenna

(CC2564MODN). The CC2564MODA includes the antenna on the module.

Internal temperature detection and compensation to ensure minimal variation in RF performance over

temperature

•

Includes a 128-bit hardware encryption accelerator as defined by the Bluetooth specifications

Flexible pulse-code modulation (PCM) and inter-IC sound (I2S) digital codec interface:

–

Full flexibility of data format (linear, A-Law, µ-Law)

Data width

Data order

Sampling

Slot positioning

Master and slave modes

High clock rates up to 15 MHz for slave mode (or 4.096 MHz for master mode)

•

Support for all voice air-coding

–

CVSD

A-Law

µ-Law

Transparent (uncoded)

5.5 Bluetooth low energy Description

•

Bluetooth 4.1 compliant

Solution optimized for proximity and sports use cases

Multiple sniff instances that are tightly coupled to achieve minimum power consumption

Independent buffering for LE, allowing large numbers of multiple connections without affecting BR/EDR

performance.

•

Includes built-in coexistence and prioritization handling for BR/EDR and LE

NOTE

ANT and the assisted modes (HFP 1.6 and A2DP) are not available when Bluetooth low

energy is enabled.

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5.6 Bluetooth Transport Layers

Figure 5-3 shows the Bluetooth transport layers.

UART transport layer

Host controller interface

General

modules:

Data

Control

Event

HCI vendor-

specific

HCI data handler

HCI command handler

Trace

Timers

Sleep

Data

Link manager

Data

Link controller

RF

SWRS121-016

Figure 5-3. Bluetooth Transport Layers

5.7 Host Controller Interface

The TI Bluetooth HCI module incorporates one UART module dedicated to the HCI transport layer. The

HCI interface transports commands, events, ACL between the device and the host using HCI data

packets.

The maximum baud rate of the UART module is 4 Mbps; however, the default baud rate after power up is

set to 115.2 kbps. The baud rate can thereafter be changed with a VS command. The device responds

with a command complete event (still at 115.2 kbps), after which the baud rate change occurs.

The UART module includes the following features:

•

Receiver detection of break, idle, framing, FIFO overflow, and parity error conditions

Transmitter underflow detection

CTS and RTS hardware flow control (UART Transport Layer)

XON and XOFF software flow control (3-wire UART Transport Layer)

Table 5-2 lists the UART module default settings.

Table 5-2. UART Module Default Settings

PARAMETER

Bit rate

VALUE

115.2 kbps

8 bits

Data length

Stop bit

1

Parity

None

5.7.1 UART Transport Layer

The UART Transport Layer includes four signals:

•

TX

RX

CTS

RTS

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Flow control between the host and the TI Bluetooth HCI module is bytewise by hardware.

Figure 5-4 shows UART Transport Layer.

HCI_RX

HCI_TX

Host_RX

Host_TX

Host

CC2564MODx

HCI_CTS

HCI_RTS

Host_CTS

Host_RTS

Figure 5-4. UART Transport Layer

When the UART RX buffer of the TI Bluetooth HCI module passes the flow control threshold, it sets the

HCI_RTS signal high to stop transmission from the host.

When the HCI_CTS signal is set high, the module stops transmission on the interface. If HCI_CTS is set

high while transmitting a byte, the module finishes transmitting the byte and stops the transmission.

The UART Transport Layer includes a mechanism that handles the transition between active mode and

sleep mode. The protocol occurs through the CTS and RTS UART lines and is known as the enhanced

HCI low level (eHCILL) power-management protocol.

For more information on the UART Transport Layer, see Volume 4 Host Controller Interface, Part A UART

Transport Layer of the Bluetooth Core Specifications (www.bluetooth.org).

5.7.2 Three-Wire UART Transport Layer

The 3-wire UART Transport Layer consists of three signals (see Figure 5-5):

•

TX

RX

GND

HCI_RX

HCI_TX

Host_RX

Host_TX

Host

CC2564MODx

GND

Figure 5-5. Three-Wire UART Transport Layer

The 3-Wire UART Transport Layer supports the following features:

•

Software flow control (XON/XOFF)

Power management using the software messages:

–

WAKEUP

WOKEN

SLEEP

•

CRC data integrity check

For more information on the 3-Wire UART Transport Layer, see Volume 4 Host Controller Interface, Part

D Three- Wire UART Transport Layer of the Bluetooth Core Specifications (www.bluetooth.org).

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5.8 Digital Codec Interface

The codec interface is a fully programmable port to support seamless interfacing with different PCM and

I2S codec devices. The interface includes the following features:

•

Two voice channels

Master and slave modes

All voice coding schemes defined by the Bluetooth specification: linear, A-Law, and µ-Law

Long and short frames

Different data sizes, order, and positions

High flexibility to support a variety of codecs

Bus sharing: Data_Out is in a Hi-Z state when the interface is not transmitting voice data.

5.8.1 Hardware Interface

The interface includes four signals:

•

Clock: configurable direction (input or output)

Frame_Sync and Word_Sync: configurable direction (input or output)

Data_In: input

Data_Out: output or tri-state condition

The module can be the master of the interface when generating the Clock and Frame_Sync signals or the

slave when receiving these two signals.

For slave mode, clock input frequencies of up to 15 MHz are supported. At clock rates above 12 MHz, the

maximum data burst size is 32 bits.

For master mode, the module can generate any clock frequency between 64 kHz and 4.096 MHz.

5.8.2 I2S

When the codec interface is configured to support the I2S protocol, these settings are recommended:

•

Bidirectional, full-duplex interface

Two time slots per frame: time slot-0 for the left channel audio data; and time slot-1 for the right

channel audio data

•

Each time slot is configurable up to 40 serial clock cycles long, and the frame is configurable up to 80

serial clock cycles long.

5.8.3 Data Format

The data format is fully configurable:

•

The data length can be from 8 to 320 bits in 1-bit increments when working with 2 channels, or up to

640 bits when working with 1 channel. The data length can be set independently for each channel.

The data position within a frame is also configurable within 1 clock (bit) resolution and can be set

independently (relative to the edge of the Frame_Sync signal) for each channel.

The Data_In and Data_Out bit order can be configured independently. For example, Data_In can start

with the most significant bit (MSB); Data_Out can start with the least significant bit (LSB). Each

channel is separately configurable. The inverse bit order (that is, LSB first) is supported only for

sample sizes up to 24 bits.

•

Data_In and Data_Out are not required to be the same length.

The Data_Out line is configured to Hi-Z output between data words. Data_Out can also be set for

permanent Hi-Z, regardless of the data output. This configuration allows the module to be a bus slave

in a multislave PCM environment. At power up, Data_Out is configured as Hi-Z.

Detailed Description

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5.8.4 Frame Idle Period

The codec interface handles frame idle periods, in which the clock pauses and becomes 0 at the end of

the frame, after all data are transferred.

The module supports frame idle periods both as master and slave of the codec bus.

When the module is the master of the interface, the frame idle period is configurable. There are two

configurable parameters:

•

Clk_Idle_Start: indicates the number of clock cycles from the beginning of the frame to the beginning of

the idle period. After Clk_Idle_Start clock cycles, the clock becomes 0.

•

Clk_Idle_End: indicates the time from the beginning of the frame to the end of the idle period. The time

is given in multiples of clock periods.

The delta between Clk_Idle_Start and Clk_Idle_End is the clock idle period.

For example, for clock rate = 1 MHz, frame sync period = 10 kHz, Clk_Idle_Start = 60, Clk_Idle_End = 90.

Between both Frame_Sync signals there are 70 clock cycles (instead of 100). The clock idle period starts

60 clock cycles after the beginning of the frame and lasts 90 – 60 = 30 clock cycles. Thus, the idle period

ends 100 – 90 = 10 clock cycles before the end of the frame. The data transmission must end before the

beginning of the idle period.

Figure 5-6 shows the frame idle timing.

Frame period

Frame_Sync

Data_In

Data_Out

Frame idle

Clock

Clk_Idle_Start

Clk_Idle_End

frmidle_swrs064

Figure 5-6. Frame Idle Period

5.8.5 Clock-Edge Operation

The codec interface of the module can work on the rising or the falling edge of the clock and can sample

the Frame_Sync signal and the data at inversed polarity.

Figure 5-7 shows the operation of a falling-edge-clock type of codec. The codec is the master of the bus.

The Frame_Sync signal is updated (by the codec) on the falling edge of the clock and is therefore

sampled (by the module) on the next rising clock. The data from the codec is sampled (by the module) on

the falling edge of the clock

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PCM FSYNC

PCM CLK

D7

D6

D5

D4

D2

D1

D0

D3

PCM DATA IN

CC256x

SAMPLE TIME

SWRS121-004

Figure 5-7. Negative Clock Edge Operation

5.8.6 2-Channel Bus Example

Figure 5-8 shows a 2-channel bus in which the two channels have different word sizes and arbitrary

positions in the bus frame. (FT stands for frame timer.)

...

Clock

...

FT

2

5

127

0

1

3

4

6

7

8

9

42 43 44

127

0

Fsync

MSB

bit bit bit bit bit bit bit bit

MSB

LSB

bit bit bit bit bit bit bit bit bit bit bit

10

...

Data_Out

Data_In

0

1

2

3

4

5

6

7

8

9

0

1

2

3

4

5

6

7

bit bit bit bit bit bit bit bit bit bit bit

10

bit bit bit bit bit bit bit bit

1

...

0

1

2

3

4

5

6

7

8

9

0

2

3

4

5

6

7

PCM_data_window

CH2 data

start FT = 43

CH1 data start FT = 0

CH1 data length = 11

CH2 data

length = 8

Fsync period = 128

Fsync length = 1

twochpcm_swrs064

Figure 5-8. 2-Channel Bus Timing

5.9 Assisted Modes

The TI CC2564MODx module contains an embedded coprocessor that can be used for multiple purposes.

The module uses the coprocessor to perform the LE or ANT functionality. The module also uses the

coprocessor to execute the assisted HFP 1.6 (WBS) or assisted A2DP functions. Only one of these

functions can be executed at a time because they all use the same resources (that is, the coprocessor;

see Table 5-1 for the modes of operation supported by the module).

This section describes the assisted HFP 1.6 (WBS) and assisted A2DP modes of operation in the module.

These modes of operation minimize host processing and power by taking advantage of the device

coprocessor to perform the voice and audio SBC processing required in HFP 1.6 (WBS) and A2DP

profiles. This section also compares the architecture of the assisted modes with the common

implementation of the HFP 1.6 and A2DP profiles.

The assisted HFP 1.6 (WBS) and assisted A2DP modes of operation comply fully with the HFP 1.6 and

A2DP Bluetooth specifications. For more information on these profiles, see the corresponding Bluetooth

profile specification at Adopted Bluetooth Core Specifications.

Detailed Description

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5.9.1 Assisted HFP 1.6 (WBS)

The HFP 1.6 Profile Specification adds the requirement for WBS support. The WBS feature allows twice

the voice quality versus legacy voice coding schemes at the same air bandwidth (64 kbps). This feature is

achieved using a voice sampling rate of 16 kHz, a modified subband coding (mSBC) scheme, and a

packet loss concealment (PLC) algorithm. The mSBC scheme is a modified version of the mandatory

audio coding scheme used in the A2DP profile with the parameters listed in Table 5-3.

Table 5-3. mSBC Parameters

PARAMETER

Channel mode

Sampling rate

Allocation method

Subbands

VALUE

Mono

16 kHz

Loudness

8

Block length

Bitpool

15

26

The assisted HFP 1.6 mode of operation implements this WBS feature on the embedded coprocessor.

That is, the mSBC voice coding scheme and the PLC algorithm are executed in the coprocessor rather

than in the host, thus minimizing host processing and power. One WBS connection at a time is supported

and WBS and NBS connections cannot be used simultaneously in this mode of operation. Figure 5-9

shows the architecture comparison between the common implementation of the HFP 1.6 profile and the

assisted HFP 1.6 solution.

Figure 5-9. HFP 1.6 Architecture Versus Assisted HFP 1.6 Architecture

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5.9.2 Assisted A2DP

The A2DP enables wireless transmission of high-quality mono or stereo audio between two devices.

A2DP defines two roles:

•

A2DP source is the transmitter of the audio stream.

A2DP sink is the receiver of the audio stream.

A typical use case streams music from a tablet, phone, or PC (the A2DP source) to headphones or

speakers (the A2DP sink). This section describes the architecture of these roles and compares them with

the corresponding assisted-A2DP architecture. To use the air bandwidth efficiently, the audio data must be

compressed in a proper format. The A2DP mandates support of the SBC scheme. Other audio coding

algorithms can be used; however, both Bluetooth devices must support the same coding scheme. SBC is

the only coding scheme spread out in all A2DP Bluetooth devices, and thus the only coding scheme

supported in the assisted A2DP modes. Table 5-4 lists the recommended parameters for the SBC scheme

in the assisted A2DP modes.

Table 5-4. Recommended Parameters for the SBC Scheme in Assisted A2DP Modes

SBC

MID QUALITY

HIGH QUALITY

JOINT STEREO

ENCODER

SETTINGS⁽¹⁾

MONO

JOINT STEREO

MONO

Sampling

frequency

(kHz)

44.1

19

48

44.1

48

33

79

44.1

31

48

44.1

48

51

Bitpool value

18

44

35

83

29

66

53

Resulting

frame length

(bytes)

46

70

119

115

Resulting bit

rate (Kbps)

127

132

229

237

193

198

328

345

(1) Other settings: Block length = 16; allocation method = loudness; subbands = 8.

The SBC scheme supports a wide variety of configurations to adjust the audio quality. Table 5-5 through

Table 5-12 list the supported SBC capabilities in the assisted A2DP modes.

Table 5-5. Channel Modes

CHANNEL MODE

Mono

STATUS

Supported

Stereo

Joint stereo

Dual channel

Table 5-6. Sampling Frequency

SAMPLING FREQUENCY (kHz)

STATUS

Supported

16

44.1

48

Table 5-7. Block Length

BLOCK LENGTH

STATUS

Supported

4

8

12

16

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Table 5-8. Subbands

Table 5-9. Allocation Method

Table 5-10. Bitpool Values

Table 5-11. L2CAP MTU Size

SUBBANDS

STATUS

Supported

4

8

ALLOCATION METHOD

STATUS

Supported

SNR

Loudness

BITPOOL RANGE

Assisted A2DP sink: 2-54

Assisted A2DP source: 2–57

STATUS

Supported

L2CAP MTU SIZE (BYTES)

Assisted A2DP sink: 260–800

Assisted A2DP source: 260–1021

STATUS

Supported

Table 5-12. Miscellaneous Parameters

ITEM

A2DP content protection

AVDTP service

L2CAP mode

VALUE

Protected

STATUS

Not supported

Supported

Basic type

Basic mode

Nonflushable

L2CAP flush

For detailed information on the A2DP profile, see the A2DP Profile Specification at Adopted Bluetooth

Core Specifications.

5.9.2.1 Assisted A2DP Sink

The A2DP sink role is the receiver of the audio stream in an A2DP Bluetooth connection. In this role, the

A2DP layer and its underlying layers are responsible for link management and data decoding. To handle

these tasks, two logic transports are defined:

•

Control and signaling logic transport

Data packet logic transport

The assisted A2DP takes advantage of this modularity to handle the data packet logic transport in the

module by implementing a light L2CAP layer (L-L2CAP) and light AVDTP layer (L-AVDTP) to defragment

the packets. Then the assisted A2DP performs the SBC decoding on-chip to deliver raw audio data

through the module PCM–I2S interface. Figure 5-10 shows the comparison between a common A2DP

sink architecture and the assisted A2DP sink architecture.

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Figure 5-10. A2DP Sink Architecture Versus Assisted A2DP Sink Architecture

For more information on the A2DP sink role, see the A2DP Profile Specification at Adopted Bluetooth

Core Specifications.

5.9.2.2 Assisted A2DP Source

The role of the A2DP source is to transmit the audio stream in an A2DP Bluetooth connection. In this role,

the A2DP layer and its underlying layers are responsible for link management and data encoding. To

handle these tasks, two logic transports are defined:

•

Control and signaling logic transport

Data packet logic transport

The assisted A2DP takes advantage of this modularity to handle the data packet logic transport in the

module. First, the assisted A2DP encodes the raw data from the module PCM–I2S interface using an on-

chip SBC encoder. The assisted A2DP then implements an L-L2CAP layer and an L-AVDTP layer to

fragment and packetize the encoded audio data. Figure 5-11 shows the comparison between a common

A2DP source architecture and the assisted A2DP source architecture.

Detailed Description

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Figure 5-11. A2DP Source Architecture Versus Assisted A2DP Source Architecture

For more information on the A2DP source role, see the A2DP Profile Specification at Adopted Bluetooth

Core Specifications.

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6 Applications, Implementation, and Layout

NOTE

Information in the following Applications section is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI's customers are responsible for

determining suitability of components for their purposes. Customers should validate and test

their design implementation to confirm system functionality.

6.1 Reference Design Schematics

Figure 6-1 shows the reference schematics for the CC2564MODN module.

Figure 6-1. CC2564MODN Reference Schematics

Applications, Implementation, and Layout

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Figure 6-2 shows the reference schematics for the CC2564MODA module.

Figure 6-2. CC2564MODA Reference Schematics

6.2 Layout

This section provides the printed circuit board (PCB) layout rules and considerations, including component

placement and routing guidelines, when designing a board with the CC2564MODx module.

The integrator of the CC2564MODx module must comply with the PCB layout recommendations described

in the following subsections to preserve the FCC and Industry Canada (IC) modular radio certification.

Moreover, TI recommends customers follow the guidelines described in this section to achieve similar

performance to that obtained with the TI reference design.

6.2.1 Layout Guidelines

6.2.1.1 PCB Stack-Up

The recommended PCB stack-up is a four-layer design based on a standard flame-retardant 4 (FR4)

material (see Figure 6-3):

Layer 1 (TOP – RF + Signal) Use Layer 1 to place the module on and to route signal traces. In

particular, the RF trace must be run on this layer.

Layer 2 (L2 – Ground) Layer 2 must be a solid ground layer.

Layer 3 (L3 – Power) Use Layer 3 to route power traces or place power planes.

Layer 4 (BOTTOM – Signal) Use Layer 4 as a second routable layer to run signal traces (except RF

signals).

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Figure 6-3. PCB Stack-Up

TI recommends a board thickness of 62.4 mils and a substrate dielectric of 4.2. For details, see Table 6-1.

NOTE

These parameters are used for the 50-Ω impedance matching of the RF trace. For more

information, see Section 6.2.1.2.

Table 6-1. Recommended PCB Properties

ITEM

VALUE

0.4 mil

Solder mask

TOP copper + plating

PP (substrate)

1 oz/1.4 mil

10 mil

L2 copper + plating

Core (substrate)

L3 copper + plating

PP (substrate)

1 oz/1.4 mil

36 mil

1 oz/1.4 mil

10 mil

Bottom copper + plating

Solder mask

1 oz/1.4 mil

0.4 mil

Final thickness

62.4 mil = 1.585 mm

Applications, Implementation, and Layout

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6.2.1.2 RF Interface Guidelines

6.2.1.2.1 RF Trace (CC2564MODN Only)

Route the RF traces on Layer 1 (top) and keep the routes as short as possible. These traces must be 50-

Ω, controlled-impedance traces with reference to the solid ground in the layer 2 microstrip transmission

line. The TI reference design uses an RF trace width equal to 17 mils, which conforms to a 50 Ω-±3%

simulated result, based on the following PCB properties: (see Table 6-1 and Figure 6-4).

•

Substrate height: 10 mils

Substrate dielectric: 4.2

Trace width: 17 mils

Trace thickness: 1.4 mils

Ground clearance: 20 mils

TI recommends the following guidelines for a good RF trace design:

•

The RF traces must have via stitching on both ground planes around the RF trace (see Figure 6-4).

Avoid placing clock signals close to the RF path.

Place a u.FL connector (or similar) between the module and antenna if possible or during prototype

phases (see Figure 6-4.)

•

The RF path should look like one single path along the RF traces and matching components. See

Figure 6-5 for the good (OK) case versus the not good (NG) case.

The RF trace bends must be gradual with an approximate maximum bend of 45 degrees with the trace

mitered. RF traces must not have sharp corners. In addition:

–

Avoid case (1) in Figure 6-6. A right angle leads to scattering and makes matching weak.

Case (2) in Figure 6-6 is not recommended. Even if this bend had a good 50 Ω, a careful simulation

would be required.

–

Case (3) in Figure 6-6 is recommended. The half-arc angle reduces scattering caused by a right

angle.

Figure 6-4. Placing a u.FL Connector Between the Module and Antenna

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Figure 6-5. Good (OK) vs Not Good (NG) RF Path

Figure 6-6. Not Recommended vs Recommended Trace Bends

6.2.1.3 Antenna

6.2.1.3.1 CC2564MODN Antenna

The CC2564MODN module must be used with the approved external chip antenna (LTA-5320-2G4S3-A)

and must comply with the following guidelines to preserve the modular radio certification (see Figure 6-7).

•

Antenna clearance area = 15 mm × 8 mm

Antenna solder termination to board edge length = 186 mils

Antenna feed point to right side ground length = 140 mils

Antenna feed point to last component trace = 244 mils

Antenna pads to inside ground length = 208 mils

An inductor L1 = 9.1 nH is required to properly match the chip antenna.

In addition, follow these general recommendations for a proper design with any antenna:

•

Place the matching circuit as close as possible to the antenna feed point.

Do not place traces or ground under the antenna section.

Place the antenna, RF traces, and modules on the edge of the PCB product. In addition, consider the

proximity of the antenna to the enclosure and consider the enclosure material.

Applications, Implementation, and Layout

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Figure 6-7. Antenna Guidelines

6.2.1.3.2 CC2564MODA Antenna

The CC2564MODA module has an integrated chip antenna (ANT3216A063R2400A). Table 6-2 lists

antenna performance values in low, mid, and high frequencies of operation.

Table 6-2. Antenna Performance

ANTENNA

ANT3216A063R2400A

UNIT

GHz

dB

Frequency

S11

2.4

–9.12

0.63

2.442

–15.19

1.00

2.484

–11.29

0.67

Maximum gain

Average gain

Efficiency

dBi

–2.19

57.03%

–1.90

–2.41

dBi

64.01%

57.35%

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Figure 6-8 shows the 3-D radiation patterns.

Figure 6-8. Antenna 3-D Radiation Patterns

TI recommends applying the following guidelines for a proper design:

•

Do not place traces or ground under and around the antenna section.

Provide a clearance area of approximate 5.8 × 4.8 mm under the antenna area in all the PCB layers

(see Figure 6-9).

•

Place the module with the antenna area fitting on the edge of the PCB (see Figure 6-9).

Follow the ground guidelines described in Section 6.2.1.4.

In addition, consider the proximity of the antenna to the enclosure and consider the enclosure material.

Applications, Implementation, and Layout

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Figure 6-9. CC2564MODA Antenna layout

6.2.1.4 Power Supply and Ground Guidelines

6.2.1.4.1 Power Traces

TI recommends the following guidelines for the power supply of the CC2564MODx module:

•

Use a star pattern format to supply power to the different pads of the module.

Keep the power traces (VBAT and VIO) more than 14 mils.

Use short power supply traces.

Place decoupling capacitors as close as possible to the module (see Figure 6-10).

Figure 6-10. Placing Decoupling Capacitors as Close as Possible to the Module

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6.2.1.4.2 Ground

The common ground must be the solid ground plane in Layer 2. TI recommends using a large ground pad

under and around the module and placing enough ground vias beneath for a stable system and thermal

dissipation (see Figure 6-11).

Figure 6-11. Using a Large Ground Pad Under the Module

6.2.1.5 Clock Guidelines

Remember that clock signal routing directly influences RF performance because of the signal trace

susceptibility to noise.

6.2.1.5.1 Slow Clock

TI recommends the following guidelines:

•

Keep the slow clock signal lines as short as possible and at least 4-mils wide.

Traces of slow clock signals must have a ground plane on each side of the signal trace to reduce

undesired signal coupling.

•

To reduce the capacitive coupling of undesired signals into the clock line, do not route slow clock

traces above or below other signals (especially digital signals). Figure 6-12 shows the slow clock trace

in the TI reference design.

Applications, Implementation, and Layout

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Figure 6-12. Slow Clock Trace in TI Reference Design

6.2.1.6 Digital Interface Guidelines

6.2.1.6.1 UART

The CC2564MODx UART default baud rate is 115.2 kbps but can run up to 4 Mbps. TI recommends

separating these lines from the DC supply lines, RF lines, and sensitive clock lines and circuitry. To

improve the return path and isolation, run the lines with ground on the adjacent layer when possible.

6.2.1.6.2 PCM

The digital audio lines (pulse-code modulation [PCM]) are high-speed digital lines in which the four wires

(AUD_CLK, AUD_FSYNC, AUD_IN, and AUD_OUT) must be roughly the same length. TI recommends

running these lines as a bus interface (see Figure 6-13). These lines are high-speed digital and must be

separated from DC supply lines, RF lines, and sensitive clock lines and circuitry. Run the lines with ground

on the adjacent layer to improve the return path and isolation.

Figure 6-13. Running the Digital Audio Lines

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6.2.2 Reference Design Drawings

6.2.2.1 CC2564MODN Reference Design

The dual-mode Bluetooth CC2564 module evaluation board (CC2564MODNEM) contains the

CC2564MODN module and is intended for evaluation and design purposes (see Figure 6-14). For more

information (such as schematics, BOM, and design files), see TI's CC2564MODNEM tool folder.

Figure 6-14. CC2564MODNEM Board

6.2.2.2 CC2564MODA Reference Design

The dual-mode Bluetooth CC2564 module with integrated antenna evaluation board (CC2564MODAEM)

contains the CC2564MODA module and is intended for evaluation and design purposes (see Figure 6-15).

For more information (such as schematics, BOM, and design files), see TI's CC2564MODAEM tool folder.

Figure 6-15. CC2564MODAEM Board

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6.3 Soldering Recommendations

Figure 6-16 shows the recommended reflow profile.

Referred to IPC/JEDEC standard

Peak Temperature: <250°C

Number of Times: ≤2 times

Slope: 1œ2°C/sec maximum

(217°C to peak)

Peak: 250°C

Ramp Down Rate:

maximum 2.5°C/sec

217°C

Preheat: 150œ200°C

60œ120 sec

40œ70 sec

25°C

Ramp Up Rate:

maximum 2.5°C/sec

Time (sec)

Figure 6-16. Reflow Profile

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7 Device and Documentation Support

NOTE

Information in this section is not part of the TI component specification, and TI does not

warrant its accuracy or completeness. TI’s customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the

device, generate code, and develop solutions are listed below.

7.1 Device Certification and Qualification

The TI CC2564MODx module is certified for the FCC, IC, and ETSI/CE. Moreover, the module is a

Bluetooth Qualified Design by the Bluetooth Special Interest Group (Bluetooth SIG). TI Customers that

build products based on the TI CC2564MODx module can save in testing cost and time per product

family.

For more information, see the CC256x Regulatory Compliance wiki and the CC256x Bluetooth SIG

Certification wiki.

7.1.1 FCC Certification

The TI CC2564MODx module is certified for the FCC as a single-modular transmitter. The module is a

FCC-certified radio module that carries a modular grant. The module complies with the intentional radiator

portion (Part 15c) of the FCC certification: Part 15.247 transmitter tests. For more information, see

CC2564MODx Modular Grant, FCC ID: Z64-2564N. A Class 2 Permissive Change is applied to

CC2564MODA.

7.1.2 IC Certification

The TI CC2564MODx module is certified for the IC as a single-modular transmitter. The TI CC2564MODx

module meets IC modular approval and labeling requirements. The IC follows the same testing and rules

as the FCC regarding certified modules in authorized equipment. For more information, see

CC2564MODx Modular Grant, IC ID: 451I-2564N. A Class 2 Permissive Change is applied to

CC2564MODA.

7.1.3 ETSI/CE Certification

The TI CC2564MODx module is CE certified with certifications to the appropriate EU radio and EMC

directives summarized in the Declaration of Conformity and evidenced by the CE mark. The module is

tested against the ETSI EN300-328 v1.8.1 radio tests, which is accepted by a number of countries for

radio compliance. For more information, see CC2564MODN DoC and CC2564MODA DoC.

7.1.4 Bluetooth Special Interest Group Qualification

The TI CC2564MODx module is Bluetooth qualified and carries a Bluetooth 4.1 Controller Subsystem

Qualification Design ID (QDID), which covers the lower layers of a Bluetooth design up to the HCI layer. TI

customers that build products based on the TI CC2564MODx module can reference this QDID in their

Bluetooth product Listing. For more information, see CC2564MODN Controller Subsystem, QDID 55257

and CC2564MODA Controller Subsystem, QDID 64631.

7.2 Tools and Software

Design Kits and Evaluation Modules

Dual-Mode Bluetooth® CC2564 Evaluation Board The CC256XQFNEM evaluation board contains the

CC2564B device and is intended for evaluation and design purposes for the CC256x

devices.

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Dual-Mode Bluetooth® CC2564 Module Evaluation Board The CC2564MODNEM evaluation board

contains the CC2564MODN device and is intended for evaluation and design purposes.

Dual-mode Bluetooth® CC2564 Module With Integrated Antenna BoosterPack™ Plug-in Module

The BOOST-CC2564MODA BoosterPack™ plug-in module is intended for evaluation and

design purposes of the dual-mode Bluetooth® CC2564 module with integrated antenna

(CC2564MODA). The CC2564MODA module is based on TI's dual-mode Bluetooth®

CC2564B Controller, which reduces design effort and enables fast time to market. The

CC2564MODA modules provides best-in-class RF performance with a transmit power and

receive sensitivity that provides range of about 2× compared to other Bluetooth low-energy-

only solutions.

Dual-Mode Bluetooth® CC2564 Module With Integrated Antenna Evaluation Board

The

CC2564MODAEM evaluation board contains the Bluetooth BR/EDR/LE HCI solution. Based

on TI's CC2564B dual-mode Bluetooth single-chip device, the bCC2564MODA is intended

for evaluation and design purposes, reducing design effort and enabling fast time to market.

IoT Enabled ARM® Cortex®-M4F MCU TM4C129X Connected Development Kit

The

TM4C129x

Connected Development Kit is a versatile and feature-rich engineering platform that

highlights the 120-MHz TM4C129XNCZAD IoT Enabled ARM Cortex-M4F based

microcontroller, including an integrated 10/100 Ethernet MAC + PHY as well as many other

key features.

MSP430F5438 Experimenter Board The MSP430F5438 Experimenter Board (MSP-EXP430F5438) is a

microcontroller development for highly integrated, high performance MSP430F5438 MCUs. It

features a 100-pin socket which supports the MSP430F5438A and other devices with similar

pinout. The socket allows for quick upgrades to newer devices or quick applications

changes. It is compatible with many TI low-power RF wireless development kits such as the

CC2520EMK. The Experimenter Board helps designers quickly learn and develop using the

F5xx MCUs, which provide low power, more memory and leading integration for applications

such as energy harvesting, wireless sensing and automatic metering infrastructure (AMI).

MSP430F5529 USB Experimenter’s Board The MSP430F5529 USB microcontroller development kit is

not supported by the Mac or Linux versions of the Code Composer Studio™ Integrated

Development Environment. If you want to work with these operating systems, we suggest

you

select

one

of

the

many

MSP

LaunchPad

development

kits.

The MSP430F5529 Experimenter Board (MSP-EXP430F5529) is a development platform for

the MSP430F5529 device, from the latest generation of MSP430 devices with integrated

USB. The board is compatible with many TI low-power RF wireless evaluation modules such

as the CC2520EMK. The Experimenter Board helps designers quickly learn and develop

using the new F55xx MCUs, which provide the industry's lowest active power consumption,

integrated USB, and more memory and leading integration for applications such as energy

harvesting, wireless sensing and automatic metering infrastructure (AMI).

TM4C123G USB+CAN Development Kit The Tiva C Series TM4C123G Development Kit is a compact

and versatile evaluation platform for the Tiva C Series TM4C123G ARM® Cortex™-M4-

based microcontroller (MCU). The development kit design highlights the TM4C123G MCU

integrated USB 2.0 On-the-Go/Host/Device interface, CAN, precision analog, sensor hub,

and low-power capabilities. The development kit features a Tiva C Series TM4C123GH6PGE

microcontroller in a 144-LQFP package, a color OLED display, USB OTG connector, a

microSD card slot, a coin-cell battery for the low-power Hibernate mode, a CAN transceiver,

a temperature sensor, a nine-axis sensor for motion tracking, and easy-access through-holes

to all of the available device signals.

TI Designs and Reference Designs

CC256x Bluetooth® Reference Design This CC256x Bluetooth® evaluation module reference design is

an RF reference design with antenna which can be easily connected to many Microcontroller

Units (MCUs), such as TI's MSP430 or Tiva C series MCUs. The reference design can be

copied into your board, allowing for a cost-effective design with reduced time to market. This

Bluetooth design is supported by an orderable evaluation module, royalty free software and

documentation, test and certification tips, and community support resources. Visit our wiki for

more information.

44

Device and Documentation Support

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

www.ti.com

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

Software

TI Dual-Mode Bluetooth® Stack TI’s dual-mode Bluetooth stack enables Bluetooth + Bluetooth Low

Energy and is comprised of Single Mode and Dual Mode offerings implementing the

Bluetooth 4.0 specification. The Bluetooth stack is fully Bluetooth Special Interest Group

(SIG) qualified, certified and royalty-free, provides simple command line sample applications

to speed development, and upon request has MFI capability.

TI Dual-Mode Bluetooth Stack on MSP432 MCUs TI’s Dual-mode Bluetooth stack on MSP432 MCUs

software for Bluetooth + Bluetooth Low Energy enables the MSP432 MCU and is comprised

of Single Mode and Dual-mode offerings implementing the Bluetooth 4.0 specification. The

Bluetooth stack is fully qualified (QDID 69887 and QDID 69886), provides simple command

line sample applications to speed development, and upon request has MFI capability.

TI Dual-Mode Bluetooth® Stack on STM32F4 MCUs TI's Dual-mode Bluetooth stack on STM32F4

MCUs software for Bluetooth + Bluetooth Low Energy enables the STM32 ARM Cortex M4

and is comprised of Single Mode and Dual Mode offerings implementing the Bluetooth 4.0

specification. The Bluetooth stack is fully qualified for CC256XSTBTBLESW (QDID 69887

and QDID 69886), provides simple command line sample applications to speed

development, and upon request has MFI capability.

TI Dual-Mode Bluetooth® Stack on MSP430™ MCUs TI’s Dual-mode Bluetooth stack on MSP430™

MCUs software for Bluetooth + Bluetooth Low Energy enables the MSP430 MCU and is

comprised of Single Mode and Dual Mode offerings implementing the Bluetooth 4.0

specification. The Bluetooth stack is fully qualified (QDID 37180 and QDID 42849), provides

simple command line sample applications to speed development, and upon request has MFI

capability.

TI Dual-Mode Bluetooth® Stack on TM4C MCUs TI’s Dual-mode Bluetooth stack on TM4C MCUs

software for Bluetooth + Bluetooth Low Energy enables the TM4C12x MCU and is comprised

of Single Mode and Dual Mode offerings implementing the Bluetooth 4.0 specification. The

Bluetooth stack is fully qualified (QDID 37180 and QDID 42849), provides simple command

line sample applications to speed development, and upon request has MFI capability.

Bluetooth Service Pack for CC256xB The package contains Init Scripts (for BT4.0 and BT4.1) and

Add-Ons (for Audio/Voice Processing and for Bluetooth low energy support). The CC256x

Bluetooth Service Packs (SP) are mandatory initialization scripts that contain bug fixes and

platform specific configurations. They must be loaded into the corresponding CC256x device

after every power cycle. The CC256x SPs are delivered in the form of a Bluetooth Script

(BTS) file. A BTS file is a scripted binary file which defines the actions that should be applied

to the embedded HCI commands and HCI events within the file itself.

TI Bluetooth® Linux® Add-On for AM335x EVM, AM437x EVM and BeagleBone® With WL18xx and

CC256x This package contains the install package, pre-compiled object and source of the

TI Bluetooth Stack and Platform Manager to easily upgrade the default LINUX EZSDK

Binary on a AM437x EVM, AM335x EVM or BeagleBone. The software was built with Linaro

GCC 4.7 and can be added to Linux SDKs that use similar toolchain on other platforms. The

Bluetooth stack is fully qualified (QDID 69886 and QDID 69887), provides simple command

line sample applications to speed development, and upon request has MFI capability.

Development Tools

CC256x Bluetooth Hardware Evaluation Tool The CC256x Bluetooth Hardware Evaluation Tool is a

Texas Instruments (TI) tool which can be downloaded as a complete package from the TI

web site. It is a very intuitive, user-friendly tool to evaluate TI's Bluetooth chips. More

specifically, it is used to configure the BT chip's properties through the Service Pack (SP)

and also allows to test RF performance.

Device and Documentation Support

45

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

www.ti.com

7.3 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers of all

microprocessors (MPUs) and support tools. Each device has one of three prefixes: X, P, or null (no prefix)

(for example, CC2564MODNCMOER). Texas Instruments recommends two of three possible prefix

designators for its support tools: TMDX and TMDS. These prefixes represent evolutionary stages of

product development from engineering prototypes (TMDX) through fully qualified production devices and

tools (TMDS).

Device development evolutionary flow:

X

Experimental device that is not necessarily representative of the final device's electrical

specifications and may not use production assembly flow.

P

Prototype device that is not necessarily the final silicon die and may not necessarily meet

final electrical specifications.

null

Production version of the silicon die that is fully qualified.

For orderable part numbers of CC2564MODx devices in the MOE and MOG package types, see the

Package Option Addendum of this document, ti.com, or contact your TI sales representative.

CC2564MOD x yyy z

R = Large reel

T = Small reel

PREFIX

X = Experimental device

Blank = Qualified device

PACKAGE

DEVICE

Bluetooth® Iost /ontroller

Lnterface (I/L) ꢀodule

MOE = QFM 33

MOG = QFM 35

DEVICE VARIANT

A = CC2564MODA

N = CC2564MODN

Figure 7-1. Device Nomenclature

7.4 Documentation Support

To receive notification of documentation updates, navigate to the device product folder on ti.com. In the

upper right corner, click on Alert me to register and receive a weekly digest of any product information that

has changed. For change details, review the revision history included in any revised document.

The current documentation that describes the DSP, related peripherals, and other technical collateral is

listed below.

Application Report

Using TI Technology to Simplify Bluetooth® Pairing Via NFC Bluetooth® pairing usually involves

some level of user interaction to confirm the identity of the user and/or the devices

themselves. There are many pairing mechanisms available across the versions of Bluetooth

(v2.0 through v4.0). This process is typically lengthy and sometimes confusing to the user,

and so this application report is aimed at showing TI technology developers details on

implementing a simplified pairing scheme method outlined by the NFC Forum using an

MSP430F5529 (a TI ultra-low power MCU), a TRF7970A (a TI NFC transceiver IC), and an

CC2560 (a TI Bluetooth radio IC).

User's Guides

Dual-Mode Bluetooth® Stack on STM32F4 MCUs TI’s dual-mode Bluetooth® stack on STM32F4 MCUs

(CC256XSTBTBLESW) software for Bluetooth + Bluetooth low energy enables the STM32

ARM® Cortex®-M4 processor and includes single mode and dual mode, while implementing

the Bluetooth 4.0 specification. The Bluetooth stack is fully qualified (QDID 69887 and QDID

69886) and provides simple command-line applications to help speed development and can

be MFI capable.

46

Device and Documentation Support

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

www.ti.com

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

Dual-Mode Bluetooth® CC2564 Module With Integrated Antenna Evaluation Board

The

CC2564MODAEM evaluation board contains the CC2564MODA Bluetooth® host controller

interface (HCI) module with integrated antenna and is intended for evaluation and design

purposes. For a complete evaluation solution, the CC2564MODAEM board plugs directly into

the following hardware development kits (HDKs):

•

MSP-EXP430F5529

MSP-EXP430F5438

DK-TM4C123G

DK-TM4C129X

Other MCUs

Dual-Mode Bluetooth® CC2564 Module With Integrated Antenna Evaluation Board This quick-start

guide offers an overview of the CC2564MODAEM evaluation board for the dual-mode

Bluetooth CC2564 module with integrated antenna (CC2564MODA), including required

hardware and software tools and basic settings. For more information, see the Dual-Mode

Bluetooth CC2564 Module With Integrated Antenna Evaluation Board user's guide.

Selection and Solution Guides

Connected Sensors Building Automation Systems Guide Monitoring devices or nodes in building

control systems, fire safety systems, lighting control, and other building automation and

Internet of Things (IoT) applications are becoming more prevalent in today’s world.

White Papers

Wireless connectivity for the Internet of Things: One Size Does Not Fit All In the rapidly growing

Internet of Things (IoT), applications from personal electronics to industrial machines and

sensors are getting wirelessly connected to the Internet. Covering a wide variety of use

cases, in various environments and serving diverse requirements, no single wireless

standard can adequately prevail. With numerous standards deployed in the market,

spreading over multiple frequency bands and using different communication protocols,

choosing the right wireless connectivity technology for an IoT application can be quite

challenging. In this paper we review the predominant wireless connectivity technologies in

the market, discuss their key technical concepts and engineering tradeoffs and provide

guidelines for selection of the right wireless technology for different applications.

Three flavors of Bluetooth®: Which one to choose? The Bluetooth® 4.0 specification brought a new

form of Bluetooth technology – variously known as Bluetooth LE, Bluetooth low energy, or

Bluetooth Smart in communications directed towards the consumer. This new form of

Bluetooth technology was developed in order to enable new types of Bluetooth devices in

areas where Bluetooth previously hadn’t been widely adopted for reasons of battery life or

cost. In this article, I’ll provide a brief history of Bluetooth low energy and the consumer-

facing positioning of Bluetooth Smart and Bluetooth Smart Ready as well as how to select

which “flavor” of Bluetooth is the best option for you.

Design Files

CC2564MODAEM Design Files Design files for the CC2564MODAEM

CC2564MODNEM Design Files Design files for the CC2564MODNEM

More Literature

CC2564MODA CE Certification CC2564MODA CE Certification documentation

SimpleLink™ Bluetooth CC256x Solutions TI single- and dual-mode CC256x solutions are complete

Bluetooth® BR/EDR/ low energy HCI or Bluetooth + Bluetooth low energy solutions that

reduce design effort and enable fast time to market.

Device and Documentation Support

47

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

www.ti.com

7.5 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 7-1. Related Links

TECHNICAL

DOCUMENTS

TOOLS &

SOFTWARE

SUPPORT &

COMMUNITY

PARTS

PRODUCT FOLDER

SAMPLE & BUY

CC2564MODN

CC2564MODA

Click here

7.6 Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the

respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views;

see TI's Terms of Use.

TI E2E™ Online Community The TI engineer-to-engineer (E2E) community was created to foster

collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge,

explore ideas and help solve problems with fellow engineers.

TI Embedded Processors Wiki Established to help developers get started with Embedded Processors

from Texas Instruments and to foster innovation and growth of general knowledge about the

hardware and software surrounding these devices.

7.7 Trademarks

Texas Instruments, MSP430, MSP432, E2E are trademarks of Texas Instruments.

ARM7TDMI is a trademark of ARM Limited.

iPod is a registered trademark of Apple, Inc.

Bluetooth is a registered trademark of Bluetooth SIG.

Linux is a registered trademark of Linux Foundation.

All other trademarks are the property of their respective owners.

7.8 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

7.9 Glossary

TI Glossary This glossary lists and explains terms, acronyms, and definitions.

48

Device and Documentation Support

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

www.ti.com

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

8 Mechanical, Packaging, and Orderable Information

The following pages include mechanical packaging and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and

revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

8.1 Mechanical Data

8.1.1 CC2564MODN Mechanical Data

Mechanical, Packaging, and Orderable Information

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

49

PACKAGE OUTLINE

MOE0033A

QFM - 1.4 mm max height

SCALE 1.800

QUAD FLAT MODULE

7.1

6.9

B

A

PIN 1 ID

7.1

6.9

PICK & PLACE

NOZZLE AREA

C

1.4 MAX

SEATING PLANE

2X 4.5

10X 0.9

0.65

24X

0.55

4X 3.1

(0.05) TYP

7

12

32

13

31

6

3.15

PADS 7-12

& 19-24

26

27

4X

3.1

2X

1.6

2X

4.5

SYMM

29

25

1.15

5X

1.05

28

0.15

0.05

C A

C

B

10X 0.9

18

1

PIN 1 ID

33

0.55

30

24X

0.45

0.15

0.05

24

19

C A

B

2X 1.6

SYMM

(0.15) TYP

C

0.55

4X

0.45

3.15

PADS 1-6 & 13-18

4222156/A 12/2015

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

www.ti.com

EXAMPLE BOARD LAYOUT

MOE0033A

QFM - 1.4 mm max height

QUAD FLAT MODULE

2X (4.5)

SYMM

4X (3.1)

10X (0.9)

4X (0.85)

30

24

19

33

(R0.05)

TYP

1

18

2X

(3.15)

I/O PADS

28

27

26

4X (3.1)

2X (1.6)

29

25

SYMM

2X (4.5)

5X ( 1.1)

10X (0.9)

4X (0.85)

(

0.2) VIA

TYP

13

32

6

24X (0.5)

31

7

12

24X (0.6)

4X ( 0.5)

2X (3.15)

I/O PADS

2X (1.6)

LAND PATTERN EXAMPLE

SCALE:12X

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

METAL UNDER

SOLDER MASK

METAL

SOLDER MASK

OPENING

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4222156/A 12/2015

NOTES: (continued)

3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments

literature number SLUA271 (www.ti.com/lit/slua271).

www.ti.com

EXAMPLE STENCIL DESIGN

MOE0033A

QFM - 1.4 mm max height

QUAD FLAT MODULE

2X (4.5)

SYMM

4X (3.1)

10X (0.9)

4X (0.85)

30

24

19

33

1

18

28

27

26

2X

(3.15)

I/O PADS

4X (3.1)

2X (1.6)

25

29

SYMM

2X (4.5)

(R0.05)

TYP

10X (0.9)

4X (0.85)

13

6

24X (0.5)

32

31

7

12

24X (0.6)

4X ( 0.5)

SEE PAD DETAIL

2X (3.15)

I/O PADS

2X (1.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

PRINTED SOLDER COVERAGE BY AREA

PADS 25-29: 90%

SCALE:12X

(R0.05) TYP

(

1.044)

METAL

ALL AROUND

CENTER PAD DETAIL

5X,SCALE:25X

4222156/A 12/2015

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

www.ti.com

8.1.2 CC2564MODA Mechanical Data

50

Mechanical, Packaging, and Orderable Information

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

PACKAGE OUTLINE

MOG0035A

QFM - 1.54 mm max height

SCALE 1.200

QUAD FLAT MODULE

14.1

13.9

B

A

PIN 1 ID

7.1

6.9

6.7 0.1

NOTE 3

TYP

PICK & PLACE

NOZZLE AREA

3X (0.3)

C

1.54 MAX

SEATING PLANE

1.09 MAX

8X 6.55

2X 4.5

4X 0.8

(0.2) TYP

10X 0.9

4.95

4.75

2X

0.48

0.38

34

12

7

31

6

32

10X 0.9

13

26

3.135

1.05

0.95

5X

29

2X 1.6

25

PKG

2X

27

4.5

2

1

16X 3.05

28

3.15

18

33

30

19

24

4X 0.8

35

0.45

0.35

2X

8X 0.45

1.6

0.55

0.45

C A

28X

(0.15) TYP

3.5

2X 4.425

0.15

0.05

B

PIN 1 ID

PKG

C

4221869/A 07/2015

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. Location, size and quantity of components are for reference only and could vary.

www.ti.com

EXAMPLE BOARD LAYOUT

MOG0035A

QFM - 1.54 mm max height

QUAD FLAT MODULE

PKG

8X (6.55)

2X (4.5)

8X (0.45)

4X (0.8)

10X (0.9)

(0.4)

2X (4.85)

35

24

19

30

33

1

18

28

10X (0.9)

(3.15)

2

2X (1.6)

29

25

PKG

2X (4.5)

27

5X ( 1)

(3.05)

(3.135)

(0.43)

26

(R0.05) TYP

6

13

32

34

31

12

7

28X ( 0.5)

2X (1.6)

(

0.2) VIA

TYP

(3.5)

2X (4.425)

LAND PATTERN EXAMPLE

SCALE:8X

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

METAL UNDER

SOLDER MASK

METAL

SOLDER MASK

OPENING

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4221869/A 07/2015

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments

literature number SLUA271 (www.ti.com/lit/slua271).

www.ti.com

EXAMPLE STENCIL DESIGN

MOG0035A

QFM - 1.54 mm max height

QUAD FLAT MODULE

8X (6.55)

2X (4.5)

8X (0.45)

4X (2.325)

4X (0.8)

10X (0.9)

2X (0.4)

24

19

30

33

18

35

1

2X METAL

28

10X (0.9)

(3.15)

2

2X (1.6)

29

25

PKG

27

2X (4.5)

(R0.05)

TYP

(3.05)

26

(3.135)

13

32

6

34

31

7

12

28X ( 0.5)

2X (0.43)

2X (1.6)

SEE PAD DETAIL

(3.5)

2X (3.163)

2X (5.688)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

PADS 25-29: 90% PRINTED SOLDER COVERAGE BY AREA

PADS 34 & 35: 96% PRINTED SOLDER COVERAGE BY AREA

SCALE:8X

(R0.05) TYP

(

0.95)

METAL

ALL AROUND

PAD DETAIL

4X,SCALE:25X

4221869/A 07/2015

NOTES: (continued)

5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

CC2564MODN, CC2564MODA

www.ti.com

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

8.2 Packaging and Ordering

8.2.1 Package and Ordering Information

Table 8-1. Package and Ordering Information

MINIMUM

ORDERABLE

QUANTITY

PACKAGE

TYPE

PART NUMBER⁽¹⁾

STATUS

CC2564MODNCMOET

CC2564MODNCMOER

CC2564MODACMOG

Active

MOE

MOG

250

2000

216

(1) Part number marking key:

•

CC2564MODx – module variant (N: external antenna; A:

integrated antenna)

•

C – module marking (commercial)

MOx – module package type: MOE (33 pins); MOG (35 pins)

x – packaging designator (R: large T&R; T: small T&R; blank:

tray

Figure 8-1 shows the markings for the CC2564MODN module.

M/N : CC2564MODN

TXXXXXX

Figure 8-1. CC2564MODN Markings

Mechanical, Packaging, and Orderable Information

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

51

CC2564MODN, CC2564MODA

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

www.ti.com

Figure 8-2 shows the markings for the CC2564MODA module.

Figure 8-2. CC2564MODA Markings

Table 8-2 describes the CC2564MODx markings.

Table 8-2. CC2564MODx Markings

MARKING

DESCRIPTION

Model number

CC2564MODx

•

CC2564MODN: external antenna

CC2564MODA: integrated antenna

Z64 - 2564N

451I - 2564N

FCC ID: single modular FCC grant ID

IC: single modular IC grant ID

Lot order code (for example, A0A7123):

•

T = fixed

TXXXXXX

Second and third digits = year code by hex (for example, 0A = 2010)

Fourth digit = month code by hex (for example, 7 = July)

Fifth to seventh digit = serial number by hex (for example, 123)

Production date code (for example, 1424):

XXXX

CE

•

XX = year (for example, 14 = 2014)

XX = week (for example, 24 = week 24)

CE compliance mark

52

Mechanical, Packaging, and Orderable Information

Submit Documentation Feedback

Product Folder Links: CC2564MODN CC2564MODA

CC2564MODN, CC2564MODA

www.ti.com

SWRS160E –FEBRUARY 2014–REVISED JANUARY 2017

8.2.2 Tape and Reel Packaging Information (CC2564MODN Only)

8.2.2.1 Empty Tape Portion

Figure 8-3 shows the empty portion of the carrier tape.

Empty portion

Device on tape portion

End

Start

The length is to extend

so that no unit is visible

on the outer layer of tape.

270-mm MIN

User direction of feed

swrs064-001

Figure 8-3. Carrier Tape and Pockets

8.2.2.2 Device Quantity and Direction

When pulling out the tape, the A1 corner is on the left side (see Figure 8-4).

A1 corner

Carrier tape

Sprocket hole

Embossment

Cover tape

User direction of feed

SWRS064-002

Figure 8-4. Direction of Device

8.2.2.3 Insertion of Device

Figure 8-5 shows the insertion of the device.

insert_swrs064

Figure 8-5. Insertion of Device

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8.2.2.4 Tape Specification

Figure 8-6 shows the dimensions of the tape.

Figure 8-6. Tape Dimensions (mm)

Cumulative tolerance of the 10-sprocket hole pitch is ±0.20.

•

Carrier camber is within 1 mm in 250 mm.

Material is black conductive polystyrene alloy.

All dimensions meet EIA-481-D requirements.

Thickness: 0.30 ±0.05 mm

Packing length per 22-inch reel is 110.5 m (1:3).

Component load per 13-inch reel is 2000 pieces.

8.2.2.5 Reel Specification

Figure 8-7 shows the reel specifications:

•

330-mm reel, 12-mm width tape

Reel material: Polystyrene (static dissipative/antistatic)

330.0

RFF

100.0

RFF

A

Figure 8-7. Reel Dimensions (mm)

54

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8.2.2.6 Packing Method

Figure 8-8 shows the reel packing method.

B

Humidity indicator

A

Desiccant

C

D

360mm

285mm

375mm

Figure 8-8. Reel Packing Method

8.2.2.7 Packing Specification

8.2.2.7.1 Reel Box

Each moisture-barrier bag is packed into a reel box, as shown in Figure 8-9.

rlbx_swrs064

Figure 8-9. Reel Box (Carton)

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8.2.2.7.2 Reel Box Material

The reel box is made from corrugated fiberboard.

8.2.2.7.3 Shipping Box

If the shipping box has excess space, filler (such as cushion) is added.

Figure 8-10 shows a typical shipping box.

NOTE

The size of the shipping box may vary depending on the number of reel boxes packed.

box_swrs064

Figure 8-10. Shipping Box (Carton)

8.2.2.7.4 Shipping Box Material

The shipping box is made from corrugated fiberboard.

8.2.2.7.5 Labels

Figure 8-11 shows the antistatic and humidity notice.

Figure 8-11. Antistatic and Humidity Notice

Figure 8-12 shows the MSL caution and storage condition notice.

Figure 8-12. MSL Caution and Storage Condition Notice

56

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Figure 8-13 shows the label for the inner box.

Figure 8-13. Inner Box Label Example

8.2.3 Tray Packing Information (CC2564MODA Only)

8.2.3.1 Tray Packing

Figure 8-14 shows the device in the tray.

Figure 8-14. Device in Tray

Figure 8-15 shows a close-up view of the device in the tray.

Figure 8-15. Close-Up View of Device in Tray

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8.2.3.2 Pin 1 Orientation in Tray

Figure 8-16 shows the Pin 1 orientation (Quadrant 2) of the CC2564MODA device in the tray.

Package Locator for Pin 1

TR

(Orientation Q1/Q2/Q3/Q4)

Chamfer

Tray Top Edge

Quadrant

1

3

2

4

1

3

2

4

Square

Packages

Rectangular

Packages

Figure 8-16. Pin 1 Orientation in Tray

58

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8.2.3.3 Tray Specification

Figure 8-17 shows the tray specifications. Table 8-3 lists a summary of the tray dimensions.

Figure 8-17. Tray Dimensions

Table 8-3. Tray Dimensions

MAX.

BAKE

TEMP.

(°C)

TRAY

LENGTH

(mm)

TRAY

WIDTH

(mm)

PKG.

TYPE

PKG. SIZE

(mm)

TRAY PART

NO.

TRAY

MATRIX

POCKET SIZE

(mm)

DEVICE

CC2564MODACMOG

MOG

7.0 × 14.0

EA70814-50

12 × 18

315.0

135.9

8.24 × 14.24

125

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型号：	CC2564MODA
厂家：	TEXAS INSTRUMENTS
描述：	具有基本速率、增强数据速率和带集成天线的低功耗 (LE) 模块的 Bluetooth® 4.1
文件：	总66页 (文件大小：16913K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CC2564MODA [TI]

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