CC2640R2FYFVT_技术文档

CC2640R2F

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

CC2640R2F

SimpleLink™ 低功耗Bluetooth^®5.1 无线MCU

• 外部系统

1 特性

– 片上内部直流/直流转换器

• 微控制器

– 与CC2590 和CC2592 范围扩展器无缝集成

– 极少的外部组件

– 与采用各种VQFN 封装的SimpleLink™

CC2640 和CC2650 器件引脚兼容

– 与采用7mm x 7mm VQFN 封装的SimpleLink

™ CC2642R 和CC2652R 器件引脚兼容

– 与采用4mm × 4mm 和5mm × 5mm VQFN 封

装的SimpleLink™ CC1350 器件引脚兼容

– 功能强大的Arm^®Cortex^®-M3

– EEMBC CoreMark^®评分：142

– 高达48MHz 的时钟速度

– 275KB 非易失性存储器，包括128KB 系统内可

编程闪存

– 高达28KB 系统SRAM，其中20KB 为超低泄漏

SRAM

– 8KB SRAM 作为缓存或系统RAM 用途

– 双引脚cJTAG 和JTAG 调试

– 支持无线升级(OTA)

• 低功耗

– 宽电源电压范围

• 正常运行：1.8 至3.8 V

• 外部稳压器模式：1.7 至1.95 V

– 有源模式RX：5.9 mA

– 有源模式TX（在0dBm 条件下）：6.1 mA

– 有源模式TX（在+5dBm 条件下）：9.1 mA

– 有源模式MCU：61µA/MHz

• 超低功耗传感器控制器

– 可独立于系统其余部分自主运行

– 16 位架构

– 2KB 超低泄漏电流代码和数据SRAM

• 高效代码大小架构，在ROM 中装载驱动程序、

TI-RTOS 和Bluetooth^®软件，让更多闪存供应用程

序使用

– 有源模式MCU：48.5CoreMark/mA

– 有源模式传感器控制器：

• 符合RoHS 标准的封装

0.4mA + 8.2µA/MHz

– 2.7mm × 2.7mm YFV DSBGA34 封装（14 个

GPIO）

– 待机：1.1μA（RTC 运行，RAM/CPU 保持）

– 关断：100nA（发生外部事件时唤醒）

• 射频(RF) 部分

– 4mm × 4mm RSM VQFN32 封装（10 个

GPIO）

– 符合低功耗Bluetooth^®5.1 和早期LE 规范的

2.4GHz 射频收发器

– 出色的接收器灵敏度（BLE 对应–97dBm）、

可选择性以及阻断性能

– 链路预算为102dB (BLE)

– 高达+5dBm 的可编程输出功率

– 单端或差分RF 接口

– 适用于符合各项全球射频规范的系统

• ETSI EN 300 328（欧洲）

• EN 300 440 2 类（欧洲）

• FCC CFR47 第15 部分（美国）

• ARIB STD-T66（日本）

– 5mm × 5mm RHB VQFN32 封装（15 个

GPIO）

– 7mm × 7mm RGZ VQFN48 (31 GPIO)

• 外设

– 所有数字外设引脚均可连接任意GPIO

– 四个通用计时器模块

（8 个16 位计时器或4 个32 位计时器，均采

用PWM）

– 12 位ADC、200ksps、8 通道模拟多路复用器

– 持续时间比较器

– 超低功耗模拟比较器

– 可编程电流源

– UART、I2C 和I2S

– 2 个同步串行接口(SSI)（SPI、MICROWIRE

和TI）

– 实时时钟(RTC)

• 开发工具和软件

– 功能全面的开发套件

– 多种参考设计

– SmartRF^™Studio

– Sensor Controller Studio

– AES-128 安全模块

– IAR Embedded Workbench^®for Arm^®

– Code Composer Studio^™集成式开发环境(IDE)

– Code Composer Studio™ Cloud IDE

– 真随机数发生器(TRNG)

– 支持8 个电容式感应按钮

– 集成温度传感器

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SWRS204

CC2640R2F

www.ti.com.cn

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

• 健康和医疗

– 电子温度计

– SpO2

2 应用

• 家庭和楼宇自动化

– 联网电器

– 照明

– 智能锁

– 网关

– 安防系统

• 工业

– 血糖监测仪和血压监测仪

– 称重秤

– 助听器

• 运动和健身设备

– 可穿戴健身和活动监测仪

– 智能追踪器

– 患者监护仪

– 健身器

– 工厂自动化

– 资产跟踪和管理

– HMI

• HID

– 门禁

• 电子销售终端(EPOS)

– 游戏

– 指针设备（无线键盘和鼠标）

– 电子货架标签(ESL)

3 说明

CC2640R2F 器件是一款 2.4GHz 无线微控制器 (MCU)，支持低功耗 Bluetooth^®5.1 和专有 2.4GHz 应用。该器

件经过优化，可在楼宇安全系统、HVAC、资产跟踪和医疗市场以及需要工业性能的应用中实现低功耗无线通信和

高级传感。该器件的突出特性包括：

• 支持Bluetooth ^®5.1 特性：LE 编码PHY（远距离）、LE 2Mb PHY（高速）、广播扩展、多个广播集以及对

Bluetooth ^®5.0 和早期低功耗规范的向后兼容性和支持。

• SimpleLink™ CC2640R2F 软件开发套件(SDK) 附带完全合格的Bluetooth ^®5.1 软件协议栈，用于在强大的

Arm^®Cortex^®-M3 处理器上开发应用。

• 延长无线应用的电池寿命，完全RAM 保持时低待机电流为1.1µA。

• 通过具有快速唤醒功能的可编程、自主式超低功耗传感器控制器CPU 实现高级检测。例如，传感器控制器能

够在1µA 系统电流下进行1Hz ADC 采样。

• 软件控制的专用无线电控制器(Arm^®Cortex^®-M0) 提供灵活的低功耗射频收发器功能，支持多个物理层和射频

标准（如实时定位(RTLS) 技术）。

• 出色的无线电敏感度和稳健性（选择性与阻断）性能，适用于低功耗Bluetooth ^®，125kbps 时（LE 编码

PHY）为-103dBm。

CC2640R2F 器件是SimpleLink™ 微控制器(MCU) 平台的一部分，该平台包括

Wi-Fi^®、低功耗 Bluetooth ^®、Thread、ZigBee^®、Sub-1GHz MCU 和主机 MCU，它们共用一个通用、易于使用

的开发环境，其中包含单核软件开发套件 (SDK) 和丰富的工具集。借助一次性集成的 SimpleLink™ 平台，可以将

产品组合中的任何器件组合添加至您的设计中，从而在设计要求变更时实现 100% 的代码重用。如需更多信息，

请访问SimpleLink™ MCU 平台。

器件信息⁽¹⁾

封装尺寸（标称值）

器件型号

封装

CC2640R2FRGZ

CC2640R2FRHB

CC2640R2FRSM

CC2640R2FYFV

VQFN (48)

VQFN (32)

7.00mm × 7.00mm

5.00mm × 5.00mm

4.00mm × 4.00mm

2.70mm × 2.70mm

芯片尺寸球状引脚栅格阵列(DSBGA) (34)

(1) 详细信息请参见节12。

English Data Sheet: SWRS204

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4 Functional Block Diagram

图4-1 shows a block diagram for the CC2640R2F device.

SimpleLink CC26xx Wireless MCU

RF Core

cJTAG

Main CPU:

ROM

ADC

ARM

Cortex-M3

128-KB

Flash

Digital PLL

DSP modem

4-KB

8-KB

cache

Up to 48 MHz

61 µA/MHz

ARM

Cortex-M0

SRAM

20-KB

SRAM

ROM

General Peripherals / Modules

Sensor Controller

2

I C

4× 32-bit Timers

Sensor Controller Engine

UART

I2S

2× SSI (SPI, µW, TI)

Watchdog Timer

12-bit ADC, 200 ks/s

2× Comparator

10 / 14 / 15 / 31 GPIOs

AES

TRNG

2

SPI-I C Digital Sensor IF

Temp. / Batt. Monitor

Constant Current Source

32 ch. µDMA

RTC

Time-to-digital Converter

2-KB SRAM

DC-DC Converter

图4-1. Block Diagram

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English Data Sheet: SWRS204

CC2640R2F

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

Table of Contents

8.22 Low-Power Clocked Comparator............................26

8.23 Programmable Current Source...............................26

8.24 Synchronous Serial Interface (SSI).........................27

8.25 DC Characteristics..................................................28

8.26 Thermal Resistance Characteristics....................... 30

8.27 Timing Requirements..............................................30

8.28 Switching Characteristics........................................31

8.29 Typical Characteristics............................................32

9 Detailed Description......................................................36

9.1 Overview...................................................................36

9.2 Functional Block Diagram.........................................36

9.3 Main CPU..................................................................37

9.4 RF Core.................................................................... 37

9.5 Sensor Controller......................................................38

9.6 Memory.....................................................................39

9.7 Debug....................................................................... 39

9.8 Power Management..................................................39

9.9 Clock Systems.......................................................... 40

9.10 General Peripherals and Modules.......................... 40

9.11 Voltage Supply Domains.........................................42

9.12 System Architecture................................................42

10 Application, Implementation, and Layout................. 43

10.1 Application Information........................................... 43

10.2 5 × 5 External Differential (5XD) Application

1 特性................................................................................... 1

2 应用................................................................................... 2

3 说明................................................................................... 2

4 Functional Block Diagram.............................................. 3

5 Revision History.............................................................. 5

6 Device Comparison.........................................................6

6.1 Related Products........................................................ 6

7 Terminal Configuration and Functions..........................7

7.1 Pin Diagram –RGZ Package....................................7

7.2 Signal Descriptions –RGZ Package.........................8

7.3 Pin Diagram –RHB Package..................................10

7.4 Signal Descriptions –RHB Package....................... 11

7.5 Pin Diagram –YFV (Chip Scale, DSBGA)

Package...................................................................... 12

7.6 Signal Descriptions –YFV (Chip Scale,

DSBGA) Package........................................................12

7.7 Pin Diagram –RSM Package..................................14

7.8 Signal Descriptions –RSM Package.......................15

8 Specifications................................................................ 16

8.1 Absolute Maximum Ratings...................................... 16

8.2 ESD Ratings............................................................. 16

8.3 Recommended Operating Conditions.......................17

8.4 Power Consumption Summary................................. 17

8.5 General Characteristics............................................ 18

8.6 125-kbps Coded (Bluetooth 5) –RX....................... 18

8.7 125-kbps Coded (Bluetooth 5) –TX........................19

8.8 500-kbps Coded (Bluetooth 5) –RX....................... 19

8.9 500-kbps Coded (Bluetooth 5) –TX........................20

8.10 1-Mbps GFSK (Bluetooth low energy) –RX..........21

8.11 1-Mbps GFSK (Bluetooth low energy) –TX.......... 22

8.12 2-Mbps GFSK (Bluetooth 5) –RX.........................22

8.13 2-Mbps GFSK (Bluetooth 5) –TX......................... 23

8.14 24-MHz Crystal Oscillator (XOSC_HF)...................23

8.15 32.768-kHz Crystal Oscillator (XOSC_LF)..............23

8.16 48-MHz RC Oscillator (RCOSC_HF)......................24

8.17 32-kHz RC Oscillator (RCOSC_LF)........................24

8.18 ADC Characteristics................................................24

8.19 Temperature Sensor............................................... 25

8.20 Battery Monitor........................................................25

8.21 Continuous Time Comparator.................................26

Circuit.......................................................................... 45

10.3 4 × 4 External Single-ended (4XS) Application

Circuit.......................................................................... 47

11 Device and Documentation Support..........................49

11.1 Device Nomenclature..............................................49

11.2 Tools and Software..................................................50

11.3 Documentation Support.......................................... 51

11.4 Texas Instruments Low-Power RF Website............ 51

11.5 Low-Power RF eNewsletter.................................... 51

11.6 支持资源..................................................................51

11.7 Trademarks............................................................. 51

11.8 静电放电警告...........................................................51

11.9 Export Control Notice..............................................51

11.10 术语表................................................................... 52

12 Mechanical, Packaging, and Orderable

Information.................................................................... 53

12.1 Packaging Information............................................ 53

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English Data Sheet: SWRS204

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

5 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision B (January 2018) to Revision C (September 2020)

Page

• 更新了整个文档中的表格、图和交叉参考的编号格式.........................................................................................1

• Changed intermodulation interferer frequencies in 节8.12 ............................................................................. 22

• Changed 图8-20 in 节8.29 .............................................................................................................................32

• Changed IDLE value for Current in 节9.8 .......................................................................................................39

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6 Device Comparison

表6-1. Device Family Overview

Device

PHY Support

Flash (KB) RAM (KB)

GPIO

Package⁽¹⁾

Bluetooth low energy

(Normal, High Speed, Long Range)

CC2640R2Fxxx⁽²⁾

128

20

31, 15, 14, 10

RGZ, RHB, YFV, RSM

CC2640F128xxx

CC2650F128xxx

CC2630F128xxx

CC2620F128xxx

Bluetooth low energy (Normal)

Multi-Protocol⁽³⁾

128

20

31, 15, 10

31, 10

RGZ, RHB, RSM

RGZ, RSM

IEEE 802.15.4 (/6LoWPAN)

IEEE 802.15.4 (RF4CE)

(1) Package designator replaces the xxx in device name to form a complete device name, RGZ is 7-mm × 7-mm VQFN48,

RHB is 5-mm × 5-mm VQFN32, RSM is 4-mm × 4-mm VQFN32, and YFV is 2.7-mm × 2.7-mm DSBGA.

(2) CC2640R2Fxxx devices contain Bluetooth Low Energy Host & Controller libraries in ROM, leaving more of the 128KB Flash memory

available for the customer application when used with supported BLE-Stack software protocol stack releases. Actual use of ROM and

Flash memory by the protocol stack may vary depending on device software configuration. See www.ti.com for more details.

(3) The CC2650 device supports all PHYs and can be reflashed to run all the supported standards.

6.1 Related Products

TI's Wireless Connectivity The wireless connectivity portfolio offers a wide selection of low-power RF solutions

suitable for a broad range of applications. The offerings range from fully customized

solutions to turn key offerings with pre-certified hardware and software (protocol).

TI's SimpleLink™ Sub-1

GHz Wireless MCUs

Long-range, low-power wireless connectivity solutions are offered in a wide range of

Sub-1 GHz ISM bands.

Companion Products

Review products that are frequently purchased or used in conjunction with this

product.

SimpleLink™ CC2640R2 The CC2640R2 LaunchPad^™development kit brings easy Bluetooth^®low energy

Wireless MCU LaunchPad (BLE) connection to the LaunchPad ecosystem with the SimpleLink ultra-low power

™ Development Kit

CC26xx family of devices. Compared to the CC2650 LaunchPad, the CC2640R2

LaunchPad provides the following:

• More free flash memory for the user application in the CC2640R2 wireless MCU

• Out-of-the-box support for Bluetooth 4.2 specification

• 4× faster Over-the-Air download speed compared to Bluetooth 4.1

SimpleLink™ Bluetooth

The new SensorTag IoT kit invites you to realize your cloud-connected product idea.

low energy/Multi-standard The new SensorTag now includes 10 low-power MEMS sensors in a tiny red

SensorTag

package. And it is expandable with DevPacks to make it easy to add your own

sensors or actuators.

Reference Designs for

CC2640

TI Designs Reference Design Library is a robust reference design library spanning

analog, embedded processor and connectivity. Created by TI experts to help you

jump-start your system design, all TI Designs include schematic or block diagrams,

BOMs, and design files to speed your time to market. Search and download designs

at ti.com/tidesigns.

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English Data Sheet: SWRS204

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

7 Terminal Configuration and Functions

7.1 Pin Diagram –RGZ Package

DIO_24 37

DIO_25 38

DIO_26 39

DIO_27 40

DIO_28 41

DIO_29 42

DIO_30 43

VDDS 44

24 JTAG_TMSC

23 DCOUPL

22 VDDS3

21 DIO_15

20 DIO_14

19 DIO_13

18 DIO_12

17 DIO_11

16 DIO_10

15 DIO_9

VDDR 45

X24M_N 46

X24M_P 47

VDDR_RF 48

14 DIO_8

13 VDDS2

图7-1. RGZ Package 48-Pin VQFN (7-mm × 7-mm) Pinout, 0.5-mm Pitch

I/O pins marked in 图7-1 in bold have high-drive capabilities; they are the following:

• Pin 10, DIO_5

• Pin 11, DIO_6

• Pin 12, DIO_7

• Pin 24, JTAG_TMSC

• Pin 26, DIO_16

• Pin 27, DIO_17

I/O pins marked in 图7-1 in italics have analog capabilities; they are the following:

• Pin 36, DIO_23

• Pin 37, DIO_24

• Pin 38, DIO_25

• Pin 39, DIO_26

• Pin 40, DIO_27

• Pin 41, DIO_28

• Pin 42, DIO_29

• Pin 43, DIO_30

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English Data Sheet: SWRS204

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

7.2 Signal Descriptions –RGZ Package

表7-1. Signal Descriptions –RGZ Package

NAME

NO.

33

23

5

TYPE

DESCRIPTION

DCDC_SW

DCOUPL

DIO_0

Power

Output from internal DC/DC⁽¹⁾

Power

1.27-V regulated digital-supply decoupling capacitor⁽²⁾

Digital I/O

GPIO, Sensor Controller

DIO_1

6

GPIO, Sensor Controller

DIO_2

7

GPIO, Sensor Controller

DIO_3

8

GPIO, Sensor Controller

DIO_4

9

GPIO, Sensor Controller

DIO_5

10

11

12

14

15

16

17

18

19

20

21

26

27

28

29

30

31

32

36

37

38

39

40

41

42

43

24

25

35

GPIO, Sensor Controller, high-drive capability

DIO_6

GPIO, Sensor Controller, high-drive capability

DIO_7

GPIO, Sensor Controller, high-drive capability

DIO_8

GPIO

DIO_9

GPIO

DIO_10

DIO_11

DIO_12

DIO_13

DIO_14

DIO_15

DIO_16

DIO_17

DIO_18

DIO_19

DIO_20

DIO_21

DIO_22

DIO_23

DIO_24

DIO_25

DIO_26

DIO_27

DIO_28

DIO_29

DIO_30

JTAG_TMSC

JTAG_TCKC

RESET_N

GPIO

GPIO, JTAG_TDO, high-drive capability

GPIO, JTAG_TDI, high-drive capability

GPIO

Digital/Analog I/O GPIO, Sensor Controller, Analog

Digital I/O

Digital input

JTAG TMSC, high-drive capability

JTAG TCKC⁽³⁾

Reset, active-low. No internal pullup.

Positive RF input signal to LNA during RX

Positive RF output signal to PA during TX

RF_P

RF_N

1

2

RF I/O

Negative RF input signal to LNA during RX

Negative RF output signal to PA during TX

VDDR

45

48

Power

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(2) (4)}

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(2) (5)}

VDDR_RF

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表7-1. Signal Descriptions –RGZ Package (continued)

NAME

NO.

44

13

22

34

3

TYPE

DESCRIPTION

VDDS

Power

1.8-V to 3.8-V main chip supply⁽¹⁾

1.8-V to 3.8-V DIO supply⁽¹⁾

1.8-V to 3.8-V DC/DC supply

32-kHz crystal oscillator pin 1

32-kHz crystal oscillator pin 2

24-MHz crystal oscillator pin 1

24-MHz crystal oscillator pin 2

Ground –Exposed Ground Pad

VDDS2

Power

VDDS3

Power

VDDS_DCDC

X32K_Q1

X32K_Q2

X24M_N

X24M_P

EGP

Power

Analog I/O

Power

4

46

47

(1) For more details, see the technical reference manual (listed in 节11.3).

(2) Do not supply external circuitry from this pin.

(3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™

Wireless MCU Technical Reference Manual

(4) If internal DC/DC is not used, this pin is supplied internally from the main LDO.

(5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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English Data Sheet: SWRS204

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7.3 Pin Diagram –RHB Package

DIO_12 25

DIO_13 26

DIO_14 27

VDDS 28

16 DIO_6

15 DIO_5

14 JTAG_TCKC

13 JTAG_TMSC

12 DCOUPL

11 VDDS2

VDDR 29

X24M_N 30

X24M_P 31

VDDR_RF 32

10 DIO_4

9

DIO_3

图7-2. RHB Package 32-Pin VQFN (5-mm × 5-mm) Pinout, 0.5-mm Pitch

I/O pins marked in 图7-2 in bold have high-drive capabilities; they are the following:

• Pin 8, DIO_2

• Pin 9, DIO_3

• Pin 10, DIO_4

• Pin 13, JTAG_TMSC

• Pin 15, DIO_5

• Pin 16, DIO_6

I/O pins marked in 图7-2 in italics have analog capabilities; they are the following:

• Pin 20, DIO_7

• Pin 21, DIO_8

• Pin 22, DIO_9

• Pin 23, DIO_10

• Pin 24, DIO_11

• Pin 25, DIO_12

• Pin 26, DIO_13

• Pin 27, DIO_14

English Data Sheet: SWRS204

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7.4 Signal Descriptions –RHB Package

表7-2. Signal Descriptions –RHB Package

NAME

NO.

17

12

6

TYPE

DESCRIPTION

DCDC_SW

DCOUPL

DIO_0

Power

Output from internal DC/DC⁽¹⁾

Power

1.27-V regulated digital-supply decoupling⁽²⁾

Digital I/O

GPIO, Sensor Controller

DIO_1

7

GPIO, Sensor Controller

DIO_2

8

GPIO, Sensor Controller, high-drive capability

GPIO, High drive capability, JTAG_TDO

GPIO, High drive capability, JTAG_TDI

DIO_3

9

DIO_4

10

15

16

20

21

22

23

24

25

26

27

13

14

19

DIO_5

DIO_6

DIO_7

Digital/Analog I/O GPIO, Sensor Controller, Analog

DIO_8

DIO_9

DIO_10

DIO_11

DIO_12

DIO_13

DIO_14

JTAG_TMSC

JTAG_TCKC

RESET_N

Digital I/O

Digital input

JTAG TMSC, high-drive capability

JTAG TCKC⁽³⁾

Reset, active-low. No internal pullup.

Negative RF input signal to LNA during RX

Negative RF output signal to PA during TX

RF_N

RF_P

2

1

RF I/O

Positive RF input signal to LNA during RX

Positive RF output signal to PA during TX

RX_TX

3

RF I/O

Power

Optional bias pin for the RF LNA

VDDR

29

32

28

11

18

4

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(4) (2)}

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(2) (5)}

1.8-V to 3.8-V main chip supply⁽¹⁾

VDDR_RF

VDDS

Power

VDDS2

Power

1.8-V to 3.8-V GPIO supply⁽¹⁾

VDDS_DCDC

X32K_Q1

X32K_Q2

X24M_N

X24M_P

EGP

Power

1.8-V to 3.8-V DC/DC supply

Analog I/O

Power

32-kHz crystal oscillator pin 1

5

32-kHz crystal oscillator pin 2

30

31

24-MHz crystal oscillator pin 1

24-MHz crystal oscillator pin 2

Ground –Exposed Ground Pad

(1) See technical reference manual (listed in 节11.3) for more details.

(2) Do not supply external circuitry from this pin.

(3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™

Wireless MCU Technical Reference Manual

(4) If internal DC/DC is not used, this pin is supplied internally from the main LDO.

(5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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Product Folder Links: CC2640R2F

English Data Sheet: SWRS204

CC2640R2F

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

7.5 Pin Diagram –YFV (Chip Scale, DSBGA) Package

A1

B1

C1

D1

E1

F1

A2

B2

C2

D2

E2

F2

A3

B3

C3

D3

E3

F3

A4

B4

C4

D4

E4

F4

B5

C5

D5

E5

F5

B6

C6

D6

E6

F6

图7-3. YFV (2.7-mm × 2.7-mm) Pinout, Top View

7.6 Signal Descriptions –YFV (Chip Scale, DSBGA) Package

表7-3. Signal Descriptions –YFV Package

NAME

NO.

D1

F3

C5

F6

D5

E5

F5

E3

F1

D2

D3

A1

C2

B2

D4

B3

E4

F2

E2

TYPE

DESCRIPTION

DCDC_SW

DCOUPL

DIO_0

Power

Output from internal DC/DC⁽¹⁾

Power

1.27-V regulated digital-supply decoupling⁽²⁾

Digital I/O

GPIO, Sensor Controller

DIO_1

GPIO, Sensor Controller

DIO_2

GPIO, Sensor Controller, high-drive capability

GPIO, High-drive capability, JTAG_TDO

GPIO, High-drive capability, JTAG_TDI

DIO_3

DIO_4

DIO_5

DIO_6

DIO_7

Digital/Analog I/O GPIO, Sensor Controller, Analog

DIO_8

DIO_9

DIO_10

DIO_11

DIO_12

DIO_13

JTAG_TMSC

JTAG_TCKC

RESET_N

Digital I/O

Digital input

JTAG TMSC, high-drive capability

JTAG TCKC⁽³⁾

Reset, active-low. No internal pullup.

English Data Sheet: SWRS204

12

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表7-3. Signal Descriptions –YFV Package (continued)

NAME

NO.

TYPE

DESCRIPTION

Negative RF input signal to LNA during RX

Negative RF output signal to PA during TX

RF_N

B6

RF I/O

Positive RF input signal to LNA during RX

Positive RF output signal to PA during TX

RF_P

B5

RF I/O

VDDR

A3

B4

A2

F4

C1

D6

E6

C3

C4

Power

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(4) (2)}

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(5) (2)}

1.8-V to 3.8-V main chip supply⁽¹⁾

VDDR_RF

VDDS

Power

VDDS2

Power

1.8-V to 3.8-V GPIO supply⁽¹⁾

VDDS_DCDC

X32K_Q1

X32K_Q2

X24M_N

X24M_P

Power

1.8-V to 3.8-V DC/DC supply

Analog I/O

32-kHz crystal oscillator pin 1

32-kHz crystal oscillator pin 2

24-MHz crystal oscillator pin 1

24-MHz crystal oscillator pin 2

A4, B1, C6,

E1

GND

Power

Ground

(1) For more details, see the technical reference manual (listed in 节11.3).

(2) Do not supply external circuitry from this pin.

(3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™

Wireless MCU Technical Reference Manual

(4) If internal DC/DC is not used, this pin is supplied internally from the main LDO.

(5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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English Data Sheet: SWRS204

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

7.7 Pin Diagram –RSM Package

DIO_8 25

DIO_9 26

16 DIO_4

15 DIO_3

VDDS 27

14 JTAG_TCKC

13 JTAG_TMSC

12 DCOUPL

11 VDDS2

VDDR 28

VSS 29

X24M_N 30

X24M_P 31

VDDR_RF 32

10 DIO_2

9

DIO_1

图7-4. RSM Package 32-Pin VQFN (4-mm × 4-mm) Pinout, 0.4-mm Pitch

I/O pins marked in 图7-4 in bold have high-drive capabilities; they are as follows:

• Pin 8, DIO_0

• Pin 9, DIO_1

• Pin 10, DIO_2

• Pin 13, JTAG_TMSC

• Pin 15, DIO_3

• Pin 16, DIO_4

I/O pins marked in 图7-4 in italics have analog capabilities; they are as follows:

• Pin 22, DIO_5

• Pin 23, DIO_6

• Pin 24, DIO_7

• Pin 25, DIO_8

• Pin 26, DIO_9

English Data Sheet: SWRS204

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7.8 Signal Descriptions –RSM Package

表7-4. Signal Descriptions –RSM Package

NAME

NO.

TYPE

DESCRIPTION

Output from internal DC/DC.⁽¹⁾. Tie to ground for external regulator mode

(1.7-V to 1.95-V operation)

DCDC_SW

18

Power

DCOUPL

DIO_0

12

8

Power

1.27-V regulated digital-supply decoupling capacitor⁽²⁾

GPIO, Sensor Controller, high-drive capability

GPIO, High-drive capability, JTAG_TDO

Digital I/O

DIO_1

9

DIO_2

10

15

16

22

23

24

25

26

13

14

21

DIO_3

DIO_4

GPIO, High-drive capability, JTAG_TDI

DIO_5

Digital/Analog I/O GPIO, Sensor Controller, Analog

DIO_6

DIO_7

DIO_8

DIO_9

JTAG_TMSC

JTAG_TCKC

RESET_N

Digital I/O

JTAG TMSC

JTAG TCKC⁽³⁾

Digital Input

Reset, active-low. No internal pullup.

Negative RF input signal to LNA during RX

Negative RF output signal to PA during TX

RF_N

RF_P

2

1

RF I/O

Positive RF input signal to LNA during RX

Positive RF output signal to PA during TX

RX_TX

VDDR

4

RF I/O

Power

Optional bias pin for the RF LNA

28

32

27

11

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC.^{(2) (4)}

1.7-V to 1.95-V supply, typically connect to output of internal DC/DC^{(2) (5)}

1.8-V to 3.8-V main chip supply⁽¹⁾

VDDR_RF

VDDS

VDDS2

1.8-V to 3.8-V GPIO supply⁽¹⁾

1.8-V to 3.8-V DC/DC supply. Tie to ground for external regulator mode

(1.7-V to 1.95-V operation).

VDDS_DCDC

VSS

19

Power

3, 7, 17, 20,

29

Ground

X32K_Q1

X32K_Q2

X24M_N

X24M_P

EGP

5

6

Analog I/O

Power

32-kHz crystal oscillator pin 1

32-kHz crystal oscillator pin 2

24-MHz crystal oscillator pin 1

24-MHz crystal oscillator pin 2

Ground –Exposed Ground Pad

30

31

(1) See technical reference manual (listed in 节11.3) for more details.

(2) Do not supply external circuitry from this pin.

(3) For design consideration regarding noise immunity for this pin, see the JTAG Interface chapter in the CC13x0, CC26x0 SimpleLink™

Wireless MCU Technical Reference Manual

(4) If internal DC/DC is not used, this pin is supplied internally from the main LDO.

(5) If internal DC/DC is not used, this pin must be connected to VDDR for supply from the main LDO.

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Product Folder Links: CC2640R2F

English Data Sheet: SWRS204

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)^{(1) (2)}

MIN

MAX UNIT

VDDR supplied by internal DC/DC regulator or

internal GLDO. VDDS_DCDC connected to VDDS

on PCB

Supply voltage (VDDS, VDDS2,

and VDDS3)

4.1

V

–0.3

Supply voltage (VDDS⁽³⁾and

VDDR)

External regulator mode (VDDS and VDDR pins

connected on PCB)

2.25

–0.3

Voltage on any digital pin^{(4) (5)}

VDDSx + 0.3, max 4.1

V

–0.3

Voltage on crystal oscillator pins, X32K_Q1, X32K_Q2, X24M_N and X24M_P

Voltage scaling enabled

VDDR + 0.3, max 2.25

VDDS

1.49

Voltage on ADC input (V_in)

Voltage scaling disabled, internal reference

Voltage scaling disabled, VDDS as reference

V

VDDS / 2.9

5

Input RF level

T_stg

dBm

°C

Storage temperature

150

–40

(1) All voltage values are with respect to ground, unless otherwise noted.

(2) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(3) In external regulator mode, VDDS2 and VDDS3 must be at the same potential as VDDS.

(4) Including analog-capable DIO.

(5) Each pin is referenced to a specific VDDSx (VDDS, VDDS2 or VDDS3). For a pin-to-VDDS mapping table, see 表9-3.

8.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per ANSI/ESDA/

JEDEC JS001⁽¹⁾

All pins

±2500

Electrostatic discharge

V_ESD

...

V

RF pins

±500

Charged device model (CDM), per JESD22-

C101⁽²⁾

RSM, RHB, and RGZ packages

Non-RF pins

Human body model (HBM), per ANSI/ESDA/

JEDEC JS001⁽¹⁾

All pins

±1500

Electrostatic discharge

V_ESD

...

V

RF pins

±500

Charged device model (CDM), per JESD22-

C101⁽²⁾

YFV package

Non-RF pins

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

English Data Sheet: SWRS204

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8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX UNIT

Ambient temperature

Operating supply

85

°C

–40

voltage (VDDS and

VDDR), external

regulator mode

For operation in 1.8-V systems

(VDDS and VDDR pins connected on PCB, internal DC/DC cannot be used)

1.7

1.95

V

Operating supply

voltage VDDS

1.8

3.8

V

Operating supply

voltages VDDS2 and

VDDS3

For operation in battery-powered and 3.3-V systems

(internal DC/DC can be used to minimize power consumption)

VDDS < 2.7 V

Operating supply

voltages VDDS2 and

VDDS3

1.9

3.8

V

VDDS ≥2.7 V

8.4 Power Consumption Summary

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V with internal DC/DC converter, unless

otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

100

150

1.1

MAX

UNIT

Reset. RESET_N pin asserted or VDDS below

Power-on-Reset threshold

nA

Shutdown. No clocks running, no retention

Standby. With RTC, CPU, RAM and (partial)

register retention. RCOSC_LF

Standby. With RTC, CPU, RAM and (partial)

register retention. XOSC_LF

1.3

2.8

Standby. With Cache, RTC, CPU, RAM and

(partial) register retention. RCOSC_LF

µA

I_core

Core current consumption

Standby. With Cache, RTC, CPU, RAM and

(partial) register retention. XOSC_LF

3.0

Idle. Supply Systems and RAM powered.

Active. Core running CoreMark

650

1.45 mA +

31 µA/MHz

Radio RX ⁽¹⁾

5.9

6.1

9.1

Radio RX⁽²⁾

mA

Radio TX, 0-dBm output power⁽¹⁾

Radio TX, 5-dBm output power⁽²⁾

Peripheral Current Consumption (Adds to core current I_corefor each peripheral unit activated) ⁽³⁾

Peripheral power domain

Serial power domain

Delta current with domain enabled

50

13

µA

Delta current with power domain enabled, clock

enabled, RF core idle

RF Core

237

µA

µDMA

Timers

I²C

Delta current with clock enabled, module idle

130

113

12

µA

I_peri

I2S

36

SSI

93

UART

164

(1) Single-ended RF mode is optimized for size and power consumption. Measured on CC2650EM-4XS.

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(2) Differential RF mode is optimized for RF performance. Measured on CC2650EM-5XD.

(3) I_periis not supported in Standby or Shutdown.

8.5 General Characteristics

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

FLASH MEMORY

Supported flash erase cycles before

failure⁽¹⁾

100

k Cycles

Maximum number of write operations

per row before erase⁽²⁾

write

operations

83

Years at

105°C

Flash retention

105°C

11.4

Flash page/sector erase current

Flash page/sector size

Flash write current

Average delta current

12.6

4

mA

KB

mA

ms

µs

Average delta current, 4 bytes at a time

4 bytes at a time

8.15

8

Flash page/sector erase time⁽³⁾

Flash write time⁽³⁾

8

(1) Aborting flash during erase or program modes is not a safe operation.

(2) Each row is 2048 bits (or 256 Bytes) wide.

(3) This number is dependent on Flash aging and will increase over time and erase cycles.

8.6 125-kbps Coded (Bluetooth 5) –RX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver sensitivity

dBm

–103

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver saturation

>5

dBm

310 kHz

260 ppm

140 ppm

dB

Difference between the incoming carrier frequency

and the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection ⁽¹⁾

Selectivity, ±1 MHz ⁽¹⁾

–260

–140

Difference between incoming data rate and the

internally generated data rate (37-byte packets)

Difference between incoming data rate and the

internally generated data rate (255-byte packets)

Wanted signal at –79 dBm, modulated interferer in

–3

9 / 5⁽²⁾

channel, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

dB

±1 MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

±2 MHz, Image frequency is at –2 MHz, BER = 10^–3

Selectivity, ±2 MHz ⁽¹⁾

Selectivity, ±3 MHz ⁽¹⁾

Selectivity, ±4 MHz ⁽¹⁾

Selectivity, ±6 MHz ⁽¹⁾

43 / 32⁽²⁾

47 / 42⁽²⁾

46 / 47⁽²⁾

49 / 46⁽²⁾

50 / 47⁽²⁾

32

dB

Wanted signal at –79 dBm, modulated interferer at

±3 MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

±4 MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

±6 MHz, BER = 10^–3

Alternate channel rejection, ±7 Wanted signal at –79 dBm, modulated interferer at

MHz⁽¹⁾

≥±7 MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

Selectivity, image frequency⁽¹⁾

image frequency, BER = 10^–3

English Data Sheet: SWRS204

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Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Note that Image frequency + 1 MHz is the Co-channel

–1 MHz. Wanted signal at –79 dBm, modulated

interferer at ±1 MHz from image frequency, BER =

10^–3

Selectivity, image frequency

±1 MHz⁽¹⁾

5 / 32⁽²⁾

dB

Blocker rejection, ±8 MHz and

above⁽¹⁾

Wanted signal at –79 dBm, modulated interferer at

>46

dB

±8 MHz and above, BER = 10^–3

Out-of-band blocking ⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

dBm

–40

–19

–22

Wanted signal at 2402 MHz, –76 dBm. Two

interferers at 2405 and 2408 MHz respectively, at the

given power level

Intermodulation

dBm

–42

(1) Numbers given as I/C dB.

(2) X / Y, where X is +N MHz and Y is –N MHz.

(3) Excluding one exception at F_wanted/ 2, per Bluetooth Specification.

8.7 125-kbps Coded (Bluetooth 5) –TX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode, delivered to a single-ended 50-Ωload

through a balun

Output power, highest setting

5

dBm

Measured on CC2650EM-4XS, delivered to a single-ended

50-Ωload

Output power, highest setting

Output power, lowest setting

2

dBm

Delivered to a single-ended 50-Ωload through a balun

f < 1 GHz, outside restricted bands

f < 1 GHz, restricted bands ETSI

–21

–43

–65

–71

–46

Spurious emission conducted

measurement⁽¹⁾

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

8.8 500-kbps Coded (Bluetooth 5) –RX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver sensitivity

dBm

–101

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver saturation

>5

dBm

240 kHz

500 ppm

330 ppm

dB

Difference between the incoming carrier frequency

and the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection ⁽¹⁾

–240

–500

–310

Difference between incoming data rate and the

internally generated data rate (37-byte packets)

Difference between incoming data rate and the

internally generated data rate (255-byte packets)

Wanted signal at –72 dBm, modulated interferer in

–5

channel, BER = 10^–3

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Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Wanted signal at –72 dBm, modulated interferer at

Selectivity, ±1 MHz ⁽¹⁾

9 / 5⁽²⁾

dB

±1 MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at

±2 MHz, Image frequency is at –2 MHz, BER = 10^–3

Selectivity, ±2 MHz ⁽¹⁾

Selectivity, ±3 MHz ⁽¹⁾

Selectivity, ±4 MHz ⁽¹⁾

Selectivity, ±6 MHz ⁽¹⁾

41 / 31⁽²⁾

44 / 41⁽²⁾

44 / 44⁽²⁾

31

dB

Wanted signal at –72 dBm, modulated interferer at

±3 MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at

±4 MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at

±6 MHz, BER = 10^–3

Alternate channel rejection,

±7 MHz⁽¹⁾

Wanted signal at –72 dBm, modulated interferer at

≥±7 MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at

Selectivity, image frequency⁽¹⁾

image frequency, BER = 10^–3

Note that Image frequency + 1 MHz is the Co-channel

–1 MHz. Wanted signal at –72 dBm, modulated

interferer at ±1 MHz from image frequency, BER =

10^–3

Selectivity, image frequency

±1 MHz⁽¹⁾

5 / 41⁽²⁾

dB

Blocker rejection, ±8 MHz and

above⁽¹⁾

Wanted signal at –72 dBm, modulated interferer at

44

±8 MHz and above, BER = 10^–3

Out-of-band blocking ⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

dBm

–35

–19

Wanted signal at 2402 MHz, –69 dBm. Two

interferers at 2405 and 2408 MHz respectively, at the

given power level

Intermodulation

dBm

–37

(1) Numbers given as I/C dB.

(2) X / Y, where X is +N MHz and Y is –N MHz.

(3) Excluding one exception at F_wanted/ 2, per Bluetooth Specification.

8.9 500-kbps Coded (Bluetooth 5) –TX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode, delivered to a single-ended 50-Ωload

through a balun

Output power, highest setting

5

dBm

Measured on CC2650EM-4XS, delivered to a single-ended

50-Ωload

Output power, highest setting

Output power, lowest setting

2

dBm

Delivered to a single-ended 50-Ωload through a balun

f < 1 GHz, outside restricted bands

f < 1 GHz, restricted bands ETSI

–21

–43

–65

–71

–46

Spurious emission conducted

measurement⁽¹⁾

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

English Data Sheet: SWRS204

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8.10 1-Mbps GFSK (Bluetooth low energy) –RX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver sensitivity

dBm

–97

Single-ended mode. Measured on CC2650EM-4XS,

at the SMA connector, BER = 10^–3

Receiver sensitivity

dBm

–96

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver saturation

4

0

Single-ended mode. Measured on CC2650EM-4XS,

at the SMA connector, BER = 10^–3

Receiver saturation

dBm

Difference between the incoming carrier frequency

and the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

Selectivity, ±1 MHz⁽¹⁾

Selectivity, ±2 MHz⁽¹⁾

Selectivity, ±3 MHz⁽¹⁾

Selectivity, ±4 MHz⁽¹⁾

350 kHz

750 ppm

dB

–350

–750

Difference between incoming data rate and the

internally generated data rate

Wanted signal at –67 dBm, modulated interferer in

–6

7 / 3⁽²⁾

34 / 25⁽²⁾

38 / 26⁽²⁾

42 / 29⁽²⁾

32

channel, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

dB

±1 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

dB

±2 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

dB

±3 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

dB

±4 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

≥±5 MHz, BER = 10^–3

Selectivity, ±5 MHz or more⁽¹⁾

Selectivity, image frequency⁽¹⁾

dB

Wanted signal at –67 dBm, modulated interferer at

25

image frequency, BER = 10^–3

Selectivity, image frequency

±1 MHz⁽¹⁾

Wanted signal at –67 dBm, modulated interferer at

3 / 26⁽²⁾

±1 MHz from image frequency, BER = 10^–3

Out-of-band blocking ⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

3000 MHz to 12.75 GHz

dBm

–20

–5

–8

–10

Wanted signal at 2402 MHz, –64 dBm. Two

interferers at 2405 and 2408 MHz respectively, at the

given power level

Intermodulation

dBm

–34

–71

Conducted measurement in a 50-Ωsingle-ended

load. Suitable for systems targeting compliance with

EN 300 328, EN 300 440 class 2, FCC CFR47, Part

15 and ARIB STD-T-66

Spurious emissions,

30 to 1000 MHz

Conducted measurement in a 50-Ωsingle-ended

load. Suitable for systems targeting compliance with

EN 300 328, EN 300 440 class 2, FCC CFR47, Part

15 and ARIB STD-T-66

Spurious emissions,

1 to 12.75 GHz

dBm

–62

RSSI dynamic range

RSSI accuracy

70

±4

dB

(1) Numbers given as I/C dB.

(2) X / Y, where X is +N MHz and Y is –N MHz.

(3) Excluding one exception at F_wanted/ 2, per Bluetooth Specification.

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8.11 1-Mbps GFSK (Bluetooth low energy) –TX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode, delivered to a single-ended 50-Ωload

through a balun

Output power, highest setting

5

dBm

Measured on CC2650EM-4XS, delivered to a single-ended

50-Ωload

Output power, highest setting

Output power, lowest setting

2

dBm

Delivered to a single-ended 50-Ωload through a balun

f < 1 GHz, outside restricted bands

f < 1 GHz, restricted bands ETSI

–21

–43

–65

–71

–46

Spurious emission conducted

measurement⁽¹⁾

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

8.12 2-Mbps GFSK (Bluetooth 5) –RX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver sensitivity

dBm

–91

Differential mode. Measured at the CC2650EM-5XD

SMA connector, BER = 10^–3

Receiver saturation

3

dBm

500 kHz

1000 ppm

dB

Difference between the incoming carrier frequency and

the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

–300

Difference between incoming data rate and the

internally generated data rate

–1000

Wanted signal at –67 dBm, modulated interferer in

–7

8 / 4⁽²⁾

channel, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

±2 MHz, Image frequency is at –2 MHz BER = 10^–3

Selectivity, ±2 MHz⁽¹⁾

Selectivity, ±4 MHz⁽¹⁾

Selectivity, ±6 MHz⁽¹⁾

dB

Wanted signal at –67 dBm, modulated interferer at

31 / 26⁽²⁾

37 / 38⁽²⁾

37 / 36⁽²⁾

4

±4 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

±6 MHz, BER = 10^–3

Alternate channel rejection,

±7 MHz⁽¹⁾

Wanted signal at –67 dBm, modulated interferer at

≥±7 MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

Selectivity, image frequency⁽¹⁾

image frequency, BER = 10^–3

Note that Image frequency + 2 MHz is the Co-channel.

Wanted signal at –67 dBm, modulated interferer at

±2 MHz from image frequency, BER = 10^–3

Selectivity, image frequency

±2 MHz⁽¹⁾

–7 / 26⁽²⁾

dB

Out-of-band blocking⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

3000 MHz to 12.75 GHz

dBm

–33

–15

–12

–10

Wanted signal at 2402 MHz, –64 dBm. Two interferers

at 2408 and 2414 MHz respectively, at the given power

level

Intermodulation

dBm

–45

(1) Numbers given as I/C dB.

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(2) X / Y, where X is +N MHz and Y is –N MHz.

(3) Excluding one exception at F_wanted/ 2, per Bluetooth Specification.

8.13 2-Mbps GFSK (Bluetooth 5) –TX

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, f_RF= 2440 MHz, unless otherwise

noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Differential mode, delivered to a single-ended 50-Ωload

through a balun

Output power, highest setting

5

dBm

Measured on CC2650EM-4XS, delivered to a single-ended

50-Ωload

Output power, highest setting

Output power, lowest setting

2

dBm

Delivered to a single-ended 50-Ωload through a balun

f < 1 GHz, outside restricted bands

f < 1 GHz, restricted bands ETSI

–21

–43

–65

–71

–46

Spurious emission conducted

measurement⁽¹⁾

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

(1) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan).

8.14 24-MHz Crystal Oscillator (XOSC_HF)

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.⁽¹⁾

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

60

UNIT

Ω

ESR Equivalent series resistance⁽²⁾

20

6 pF < C_L≤9 pF

80

5 pF < C_L≤6 pF

Ω

Relates to load capacitance

(C_Lin Farads)

L_MMotional inductance⁽²⁾

< 1.6 × 10^–24/ C_L

H

2

C_LCrystal load capacitance^{(2) (3)}

Crystal frequency^{(2) (4)}

5

9

pF

MHz

ppm

µs

24

Crystal frequency tolerance^{(2) (5)}

Start-up time^{(4) (6)}

40

–40

150

(1) Probing or otherwise stopping the crystal while the DC/DC converter is enabled may cause permanent damage to the device.

(2) The crystal manufacturer's specification must satisfy this requirement

(3) Adjustable load capacitance is integrated into the device. External load capacitors are not required

(4) Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V

(5) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per

specification.

(6) Kick-started based on a temperature and aging compensated RCOSC_HF using precharge injection.

8.15 32.768-kHz Crystal Oscillator (XOSC_LF)

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

Crystal frequency⁽¹⁾

TEST CONDITIONS

MIN

–500

6

TYP

MAX

UNIT

32.768

kHz

Crystal frequency tolerance, Bluetooth low-

energy applications^{(1) (2)}

500

ppm

ESR Equivalent series resistance⁽¹⁾

C_LCrystal load capacitance⁽¹⁾

30

100

12

kΩ

pF

(1) The crystal manufacturer's specification must satisfy this requirement

(2) Includes initial tolerance of the crystal, drift over temperature, ageing and frequency pulling due to incorrect load capacitance. As per

Bluetooth specification.

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8.16 48-MHz RC Oscillator (RCOSC_HF)

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Frequency

48

MHz

Uncalibrated frequency accuracy

Calibrated frequency accuracy⁽¹⁾

Start-up time

±1%

±0.25%

5

µs

(1) Accuracy relative to the calibration source (XOSC_HF).

8.17 32-kHz RC Oscillator (RCOSC_LF)

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

Calibrated frequency⁽¹⁾

Temperature coefficient

TEST CONDITIONS

MIN

TYP

32.8

80

MAX

UNIT

kHz

ppm/°C

(1) The frequency accuracy of the Real Time Clock (RTC) is not directly dependent on the frequency accuracy of the 32-kHz RC

Oscillator. The RTC can be calibrated to an accuracy within ±500 ppm of 32.768 kHz by measuring the frequency error of RCOSC_LF

relative to XOSC_HF and compensating the RTC tick speed. The procedure is explained in Running Bluetooth® Low Energy on

CC2640 Without 32 kHz Crystal.

8.18 ADC Characteristics

T_c= 25°C, V_DDS= 3.0 V and voltage scaling enabled, unless otherwise noted.⁽¹⁾

PARAMETER

Input voltage range

Resolution

TEST CONDITIONS

MIN

TYP

MAX UNIT

0

VDDS

V

12

Bits

ksps

LSB

Sample rate

200

Offset

Internal 4.3-V equivalent reference⁽²⁾

2

2.4

Gain error

DNL⁽³⁾Differential nonlinearity

>–1

±3

INL⁽⁴⁾

Integral nonlinearity

Internal 4.3-V equivalent reference⁽²⁾, 200 ksps,

9.6-kHz input tone

9.8

10

ENOB Effective number of bits

VDDS as reference, 200 ksps, 9.6-kHz input tone

Bits

dB

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

11.1

Internal 4.3-V equivalent reference⁽²⁾, 200 ksps,

9.6-kHz input tone

–65

–69

–71

THD

Total harmonic distortion VDDS as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

Internal 4.3-V equivalent reference⁽²⁾, 200 ksps,

9.6-kHz input tone

60

63

69

Signal-to-noise

and

Distortion ratio

SINAD,

SNDR

VDDS as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

Internal 4.3-V equivalent reference⁽²⁾, 200 ksps,

9.6-kHz input tone

67

68

73

Spurious-free dynamic

range

SFDR

VDDS as reference, 200 ksps, 9.6-kHz input tone

Internal 1.44-V reference, voltage scaling disabled,

32 samples average, 200 ksps, 300-Hz input tone

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T_c= 25°C, V_DDS= 3.0 V and voltage scaling enabled, unless otherwise noted.⁽¹⁾

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

clock-

cycles

Conversion time

Serial conversion, time-to-output, 24-MHz clock

50

Current consumption

Internal 4.3-V equivalent reference⁽²⁾

VDDS as reference

0.66

0.75

mA

Equivalent fixed internal reference (input voltage scaling

enabled). For best accuracy, the ADC conversion should

be initiated through the TIRTOS API in order to include the

gain/offset compensation factors stored in FCFG1.

Reference voltage

4.3^{(2) (5)}

V

Fixed internal reference (input voltage scaling disabled).

For best accuracy, the ADC conversion should be initiated

through the TIRTOS API in order to include the gain/offset

compensation factors stored in FCFG1. This value is

derived from the scaled value (4.3 V) as follows:

Vref = 4.3 V × 1408 / 4095

Reference voltage

1.48

V

VDDS as reference (Also known as RELATIVE) (input

voltage scaling enabled)

Reference voltage

VDDS

V

VDDS as reference (Also known as RELATIVE) (input

voltage scaling disabled)

VDDS /

2.82⁽⁵⁾

200 ksps, voltage scaling enabled. Capacitive input, Input

impedance depends on sampling frequency and sampling

time

Input impedance

>1

MΩ

(1) Using IEEE Std 1241^™-2010 for terminology and test methods.

(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V.

(3) No missing codes. Positive DNL typically varies from +0.3 to +3.5, depending on device (see 图8-21).

(4) For a typical example, see 图8-22.

(5) Applied voltage must be within absolute maximum ratings (节8.1) at all times.

8.19 Temperature Sensor

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

°C

Resolution

Range

4

85

°C

–40

Accuracy

±5

°C

Supply voltage coefficient⁽¹⁾

3.2

°C/V

(1) Automatically compensated when using supplied driver libraries.

8.20 Battery Monitor

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

mV

V

Resolution

Range

50

1.8

3.8

Accuracy

13

mV

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8.21 Continuous Time Comparator

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

0

TYP

MAX

VDDS

UNIT

V

Input voltage range

External reference voltage

0

V

Internal reference voltage

Offset

DCOUPL as reference

1.27

3

V

mV

µs

Hysteresis

<2

Decision time

0.72

8.6

Step from –10 mV to 10 mV

Current consumption when enabled⁽¹⁾

µA

(1) Additionally, the bias module must be enabled when running in standby mode.

8.22 Low-Power Clocked Comparator

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Input voltage range

0

VDDS

V

Clock frequency

32

kHz

Internal reference voltage, VDDS / 2

Internal reference voltage, VDDS / 3

Internal reference voltage, VDDS / 4

Internal reference voltage, DCOUPL / 1

Internal reference voltage, DCOUPL / 2

Internal reference voltage, DCOUPL / 3

Internal reference voltage, DCOUPL / 4

Offset

V

1.49–1.51

1.01–1.03

0.78–0.79

1.25–1.28

0.63–0.65

0.42–0.44

0.33–0.34

<5

V

mV

Hysteresis

<5

mV

Decision time

<1

clock-cycle

nA

Step from –50 mV to 50 mV

Current consumption when enabled

362

8.23 Programmable Current Source

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

µA

Current source programmable output range

Resolution

0.25–20

0.25

µA

Including current source at maximum

programmable output

Current consumption⁽¹⁾

23

µA

(1) Additionally, the bias module must be enabled when running in standby mode.

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8.24 Synchronous Serial Interface (SSI)

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

system

clocks

S1⁽¹⁾t_{clk_per}(SSIClk period)

Device operating as SLAVE

12

65024

S2⁽¹⁾t_{clk_high}(SSIClk high time)

S3⁽¹⁾t_{clk_low}(SSIClk low time)

Device operating as SLAVE

0.5

t_{clk_per}

One-way communication to SLAVE -

Device operating as MASTER

system

clocks

S1 (TX only)⁽¹⁾t_{clk_per}(SSIClk period)

S1 (TX and RX)⁽¹⁾t_{clk_per}(SSIClk period)

4

8

65024

Normal duplex operation -

Device operating as MASTER

system

clocks

S2⁽¹⁾t_{clk_high}(SSIClk high time)

S3⁽¹⁾t_{clk_low}(SSIClk low time)

Device operating as MASTER

0.5

t_{clk_per}

(1) Refer to SSI timing diagrams 图8-1, 图8-2, and 图8-3.

S1

S2

SSIClk

S3

SSIFss

SSITx

MSB

LSB

SSIRx

4 to 16 bits

图8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement

S2

S1

SSIClk

SSIFss

SSITx

SSIRx

S3

MSB

LSB

8-bit control

0

MSB

LSB

4 to 16 bits output data

图8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer

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S1

S2

SSIClk

(SPO = 0)

S3

SSIClk

(SPO = 1)

SSITx

(Master)

MSB

LSB

SSIRx

(Slave)

MSB

LSB

SSIFss

图8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1

8.25 DC Characteristics

PARAMETER

TEST CONDITIONS

T_A= 25°C, V_DDS= 1.8 V

MIN

1.32

TYP

MAX UNIT

GPIO VOH at 8-mA load

IOCURR = 2, high-drive GPIOs only

IOCURR = 1

1.54

0.26

1.58

0.21

71.7

21.1

V

GPIO VOL at 8-mA load

GPIO VOH at 4-mA load

GPIO VOL at 4-mA load

GPIO pullup current

0.32

V

IOCURR = 1

V

Input mode, pullup enabled, Vpad = 0 V

Input mode, pulldown enabled, Vpad = VDDS

µA

GPIO pulldown current

GPIO high/low input transition,

no hysteresis

IH = 0, transition between reading 0 and reading 1

IH = 1, transition voltage for input read as 0 →1

IH = 1, transition voltage for input read as 1 →0

0.88

1.07

V

GPIO low-to-high input transition,

with hysteresis

GPIO high-to-low input transition,

with hysteresis

0.74

0.33

V

GPIO input hysteresis

IH = 1, difference between 0 →1 and 1 →0 points

T_A= 25°C, V_DDS= 3.0 V

GPIO VOH at 8-mA load

GPIO VOL at 8-mA load

GPIO VOH at 4-mA load

IOCURR = 2, high-drive GPIOs only

IOCURR = 1

2.68

0.33

2.72

V

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PARAMETER

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

TEST CONDITIONS

MIN

TYP

MAX UNIT

GPIO VOL at 4-mA load

IOCURR = 1

0.28

V

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MAX UNIT

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

PARAMETER

TEST CONDITIONS

MIN

TYP

T_A= 25°C, V_DDS= 3.8 V

GPIO pullup current

Input mode, pullup enabled, Vpad = 0 V

277

113

µA

GPIO pulldown current

Input mode, pulldown enabled, Vpad = VDDS

GPIO high/low input transition,

no hysteresis

IH = 0, transition between reading 0 and reading 1

IH = 1, transition voltage for input read as 0 →1

IH = 1, transition voltage for input read as 1 →0

1.67

1.94

V

GPIO low-to-high input transition,

with hysteresis

GPIO high-to-low input transition,

with hysteresis

1.54

0.4

V

GPIO input hysteresis

IH = 1, difference between 0 →1 and 1 →0 points

T_A= 25°C

Lowest GPIO input voltage reliably interpreted as a

«High»

VIH

VIL

0.8 VDDS⁽¹⁾

VDDS⁽¹⁾

Highest GPIO input voltage reliably interpreted as a

«Low»

0.2

(1) Each GPIO is referenced to a specific VDDS pin. See the technical reference manual listed in 节11.3 for more details.

8.26 Thermal Resistance Characteristics

NAME

Rθ_JA

DESCRIPTION

RSM (°C/W)^{(1) (2)}RHB (°C/W)^{(1) (2)}RGZ (°C/W)^{(1) (2)}YFV (°C/W)^{(1) (2)}

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

36.9

30.3

7.6

32.8

24.0

6.8

29.6

15.7

6.2

76.2

0.3

Rθ_JC(top)

Rθ_JB

16.3

1.8

Psi_JT

0.4

0.3

Psi_JB

7.4

6.8

6.2

16.3

N/A

2.1

1.9

Rθ_JC(bot)

(1) °C/W = degrees Celsius per watt.

(2) These values are based on a JEDEC-defined 2S2P system (with the exception of the Theta JC [Rθ_JC] value, which is based on a

JEDEC-defined 1S0P system) and will change based on environment as well as application. For more information, see these EIA/

JEDEC standards:

•

JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions - Natural Convection (Still Air).

JESD51-3, Low Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

JESD51-7, High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages.

JESD51-9, Test Boards for Area Array Surface Mount Package Thermal Measurements.

For RSM, RHB, and RGZ, power dissipation of 2 W and an ambient temperature of 70°C is assumed. For YFV, power dissipation of

1.3 W and ambient temperature of 25°C is assumed.

8.27 Timing Requirements

MIN

0

NOM

MAX UNIT

100 mV/µs

20 mV/µs

Rising supply-voltage slew rate

Falling supply-voltage slew rate

0

Falling supply-voltage slew rate, with low-power flash settings⁽¹⁾

3

mV/µs

No limitation for negative

temperature gradient, or

outside standby mode

Positive temperature gradient in standby⁽²⁾

5

°C/s

CONTROL INPUT AC CHARACTERISTICS⁽³⁾

RESET_N low duration

1

µs

(1) For smaller coin cell batteries, with high worst-case end-of-life equivalent source resistance, a 22-µF VDDS input capacitor (see 图

10-1) must be used to ensure compliance with this slew rate.

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(2) Applications using RCOSC_LF as sleep timer must also consider the drift in frequency caused by a change in temperature (see 节

8.17).

(3) T_A= –40°C to +85°C, V_DDS= 1.7 V to 3.8 V, unless otherwise noted.

8.28 Switching Characteristics

Measured on the TI CC2650EM-5XD reference design with T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

WAKEUP AND TIMING

14

151

µs

Idle →Active

Standby →Active

Shutdown →Active

1015

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8.29 Typical Characteristics

-94

-95

-96

-95

-96

-97

-98

-97

-98

-99

-100

BLE 5XD Sensitivity

BLE 4XS Sensitivity

Sensitivity 4XS

Sensitivity 5XD

-101

-99

-40 -30 -20 -10

1.8

2.3

2.8

VDDS (V)

3.3

3.8

0

10 20 30 40 50 60 70 80

Temperature (èC)

D004

图8-5. BLE Sensitivity vs Supply Voltage (VDDS)

图8-4. BLE Sensitivity vs Temperature

6

-95

Sensitivity 5XD

Sensitivity 4XS

-95.5

-96

5

4

-96.5

-97

4XS 2-dBm Setting

5XD 5-dBm Setting

3

-97.5

-98

2

1

0

-98.5

-99

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80

Temperature (èC)

2400 2410 2420 2430 2440 2450 2460 2470 2480

Frequency (MHz)

D020

图8-7. TX Output Power vs Temperature

图8-6. BLE Sensitivity vs Channel Frequency

6

8

5-dBm setting (5XD)

0-dBm setting (4XS)

7

6

5

4

3

2

5

4

3

2

1

5XD 5-dBm Setting

4XS 2-dBm Setting

0

-1

0

2400 2410 2420 2430 2440 2450 2460 2470 2480

Frequency (MHz)

1.8

2.3

2.8

VDDS (V)

3.3

3.8

D021

D003

图8-9. TX Output Power vs Channel Frequency

图8-8. TX Output Power vs Supply Voltage (VDDS)

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16

15

14

13

12

11

10

9

10.5

10

9.5

9

4XS

5XD

4XS 0-dBm Setting

4XS 2-dBm Setting

5XD 5-dBm Setting

8.5

8

7.5

7

6.5

6

8

7

5.5

5

6

4.5

4

5

4

1.8

2.05

2.3

2.55 2.8 3.05

Voltage (V)

3.3

3.55

3.8

2

2.2 2.4 2.6 2.8

VDDS (V)

3

3.2 3.4 3.6 3.8

D016

D015

图8-11. RX Mode Current vs Supply Voltage

图8-10. TX Current Consumption vs Supply

(VDDS)

Voltage (VDDS)

7

12

10

8

5XD RX Current

4XS RX Current

6.8

6.6

6.4

6.2

6

4

2

5.8

5.6

5XD 5-dBm Setting

4XS 2-dBm Setting

0

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80

Temperature (èC)

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80

Temperature (èC)

D001

D002

图8-12. RX Mode Current Consumption vs

图8-13. TX Mode Current Consumption vs

Temperature

3.1

5

Active Mode Current

4.5

4

3.05

3

3.5

3

2.95

2.9

2.5

2.85

2

1.8

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80

Temperature (èC)

2.3

2.8

VDDS (V)

3.3

3.8

D006

D007

图8-14. Active Mode (MCU Running, No

Peripherals) Current Consumption vs Temperature

图8-15. Active Mode (MCU Running, No

Peripherals) Current Consumption vs Supply

Voltage (VDDS)

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11.4

1006.4

1006.2

1006

Fs= 200 kHz, No Averaging

Fs= 200 kHz, 32 samples averaging

11.2

11

10.8

10.6

10.4

10.2

10

1005.8

1005.6

1005.4

1005.2

1005

9.8

9.6

1004.8

9.4

1.8

2.3

2.8

VDDS (V)

3.3

3.8

200300 500 1000 2000

5000 10000 20000

100000

D012

Input Frequency (Hz)

D009

图8-17. SoC ADC Output vs Supply Voltage (Fixed

图8-16. SoC ADC Effective Number of Bits vs Input

Frequency (Internal Reference, Scaling enabled)

Input, Internal Reference)

1007.5

1007

10.5

ENOB Internal Reference (No Averaging)

ENOB Internal Reference (32 Samples Averaging)

10.4

10.3

10.2

10.1

10

1006.5

1006

1005.5

1005

9.9

9.8

9.7

1004.5

9.6

1k

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80

Temperature (èC)

10k

Sampling Frequency (Hz)

100k 200k

D013

D009A

图8-18. SoC ADC Output vs Temperature (Fixed

图8-19. SoC ADC ENOB vs Sampling Frequency

Input, Internal Reference)

(Scaling enabled, input frequency = FS / 10)

图8-20. Standby Mode Supply Current vs Temperature

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3.5

3

2.5

2

1.5

1

0.5

0

-0.5

-1

-1.5

D010

ADC Code

图8-21. SoC ADC DNL vs ADC Code (Internal Reference)

3

2

1

0

-1

-2

-3

-4

0

200 400 600 800 1000 1200 1400 1600 1800 2000 2200 2400 2600 2800 3000 3200 3400 3600 3800 4000 4200

ADC Code

D011

图8-22. SoC ADC INL vs ADC Code (Internal Reference)

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9 Detailed Description

9.1 Overview

The core modules of the CC26xx product family are shown in 节9.2.

9.2 Functional Block Diagram

SimpleLink CC26xx Wireless MCU

RF Core

cJTAG

Main CPU:

ROM

ADC

ARM

Cortex-M3

128-KB

Flash

Digital PLL

DSP modem

8-KB

cache

Up to 48 MHz

61 µA/MHz

4-KB

SRAM

ARM

Cortex-M0

20-KB

SRAM

ROM

General Peripherals / Modules

Sensor Controller

2

I C

4× 32-bit Timers

Sensor Controller Engine

UART

I2S

2× SSI (SPI, µW, TI)

Watchdog Timer

12-bit ADC, 200 ks/s

2× Comparator

10 / 14 / 15 / 31 GPIOs

AES

TRNG

2

SPI-I C Digital Sensor IF

Temp. / Batt. Monitor

Constant Current Source

32 ch. µDMA

RTC

Time-to-digital Converter

2-KB SRAM

DC-DC Converter

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9.3 Main CPU

The SimpleLink™ CC2640R2F Wireless MCU contains an Arm^®Cortex^®-M3 (CM3) 32-bit CPU, which runs the

application and the higher layers of the protocol stack.

The CM3 processor provides a high-performance, low-cost platform that meets the system requirements of

minimal memory implementation, and low-power consumption, while delivering outstanding computational

performance and exceptional system response to interrupts.

Arm^®Cortex^®-M3 features include:

• 32-bit Arm^®Cortex^®-M3 architecture optimized for small-footprint embedded applications

• Outstanding processing performance combined with fast interrupt handling

• Arm^®Thumb^®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm^®

core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few

kilobytes of memory for microcontroller-class applications:

– Single-cycle multiply instruction and hardware divide

– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral control

– Unaligned data access, enabling data to be efficiently packed into memory

• Fast code execution permits slower processor clock or increases sleep mode time

• Harvard architecture characterized by separate buses for instruction and data

• Efficient processor core, system, and memories

• Hardware division and fast digital-signal-processing oriented multiply accumulate

• Saturating arithmetic for signal processing

• Deterministic, high-performance interrupt handling for time-critical applications

• Enhanced system debug with extensive breakpoint and trace capabilities

• Serial wire trace reduces the number of pins required for debugging and tracing

• Migration from the ARM7^™processor family for better performance and power efficiency

• Optimized for single-cycle flash memory use

• Ultra-low-power consumption with integrated sleep modes

• 1.25 DMIPS per MHz

9.4 RF Core

The RF Core contains an Arm^®Cortex^®-M0 processor that interfaces the analog RF and base-band circuits,

handles data to and from the system side, and assembles the information bits in a given packet structure. The

RF core offers a high level, command-based API to the main CPU.

The RF core is capable of autonomously handling the time-critical aspects of the radio protocols (Bluetooth^®low

energy) thus offloading the main CPU and leaving more resources for the user application.

The RF core has a dedicated 4-KB SRAM block and runs initially from separate ROM memory. The Arm^®

Cortex^®-M0 processor is not programmable by customers.

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9.5 Sensor Controller

The Sensor Controller contains circuitry that can be selectively enabled in standby mode. The peripherals in this

domain may be controlled by the Sensor Controller Engine, which is a proprietary power-optimized CPU. This

CPU can read and monitor sensors or perform other tasks autonomously, thereby significantly reducing power

consumption and offloading the main CM3 CPU. The GPIOs that can be connected to the Sensor Controller are

listed in 表9-1.

The Sensor Controller is set up using a PC-based configuration tool, called Sensor Controller Studio, and

potential use cases may be (but are not limited to):

• Analog sensors using integrated ADC

• Digital sensors using GPIOs, bit-banged I²C, and SPI

• UART communication for sensor reading or debugging

• Capacitive sensing

• Waveform generation

• Pulse counting

• Keyboard scan

• Quadrature decoder for polling rotation sensors

• Oscillator calibration

备注

Texas Instruments provides application examples for some of these use cases, but not for all of them.

The peripherals in the Sensor Controller include the following:

• The low-power clocked comparator can be used to wake the device from any state in which the comparator is

active. A configurable internal reference can be used in conjunction with the comparator. The output of the

comparator can also be used to trigger an interrupt or the ADC.

• Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital

converter, and a comparator. The continuous time comparator in this block can also be used as a higher-

accuracy alternative to the low-power clocked comparator. The Sensor Controller will take care of baseline

tracking, hysteresis, filtering and other related functions.

• The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be

triggered by many different sources, including timers, I/O pins, software, the analog comparator, and the

RTC.

• The Sensor Controller also includes a SPI–I²C digital interface.

• The analog modules can be connected to up to eight different GPIOs.

The peripherals in the Sensor Controller can also be controlled from the main application processor.

表9-1. GPIOs Connected to the Sensor Controller⁽¹⁾

ANALOG

CAPABLE

7 × 7 RGZ

DIO NUMBER

5 × 5 RHB

DIO NUMBER

2.7 × 2.7 YFV

DIO NUMBER

4 × 4 RSM

DIO NUMBER

Y

N

30

29

28

27

26

25

24

23

7

14

13

12

11

9

13

12

11

9

8

7

6

5

2

1

10

8

10

8

7

4

6

3

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表9-1. GPIOs Connected to the Sensor Controller⁽¹⁾(continued)

ANALOG

CAPABLE

7 × 7 RGZ

DIO NUMBER

5 × 5 RHB

DIO NUMBER

2.7 × 2.7 YFV

DIO NUMBER

4 × 4 RSM

DIO NUMBER

N

5

4

3

2

1

0

2

1

0

2

1

0

(1) Depending on the package size, up to 16 pins can be connected to the Sensor Controller. Up to 8

of these pins can be connected to analog modules.

9.6 Memory

The Flash memory provides nonvolatile storage for code and data. The Flash memory is in-system

programmable.

The SRAM (static RAM) can be used for both storage of data and execution of code and is split into two 4-KB

blocks and two 6-KB blocks. Retention of the RAM contents in standby mode can be enabled or disabled

individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB cache

can be used as a general-purpose RAM.

The ROM provides preprogrammed embedded TI-RTOS kernel, Driverlib, and lower layer protocol stack

software ( Bluetooth low energy Controller). It also contains a bootloader that can be used to reprogram the

device using SPI or UART. For CC2640R2Fxxx devices, the ROM contains Bluetooth 4.2 low energy host- and

controller software libraries, leaving more of the flash memory available for the customer application.

9.7 Debug

The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface.

9.8 Power Management

To minimize power consumption, the CC2640R2F device supports a number of power modes and power

management features (see 表9-2).

表9-2. Power Modes

SOFTWARE CONFIGURABLE POWER MODES

RESET PIN

HELD

MODE

ACTIVE

IDLE

Off

STANDBY

Off

SHUTDOWN

CPU

Active

Off

Flash

On

Available

On

Off

SRAM

On

Available

On

Off

Radio

Available

On

Off

Supply System

On

Duty Cycled

1 µA

Off

Current

1.45 mA + 31 µA/MHz

650 µA

14 µs

Full

0.15 µA

1015 µs

No

0.1 µA

1015 µs

No

Wake-up Time to CPU Active⁽¹⁾

Register Retention

SRAM Retention

151 µs

Partial

Full

–

Full

No

XOSC_HF or

RCOSC_HF

XOSC_HF or

RCOSC_HF

High-Speed Clock

Low-Speed Clock

Off

XOSC_LF or

RCOSC_LF

XOSC_LF or

RCOSC_LF

XOSC_LF or

RCOSC_LF

Peripherals

Available

Off

Sensor Controller

Wake up on RTC

Available

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表9-2. Power Modes (continued)

SOFTWARE CONFIGURABLE POWER MODES

RESET PIN

HELD

MODE

ACTIVE

Available

Active

IDLE

Available

Active

STANDBY

Available

Duty Cycled

Active

SHUTDOWN

Available

Off

Wake up on Pin Edge

Wake up on Reset Pin

Brown Out Detector (BOD)

Power On Reset (POR)

Off

Available

N/A

Active

N/A

(1) Not including RTOS overhead

In active mode, the application CM3 CPU is actively executing code. Active mode provides normal operation of

the processor and all of the peripherals that are currently enabled. The system clock can be any available clock

source (see 表9-2).

In idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked

and no code is executed. Any interrupt event will bring the processor back into active mode.

In standby mode, only the always-on domain (AON) is active. An external wake-up event, RTC event, or sensor-

controller event is required to bring the device back to active mode. MCU peripherals with retention do not need

to be reconfigured when waking up again, and the CPU continues execution from where it went into standby

mode. All GPIOs are latched in standby mode.

In shutdown mode, the device is turned off entirely, including the AON domain and the Sensor Controller. The

I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin

defined as a wake-up from Shutdown pin wakes up the device and functions as a reset trigger. The CPU can

differentiate between a reset in this way, a reset-by-reset pin, or a power-on-reset by reading the reset status

register. The only state retained in this mode is the latched I/O state and the Flash memory contents.

The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller

independently of the main CPU, which means that the main CPU does not have to wake up, for example, to

execute an ADC sample or poll a digital sensor over SPI. The main CPU saves both current and wake-up time

that would otherwise be wasted. The Sensor Controller Studio enables the user to configure the sensor

controller and choose which peripherals are controlled and which conditions wake up the main CPU.

9.9 Clock Systems

The CC2640R2F supports two external and two internal clock sources.

A 24-MHz crystal is required as the frequency reference for the radio. This signal is doubled internally to create a

48-MHz clock.

The 32-kHz crystal is optional. Bluetooth low energy requires a slow-speed clock with better than

±500 ppm accuracy if the device is to enter any sleep mode while maintaining a connection. The internal

32-kHz RC oscillator can in some use cases be compensated to meet the requirements. The low-speed crystal

oscillator is designed for use with a 32-kHz watch-type crystal.

The internal high-speed oscillator (48-MHz) can be used as a clock source for the CPU subsystem.

The internal low-speed oscillator (32.768-kHz) can be used as a reference if the low-power crystal oscillator is

not used.

The 32-kHz clock source can be used as external clocking reference through GPIO.

9.10 General Peripherals and Modules

The I/O controller controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals to be

assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a

programmable pullup and pulldown function and can generate an interrupt on a negative or positive edge

(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs

have high drive capabilities (marked in bold in 节7).

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The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and Texas Instruments

synchronous serial interfaces. The SSIs support both SPI master and slave up to 4 MHz.

The UART implements a universal asynchronous receiver/transmitter function. It supports flexible baud-rate

generation up to a maximum of 3 Mbps .

Timer 0 is a general-purpose timer module (GPTM), which provides two 16-bit timers. The GPTM can be

configured to operate as a single 32-bit timer, dual 16-bit timers or as a PWM module.

Timer 1, Timer 2, and Timer 3 are also GPTMs. Each of these timers is functionally equivalent to Timer 0.

In addition to these four timers, the RF core has its own timer to handle timing for RF protocols; the RF timer can

be synchronized to the RTC.

The I²C interface is used to communicate with devices compatible with the I²C standard. The I²C interface is

capable of 100-kHz and 400-kHz operation, and can serve as both I²C master and I²C slave.

The TRNG module provides a true, nondeterministic noise source for the purpose of generating keys,

initialization vectors (IVs), and other random number requirements. The TRNG is built on 24 ring oscillators that

create unpredictable output to feed a complex nonlinear combinatorial circuit.

The watchdog timer is used to regain control if the system fails due to a software error after an external device

fails to respond as expected. The watchdog timer can generate an interrupt or a reset when a predefined time-

out value is reached.

The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload

data transfer tasks from the CM3 CPU, allowing for more efficient use of the processor and the available bus

bandwidth. The µDMA controller can perform transfer between memory and peripherals. The µDMA controller

has dedicated channels for each supported on-chip module and can be programmed to automatically perform

transfers between peripherals and memory as the peripheral is ready to transfer more data. Some features of

the µDMA controller include the following (this is not an exhaustive list):

• Highly flexible and configurable channel operation of up to 32 channels

• Transfer modes:

– Memory-to-memory

– Memory-to-peripheral

– Peripheral-to-memory

– Peripheral-to-peripheral

• Data sizes of 8, 16, and 32 bits

The AON domain contains circuitry that is always enabled, except for in Shutdown (where the digital supply is

off). This circuitry includes the following:

• The RTC can be used to wake the device from any state where it is active. The RTC contains three compare

and one capture registers. With software support, the RTC can be used for clock and calendar operation. The

RTC is clocked from the 32-kHz RC oscillator or crystal. The RTC can also be compensated to tick at the

correct frequency even when the internal 32-kHz RC oscillator is used instead of a crystal.

• The battery monitor and temperature sensor are accessible by software and give a battery status indication

as well as a coarse temperature measure.

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9.11 Voltage Supply Domains

The CC2640R2F device can interface to two or three different voltage domains depending on the package type.

On-chip level converters ensure correct operation as long as the signal voltage on each input/output pin is set

with respect to the corresponding supply pin (VDDS, VDDS2 or VDDS3). 表9-3 lists the pin-to-VDDS mapping.

表9-3. Pin Function to VDDS Mapping Table

Package

VQFN 4 × 4

(RSM)

VQFN 7 × 7 (RGZ)

VQFN 5 × 5 (RHB)

DSBGA (YFV)

DIO 23–30

Reset_N

DIO 7–14

Reset_N

DIO 5–9

Reset_N

DIO 7–13

Reset_N

VDDS⁽¹⁾

VDDS2

VDDS3

DIO 0–6

JTAG

DIO 0–4

JTAG

DIO 0–6

JTAG

DIO 0–11

DIO 12–22

N/A

JTAG

(1) VDDS_DCDC must be connected to VDDS on the PCB.

9.12 System Architecture

Depending on the product configuration, CC26xx can function either as a Wireless Network Processor (WNP—

an IC running the wireless protocol stack, with the application running on a separate MCU), or as a System-on-

Chip (SoC), with the application and protocol stack running on the Arm^®Cortex^®-M3 core inside the device.

In the first case, the external host MCU communicates with the device using SPI or UART. In the second case,

the application must be written according to the application framework supplied with the wireless protocol stack.

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10 Application, Implementation, and Layout

备注

Information in the following applications sections is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI's customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

10.1 Application Information

Very few external components are required for the operation of the CC2640R2F device. This section provides

some general information about the various configuration options when using the CC2640R2F in an application,

and then shows two examples of application circuits with schematics and layout. This is only a small selection of

the many application circuit examples available as complete reference designs from the product folder on

www.ti.com.

图 10-1 shows the various RF front-end configuration options. The RF front end can be used in differential- or

single-ended configurations with the options of having internal or external biasing. These options allow for

various trade-offs between cost, board space, and RF performance. Differential operation with external bias

gives the best performance while single-ended operation with internal bias gives the least amount of external

components and the lowest power consumption. Reference designs exist for each of these options.

Red = Not necessary if internal bias is used

6.8 pF

Antenna

(50 Ohm)

Pin 3 (RXTX)

2.4 nH

1 pF

To VDDR

pins

Pin 2 (RF N)

Pin 1 (RF P)

2 nH

1 pF

2 nH

6.2œ6.8 nH

2.4œ2.7 nH

10µF

12 pF

Optional

inductor.

Only

needed for

DCDC

operation

Differential

operation

1 pF

10µH

Antenna

(50 Ohm)

Red = Not necessary if internal bias is used

CC26xx

Pin 2 (RF N)

DCDC_SW

Pin 3/4 (RXTX)

Pin 2 (RF N)

Pin 1 (RF P)

15 nH

(GND exposed die

attached pad)

Pin 1 (RF P)

2 nH

VDDS_DCDC

input

decoupling

10µFœ22µF

Single ended

operation

12 pF

1.2 pF

Antenna

(50 Ohm)

Red = Not necessary if internal bias is used

Pin 3 (RXTX)

15 nH

24MHz

XTAL

2 nH

Pin 2 (RF N)

(Load caps

on chip)

12 pF

1.2 pF

Single ended

operation with 2

antennas

Antenna

(50 Ohm)

15 nH

2 nH

Pin 1 (RF P)

12 pF

1.2 pF

图10-1. CC2640R2F Application Circuit

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English Data Sheet: SWRS204

CC2640R2F

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

图 10-2 shows the various supply voltage configuration options. Not all power supply decoupling capacitors or

digital I/Os are shown. Exact pin positions will vary between the different package options. For a detailed

overview of power supply decoupling and wiring, see the TI reference designs and the CC26xx technical

reference manual (节11.3).

Internal DC-DC Regulator

Internal LDO Regulator

External Regulator

To All VDDR Pins

1.7 Vœ1.95 V to All VDDR- and VDDS Pins Except VDDS_DCDC

Ext.

Regulator

10 ꢀF

2.2 ꢀF

VDDS

10 ꢀH

CC26xx

DCDC_SW Pin

Pin 3/4 (RXTX)

Pin 2 (RF N)

Pin 1 (RF P)

NC

Pin 3/4 (RXTX)

Pin 2 (RF N)

Pin 1 (RF P)

DCDC_SW Pin

Pin 3/4 (RXTX)

Pin 2 (RF N)

Pin 1 (RF P)

(GND Exposed Die

Attached Pad)

(GND Exposed Die

Attached Pad)

(GND Exposed Die

Attached Pad)

VDDS_DCDC Pin

VDDS_DCDC

Input Decoupling

10 ꢀFœ22 ꢀF

VDDS_DCDC

Input Decoupling

10 ꢀFœ22 ꢀF

24-MHz XTAL

(Load Caps

on Chip)

24-MHz XTAL

(Load Caps on Chip)

24-MHz XTAL

(Load Caps on Chip)

1.8 Vœ3.8 V

to All VDDS Pins

1.8 Vœ3.8 V

Supply Voltage

To All VDDS Pins

图10-2. Supply Voltage Configurations

English Data Sheet: SWRS204

44

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10.2.1 Layout

图10-4. 5 × 5 External Differential (5XD) Layout

English Data Sheet: SWRS204

46

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10.3.1 Layout

图10-6. 4 × 4 External Single-ended (4XS) Layout

English Data Sheet: SWRS204

48

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11 Device and Documentation Support

11.1 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to all pre-production part numbers

or date-code markings. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for

example, CC2640R2F is in production; therefore, no prefix/identification is assigned).

Device development evolutionary flow:

X

P

Experimental device that is not necessarily representative of the final device's electrical specifications and

may not use production assembly flow.

Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical

specifications.

null Production version of the silicon die that is fully qualified.

Production devices have been characterized fully, and the quality and reliability of the device have been

demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (X or P) have a greater failure rate than the standard production

devices. Texas Instruments recommends that these devices not be used in any production system because their

expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type

(for example, ).

For orderable part numbers of the CC2640R2F device RSM, RHB, RGZ, or YFV package types, see the

Package Option Addendum of this document, the TI website (www.ti.com), or contact your TI sales

representative.

CC26 xx

yyy

zzz

(R/T)

PREFIX

X = Experimental device

Blank = Qualified device

R = Large Reel

T = Small Reel

DEVICE FAMILY

SimpleLink™ Multistandard

Wireless MCU

DEVICE

PACKAGE DESIGNATOR

RGZ = 48-pin VQFN (Very Thin Quad Flatpack No-Lead)

RHB = 32-pin VQFN (Very Thin Quad Flatpack No-Lead)

RSM = 32-pin VQFN (Very Thin Quad Flatpack No-Lead)

YFV = 34-pin DSBGA (Die-Size Ball Grid Array)

40 = Bluetooth

ROM version

F128 = ROM version 1

R2F = ROM version 2

图11-1. Device Nomenclature

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Product Folder Links: CC2640R2F

English Data Sheet: SWRS204

CC2640R2F

www.ti.com.cn

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

11.2 Tools and Software

TI offers an extensive line of development tools, including tools to evaluate the performance of the processors,

generate code, develop algorithm implementations, and fully integrate and debug software and hardware

modules.

The following products support development of the CC2640R2F device applications:

Software Tools:

SmartRF Studio 7 is a PC application that helps designers of radio systems to easily evaluate the RF-IC at an

early stage in the design process.

• Test functions for sending and receiving radio packets, continuous wave transmit and receive

• Evaluate RF performance on custom boards by wiring it to a supported evaluation board or debugger

• Can also be used without any hardware, but then only to generate, edit and export radio configuration

settings

• Can be used in combination with several development kits for Texas Instruments’CCxxxx RF-ICs

Sensor Controller Studio provides a development environment for the CC26xx Sensor Controller. The Sensor

Controller is a proprietary, power-optimized CPU in the CC26xx, which can perform simple background tasks

autonomously and independent of the System CPU state.

• Allows for Sensor Controller task algorithms to be implemented using a C-like programming language

• Outputs a Sensor Controller Interface driver, which incorporates the generated Sensor Controller machine

code and associated definitions

• Allows for rapid development by using the integrated Sensor Controller task testing and debugging

functionality. This allows for live visualization of sensor data and algorithm verification.

IDEs and Compilers:

Code Composer Studio^™Integrated Development Environment (IDE):

• Integrated development environment with project management tools and editor

• Code Composer Studio (CCS) 7.0 and later has built-in support for the CC26xx device family

• Best support for XDS debuggers; XDS100v3, XDS110 and XDS200

• High integration with TI-RTOS with support for TI-RTOS Object View

IAR Embedded Workbench^®for Arm^®:

• Integrated development environment with project management tools and editor

• IAR EWARM 7.80.1 and later has built-in support for the CC26xx device family

• Broad debugger support, supporting XDS100v3, XDS200, IAR I-Jet and Segger J-Link

• Integrated development environment with project management tools and editor

• RTOS plugin available for TI-RTOS

For a complete listing of development-support tools for the CC2640R2F platform, visit the Texas Instruments

website at www.ti.com. For information on pricing and availability, contact the nearest TI field sales office or

authorized distributor.

English Data Sheet: SWRS204

50

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CC2640R2F

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

11.3 Documentation Support

To receive notification of documentation updates, navigate to the device product folder on ti.com (CC2640R2F).

In the upper right corner, click on Alert me to register and receive a weekly digest of any product information that

has changed. For change details, review the revision history included in any revised document.

The current documentation that describes the CC2640R2F devices, related peripherals, and other technical

collateral is listed in the following.

Technical Reference Manual

CC13xx, CC26xx SimpleLink™ Wireless MCU Technical Reference Manual

SPACER

11.4 Texas Instruments Low-Power RF Website

Texas Instruments' Low-Power RF website has all the latest products, application and design notes, FAQ

section, news and events updates. Go to www.ti.com/lprf.

11.5 Low-Power RF eNewsletter

The Low-Power RF eNewsletter is up-to-date on new products, news releases, developers’ news, and other

news and events associated with low-power RF products from TI. The Low-Power RF eNewsletter articles

include links to get more online information.

Sign up at: www.ti.com/lprfnewsletter

11.6 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

11.7 Trademarks

SmartRF^™, Code Composer Studio^™, LaunchPad^™, and TI E2E^™are trademarks of Texas Instruments.

IEEE Std 1241^™is a trademark of Institute of Electrical and Electronics Engineers, Incorporated.

ARM7^™is a trademark of Arm Limited (or its subsidiaries).

Arm^®, Cortex^®, and Thumb^®are registered trademarks of Arm Limited (or its subsidiaries).

CoreMark^®is a registered trademark of Embedded Microprocessor Benchmark Consortium.

Bluetooth^®is a registered trademark of Bluetooth SIG Inc.

IAR Embedded Workbench^®is a registered trademark of IAR Systems AB.

Wi-Fi^®is a registered trademark of Wi-Fi Alliance.

ZigBee^®is a registered trademark of ZigBee Alliance.

所有商标均为其各自所有者的财产。

11.8 静电放电警告

静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理

和安装程序，可能会损坏集成电路。

ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参

数更改都可能会导致器件与其发布的规格不相符。

11.9 Export Control Notice

Recipient agrees to not knowingly export or re-export, directly or indirectly, any product or technical data (as

defined by the U.S., EU, and other Export Administration Regulations) including software, or any controlled

product restricted by other applicable national regulations, received from disclosing party under nondisclosure

obligations (if any), or any direct product of such technology, to any destination to which such export or re-export

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Product Folder Links: CC2640R2F

English Data Sheet: SWRS204

CC2640R2F

www.ti.com.cn

ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

is restricted or prohibited by U.S. or other applicable laws, without obtaining prior authorization from U.S.

Department of Commerce and other competent Government authorities to the extent required by those laws.

11.10 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

English Data Sheet: SWRS204

52

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ZHCSFW7C –DECEMBER 2016 –REVISED SEPTEMBER 2020

12 Mechanical, Packaging, and Orderable Information

12.1 Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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Product Folder Links: CC2640R2F

English Data Sheet: SWRS204

GENERIC PACKAGE VIEW

RGZ 48

7 x 7, 0.5 mm pitch

VQFN - 1 mm max height

PLASTIC QUADFLAT PACK- NO LEAD

Images above are just a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4224671/A

www.ti.com

PACKAGE OUTLINE

VQFN - 1 mm max height

RGZ0048A

PLASTIC QUADFLAT PACK- NO LEAD

A

7.1

6.9

B

(0.1) TYP

7.1

6.9

SIDE WALL DETAIL

OPTIONAL METAL THICKNESS

PIN 1 INDEX AREA

(0.45) TYP

CHAMFERED LEAD

CORNER LEAD OPTION

1 MAX

C

SEATING PLANE

0.08 C

0.05

0.00

2X 5.5

5.15±0.1

(0.2) TYP

13

24

44X 0.5

12

25

SEE SIDE WALL

DETAIL

SYMM

2X

5.5

1

36

0.30

0.18

PIN1 ID

(OPTIONAL)

48X

48

37

SYMM

0.1

C A B

C

0.5

0.3

48X

0.05

SEE LEAD OPTION

4219044/D 02/2022

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for optimal thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

VQFN - 1 mm max height

RGZ0048A

PLASTIC QUADFLAT PACK- NO LEAD

2X (6.8)

5.15)

SYMM

(

48X (0.6)

37

48

48X (0.24)

44X (0.5)

1

36

SYMM

2X

(5.5)

(6.8)

2X

(1.26)

2X

(1.065)

(R0.05)

TYP

25

12

21X (Ø0.2) VIA

TYP

24

13

2X (1.065)

2X (1.26)

2X (5.5)

LAND PATTERN EXAMPLE

SCALE: 15X

SOLDER MASK

OPENING

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

EXPOSED METAL

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4219044/D 02/2022

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

VQFN - 1 mm max height

RGZ0048A

PLASTIC QUADFLAT PACK- NO LEAD

2X (6.8)

SYMM

(

1.06)

37

48X (0.6)

48

48X (0.24)

44X (0.5)

1

36

SYMM

2X

(5.5)

(6.8)

2X

(0.63)

2X

(1.26)

(R0.05)

TYP

25

12

24

13

2X

(1.26)

2X (0.63)

2X (5.5)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD

67% PRINTED COVERAGE BY AREA

SCALE: 15X

4219044/D 02/2022

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

D: Max = 2.714 mm, Min =2.654 mm

E: Max = 2.714 mm, Min =2.654 mm

GENERIC PACKAGE VIEW

RSM 32

4 x 4, 0.4 mm pitch

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

This image is a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4224982/A

www.ti.com

PACKAGE OUTLINE

RSM0032B

VQFN - 1 mm max height

S

C

A

L

E

3

.

0

PLASTIC QUAD FLATPACK - NO LEAD

B

4.1

3.9

A

0.45

0.25

0.15

PIN 1 INDEX AREA

DETAIL

OPTIONAL TERMINAL

TYPICAL

4.1

3.9

(0.1)

SIDE WALL DETAIL

OPTIONAL METAL THICKNESS

1 MAX

C

SEATING PLANE

0.08 C

0.05

0.00

2.8 0.05

2X 2.8

(0.2) TYP

4X (0.45)

28X 0.4

9

16

SEE SIDE WALL

DETAIL

8

17

EXPOSED

THERMAL PAD

2X

SYMM

33

2.8

24

0.25

32X

1

SEE TERMINAL

DETAIL

0.15

0.1

C A B

25

32

PIN 1 ID

(OPTIONAL)

0.05

SYMM

0.45

0.25

32X

4219108/B 08/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

RSM0032B

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

(

2.8)

SYMM

32

25

32X (0.55)

1

32X (0.2)

24

(

0.2) TYP

VIA

(1.15)

SYMM

33

(3.85)

28X (0.4)

17

8

(R0.05)

TYP

9

16

(1.15)

(3.85)

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:20X

0.05 MIN

ALL AROUND

0.05 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL

EXPOSED METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4219108/B 08/2019

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

RSM0032B

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

(0.715)

4X ( 1.23)

(R0.05) TYP

25

32

32X (0.55)

1

24

32X (0.2)

(0.715)

(3.85)

33

SYMM

28X (0.4)

17

8

METAL

TYP

16

9

SYMM

(3.85)

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

EXPOSED PAD 33:

77% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:20X

4219108/B 08/2019

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

GENERIC PACKAGE VIEW

RHB 32

5 x 5, 0.5 mm pitch

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

Images above are just a representation of the package family, actual package may vary.

Refer to the product data sheet for package details.

4224745/A

www.ti.com

PACKAGE OUTLINE

RHB0032E

VQFN - 1 mm max height

S

C

A

L

E

3

.

0

PLASTIC QUAD FLATPACK - NO LEAD

5.1

4.9

B

A

PIN 1 INDEX AREA

(0.1)

5.1

4.9

SIDE WALL DETAIL

20.000

OPTIONAL METAL THICKNESS

C

1 MAX

SEATING PLANE

0.08 C

0.05

0.00

2X 3.5

(0.2) TYP

3.45 0.1

9

EXPOSED

THERMAL PAD

16

28X 0.5

8

17

SEE SIDE WALL

DETAIL

2X

SYMM

33

3.5

0.3

0.2

32X

24

0.1

C A B

C

1

0.05

32

25

PIN 1 ID

(OPTIONAL)

SYMM

0.5

0.3

32X

4223442/B 08/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.

www.ti.com

EXAMPLE BOARD LAYOUT

RHB0032E

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

(

3.45)

SYMM

32

25

32X (0.6)

1

24

32X (0.25)

(1.475)

28X (0.5)

33

SYMM

(4.8)

(

0.2) TYP

VIA

8

17

(R0.05)

TYP

9

16

(1.475)

(4.8)

LAND PATTERN EXAMPLE

SCALE:18X

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

SOLDER MASK

OPENING

METAL

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

NON SOLDER MASK

DEFINED

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

4223442/B 08/2019

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

www.ti.com

EXAMPLE STENCIL DESIGN

RHB0032E

VQFN - 1 mm max height

PLASTIC QUAD FLATPACK - NO LEAD

4X ( 1.49)

(0.845)

(R0.05) TYP

32

25

32X (0.6)

1

24

32X (0.25)

28X (0.5)

(0.845)

SYMM

33

(4.8)

17

8

METAL

TYP

16

9

SYMM

(4.8)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

EXPOSED PAD 33:

75% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE

SCALE:20X

4223442/B 08/2019

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

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型号：	CC2640R2FYFVT
厂家：	TEXAS INSTRUMENTS
描述：	具有 128kB 闪存和 275kB ROM 的 SimpleLink™ 32 位 Arm Cortex-M3 低功耗 Bluetooth® 无线 MCU \| YFV \| 34 \| -40 to 85 无线闪存
文件：	总72页 (文件大小：4442K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CC2640R2FYFVT [TI]

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