CC2652RSIP_技术文档

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

CC2652RSIP SimpleLink™ 多协议2.4GHz 无线系统级封装

法规遵从性

1 特性

• 经过监管认证，满足全球无线电频率要求：

– ETSI RED（欧洲）/RER（英国）

– ISED（加拿大）

无线微控制器

• 功能强大的48MHz Arm® Cortex®-M4F 处理器

• 352KB 闪存程序存储器

• 256KB ROM，用于协议和库函数

• 8KB 高速缓存SRAM

– FCC（美国）

MCU 外设

• 具有奇偶校验功能的80KB 超低泄漏SRAM，可实

现高度可靠运行

• 动态多协议管理器(DMM) 驱动程序

• 可编程无线电包括对2-(G)FSK、4-(G)FSK、

MSK、OOK、低功耗Bluetooth® 5.2、IEEE

802.15.4 PHY 和MAC 的支持

• 数字外设可连接至32 个GPIO 中的任何一个

• 四个32 位或八个16 位通用计时器

• 12 位ADC、200ksps、8 通道

• 8 位DAC

• 两个比较器

• 可编程电流源

• 两个UART、两个SSI、I²C、I²S

• 实时时钟(RTC)

• 集成温度和电池监控器

• 支持无线升级(OTA)

超低功耗传感器控制器

• 具有4KB SRAM 的自主MCU

• 采样、存储和处理传感器数据

• 快速唤醒进入低功耗运行

安全驱动工具

• AES 128 位和256 位加密加速计

• ECC 和RSA 公钥硬件加速器

• SHA2 加速器（最高到SHA-512 的全套装）

• 真随机数发生器(TRNG)

• 软件定义外设；电容式触控、流量计、LCD

低功耗

• MCU 功耗：

开发工具和软件

– 3.5mA 有源模式，CoreMark

– 74μA/MHz（运行CoreMark 时）

– 1μA 待机模式，RTC，80KB RAM

– 160nA 关断模式，引脚唤醒

• LP-CC2652PSIP 开发套件

• SimpleLink™ CC13xx 和CC26xx 软件开发套件

(SDK)

• 用于简单无线电配置的SmartRF™ Studio

• 用于构建低功耗检测应用的Sensor Controller

Studio

• 超低功耗传感器控制器功耗：

– 2MHz 模式下为30.1μA

– 24MHz 模式下为808μA

• 无线电功耗：

• SysConfig 系统配置工具

– RX：7.3mA（在2.4GHz 条件下）

– TX：7.5mA（在0dBm 条件下）

– TX：9.8mA（在+5dBm 条件下）

工作温度范围

• 片上降压直流/直流转换器

• 1.8V 至3.8V 单电源电压

• T_j：-40°C 至+105°C

无线协议支持

• Thread、Zigbee®、Matter

• 低功耗Bluetooth® 5.2

• SimpleLink™ TI 15.4-stack

• 专有系统

封装

• 7mm × 7mm MOT（32 个GPIO）

• 符合RoHS 标准的封装

高性能无线电

• 低功耗Bluetooth® 125kbps 时（LE 编码PHY）敏

感度为-103dBm

• 高达+5dBm 的输出功率，具有温度补偿

本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问

www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。

English Data Sheet: SWRS262

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

• 工业运输–资产跟踪

• 医疗

• 通信设备

2 应用

• 2400MHz 至2480MHz ISM 和SRD 系统¹

• 楼宇自动化

– 有线网络–无线LAN 或Wi-Fi 接入点、边缘路

由器、小型企业路由器

– 楼宇安防系统–运动检测器、电子智能锁、门

窗传感器、车库门系统、网关

– HVAC –恒温器、无线环境传感器、HVAC 系

统控制器、网关

– 防火安全系统–烟雾和热量探测器、火警控制

面板(FACP)

• 个人电子产品

– 便携式电子产品–射频智能遥控器

– 家庭影院和娱乐–智能扬声器、智能显示器、

机顶盒

– 游戏–电子玩具和机器人玩具

– 可穿戴设备（非医用）–智能追踪器、智能服

装

– 升降机和自动扶梯–升降机和自动扶梯的电梯

主控板

3 说明

SimpleLink^™CC2652RSIP 是一款具有系统级封装 (SiP) 认证模块的多协议 2.4GHz 无线微控制器 (MCU)，支持

以下协议：Thread、Zigbee^®、低功耗 Bluetooth^®5.2、IEEE 802.15.4、支持 IPv6 的智能对象 (6LoWPAN) 和专

有系统，包括 TI 15.4-Stack (2.4GHz) 和通过动态多协议管理器 (DMM) 驱动器实现的并发多协议。该器件经过优

化，可用于楼宇安防系统、HVAC、医疗、有线网络、便携式电子产品、家庭影院和娱乐以及联网外设市场中的低

功耗无线通信和高级检测。该器件的突出特性包括：

• 小型7mm x 7mm 的系统级封装认证模块，2.4GHz，具有直流/直流元件、平衡-非平衡变压器和晶体振荡器

• SimpleLink™ CC13xx 和CC26xx 软件开发套件(SDK) 以灵活的方式支持各种协议栈。

• 延长无线应用的电池寿命，完全RAM 保持时低待机电流为1µA。

• 支持工业温度，在105⁰C 下最低待机电流为11µA。

• 通过可编程、自主式超低功耗传感器控制器CPU 实现高级感应，具有快速唤醒功能。例如，传感器控制器能

够在1µA 系统电流下进行1Hz ADC 采样。

• 低SER（软错误率）FIT（时基故障），可延长运行寿命，不会对工业市场造成干扰，SRAM 奇偶校验功能始

终开启，可防止潜在辐射事件导致的损坏。

• 软件控制的专用无线电控制器(Arm^®Cortex^®-M0) 提供灵活的低功耗射频收发器功能，支持多个物理层和射频

标准。

• 出色的无线电敏感度和稳健性（选择性与阻断）性能，适用于低功耗Bluetooth ^®，125kbps 时（LE 编码

PHY）为-103dBm。

CC2652RSIP 器件是 SimpleLink™ MCU 平台的一部分，该平台包括 Wi-Fi^®、低功耗蓝牙、Thread、Zigbee、

Sub-1 GHz MCU 和主机 MCU，它们共用一个通用、易于使用的开发环境，其中包含单核软件开发套件(SDK) 和

丰富的工具集。借助一次性集成的 SimpleLink™ 平台，可以将产品组合中的任何器件组合添加至您的设计中，从

而在设计要求变更时实现100% 的代码重用。如需更多信息，请访问SimpleLink™ MCU 平台。

器件信息

器件型号⁽¹⁾

CC2652RSIPMOTR

封装尺寸（标称值）

封装

QFM (73)

7.00mm × 7.00mm

(1) 如需所有可用器件的最新器件、封装和订购信息，请参阅节13 中的“封装选项附录”或访问TI 网站。

1

请参阅射频内核获取有关支持的协议标准、调制格式和数据速率的更多详细信息。

2

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

4 Functional Block Diagram

图4-1 shows the functional block diagram of the CC2652RSIP module.

48-MHz

32.768-kHz

Crystal Oscillator Crystal Oscillator

2.4 GHz

ANT

JTAG

(1.8 V to 3.8 V) VDDS_PU

RESET_N

RF

(50 ꢀꢁ

2.4 GHz)

+5-dBm

IPC

CC2652R

User DIO_0-31

(1.8 V to 3.8 V) VDDS

GND

DCDC

Passives

图4-1. CC2652RSIP Block Diagram

Submit Document Feedback

3

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

图4-2 shows an overview of the CC2652RSIP hardware.

图4-2. CC2652RSIP Hardware Overview

4

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

Table of Contents

9.8 Serial Peripherals and I/O.........................................42

9.9 Battery and Temperature Monitor............................. 42

9.10 µDMA......................................................................42

9.11 Debug......................................................................42

9.12 Power Management................................................43

9.13 Clock Systems........................................................ 44

9.14 Network Processor..................................................44

9.15 Device Certification and Qualification..................... 45

9.16 Module Markings.....................................................47

9.17 End Product Labeling..............................................47

9.18 Manual Information to the End User....................... 47

10 Application, Implementation, and Layout................. 48

10.1 Application Information........................................... 48

10.2 Device Connection and Layout Fundamentals....... 49

10.3 PCB Layout Guidelines...........................................49

10.4 Reference Designs................................................. 53

10.5 Junction Temperature Calculation...........................54

11 Environmental Requirements and SMT

Specifications ...............................................................55

11.1 PCB Bending...........................................................55

11.2 Handling Environment.............................................55

11.3 Storage Condition................................................... 55

11.4 PCB Assembly Guide..............................................55

11.5 Baking Conditions................................................... 56

11.6 Soldering and Reflow Condition..............................57

12 Device and Documentation Support..........................58

12.1 Device Nomenclature..............................................58

12.2 Tools and Software................................................. 58

12.3 Documentation Support.......................................... 61

12.4 支持资源..................................................................61

12.5 Trademarks.............................................................61

12.6 Electrostatic Discharge Caution..............................62

12.7 术语表..................................................................... 62

13 Mechanical, Packaging, and Orderable

1 特性................................................................................... 1

2 应用................................................................................... 2

3 说明................................................................................... 2

4 Functional Block Diagram.............................................. 3

5 Revision History.............................................................. 5

6 Device Comparison.........................................................6

7 Terminal Configuration and Functions..........................7

7.1 Pin Diagram................................................................ 7

7.2 Signal Descriptions –SIP Package...........................8

7.3 Connections for Unused Pins and Modules................9

8 Specifications................................................................ 10

8.1 Absolute Maximum Ratings...................................... 10

8.2 ESD Ratings............................................................. 10

8.3 Recommended Operating Conditions.......................10

8.4 Power Supply and Modules...................................... 10

8.5 Power Consumption - Power Modes.........................11

8.6 Power Consumption - Radio Modes......................... 12

8.7 Nonvolatile (Flash) Memory Characteristics............. 12

8.8 Thermal Resistance Characteristics......................... 12

8.9 RF Frequency Bands................................................12

8.10 Bluetooth Low Energy - Receive (RX).................... 13

8.11 Bluetooth Low Energy - Transmit (TX)....................16

8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4

GHz (OQPSK DSSS1:8, 250 kbps) - RX.................... 17

8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4

GHz (OQPSK DSSS1:8, 250 kbps) - TX.....................18

8.14 Timing and Switching Characteristics..................... 18

8.15 Peripheral Characteristics.......................................22

8.16 Typical Characteristics............................................29

9 Detailed Description......................................................36

9.1 Overview...................................................................36

9.2 System CPU............................................................. 36

9.3 Radio (RF Core)........................................................37

9.4 Memory.....................................................................37

9.5 Sensor Controller......................................................39

9.6 Cryptography............................................................ 40

9.7 Timers....................................................................... 41

Information.................................................................... 63

13.1 Packaging Information............................................ 63

5 Revision History

注：以前版本的页码可能与当前版本的页码不同

Changes from Revision A (February 2022) to Revision B (September 2022)

Page

• 将开发套件更新为LP-CC2652PSIP...................................................................................................................1

• Updated CC2652RSIP Block diagram to include external antenna ...................................................................3

• Added RER (UK) to module comparison table................................................................................................... 6

• Corrected channel 16 to channel 26 in footnotes; 节8.13 ...............................................................................10

• Updated power limits based on allowable antenna gain in footnotes; 节8.13 ................................................ 10

• List of certifications updated to include RER (UK)............................................................................................45

• Added UK certification section..........................................................................................................................46

• Added link to OEM integrators guide ...............................................................................................................47

• Corrected development kit to be CC2652PSIP................................................................................................ 58

• Added module height and weight information ..................................................................................................63

Submit Document Feedback

5

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

6 Device Comparison

RADIO SUPPORT

PACKAGE SIZE

FLASH

(KB)

RAM +

Cache (KB)

Device

GPIO

CC1310

X

32-128

352

704

352

704

128

352

704

352

704

16-20 + 8

32 + 8

80 + 8

144 + 8

80 + 8

144 + 8

20 + 8

80 + 8

32 + 8

80 + 8

144 + 8

80 + 8

144 + 8

10-30

22-30

26

X

CC1311R3

CC1311P3

CC1312R

CC1312R7

CC1352R

CC1352P

CC1352P7

CC2640R2F

CC2642R

CC2642R-Q1

CC2651R3

CC2651P3

CC2652R

CC2652RB

CC2652R7

CC2652P

CC2652P7

X

30

X

30

X

28

X

26

10-31

31

X

31

X

23-31

22-26

31

X

31

X

26

ANTENNA

RADIO SUPPORT

CERTIFICATIONS

PACKAGE SIZE

FLAS

H (KB) Cache (KB)

RAM +

Module

GPIO

CC2650MODA

X

128

352

20+8

15

32

X

CC2651R3SIP

A

X

32 + 8

CC2652RSIP

CC2652PSIP

X

352

80 + 8

32

30

X

6

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

7 Terminal Configuration and Functions

7.1 Pin Diagram

DIO_26

1

37

DIO_17

2

3

36

35

34

33

32

31

30

29

28

27

26

DIO_16

DIO_27

DIO_28

JTAG_TCKC

JTAG_TMSC

DIO_15

CC2652RSIP

nRESET

GND

4

5

49

54

59

64

69

50

55

60

65

70

51

56

61

66

71

52

57

62

67

72

53

58

63

68

73

NC

DIO_29

DIO_30

GND

6

DIO_14

DIO_13

DIO_12

DIO_11

DIO_10

DIO_9

7

8

9

GND

10

11

12

GND

DIO_8

13

25

DIO_7

图7-1. MOT (7-mm × 7-mm) Pinout, 0.5-mm Pitch (Top View)

The following I/O pins marked in 图7-1 in bold have high-drive capabilities:

• Pin 23, DIO_5

• Pin 24, DIO_6

• Pin 25, DIO_7

• Pin 34, JTAG_TMSC

• Pin 36, DIO_16

• Pin 37, DIO_17

The following I/O pins marked in 图7-1 in italics have analog capabilities:

• Pin 1, DIO_26

• Pin 2, DIO_27

• Pin 3, DIO_28

• Pin 7, DIO_29

• Pin 8, DIO_30

• Pin 44, DIO_23

• Pin 45, DIO_24

• Pin 48, DIO_25

Submit Document Feedback

7

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

7.2 Signal Descriptions –SIP Package

表7-1. Signal Descriptions –SIP Package

I/O

TYPE

DESCRIPTION

NAME

NO.

14

21

28

29

30

31

32

33

36

37

39

40

20

41

42

43

44

45

48

1

DIO_0

I/O

Digital

GPIO

DIO_1

DIO_10

DIO_11

DIO_12

DIO_13

DIO_14

DIO_15

DIO_16

DIO_17

DIO_18

DIO_19

DIO_2

Digital

GPIO, JTAG_TDO, high-drive capability

GPIO, JTAG_TDI, high-drive capability

GPIO

Digital

GPIO

Digital

GPIO

DIO_20

DIO_21

DIO_22

DIO_23

DIO_24

DIO_25

DIO_26

DIO_27

DIO_28

DIO_29

DIO_3

Digital

GPIO

Digital

GPIO

Digital

GPIO

Digital or Analog

Digital

GPIO, analog capability

GPIO

2

3

7

15

8

DIO_30

Digital or Analog

GPIO, analog capability

Supports only peripheral functionality. Does not support general

purpose I/O functionality.

DIO_31⁽¹⁾

38

I/O

Digital

DIO_4

DIO_5

DIO_6

DIO_7

DIO_8

DIO_9

GND

22

23

24

25

26

27

5

I/O

—

Digital

—

GPIO

GPIO, high-drive capability

GPIO

GND

9

—

GND

10

11

—

GND

—

GND

12

13

16

17

19

49-73

—

GND

—

GND

—

GND

—

GND

—

GND

—

8

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

表7-1. Signal Descriptions –SIP Package (continued)

I/O

TYPE

DESCRIPTION

NAME

NO.

6

NC

No Connect

—

nRESET

RF

4

I

Digital

RF

Reset, active low. Internal pullup resistor to VDDS_PU

50 ohm RF port

18

35

34

46

47

—

I

JTAG_TCKC

JTAG_TMSC

VDDS

Digital

Power

JTAG_TCKC

I/O

JTAG_TMSC, high-drive capability

1.8-V to 3.8-V main SIP supply

Power to reset internal pullup resistor

—

VDDS_PU

(1) PORT_ID = 0x00 is not supported. See the SimpleLink™ CC13x2, CC26x2 Wireless MCU Technical Reference Manual for further

details.

7.3 Connections for Unused Pins and Modules

表7-2. Connections for Unused Pins –SIP Package

PREFERRED

FUNCTION

SIGNAL NAME

PIN NUMBER

ACCEPTABLE PRACTICE⁽¹⁾

PRACTICE⁽¹⁾

1-3

7-8

14-15

20-33

36-45

48

GPIO

DIO_n

NC

NC or GND

NC

No Connects

6

(1) NC = No connect

Submit Document Feedback

9

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)^{(1) (2)}

MIN

–0.3

MAX UNIT

VDDS⁽³⁾

Supply voltage

4.1

V

Voltage on any digital pin^{(4) (5)}

VDDS + 0.3, max 4.1

Voltage scaling enabled

VDDS

1.49

V_in

Voltage on ADC input

Voltage scaling disabled, internal reference

Voltage scaling disabled, VDDS as reference

V

VDDS / 2.9

5

Input level, RF pin

dBm

°C

T_stg

Storage temperature

150

–40

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating

Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values are with respect to ground, unless otherwise noted.

(3) VDDS_DCDC, VDDS2 and VDDS3 must be at the same potential as VDDS.

(4) Including analog capable DIOs.

(5) Injection current is not supported on any GPIO pin

8.2 ESD Ratings

VALUE

±2000

±500

UNIT

V

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

Charged device model (CDM), per ANSI/ESDA/JEDEC JS-002⁽²⁾

All pins

V_ESD

Electrostatic discharge

V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

105

3.8

UNIT

°C

Operating junction temperature⁽¹⁾

–40

Operating supply voltage (VDDS)

Rising supply voltage slew rate

Falling supply voltage slew rate

1.8

0

V

100

20

mV/µs

0

(1) For thermal resistance characteristics refer to Section 8.8.

8.4 Power Supply and Modules

over operating free-air temperature range (unless otherwise noted)

PARAMETER

MIN

TYP

MAX

1.5

UNIT

VDDS Power-on-Reset (POR) threshold

1.1

V

VDDS Brown-out Detector (BOD)

Rising threshold

Falling threshold

1.77

1.70

1.75

VDDS Brown-out Detector (BOD), before initial boot ⁽¹⁾

VDDS Brown-out Detector (BOD)

(1) Brown-out Detector is trimmed at initial boot, value is kept until device is reset by a POR reset or the nRESET pin

10

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.5 Power Consumption - Power Modes

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V with DC/DC enabled unless

otherwise noted.

PARAMETER

TEST CONDITIONS

TYP

UNIT

Core Current Consumption

Reset. nRESET pin asserted or VDDS below power-on-reset threshold⁽¹⁾

Shutdown. No clocks running, no retention

30

µA

nA

Reset and Shutdown

160

RTC running, CPU, 80KB RAM and (partial) register retention.

RCOSC_LF

0.99

1.15

3.36

3.47

708

3.5

µA

mA

Standby

without cache retention

RTC running, CPU, 80KB RAM and (partial) register retention

XOSC_LF

RTC running, CPU, 80KB RAM and (partial) register retention.

RCOSC_LF

I_core

Standby

with cache retention

RTC running, CPU, 80KB RAM and (partial) register retention.

XOSC_LF

Supply Systems and RAM powered

RCOSC_HF

Idle

MCU running CoreMark at 48 MHz

RCOSC_HF

Active

Peripheral Current Consumption

Peripheral power

domain

Delta current with domain enabled

102

7.56

221

Serial power domain

RF Core

Delta current with power domain enabled,

clock enabled, RF core idle

µDMA

Timers

Delta current with clock enabled, module is idle

Delta current with clock enabled, module is idle⁽⁴⁾

Delta current with clock enabled, module is idle

Delta current with clock enabled, module is idle⁽²⁾

Delta current with clock enabled, module is idle⁽³⁾

Delta current with clock enabled, module is idle

67.1

85.1

10.6

27.6

90.2

175.9

26.9

88.9

37.4

I_peri

µA

I2C

I2S

SSI

UART

CRYPTO (AES)

PKA

TRNG

Sensor Controller Engine Consumption

Active mode

I_SCE

24 MHz, infinite loop

2 MHz, infinite loop

808

µA

Low-power mode

30.1

(1) CC2652xSIP integrates a 100 kΩpull-up resistor on nRESET

(2) Only one UART running

(3) Only one SSI running

(4) Only one GPTimer running

Submit Document Feedback

11

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.6 Power Consumption - Radio Modes

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V with DC/DC enabled unless

otherwise noted.

PARAMETER

TEST CONDITIONS

TYP UNIT

Radio receive current

2440 MHz

7.3

7.9

mA

0 dBm output power setting

2440 MHz

Radio transmit current

2.4 GHz PA (Bluetooth Low Energy)

+5 dBm output power setting

2440 MHz

10.9

mA

8.7 Nonvolatile (Flash) Memory Characteristics

Over operating free-air temperature range and V_DDS= 3.0 V (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Flash sector size

8

KB

Supported flash erase cycles before failure, full bank^{(1) (5)}

Supported flash erase cycles before failure, single sector⁽²⁾

30

60

k Cycles

Maximum number of write operations per row before sector

erase⁽³⁾

Write

Operations

83

Flash retention

105 °C

11.4

Years

mA

ms

Flash sector erase current

Average delta current

Zero cycles

9.7

10

Flash sector erase time⁽⁴⁾

30k cycles

4000

ms

Flash write current

Flash write time⁽⁴⁾

Average delta current, 4 bytes at a time

4 bytes at a time

5.3

mA

µs

21.6

(1) A full bank erase is counted as a single erase cycle on each sector

(2) Up to 4 customer-designated sectors can be individually erased an additional 30k times beyond the baseline bank limitation of 30k

cycles

(3) Each wordline is 2048 bits (or 256 bytes) wide. This limitation corresponds to sequential memory writes of 4 (3.1) bytes minimum per

write over a whole wordline. If additional writes to the same wordline are required, a sector erase is required once the maximum

number of write operations per row is reached.

(4) This number is dependent on Flash aging and increases over time and erase cycles

(5) Aborting flash during erase or program modes is not a safe operation.

8.8 Thermal Resistance Characteristics

PACKAGE

MOT

(SIP)

73 PINS

48.7

THERMAL METRIC⁽¹⁾

UNIT

R_θJA

R_θJC(top)

R_θJB

ψ_JT

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

Junction-to-board thermal resistance

°C/W⁽²⁾

12.4

32.2

Junction-to-top characterization parameter

Junction-to-board characterization parameter

0.40

32.0

ψ_JB

(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

(2) °C/W = degrees Celsius per watt.

8.9 RF Frequency Bands

Over operating free-air temperature range (unless otherwise noted).

PARAMETER

MIN

TYP

MAX

UNIT

Frequency bands

2360

2500

MHz

12

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.10 Bluetooth Low Energy - Receive (RX)

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

125 kbps (LE Coded)

Receiver sensitivity

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Differential mode. BER = 10^–3

dBm

–103

Receiver saturation

Differential mode. BER = 10^–3

>5

Difference between the incoming carrier frequency and

the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

Selectivity, ±1 MHz⁽¹⁾

Selectivity, ±2 MHz⁽¹⁾

Selectivity, ±3 MHz⁽¹⁾

Selectivity, ±4 MHz⁽¹⁾

Selectivity, ±6 MHz⁽¹⁾

Selectivity, ±7 MHz

kHz

ppm

dB

> (–300 / 300)

> (–320 / 240)

> (–100 / 100)

–1.5

Difference between incoming data rate and the internally

generated data rate (37-byte packets)

Difference between incoming data rate and the internally

generated data rate (255-byte packets)

Wanted signal at –79 dBm, modulated interferer in

channel, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ±1

8 / 4.5⁽²⁾

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ±2

44 / 37⁽²⁾

46 / 44⁽²⁾

44 / 46⁽²⁾

48 / 44⁽²⁾

51 / 45⁽²⁾

37

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ±3

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ±4

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ±6

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at ≥±7

dB

MHz, BER = 10^–3

Wanted signal at –79 dBm, modulated interferer at

Selectivity, Image frequency⁽¹⁾

dB

image frequency, BER = 10^–3

Note that Image frequency + 1 MHz is the Co- channel –

1 MHz. Wanted signal at –79 dBm, modulated interferer

at ±1 MHz from image frequency, BER = 10^–3

Selectivity, Image frequency ±1

MHz⁽¹⁾

4.5 / 44 ⁽²⁾

dB

500 kbps (LE Coded)

Receiver sensitivity

Receiver saturation

Differential mode. BER = 10^–3

dBm

–98

> 5

Difference between the incoming carrier frequency and

the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

Selectivity, ±1 MHz⁽¹⁾

Selectivity, ±2 MHz⁽¹⁾

Selectivity, ±3 MHz⁽¹⁾

Selectivity, ±4 MHz⁽¹⁾

Selectivity, ±6 MHz⁽¹⁾

Selectivity, ±7 MHz

kHz

ppm

dB

> (–300 / 300)

> (–350 / 350)

> (–150 / 175)

–3.5

Difference between incoming data rate and the internally

generated data rate (37-byte packets)

Difference between incoming data rate and the internally

generated data rate (255-byte packets)

Wanted signal at –72 dBm, modulated interferer in

channel, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ±1

8 / 4⁽²⁾

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ±2

43 / 35⁽²⁾

46 / 46⁽²⁾

45 / 47⁽²⁾

46 / 45⁽²⁾

49 / 45⁽²⁾

35

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ±3

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ±4

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ≥±6

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at ≥±7

dB

MHz, BER = 10^–3

Wanted signal at –72 dBm, modulated interferer at

Selectivity, Image frequency⁽¹⁾

dB

image frequency, BER = 10^–3

Submit Document Feedback

13

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Note that Image frequency + 1 MHz is the Co- channel –

1 MHz. Wanted signal at –72 dBm, modulated interferer

at ±1 MHz from image frequency, BER = 10^–3

Selectivity, Image frequency ±1

MHz⁽¹⁾

4 / 46⁽²⁾

dB

1 Mbps (LE 1M)

Receiver sensitivity

Receiver saturation

Differential mode. BER = 10^–3

dBm

–96

> 5

Difference between the incoming carrier frequency and

the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

Selectivity, ±1 MHz⁽¹⁾

kHz

ppm

dB

> (–350 / 350)

> (–650 / 750)

–6

Difference between incoming data rate and the internally

generated data rate (37-byte packets)

Wanted signal at –67 dBm, modulated interferer in

channel, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±1

7 / 4⁽²⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±2

Selectivity, ±2 MHz⁽¹⁾

39 / 33⁽²⁾

36 / 40⁽²⁾

36 / 45⁽²⁾

40

dB

MHz,BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±3

Selectivity, ±3 MHz⁽¹⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±4

Selectivity, ±4 MHz⁽¹⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ≥±5

Selectivity, ±5 MHz or more⁽¹⁾

Selectivity, image frequency⁽¹⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

33

dB

image frequency, BER = 10^–3

Note that Image frequency + 1 MHz is the Co- channel –

1 MHz. Wanted signal at –67 dBm, modulated interferer

at ±1 MHz from image frequency, BER = 10^–3

Selectivity, image frequency

±1 MHz⁽¹⁾

4 / 41⁽²⁾

dB

Out-of-band blocking⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

3000 MHz to 12.75 GHz

dBm

–10

–18

–12

–2

Wanted signal at 2402 MHz, –64 dBm. Two interferers

at 2405 and 2408 MHz respectively, at the given power

level

Intermodulation

dBm

–42

Spurious emissions,

30 to 1000 MHz⁽⁴⁾

dBm

Measurement in a 50-Ωsingle-ended load.

< –59

< –47

Spurious emissions,

1 to 12.75 GHz⁽⁴⁾

RSSI dynamic range

RSSI accuracy

70

±4

dB

2 Mbps (LE 2M)

Differential mode. Measured at SMA connector, BER =

10^–3

Receiver sensitivity

dBm

kHz

ppm

dB

–90

> 5

Differential mode. Measured at SMA connector, BER =

10^–3

Receiver saturation

Difference between the incoming carrier frequency and

the internally generated carrier frequency

Frequency error tolerance

Data rate error tolerance

Co-channel rejection⁽¹⁾

> (–500 / 500)

> (–700 / 750)

–7

Difference between incoming data rate and the internally

generated data rate (37-byte packets)

Wanted signal at –67 dBm, modulated interferer in

channel,BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±2

MHz, Image frequency is at –2 MHz, BER = 10^–3

Selectivity, ±2 MHz⁽¹⁾

8 / 4⁽²⁾

dB

14

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

Selectivity, ±4 MHz⁽¹⁾

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Wanted signal at –67 dBm, modulated interferer at ±4

36 / 34⁽²⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at ±6

Selectivity, ±6 MHz⁽¹⁾

37 / 36⁽²⁾

dB

MHz, BER = 10^–3

Wanted signal at –67 dBm, modulated interferer at

Selectivity, image frequency⁽¹⁾

4

image frequency, BER = 10^–3

Note that Image frequency + 2 MHz is the Co-channel.

Wanted signal at –67 dBm, modulated interferer at ±2

MHz from image frequency, BER = 10^–3

Selectivity, image frequency

±2 MHz⁽¹⁾

–7 / 36⁽²⁾

dB

Out-of-band blocking⁽³⁾

Out-of-band blocking

30 MHz to 2000 MHz

2003 MHz to 2399 MHz

2484 MHz to 2997 MHz

3000 MHz to 12.75 GHz

dBm

–16

–21

–15

–12

Wanted signal at 2402 MHz, –64 dBm. Two interferers

at 2408 and 2414 MHz respectively, at the given power

level

Intermodulation

dBm

–38

(1) Numbers given as I/C dB

(2) X / Y, where X is +N MHz and Y is –N MHz

(3) Excluding one exception at F_wanted/ 2, per Bluetooth Specification

(4) Suitable for systems targeting compliance with worldwide radio-frequency regulations ETSI EN 300 328 and EN 300 440 Class 2

(Europe), FCC CFR47 Part 15 (US), and ARIB STD-T66 (Japan)

Submit Document Feedback

15

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.11 Bluetooth Low Energy - Transmit (TX)

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

General Parameters

Max output power

TEST CONDITIONS

MIN

TYP

MAX UNIT

5

dBm

dB

Differential mode, delivered to a single-ended 50 Ωload through a balun

Output power

programmable range

26

Spurious emissions and harmonics

f < 1 GHz, outside restricted bands

dBm

< –36

< –54

< –55

< –42

< -42

f < 1 GHz, restricted bands ETSI

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

Second harmonic

Spurious emissions

+5 dBm setting

Harmonics

Third harmonic

< -42

16

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.12 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - RX

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

General Parameters

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Receiver sensitivity

Receiver saturation

PER = 1%

dBm

–98

> 5

Wanted signal at –82 dBm, modulated interferer at ±5 MHz,

PER = 1%

Adjacent channel rejection

Alternate channel rejection

36

57

dB

Wanted signal at –82 dBm, modulated interferer at ±10

MHz, PER = 1%

Wanted signal at –82 dBm, undesired signal is IEEE

802.15.4 modulated channel, stepped through all channels

2405 to 2480 MHz, PER = 1%

Channel rejection, ±15 MHz or more

59

dB

Blocking and desensitization,

5 MHz from upper band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

57

62

65

59

63

65

dB

Blocking and desensitization,

10 MHz from upper band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

Blocking and desensitization,

20 MHz from upper band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Blocking and desensitization,

50 MHz from upper band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Blocking and desensitization,

–5 MHz from lower band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Blocking and desensitization,

–10 MHz from lower band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Blocking and desensitization,

–20 MHz from lower band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Blocking and desensitization,

–50 MHz from lower band edge

Wanted signal at –97 dBm (3 dB above the sensitivity

level), CW jammer, PER = 1%

dB

Spurious emissions, 30 MHz to 1000

MHz

dBm

ppm

Measurement in a 50-Ω single-ended load

–66

–53

Spurious emissions, 1 GHz to 12.75

GHz

Difference between the incoming carrier frequency and the

internally generated carrier frequency

Frequency error tolerance

Symbol rate error tolerance

> 350

> 1000

Difference between incoming symbol rate and the internally

generated symbol rate

RSSI dynamic range

RSSI accuracy

95

±4

dB

Submit Document Feedback

17

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.13 Zigbee and Thread - IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps) - TX

When measured on the CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, f_RF= 2440 MHz with

DC/DC enabled unless otherwise noted. All measurements are performed at the antenna input with a combined RX and TX

path. All measurements are performed conducted.

PARAMETER

General Parameters

Max output power⁽¹⁾

TEST CONDITIONS

MIN

TYP

MAX UNIT

5

dBm

dB

Differential mode, delivered to a single-ended 50-Ωload through a balun

Output power

programmable range

26

Spurious emissions and harmonics

f < 1 GHz, outside restricted

< -36

dBm

bands

f < 1 GHz, restricted bands ETSI

f < 1 GHz, restricted bands FCC

f > 1 GHz, including harmonics

Second harmonic

< -47

< -55

dBm

Spurious emissions⁽¹⁾

+5 dBm setting

< –42

< -42

Harmonics

(1)

Third harmonic

< -42

IEEE 802.15.4-2006 2.4 GHz (OQPSK DSSS1:8, 250 kbps)

Error vector magnitude +5 dBm setting

2

%

(1) To meet the FCC 15.247 Part 15 (US) Band Edge requirement, Channel 26 output power is limited to 2 dBm and 0 dBm when using a

max antenna gain of 3.3 dBi and 5.3 dBi, respectively.

8.14 Timing and Switching Characteristics

8.14.1 Reset Timing

PARAMETER

MIN

TYP

MAX

UNIT

nRESET low duration

1

µs

8.14.2 Wakeup Timing

Measured over operating free-air temperature with V_DDS= 3.0 V (unless otherwise noted). The times listed here do not

include software overhead.

PARAMETER

TEST CONDITIONS

MIN

TYP

850 - 4000

165

MAX

UNIT

MCU, Reset to Active⁽¹⁾

µs

MCU, Shutdown to Active⁽¹⁾

MCU, Standby to Active

MCU, Active to Standby

MCU, Idle to Active

36

14

(1) The wakeup time is dependent on remaining charge on VDDR capacitor when starting the device, and thus how long the device has

been in Reset or Shutdown before starting up again.

8.14.3 Clock Specifications

8.14.3.1 48 MHz Crystal Oscillator (XOSC_HF)

Measured on a CC2652xSIP-EM reference design with integrated 48 MHz crystal including parameters based on external

manufacturer's crystal specification at T_c= 25 °C, V_DDS= 3.0 V at initial time, unless otherwise noted.

MIN

TYP

48

MAX

UNIT

MHz

Crystal frequency

Start-up time⁽¹⁾

200

µs

Initial crystal frequency tolerance⁽²⁾

Crystal aging at 10 years⁽²⁾

-16

-4

18

2

ppm

ppm/year

(1) Start-up time using the TI-provided power driver. Start-up time may increase if driver is not used.

18

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

(2) External manufacturer's crystal specification

8.14.3.2 48 MHz RC Oscillator (RCOSC_HF)

Measured on a CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

MIN

TYP

MAX

UNIT

MHz

%

Frequency

48

Uncalibrated frequency accuracy

Calibrated frequency accuracy⁽¹⁾

Start-up time

±1

±0.25

5

%

µs

(1) Accuracy relative to the calibration source (XOSC_HF)

8.14.3.3 2 MHz RC Oscillator (RCOSC_MF)

Measured on a CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

MIN

TYP

MAX

UNIT

MHz

µs

Calibrated frequency

Start-up time

2

5

8.14.3.4 32.768 kHz Crystal Oscillator (XOSC_LF)

Measured on a CC2652xSIP-EM reference design with integrated 32.768 kHz crystal including parameters based on external

manufacturer's crystal specification at T_c= 25 °C, V_DDS= 3.0 V at initial time, unless otherwise noted.

MIN

TYP

MAX

UNIT

kHz

Crystal frequency

32.768

Initial crystal frequency tolerance⁽¹⁾

Crystal aging at 1st year⁽¹⁾

-20

-3

20

3

ppm

ppm/year

(1) External manufacturer's crystal specification

8.14.3.5 32 kHz RC Oscillator (RCOSC_LF)

Measured on a CC2652xSIP-EM reference design with T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

MIN

TYP

32.8 ⁽¹⁾

50

MAX

UNIT

kHz

Calibrated frequency

Temperature coefficient.

ppm/°C

(1) When using RCOSC_LF as source for the low frequency system clock (SCLK_LF), the accuracy of the SCLK_LF-derived Real Time

Clock (RTC) can be improved by measuring RCOSC_LF relative to XOSC_HF and compensating for the RTC tick speed. This

functionality is available through the TI-provided Power driver.

8.14.4 Synchronous Serial Interface (SSI) Characteristics

8.14.4.1 Synchronous Serial Interface (SSI) Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

MIN

TYP

MAX

UNIT

NO.

S1

t_{clk_per}

t_{clk_high}

t_{clk_low}

SSIClk cycle time

12

65024

System Clocks ⁽²⁾

t_{clk_per}

S2⁽¹⁾

S3⁽¹⁾

SSIClk high time

SSIClk low time

0.5

t_{clk_per}

(1) Refer to SSI timing diagrams Figure 8-1, Figure 8-2, and Figure 8-3.

(2) When using the TI-provided Power driver, the SSI system clock is always 48 MHz.

Submit Document Feedback

19

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

S1

S2

SSIClk

S3

SSIFss

SSITx

MSB

LSB

SSIRx

4 to 16 bits

图8-1. SSI Timing for TI Frame Format (FRF = 01), Single Transfer Timing Measurement

S2

S1

SSIClk

SSIFss

SSITx

SSIRx

S3

MSB

LSB

8-bit control

0

MSB

LSB

4 to 16 bits output data

图8-2. SSI Timing for MICROWIRE Frame Format (FRF = 10), Single Transfer

20

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

S1

S2

SSIClk

(SPO = 0)

S3

SSIClk

(SPO = 1)

SSITx

(Controller)

MSB

LSB

SSIRx

(Peripheral)

MSB

LSB

SSIFss

图8-3. SSI Timing for SPI Frame Format (FRF = 00), With SPH = 1

表8-1. UART Characteristics

8.14.5 UART

over operating free-air temperature range (unless otherwise noted)

PARAMETER

MIN

TYP

MAX

UNIT

UART rate

3

MBaud

Submit Document Feedback

21

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.15 Peripheral Characteristics

8.15.1 ADC

Analog-to-Digital Converter (ADC) Characteristics

T_c= 25 °C, V_DDS= 3.0 V and voltage scaling enabled, unless otherwise noted.⁽¹⁾

Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.

PARAMETER

Input voltage range

Resolution

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V

0

VDDS

12

Bits

ksps

LSB

Sample Rate

200

Offset

Internal 4.3 V equivalent reference⁽²⁾

–0.24

7.14

>–1

±4

Gain error

Internal 4.3 V equivalent reference⁽²⁾

DNL⁽⁴⁾

INL

Differential nonlinearity

Integral nonlinearity

Internal 4.3 V equivalent reference⁽²⁾, 200 kSamples/s,

9.6 kHz input tone

9.8

Internal 4.3 V equivalent reference⁽²⁾, 200 kSamples/s,

9.6 kHz input tone, DC/DC enabled

9.8

10.1

11.1

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

ENOB

Effective number of bits

Bits

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

Internal reference, voltage scaling disabled,

11.3

11.6

14-bit mode, 200 kSamples/s, 600 Hz input tone ⁽⁵⁾

Internal reference, voltage scaling disabled,

15-bit mode, 200 kSamples/s, 150 Hz input tone ⁽⁵⁾

Internal 4.3 V equivalent reference⁽²⁾, 200 kSamples/s,

9.6 kHz input tone

–65

–70

–72

THD

Total harmonic distortion

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

dB

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

Internal 4.3 V equivalent reference⁽²⁾, 200 kSamples/s,

9.6 kHz input tone

60

63

68

Signal-to-noise

and

distortion ratio

SINAD,

SNDR

VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

Internal 4.3 V equivalent reference⁽²⁾, 200 kSamples/s,

9.6 kHz input tone

70

73

75

SFDR

Spurious-free dynamic range VDDS as reference, 200 kSamples/s, 9.6 kHz input tone

Internal reference, voltage scaling disabled,

32 samples average, 200 kSamples/s, 300 Hz input tone

Conversion time

Serial conversion, time-to-output, 24 MHz clock

Internal 4.3 V equivalent reference⁽²⁾

VDDS as reference

50

0.42

0.6

Clock Cycles

Current consumption

mA

Equivalent fixed internal reference (input voltage scaling

enabled). For best accuracy, the ADC conversion should be

initiated through the TI-RTOS API in order to include the gain/

offset compensation factors stored in FCFG1

Reference voltage

4.3^{(2) (3)}

V

Fixed internal reference (input voltage scaling disabled). For

best accuracy, the ADC conversion should be initiated through

the TI-RTOS API in order to include the gain/offset

compensation factors stored in FCFG1. This value is derived

from the scaled value (4.3 V) as follows:

Reference voltage

1.48

V

V_ref= 4.3 V × 1408 / 4095

Reference voltage

VDDS as reference, input voltage scaling enabled

VDDS as reference, input voltage scaling disabled

VDDS

V

VDDS /

2.82⁽³⁾

22

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

T_c= 25 °C, V_DDS= 3.0 V and voltage scaling enabled, unless otherwise noted.⁽¹⁾

Performance numbers require use of offset and gain adjustements in software by TI-provided ADC drivers.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

200 kSamples/s, voltage scaling enabled. Capacitive input,

Input impedance depends on sampling frequency and sampling

time

Input impedance

>1

MΩ

(1) Using IEEE Std 1241-2010 for terminology and test methods

(2) Input signal scaled down internally before conversion, as if voltage range was 0 to 4.3 V

(3) Applied voltage must be within Absolute Maximum Ratings (see Section 8.1 ) at all times

(4) No missing codes

(5) ADC_output = Σ(4ⁿsamples ) >> n, n = desired extra bits

8.15.2 DAC

8.15.2.1 Digital-to-Analog Converter (DAC) Characteristics

T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

General Parameters

Resolution

8

Bits

Any load, any V_REF, pre-charge OFF, DAC charge-pump ON

1.8

2.0

3.8

External Load⁽⁴⁾, any V_REF, pre-charge OFF, DAC charge-pump

OFF

V_DDS

Supply voltage

V

Any load, V_REF= DCOUPL, pre-charge ON

Buffer ON (recommended for external load)

Buffer OFF (internal load)

2.6

16

3.8

250

F_DAC

Clock frequency

kHz

1000

V_REF= VDDS, buffer OFF, internal load

V_REF= VDDS, buffer ON, external capacitive load = 20 pF⁽³⁾

13

13.8

20

Voltage output settling time

1 / F_DAC

External capacitive load

External resistive load

Short circuit current

200

400

pF

MΩ

µA

10

VDDS = 3.8 V, DAC charge-pump OFF

VDDS = 3.0 V, DAC charge-pump ON

VDDS = 3.0 V, DAC charge-pump OFF

VDDS = 2.0 V, DAC charge-pump ON

VDDS = 2.0 V, DAC charge-pump OFF

VDDS = 1.8 V, DAC charge-pump ON

VDDS = 1.8 V, DAC charge-pump OFF

51.1

53.1

54.3

48.7

70.2

49.4

79.2

Max output impedance Vref =

VDDS, buffer ON, CLK 250

kHz

Z_MAX

kΩ

Internal Load - Continuous Time Comparator / Low Power Clocked Comparator

V_REF= VDDS,

load = Continuous Time Comparator or Low Power Clocked

Comparator

F_DAC= 250 kHz

Differential nonlinearity

±1

DNL

LSB⁽¹⁾

V_REF= VDDS,

load = Continuous Time Comparator or Low Power Clocked

Comparator

±1.2

F_DAC= 16 kHz

V_REF= VDDS = 3.8 V

±0.64

±0.81

±1.27

±3.43

±2.88

±2.37

V_REF= VDDS= 3.0 V

Offset error⁽²⁾

Load = Continuous Time

Comparator

V_REF= VDDS = 1.8 V

LSB⁽¹⁾

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

Submit Document Feedback

23

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

MAX UNIT

T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

±0.78

±0.77

±3.46

±3.44

±4.70

±4.11

±1.53

±1.71

±2.10

±6.00

±3.85

±5.84

±2.92

±3.06

±3.91

±7.84

±4.06

±6.94

0.03

V_REF= VDDS= 3.8 V

V_REF= VDDS = 3.0 V

Offset error⁽²⁾

Load = Low Power Clocked

Comparator

V_REF= VDDS= 1.8 V

LSB⁽¹⁾

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

V_REF= VDDS = 3.8 V

V_REF= VDDS = 3.0 V

Max code output voltage

variation⁽²⁾

Load = Continuous Time

Comparator

V_REF= VDDS= 1.8 V

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

V_REF= VDDS= 3.8 V

V_REF=VDDS= 3.0 V

Max code output voltage

variation⁽²⁾

Load = Low Power Clocked

Comparator

V_REF= VDDS= 1.8 V

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

V_REF= VDDS = 3.8 V, code 1

V_REF= VDDS = 3.8 V, code 255

V_REF= VDDS= 3.0 V, code 1

V_REF= VDDS= 3.0 V, code 255

V_REF= VDDS= 1.8 V, code 1

V_REF= VDDS = 1.8 V, code 255

V_REF= DCOUPL, pre-charge OFF, code 1

V_REF= DCOUPL, pre-charge OFF, code 255

V_REF= DCOUPL, pre-charge ON, code 1

V_REF= DCOUPL, pre-charge ON, code 255

V_REF= ADCREF, code 1

3.62

0.02

2.86

0.01

Output voltage range⁽²⁾

Load = Continuous Time

Comparator

1.71

V

0.01

1.21

1.27

2.46

0.01

V_REF= ADCREF, code 255

1.41

V_REF= VDDS = 3.8 V, code 1

V_REF= VDDS= 3.8 V, code 255

V_REF= VDDS= 3.0 V, code 1

V_REF= VDDS= 3.0 V, code 255

V_REF= VDDS = 1.8 V, code 1

V_REF= VDDS = 1.8 V, code 255

V_REF= DCOUPL, pre-charge OFF, code 1

V_REF= DCOUPL, pre-charge OFF, code 255

V_REF= DCOUPL, pre-charge ON, code 1

V_REF= DCOUPL, pre-charge ON, code 255

V_REF= ADCREF, code 1

0.03

3.61

0.02

2.85

0.01

Output voltage range⁽²⁾

Load = Low Power Clocked

Comparator

1.71

V

0.01

1.21

1.27

2.46

0.01

V_REF= ADCREF, code 255

1.41

External Load

V_REF= VDDS, F_DAC= 250 kHz

V_REF= DCOUPL, F_DAC= 250 kHz

V_REF= ADCREF, F_DAC= 250 kHz

V_REF= VDDS, F_DAC= 250 kHz

±1

INL

Integral nonlinearity

LSB⁽¹⁾

DNL

Differential nonlinearity

24

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

±0.35

±0.50

±0.75

±1.55

±1.30

±1.10

±1.00

±3.45

±2.10

±1.90

0.03

MAX

UNIT

V_REF= VDDS= 3.8 V

V_REF= VDDS= 3.0 V

V_REF= VDDS = 1.8 V

Offset error

LSB⁽¹⁾

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

V_REF= VDDS= 3.8 V

V_REF= VDDS= 3.0 V

V_REF= VDDS= 1.8 V

Max code output voltage

variation

LSB⁽¹⁾

V_REF= DCOUPL, pre-charge ON

V_REF= DCOUPL, pre-charge OFF

V_REF= ADCREF

V_REF= VDDS = 3.8 V, code 1

V_REF= VDDS = 3.8 V, code 255

V_REF= VDDS = 3.0 V, code 1

V_REF= VDDS= 3.0 V, code 255

V_REF= VDDS= 1.8 V, code 1

V_REF= VDDS = 1.8 V, code 255

V_REF= DCOUPL, pre-charge OFF, code 1

V_REF= DCOUPL, pre-charge OFF, code 255

V_REF= DCOUPL, pre-charge ON, code 1

V_REF= DCOUPL, pre-charge ON, code 255

V_REF= ADCREF, code 1

3.59

0.02

2.82

0.01

Output voltage range

Load = Low Power Clocked

Comparator

1.70

V

0.01

1.21

1.27

2.46

0.01

V_REF= ADCREF, code 255

1.42

(1) 1 LSB (V_REF3.8 V/3.0 V/1.8 V/DCOUPL/ADCREF) = 14.10 mV/11.13 mV/6.68 mV/4.67 mV/5.48 mV

(2) Includes comparator offset

(3) A load > 20 pF will increases the settling time

(4) Keysight 34401A Multimeter

Submit Document Feedback

25

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.15.3 Temperature and Battery Monitor

8.15.3.1 Temperature Sensor

Measured on a Texas Instruments reference design with T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

°C

Resolution

Accuracy

2

-40 °C to 0 °C

0 °C to 105 °C

±4.0

±2.5

3.6

°C

Supply voltage coefficient⁽¹⁾

°C/V

(1) The temperature sensor is automatically compensated for VDDS variation when using the TI-provided driver.

8.15.3.2 Battery Monitor

Measured on a Texas Instruments reference design with T_c= 25 °C, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

mV

V

Resolution

Range

25

1.8

3.8

Integral nonlinearity (max)

Accuracy

23

22.5

-32

-1

mV

%

VDDS = 3.0 V

Offset error

Gain error

26

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.15.4 Comparators

8.15.4.1 Low-Power Clocked Comparator

T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Input voltage range

Clock frequency

0

V_DDS

V

SCLK_LF

Using internal DAC with VDDS as reference voltage,

DAC code = 0 - 255

Internal reference voltage⁽¹⁾

Offset

0.024 - 2.865

V

Measured at V_DDS/ 2, includes error from internal DAC

±5

1

mV

Clock

Cycle

Decision time

Step from –50 mV to 50 mV

(1) The comparator can use an internal 8 bits DAC as its reference. The DAC output voltage range depends on the reference voltage

selected. See Section 8.15.2.1

8.15.4.2 Continuous Time Comparator

T_c= 25°C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

V

Input voltage range⁽¹⁾

Offset

0

V_DDS

Measured at V_DDS/ 2

±5

0.78

8.6

mV

µs

Decision time

Step from –10 mV to 10 mV

Current consumption

Internal reference

µA

(1) The input voltages can be generated externally and connected throughout I/Os or an internal reference voltage can be generated using

the DAC

8.15.5 Current Source

8.15.5.1 Programmable Current Source

T_c= 25 °C, V_DDS= 3.0 V, unless otherwise noted.

PARAMETER

TEST CONDITIONS

MIN

TYP

0.25 - 20

0.25

MAX UNIT

Current source programmable output range (logarithmic

range)

µA

Resolution

Submit Document Feedback

27

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

MAX UNIT

8.15.6 GPIO

8.15.6.1 GPIO DC Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

T_A= 25 °C, V_DDS= 1.8 V

GPIO VOH at 8 mA load

IOCURR = 2, high-drive GPIOs only

IOCURR = 1

1.56

0.24

1.59

0.21

73

V

GPIO VOL at 8 mA load

GPIO VOH at 4 mA load

V

GPIO VOL at 4 mA load

IOCURR = 1

V

GPIO pullup current

Input mode, pullup enabled, Vpad = 0 V

Input mode, pulldown enabled, Vpad = VDDS

IH = 1, transition voltage for input read as 0 →1

IH = 1, transition voltage for input read as 1 →0

µA

V

GPIO pulldown current

19

GPIO low-to-high input transition, with hysteresis

GPIO high-to-low input transition, with hysteresis

1.08

0.73

V

IH = 1, difference between 0 →1

and 1 →0 points

GPIO input hysteresis

0.35

V

T_A= 25 °C, V_DDS= 3.0 V

GPIO VOH at 8 mA load

IOCURR = 2, high-drive GPIOs only

IOCURR = 1

2.59

0.42

2.63

0.40

V

GPIO VOL at 8 mA load

GPIO VOH at 4 mA load

GPIO VOL at 4 mA load

IOCURR = 1

T_A= 25 °C, V_DDS= 3.8 V

GPIO pullup current

Input mode, pullup enabled, Vpad = 0 V

282

110

µA

V

GPIO pulldown current

Input mode, pulldown enabled, Vpad = VDDS

IH = 1, transition voltage for input read as 0 →1

IH = 1, transition voltage for input read as 1 →0

GPIO low-to-high input transition, with hysteresis

GPIO high-to-low input transition, with hysteresis

1.97

1.55

V

IH = 1, difference between 0 →1

and 1 →0 points

GPIO input hysteresis

T_A= 25 °C

0.42

V

Lowest GPIO input voltage reliably interpreted as a

High

VIH

0.8*V_DDS

V

Highest GPIO input voltage reliably interpreted as a

Low

VIL

0.2*V_DDS

V

28

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.16 Typical Characteristics

All measurements in this section are done with T_c= 25 °C and V_DDS= 3.0 V, unless otherwise noted. See

Recommended Operating Conditions for device limits. Values exceeding these limits are for reference only.

8.16.1 MCU Current

80 kB RAM Retention, no Cache Retention, RTC On, SCLK_LF = 32 kHZ XOSC

Running CoreMark, SCLK_HF = 48 MHz RCOSC

8

6

5.5

5

7

6

5

4

3

2

1

0

4.5

4

3.5

3

-40

-25

-10

5

20

35

50

65

80

95 105

2.5

1.8

Temperature [^oC]

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-5. Standby Mode (MCU) Current vs.

图8-4. Active Mode (MCU) Current vs.

Temperature

Supply Voltage (VDDS)

8.16.2 RX Current

11

8

7.9

7.8

7.7

7.6

7.5

7.4

7.3

7.2

7.1

7

10.5

10

9.5

9

8.5

8

7.5

7

6.5

6

6.9

6.8

5.5

1.8

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80 90 100105

Temperature [^oC]

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-6. RX Current vs. Temperature

图8-7. RX Current vs. Supply Voltage (VDDS)

(BLE 1 Mbps, 2.44 GHz)

Submit Document Feedback

29

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.16.3 TX Current

9.3

9.15

9

8.85

8.7

12.1

11.95

11.8

11.65

11.5

8.55

8.4

8.25

8.1

7.95

7.8

7.65

7.5

11.35

11.2

11.05

10.9

10.75

10.6

7.35

7.2

7.05

6.9

6.75

6.6

6.45

6.3

10.45

10.3

10.15

10

-40

-25

-10

5

20

35

50

65

80

95 105

-40

-25

-10

5

20

35

50

65

80

95 105

Temperature [^oC]

图8-8. TX Current vs. Temperature

图8-9. TX Current vs. Temperature

(BLE 1 Mbps, 2.44 GHz, 0 dBm)

(BLE 1 Mbps, 2.44 GHz, +5 dBm)

12.5

16.5

16

12

11.5

11

15.5

15

14.5

14

10.5

10

13.5

13

12.5

12

9.5

9

11.5

11

8.5

8

10.5

10

9.5

9

7.5

7

8.5

6.5

8

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-10. TX Current vs. Supply Voltage (VDDS)

图8-11. TX Current vs. Supply Voltage (VDDS)

(BLE 1 Mbps, 2.44 GHz, 0 dBm)

(BLE 1 Mbps, 2.44 GHz, +5 dBm)

表8-2 shows typical TX current and output power for different output power settings.

表8-2. Typical TX Current and Output Power

CC2652RSIP at 2.44 GHz, VDDS = 3.0 V (Measured on CC2652XSIP_EM)

txPower

TX Power Setting (SmartRF Studio)

Typical Output Power [dBm]

Typical Current Consumption [mA]

0xA03A

5

4.54

3.49

10.87

0x6620

0x5869

0x4060

0x3CA0

0x2E9C

0x38DE

0x1CD7

0x16D5

4

3

9.89

9.46

8.81

8.34

7.97

7.23

6.70

6.52

2.67

1.53

2

1

0.42

0

-0.49

-3.15

-5.19

-6.05

-3

-5

-6

30

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

表8-2. Typical TX Current and Output Power (continued)

CC2652RSIP at 2.44 GHz, VDDS = 3.0 V (Measured on CC2652XSIP_EM)

txPower

TX Power Setting (SmartRF Studio)

Typical Output Power [dBm]

Typical Current Consumption [mA]

0x0AD0

-9

-8.94

6.04

5.83

5.63

5.34

5.18

5.01

0x0ACE

0x0ACC

0x08C9

0x04C7

0x04C6

-10

-12

-15

-18

-20

-10.47

-12.27

-15.57

-18.31

-19.83

Submit Document Feedback

31

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.16.4 RX Performance

-101

-100

-99

-98

-97

-96

-95

-94

-93

-92

-91

-103

-102

-101

-100

-99

-98

-97

-96

-95

-94

-93

2.4

2.408 2.416 2.424 2.432 2.44 2.448 2.456 2.464 2.472 2.48

2.4

2.408 2.416 2.424 2.432 2.44 2.448 2.456 2.464 2.472 2.48

Frequency [MHz]

图8-12. Sensitivity vs. Frequency

图8-13. Sensitivity vs. Frequency

(BLE 1 Mbps)

(250 kbps)

-90

-91

-92

-91

-92

-93

-94

-95

-96

-97

-98

-99

-100

-93

-94

-95

-96

-97

-98

-99

-100

-101

-102

-103

-40

-25

-10

5

20

35

50

65

80

95 105

-40

-25

-10

5

20

35

50

65

80

95 105

Temperature [^oC]

图8-14. Sensitivity vs. Temperature

图8-15. Sensitivity vs. Temperature

(BLE 1 Mbps, 2.44 GHz)

(250 kbps, 2.44 GHz)

-90

-91

-92

-93

-94

-95

-96

-97

-98

-99

-100

-90

-91

-92

-93

-94

-95

-96

-97

-98

-99

-100

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-16. Sensitivity vs. Supply Voltage

图8-17. Sensitivity vs. Supply Voltage

(VDDS) (BLE 1 Mbps, 2.44 GHz, DCDC Off)

(VDDS) (BLE 1 Mbps, 2.44 GHz)

32

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

-93

-94

-95

-96

-97

-98

-99

-100

-101

-102

-103

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-18. Sensitivity vs. Supply Voltage

(VDDS) (250 kbps, 2.44 GHz)

Submit Document Feedback

33

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.16.5 TX Performance

2

1.8

1.6

1.4

1.2

1

7

6.8

6.6

6.4

6.2

6

0.8

0.6

0.4

0.2

0

5.8

5.6

5.4

5.2

5

-0.2

-0.4

-0.6

-0.8

-1

4.8

4.6

4.4

4.2

4

-1.2

-1.4

-1.6

-1.8

-2

3.8

3.6

3.4

3.2

3

-40

-25

-10

5

20

35

50

65

80

95 105

-40

-25

-10

5

20

35

50

65

80

95 105

Temperature [^oC]

图8-19. Output Power vs. Temperature

图8-20. Output Power vs. Temperature

(BLE 1 Mbps, 2.44 GHz, 0 dBm)

(BLE 1 Mbps, 2.44 GHz, +5 dBm)

2

1.8

1.6

1.4

1.2

1

7

6.8

6.6

6.4

6.2

6

0.8

0.6

0.4

0.2

0

5.8

5.6

5.4

5.2

5

-0.2

-0.4

-0.6

-0.8

-1

4.8

4.6

4.4

4.2

4

-1.2

-1.4

-1.6

-1.8

-2

3.8

3.6

3.4

3.2

3

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

Voltage [V]

图8-21. Output Power vs. Supply Voltage

图8-22. Output Power vs. Supply Voltage

(VDDS) (BLE 1 Mbps, 2.44 GHz, 0 dBm)

(VDDS) (BLE 1 Mbps, 2.44 GHz, +5 dBm)

2

7

1.8

6.8

6.6

6.4

6.2

6

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2

0

5.8

5.6

5.4

5.2

5

-0.2

-0.4

-0.6

-0.8

-1

4.8

4.6

4.4

4.2

4

-1.2

-1.4

-1.6

-1.8

-2

3.8

3.6

3.4

3.2

3

2.4

2.408 2.416 2.424 2.432 2.44 2.448 2.456 2.464 2.472 2.48

2.4

2.408 2.416 2.424 2.432 2.44 2.448 2.456 2.464 2.472 2.48

Frequency [GHz]

图8-23. Output Power vs. Frequency

图8-24. Output Power vs. Frequency

(BLE 1 Mbps, 0 dBm)

(BLE 1 Mbps, +5 dBm)

34

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

8.16.6 ADC Performance

11.4

Vin = 3.0 V Sine wave, Internal reference, Fin = Fs / 10

Internal Reference, No Averaging

Internal Unscaled Reference, 14-bit Mode

10.2

10.15

10.1

10.05

10

11.1

10.8

10.5

10.2

9.9

9.95

9.9

9.85

9.8

9.6

0.2 0.3

0.5 0.7

1

2

3

4

5

6 7 8 10

20 30 40 50 70 100

1

2

3

4

5

6

7 8 10

Frequency [kHz]

20

30 40 50 70 100

200

Frequency [kHz]

图8-25. ENOB vs. Input Frequency

图8-26. ENOB vs. Sampling Frequency

Vin = 3.0 V Sine wave, Internal reference, 200 kSamples/s

1.5

1

2.5

2

0.5

0

1.5

1

-0.5

-1

0.5

0

-1.5

-0.5

0

400

800

1200 1600 2000 2400 2800 3200 3600 4000

0

400

800

1200 1600 2000 2400 2800 3200 3600 4000

ADC Code

图8-27. INL vs. ADC Code

图8-28. DNL vs. ADC Code

Vin = 1 V, Internal reference, 200 kSamples/s

1.01

1.009

1.008

1.007

1.006

1.005

1.004

1.003

1.002

1.001

1

1.01

1.009

1.008

1.007

1.006

1.005

1.004

1.003

1.002

1.001

1

1.8

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

-40 -30 -20 -10

0

10 20 30 40 50 60 70 80 90 100

Temperature [°C]

Voltage [V]

图8-30. ADC Accuracy vs. Supply Voltage (VDDS)

图8-29. ADC Accuracy vs. Temperature

Submit Document Feedback

35

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9 Detailed Description

9.1 Overview

节4 shows the core modules of the CC2652RSIP device.

9.2 System CPU

The CC2652RSIP SimpleLink^™Wireless MCU contains an Arm^®Cortex^®-M4F system CPU, which runs the

application and the higher layers of radio protocol stacks.

The system CPU is the foundation of a high-performance, low-cost platform that meets the system requirements

of minimal memory implementation, and low-power consumption, while delivering outstanding computational

performance and exceptional system response to interrupts.

Its features include the following:

• ARMv7-M architecture optimized for small-footprint embedded applications

• Arm Thumb^®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm

core in a compact memory size

• Fast code execution permits increased sleep mode time

• Deterministic, high-performance interrupt handling for time-critical applications

• Single-cycle multiply instruction and hardware divide

• Hardware division and fast digital-signal-processing oriented multiply accumulate

• Saturating arithmetic for signal processing

• IEEE 754-compliant single-precision Floating Point Unit (FPU)

• Memory Protection Unit (MPU) for safety-critical applications

• Full debug with data matching for watchpoint generation

– Data Watchpoint and Trace Unit (DWT)

– JTAG Debug Access Port (DAP)

– Flash Patch and Breakpoint Unit (FPB)

• Trace support reduces the number of pins required for debugging and tracing

– Instrumentation Trace Macrocell Unit (ITM)

– Trace Port Interface Unit (TPIU) with asynchronous serial wire output (SWO)

• Optimized for single-cycle flash memory access

• Tightly connected to 8-KB 4-way random replacement cache for minimal active power consumption and wait

states

• Ultra-low-power consumption with integrated sleep modes

• 48 MHz operation

• 1.25 DMIPS per MHz

36

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.3 Radio (RF Core)

The RF Core is a highly flexible and future proof radio module which contains an Arm Cortex-M0 processor that

interfaces the analog RF and base-band circuitry, handles data to and from the system CPU side, and

assembles the information bits in a given packet structure. The RF core offers a high level, command-based API

to the main CPU that configurations and data are passed through. The Arm Cortex-M0 processor is not

programmable by customers and is interfaced through the TI-provided RF driver that is included with the

SimpleLink Software Development Kit (SDK).

The RF core can autonomously handle the time-critical aspects of the radio protocols, thus offloading the main

CPU, which reduces power and leaves more resources for the user application. Several signals are also

available to control external circuitry such as RF switches or range extenders autonomously.

Multiprotocol solutions are enabled through time-sliced access of the radio, handled transparently for the

application through the TI-provided RF driver and dual-mode manager.

The various physical layer radio formats are partly built as a software defined radio where the radio behavior is

either defined by radio ROM contents or by non-ROM radio formats delivered in form of firmware patches with

the SimpleLink SDKs. This allows the radio platform to be updated for support of future versions of standards

even with over-the-air (OTA) updates while still using the same silicon.

9.3.1 Bluetooth 5.2 Low Energy

The RF Core offers full support for Bluetooth 5.2 Low Energy, including the high-sped 2-Mbps physical layer and

the 500-kbps and 125-kbps long range PHYs (Coded PHY) through the TI provided Bluetooth 5.2 stack or

through a high-level Bluetooth API. The Bluetooth 5.2 PHY and part of the controller are in radio and system

ROM, providing significant savings in memory usage and more space available for applications.

The new high-speed mode allows data transfers up to 2 Mbps, twice the speed of Bluetooth 4.2 and five times

the speed of Bluetooth 4.0, without increasing power consumption. In addition to faster speeds, this mode offers

significant improvements for energy efficiency and wireless coexistence with reduced radio communication time.

Bluetooth 5.2 also enables unparalleled flexibility for adjustment of speed and range based on application needs,

which capitalizes on the high-speed or long-range modes respectively. Data transfers are now possible at 2

Mbps, enabling development of applications using voice, audio, imaging, and data logging that were not

previously an option using Bluetooth low energy. With high-speed mode, existing applications deliver faster

responses, richer engagement, and longer battery life. Bluetooth 5.2 enables fast, reliable firmware updates.

9.3.2 802.15.4 (Thread, Zigbee, 6LoWPAN)

Through a dedicated IEEE radio API, the RF Core supports the 2.4-GHz IEEE 802.15.4-2011 physical layer (2

Mchips per second Offset-QPSK with DSSS 1:8), used in Thread, Zigbee, and 6LoWPAN protocols. The

802.15.4 PHY and MAC are in radio and system ROM. TI also provides royalty-free protocol stacks for Thread

and Zigbee as part of the SimpleLink SDK, enabling a robust end-to-end solution.

9.4 Memory

The up to 352-KB nonvolatile (Flash) memory provides storage for code and data. The flash memory is in-

system programmable and erasable. The last flash memory sector must contain a Customer Configuration

section (CCFG) that is used by boot ROM and TI provided drivers to configure the device. This configuration is

done through the ccfg.c source file that is included in all TI provided examples.

The ultra-low leakage system static RAM (SRAM) is split into up to five 16-KB blocks and can be used for both

storage of data and execution of code. Retention of SRAM contents in Standby power mode is enabled by

default and included in Standby mode power consumption numbers. Parity checking for detection of bit errors in

memory is built-in, which reduces chip-level soft errors and thereby increases reliability. System SRAM is always

initialized to zeroes upon code execution from boot.

To improve code execution speed and lower power when executing code from nonvolatile memory, a 4-way

nonassociative 8-KB cache is enabled by default to cache and prefetch instructions read by the system CPU.

The cache can be used as a general-purpose RAM by enabling this feature in the Customer Configuration Area

(CCFG).

Submit Document Feedback

37

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

There is a 4-KB ultra-low leakage SRAM available for use with the Sensor Controller Engine which is typically

used for storing Sensor Controller programs, data and configuration parameters. This RAM is also accessible by

the system CPU. The Sensor Controller RAM is not cleared to zeroes between system resets.

The ROM includes a TI-RTOS kernel and low-level drivers, as well as significant parts of selected radio stacks,

which frees up flash memory for the application. The ROM also contains a serial (SPI and UART) bootloader that

can be used for initial programming of the device.

38

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.5 Sensor Controller

The Sensor Controller contains circuitry that can be selectively enabled in both Standby and Active power

modes. The peripherals in this domain can be controlled by the Sensor Controller Engine, which is a proprietary

power-optimized CPU. This CPU can read and monitor sensors or perform other tasks autonomously; thereby

significantly reducing power consumption and offloading the system CPU.

The Sensor Controller Engine is user programmable with a simple programming language that has syntax

similar to C. This programmability allows for sensor polling and other tasks to be specified as sequential

algorithms rather than static configuration of complex peripheral modules, timers, DMA, register programmable

state machines, or event routing.

The main advantages are:

• Flexibility - data can be read and processed in unlimited manners while still ensuring ultra-low power

• 2 MHz low-power mode enables lowest possible handling of digital sensors

• Dynamic reuse of hardware resources

• 40-bit accumulator supporting multiplication, addition and shift

• Observability and debugging options

Sensor Controller Studio is used to write, test, and debug code for the Sensor Controller. The tool produces C

driver source code, which the System CPU application uses to control and exchange data with the Sensor

Controller. Typical use cases may be (but are not limited to) the following:

• Read analog sensors using integrated ADC or comparators

• Interface digital sensors using GPIOs, SPI, UART, or I²C (UART and I²C are bit-banged)

• Capacitive sensing

• Waveform generation

• Very low-power pulse counting (flow metering)

• Key scan

The peripherals in the Sensor Controller include the following:

• The low-power clocked comparator can be used to wake the system CPU from any state in which the

comparator is active. A configurable internal reference DAC can be used in conjunction with the comparator.

The output of the comparator can also be used to trigger an interrupt or the ADC.

• Capacitive sensing functionality is implemented through the use of a constant current source, a time-to-digital

converter, and a comparator. The continuous time comparator in this block can also be used as a higher-

accuracy alternative to the low-power clocked comparator. The Sensor Controller takes care of baseline

tracking, hysteresis, filtering, and other related functions when these modules are used for capacitive

sensing.

• The ADC is a 12-bit, 200-ksamples/s ADC with eight inputs and a built-in voltage reference. The ADC can be

triggered by many different sources including timers, I/O pins, software, and comparators.

• The analog modules can connect to up to eight different GPIOs

• Dedicated SPI controller with up to 6 MHz clock speed

The peripherals in the Sensor Controller can also be controlled from the main application processor.

Submit Document Feedback

39

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.6 Cryptography

The CC2652RSIP device comes with a wide set of modern cryptography-related hardware accelerators,

drastically reducing code footprint and execution time for cryptographic operations. It also has the benefit of

being lower power and improves availability and responsiveness of the system because the cryptography

operations runs in a background hardware thread.

Together with a large selection of open-source cryptography libraries provided with the Software Development

Kit (SDK), this allows for secure and future proof IoT applications to be easily built on top of the platform. The

hardware accelerator modules are:

• True Random Number Generator (TRNG) module provides a true, nondeterministic noise source for the

purpose of generating keys, initialization vectors (IVs), and other random number requirements. The TRNG is

built on 24 ring oscillators that create unpredictable output to feed a complex nonlinear-combinatorial circuit.

• Secure Hash Algorithm 2 (SHA-2) with support for SHA224, SHA256, SHA384, and SHA512

• Advanced Encryption Standard (AES) with 128 and 256 bit key lengths

• Public Key Accelerator - Hardware accelerator supporting mathematical operations needed for elliptic

curves up to 512 bits and RSA key pair generation up to 1024 bits.

Through use of these modules and the TI provided cryptography drivers, the following capabilities are available

for an application or stack:

• Key Agreement Schemes

– Elliptic curve Diffie–Hellman with static or ephemeral keys (ECDH and ECDHE)

– Elliptic curve Password Authenticated Key Exchange by Juggling (ECJ-PAKE)

• Signature Generation

– Elliptic curve Diffie-Hellman Digital Signature Algorithm (ECDSA)

• Curve Support

– Short Weierstrass form (full hardware support), such as:

• NIST-P224, NIST-P256, NIST-P384, NIST-P521

• Brainpool-256R1, Brainpool-384R1, Brainpool-512R1

• secp256r1

– Montgomery form (hardware support for multiplication), such as:

• Curve25519

• SHA2 based MACs

– HMAC with SHA224, SHA256, SHA384, or SHA512

• Block cipher mode of operation

– AESCCM

– AESGCM

– AESECB

– AESCBC

– AESCBC-MAC

• True random number generation

Other capabilities, such as RSA encryption and signatures as well as Edwards type of elliptic curves such as

Curve1174 or Ed25519, can also be implemented using the provided hardware accelerators but are not part of

the TI SimpleLink SDK for the CC2652RSIP device.

40

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.7 Timers

A large selection of timers are available as part of the CC2652RSIP device. These timers are:

• Real-Time Clock (RTC)

A 70-bit 3-channel timer running on the 32 kHz low frequency system clock (SCLK_LF)

This timer is available in all power modes except Shutdown. The timer can be calibrated to compensate for

frequency drift when using the LF RCOSC as the low frequency system clock. If an external LF clock with

frequency different from 32.768 kHz is used, the RTC tick speed can be adjusted to compensate for this.

When using TI-RTOS, the RTC is used as the base timer in the operating system and should thus only be

accessed through the kernel APIs such as the Clock module. The real time clock can also be read by the

Sensor Controller Engine to timestamp sensor data and also has dedicated capture channels. By default, the

RTC halts when a debugger halts the device.

• General Purpose Timers (GPTIMER)

The four flexible GPTIMERs can be used as either 4× 32 bit timers or 8× 16 bit timers, all running on up to 48

MHz. Each of the 16- or 32-bit timers support a wide range of features such as one-shot or periodic counting,

pulse width modulation (PWM), time counting between edges and edge counting. The inputs and outputs of

the timer are connected to the device event fabric, which allows the timers to interact with signals such as

GPIO inputs, other timers, DMA and ADC. The GPTIMERs are available in Active and Idle power modes.

• Sensor Controller Timers

The Sensor Controller contains 3 timers:

AUX Timer 0 and 1 are 16-bit timers with a 2^Nprescaler. Timers can either increment on a clock or on each

edge of a selected tick source. Both one-shot and periodical timer modes are available.

AUX Timer 2 is a 16-bit timer that can operate at 24 MHz, 2 MHz or 32 kHz independent of the Sensor

Controller functionality. There are 4 capture or compare channels, which can be operated in one-shot or

periodical modes. The timer can be used to generate events for the Sensor Controller Engine or the ADC, as

well as for PWM output or waveform generation.

• Radio Timer

A multichannel 32-bit timer running at 4 MHz is available as part of the device radio. The radio timer is

typically used as the timing base in wireless network communication using the 32-bit timing word as the

network time. The radio timer is synchronized with the RTC by using a dedicated radio API when the device

radio is turned on or off. This ensures that for a network stack, the radio timer seems to always be running

when the radio is enabled. The radio timer is in most cases used indirectly through the trigger time fields in

the radio APIs and should only be used when running the accurate 48 MHz high frequency crystal is the

source of SCLK_HF.

• Watchdog timer

The watchdog timer is used to regain control if the system operates incorrectly due to software errors. It is

typically used to generate an interrupt to and reset of the device for the case where periodic monitoring of the

system components and tasks fails to verify proper functionality. The watchdog timer runs on a 1.5 MHz clock

rate and cannot be stopped once enabled. The watchdog timer pauses to run in Standby power mode and

when a debugger halts the device.

Submit Document Feedback

41

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.8 Serial Peripherals and I/O

The SSIs are synchronous serial interfaces that are compatible with SPI, MICROWIRE, and TI's synchronous

serial interfaces. The SSIs support both SPI controller and peripheral up to 4 MHz. The SSI modules support

configurable phase and polarity.

The UARTs implement universal asynchronous receiver and transmitter functions. They support flexible baud-

rate generation up to a maximum of 3 Mbps.

The I²S interface is used to handle digital audio and can also be used to interface pulse-density modulation

microphones (PDM).

The I²C interface is also used to communicate with devices compatible with the I²C standard. The I²C interface

can handle 100 kHz and 400 kHz operation, and can serve as both controller and peripheral.

The I/O controller (IOC) controls the digital I/O pins and contains multiplexer circuitry to allow a set of peripherals

to be assigned to I/O pins in a flexible manner. All digital I/Os are interrupt and wake-up capable, have a

programmable pullup and pulldown function, and can generate an interrupt on a negative or positive edge

(configurable). When configured as an output, pins can function as either push-pull or open-drain. Five GPIOs

have high-drive capabilities, which are marked in bold in 节 7. All digital peripherals can be connected to any

digital pin on the device.

For more information, see the SimpleLink™ CC13xx and CC26xx Software Development Kit (SDK).

9.9 Battery and Temperature Monitor

A combined temperature and battery voltage monitor is available in the CC2652RSIP device. The battery and

temperature monitor allows an application to continuously monitor on-chip temperature and supply voltage and

respond to changes in environmental conditions as needed. The module contains window comparators to

interrupt the system CPU when temperature or supply voltage go outside defined windows. These events can

also be used to wake up the device from Standby mode through the Always-On (AON) event fabric.

9.10 µDMA

The device includes a direct memory access (µDMA) controller. The µDMA controller provides a way to offload

data-transfer tasks from the system CPU, thus allowing for more efficient use of the processor and the available

bus bandwidth. The µDMA controller can perform a transfer between memory and peripherals. The µDMA

controller has dedicated channels for each supported on-chip module and can be programmed to automatically

perform transfers between peripherals and memory when the peripheral is ready to transfer more data.

Some features of the µDMA controller include the following (this is not an exhaustive list):

• Highly flexible and configurable channel operation of up to 32 channels

• Transfer modes: memory-to-memory, memory-to-peripheral, peripheral-to-memory, and

peripheral-to-peripheral

• Data sizes of 8, 16, and 32 bits

• Ping-pong mode for continuous streaming of data

9.11 Debug

The on-chip debug support is done through a dedicated cJTAG (IEEE 1149.7) or JTAG (IEEE 1149.1) interface.

The device boots by default into cJTAG mode and must be reconfigured to use 4-pin JTAG.

42

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.12 Power Management

To minimize power consumption, the CC2652RSIP supports a number of power modes and power management

features (see 表9-1).

表9-1. Power Modes

SOFTWARE CONFIGURABLE POWER MODES

RESET PIN

HELD

MODE

ACTIVE

Active

On

IDLE

Off

STANDBY

Off

SHUTDOWN

CPU

Off

No

Off

No

Flash

Available

On

Off

SRAM

On

Retention

Duty Cycled

Partial

Full

Supply System

Register and CPU retention

SRAM retention

On

Full

48 MHz high-speed clock

(SCLK_HF)

XOSC_HF or

RCOSC_HF

XOSC_HF or

RCOSC_HF

Off

2 MHz medium-speed clock

(SCLK_MF)

RCOSC_MF

Available

32 kHz low-speed clock

(SCLK_LF)

XOSC_LF or

RCOSC_LF

XOSC_LF or

RCOSC_LF

XOSC_LF or

RCOSC_LF

Peripherals

Available

On

Available

On

Off

Available

On

Off

On

Off

Sensor Controller

Wake-up on RTC

Off

Wake-up on pin edge

Wake-up on reset pin

Brownout detector (BOD)

Power-on reset (POR)

Watchdog timer (WDT)

Available

On

Duty Cycled

On

Off

On

Off

Available

Paused

Off

In Active mode, the application system CPU is actively executing code. Active mode provides normal operation

of the processor and all of the peripherals that are currently enabled. The system clock can be any available

clock source (see 表9-1).

In Idle mode, all active peripherals can be clocked, but the Application CPU core and memory are not clocked

and no code is executed. Any interrupt event brings the processor back into active mode.

In Standby mode, only the always-on (AON) domain is active. An external wake-up event, RTC event, or Sensor

Controller event is required to bring the device back to active mode. MCU peripherals with retention do not need

to be reconfigured when waking up again, and the CPU continues execution from where it went into standby

mode. All GPIOs are latched in standby mode.

In Shutdown mode, the device is entirely turned off (including the AON domain and Sensor Controller), and the

I/Os are latched with the value they had before entering shutdown mode. A change of state on any I/O pin

defined as a wake from shutdown pin wakes up the device and functions as a reset trigger. The CPU can

differentiate between reset in this way and reset-by-reset pin or power-on reset by reading the reset status

register. The only state retained in this mode is the latched I/O state and the flash memory contents.

Submit Document Feedback

43

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

The Sensor Controller is an autonomous processor that can control the peripherals in the Sensor Controller

independently of the system CPU. This means that the system CPU does not have to wake up, for example to

perform an ADC sampling or poll a digital sensor over SPI, thus saving both current and wake-up time that would

otherwise be wasted. The Sensor Controller Studio tool enables the user to program the Sensor Controller,

control its peripherals, and wake up the system CPU as needed. All Sensor Controller peripherals can also be

controlled by the system CPU.

备注

The power, RF and clock management for the CC2652RSIP device require specific configuration and

handling by software for optimized performance. This configuration and handling is implemented in the

TI-provided drivers that are part of the CC2652RSIP software development kit (SDK). Therefore, TI

highly recommends using this software framework for all application development on the device. The

complete SDK with TI-RTOS (optional), device drivers, and examples are offered free of charge in

source code.

9.13 Clock Systems

The CC2652RSIP device has several internal system clocks.

The 48 MHz SCLK_HF is used as the main system (MCU and peripherals) clock. This can be driven by the

internal 48 MHz RC Oscillator (RCOSC_HF) or in-package 48 MHz crystal (XOSC_HF). Note that the radio

operation runs off the included, in-package 48 MHz crystal within the module.

SCLK_MF is an internal 2 MHz clock that is used by the Sensor Controller in low-power mode and also for

internal power management circuitry. The SCLK_MF clock is always driven by the internal 2 MHz RC Oscillator

(RCOSC_MF).

SCLK_LF is the 32.768 kHz internal low-frequency system clock. It can be used by the Sensor Controller for

ultra-low-power operation and is also used for the RTC and to synchronize the radio timer before or after

Standby power mode. SCLK_LF can be driven by the internal 32.8 kHz RC Oscillator (RCOSC_LF) or the

included, in-package 32.768 kHz crystal within the module.

When using the included, in-package crystal within the module, or the internal RC oscillator, the device can

output the 32 kHz SCLK_LF signal to other devices, thereby reducing the overall system cost.

9.14 Network Processor

Depending on the product configuration, the CC2652RSIP device can function as a wireless network processor

(WNP - a device running the wireless protocol stack with the application running on a separate host MCU), or as

a system-on-chip (SoC) with the application and protocol stack running on the system CPU inside the device.

In the first case, the external host MCU communicates with the device using SPI or UART. In the second case,

the application must be written according to the application framework supplied with the wireless protocol stack.

44

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.15 Device Certification and Qualification

The CC2652RSIP module from TI is certified for FCC, IC/ISED, ETSI/CE and UK as lised in 表 9-2. Moreover,

the module is a Bluetooth Qualified Design by the Bluetooth Special Interest Group (Bluetooth SIG). TI

Customers that build products based on the TI CC2652RSIP module can save in testing cost and time per

product family.

备注

The FCC and IC IDs, as well as the UK and CE markings, must be located in both the user manual

and on the packaging. Due to the small size of the module (7 mm x 7 mm), placing the IDs and

markings in a type size large enough to be legible without the aid of magnification is impractical.

表9-2. CC2652RSIP List of Certifications

Regulatory Body

Specification

ID (IF APPLICABLE)

Part 15C + MPE FCC RF Exposure (Bluetooth)

Part 15C + MPE FCC RF Exposure (802.15.4)

RSS-102 (MPE) and RSS-247 (Bluetooth)

RSS-102 (MPE) and RSS-247 (802.15.4)

EN 300328 v2.2.2 (2019-07) (Bluetooth)

EN 300328 v2.2.2 (2019-07) (802.15.4)

EN 62311:2020 and EN 50655:2017 (MPE)

EN 301 489-1 v2.2.3 (2019-11)

FCC (USA)

ZAT-CC2652RSIP

IC/ISED (Canada)

451H-CC2652RSIP

—

ETSI/CE (Europe) & RER (UK)

EN 301489-17 v3.2.4 (2020-09)

EN 62368-1:2020/A11:2020

9.15.1 FCC Certification and Statement

FCC RF Radiation Exposure Statement:

CAUTION

This equipment complies with FCC radiation exposure limits set forth for an uncontrolled

environment. End users must follow the specific operating instructions for satisfying RF exposure

limits. This transmitter must not be co-located or operating with any other antenna or transmitter.

The CC2652RSIPMOT module from TI is certified for FCC as a single-modular transmitter. The module is an

FCC-certified radio module that carries a modular grant.

You are cautioned that changes or modifications not expressly approved by the party responsible for compliance

could void the user’s authority to operate the equipment.

This device is planned to comply with Part 15 of the FCC Rules. Operation is subject to the following two

conditions:

• This device may not cause harmful interference.

• This device must accept any interference received, including interference that may cause undesired

operation of the device.

Submit Document Feedback

45

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.15.2 IC/ISED Certification and Statement

CAUTION

IC RF Radiation Exposure Statement:

To comply with IC RF exposure requirements, this device and its antenna must not be co-located or

operating in conjunction with any other antenna or transmitter.

Pour se conformer aux exigences de conformité RF canadienne l'exposition, cet appareil et son

antenne ne doivent pas étre co-localisés ou fonctionnant en conjonction avec une autre antenne ou

transmetteur.

The CC2652RSIPMOT module from TI is certified for IC as a single-modular transmitter. The CC2652RSIPMOT

module from TI is meets IC modular approval and labeling requirements. The IC follows the same testing and

rules as the FCC regarding certified modules in authorized equipment.

This device complies with Industry Canada licence-exempt RSS standards.

Operation is subject to the following two conditions:

• This device may not cause interference.

• This device must accept any interference, including interference that may cause undesired operation of the

device.

Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de

licence.

L'exploitation est autorisée aux deux conditions suivantes:

• L'appareil ne doit pas produire de brouillage

• L'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est

susceptible d'en compromettre le fonctionnement.

9.15.3 ETSI/CE Certification

The CC2652RSIPMOT module from TI is CE certified with certifications to the appropriate EU radio and EMC

directives summarized in the Declaration of Conformity and evidenced by the CE mark. The module is tested

and certified against the Radio Equipment Directive (RED).

See the full text of the for the EU Declaration of Conformity for the CC2652RSIPMOT device.

9.15.4 UK Certification

The CC2652RSIPMOT module from TI is UK certified with certifications to the appropriate UK radio and EMC

directives summarized in the Declaration of Conformity and evidenced by the UK mark. The module is tested

and certified against the Radio Equipment Regulations 2017.

See the full text of the for the UK Declaration of Conformity for the CC2652RSIPMOT device.

46

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

9.16 Module Markings

图9-1 shows the top-side marking for the CC2652RSIP module.

CC2652

R

SIP

NNN NNNN

图9-1. Top-Side Marking

表9-3 lists the CC2652RSIP module markings.

表9-3. Module Descriptions

DESCRIPTION

MARKING

CC2652

R

Generic Part Number

Model

SIP

SIP = Module type, X = pre-release

LTC (Lot Trace Code)

NNN NNNN

9.17 End Product Labeling

The CC2652RSIPMOT module complies with the FCC single modular FCC grant, FCC ID: ZAT-CC2652RSIP..

The host system using this module must display a visible label indicating the following text:

Contains FCC ID: ZAT-CC2652RSIP

The CC2652RSIPMOT module complies with the IC single modular IC grant, IC: . The host system using this

module must display a visible label indicating the following text:

Contains IC: 451H-CC2652RSIP

For more information on end product labeling and a sample label, please see section 4 of the OEM Integrators

Guide

9.18 Manual Information to the End User

The OEM integrator must be aware not to provide information to the end user regarding how to install or remove

this RF module in the user’s manual of the end product which integrates this module.

The end user manual must include all required regulatory information and warnings as shown in this manual.

Submit Document Feedback

47

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

10 Application, Implementation, and Layout

备注

Information in the following Applications section is not part of the TI component specification, and TI

does not warrant its accuracy or completeness. TI's customers are responsible for determining

suitability of components for their purposes. Customers should validate and test their design

implementation to confirm system functionality.

10.1 Application Information

10.1.1 Typical Application Circuit

图 10-1 shows the typical application schematic using the CC2652RSIP module. For the full reference

schematic, download the LP-CC2652PSIP Design Files.

备注

The following guidelines are recommended for implementation of the RF design:

• Ensure an RF path is designed with a characteristic impedance of 50 Ω.

• Tuning of the antenna impedance matching network is recommended after manufacturing of the

PCB to account for PCB parasitics. Please refer to CC13xx/CC26xx Hardware Configuration and

PCB Design Considerations; section 5.1 for further information.

图10-1. CC2652RSIP Typical Application Schematic

48

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

表10-1 provides the bill of materials for a typical application using the CC2652RSIP module in 图10-1.

For full operation reference design, see the LP-CC2652PSIP Design Files

表10-1. Bill of Materials

PART

REFERENCE

QTY

VALUE

MANUFACTURER

PART NUMBER

DESCRIPTION

Refer to 2.4-GHz Inverted F Antenna

for details of the antenna

implementation and PCB

requirements.

1

ANT1

2.4 GHz Ant

Texas Instruments

N/A

Capacitor, ceramic, 0.1 µF, 25 V,

±10%, X6S, 0201

1

C1

C2

0.1 µF

15 pF

Murata

GRT033C81E104KE01D

GRM0332C1H150JA01D

U.FL-R-SMT-1(01)

Capacitor, ceramic, 1 pF, 50 V, ±5%,

C0G/NP0, 0201

U.FL (UMCC) connector receptacle,

male pin 50 Ω, surface mount solder

P1

U.FL

Hirose

SimpleLink™ multiprotocol 2.4-GHz

wireless MCU

U49

CC2652RSIP

Texas Instruments

CC2652RSIPMOT

10.2 Device Connection and Layout Fundamentals

10.2.1 Reset

In order to meet the module power-on-reset requirements, an external 0.1 µF capacitor is required on the

nRESET pin during power ON. In addition, VDDS (Pin 46) and VDDS_PU (Pin 47) should be connected

together. If the reset signal is not based upon a power-on-reset and is derived from an external MCU, then the

external capacitor will not be needed and VDDS_PU (Pin 47) should be No Connect (NC). Please refer to 图

10-1 for the recommended circuit implementation and 表10-1 for the recommended 0.1 µF capacitor.

10.2.2 Unused Pins

All unused pins can be left unconnected without the concern of having leakage current. Please refer to 节7.3 for

more details.

10.3 PCB Layout Guidelines

This section details the PCB guidelines to speed up the PCB design using the CC2652RSIP module. The

integrator of the CC2652RSIP modules must comply with the PCB layout recommendations described in the

following subsections to minimize the risk with regulatory certifications for the FCC, IC/ISED, ETSI/CE.

Moreover, TI recommends customers to follow the guidelines described in this section to achieve similar

performance to that obtained with the TI reference design.

10.3.1 General Layout Recommendations

Ensure that the following general layout recommendations are followed:

• Have a solid ground plane and ground vias under the module for stable system and thermal dissipation.

• Do not run signal traces underneath the module on a layer where the module is mounted.

Submit Document Feedback

49

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

10.3.2 RF Layout Recommendations

It is critical that the RF section be laid out correctly to ensure optimal module performance. A poor layout can

cause low-output power and sensitivity degradation. 图 10-2 shows the RF placement and routing of the

CC2652RSIP module with the 2.4-GHz inverted F antenna.

图10-2. Module Layout Guidelines

Follow these RF layout recommendations for the CC2652RSIP module:

• RF traces must have a chararcterisitc impedance of 50-Ω.

• There must be no traces or ground under the antenna section.

• RF traces must have via stitching on the ground plane beside the RF trace on both sides.

• RF traces must be as short as possible.

• The module must be as close to the PCB edge in consideration of the product enclosure and type of antenna

being used.

50

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

10.3.2.1 Antenna Placement and Routing

The antenna is the element used to convert the guided waves on the PCB traces to the free space

electromagnetic radiation. The placement and layout of the antenna are the keys to increased range and data

rates. 表10-2 provides a summary of the antenna guidelines to follow with the CC2652RSIP module.

表10-2. Antenna Guidelines

SR NO.

GUIDELINES

1

2

Place the antenna on an edge of the PCB.

Ensure that no signals are routed across the antenna elements on any PCB layer.

Most antennas, including the PCB antenna used on the LaunchPad^™, require ground

clearance on all the layers of the PCB. Ensure that the ground is cleared on inner layers

as well.

3

4

Ensure that there is provision to place matching components for the antenna. These must

be tuned for best return loss when the complete board is assembled. Any plastics or

casing must also be mounted while tuning the antenna because this can impact the

impedance.

Ensure that the antenna characteristic impedance is 50-Ωas the module is designed for a

50-Ωsystem.

5

6

7

In case of printed antenna, ensure that the simulation is performed considering the

soldermask thickness.

For good RF performance ensrue that the Voltge Standing Wave Ration (VSWR) is less

than 2 across the frequency band of interest.

The feed point of the antenna is required to be grounded. This is only for the antenna type

used on the CC2652PSIP LaunchPad™. See the specific antenna data sheets for the

recommendations.

9

表10-3 lists the recommended antennas to use with the CC2652RSIP module. Other antennas may be available

for use with the CC2652RSIP module. Please refer to to the CC2652RSIP OEM integrators guide for a list of

approved antennas (and antenna types) that can be used with the CC2652RSIP module.

表10-3. Recommended Components

CHOICE

ANTENNA

MANUFACTURER

NOTES

2.4-GHz Inverted F

Antenna

Refer to 2.4-GHz Inverted F Antenna for details of the Antenna

implementation and PCB requirements.

1

Texas Instruments

Submit Document Feedback

51

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

10.3.2.2 Transmission Line Considerations

The RF signal from the module is routed to the antenna using a Coplanar Waveguide with ground (CPW-G)

structure. CPW-G structure offers the maximum amount of isolation and the best possible shielding to the RF

lines. In addition to the ground on the L1 layer, placing GND vias along the line also provides additional

shielding.

图10-3 shows a cross section of the coplanar waveguide with the critical dimensions.

图10-4 shows the top view of the coplanar waveguide with GND and via stitching.

图10-3. Coplanar Waveguide (Cross Section)

S

W

图10-4. CPW With GND and Via Stitching (Top View)

52

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

The recommended values for a 4-layer PCB board is provided in 表10-4.

表10-4. Recommended PCB Values for 4-Layer

Board (L1 to L2 = 0.175 mm)

PARAMETER

VALUE

0.300

0.500

0.175

4.0

UNITS

mm

W

S

mm

H

mm

Er (FR-4 substrate)

F/m

10.4 Reference Designs

The following reference designs should be followed closely when implementing designs using the CC2652RSIP

device.

Special attention must be paid to RF component placement, decoupling capacitors and DCDC regulator

components, as well as ground connections for all of these.

CC2652xSIP-EM Design

Files

The CC2652xSIP-EM reference design provides schematic, layout and production

files for the characterization board used for deriving the performance number found

in this document.

LP-CC2652PSIP Design

Files

The CC2652PSIP LaunchPad Design Files contain detailed schematics and

layouts to build application specific boards using the CC2652PSIP module. This

Launchpad Design is also used as the referenced for the CC2652RSIP module as

it is pin-to-pin compatable with the CC2652RSIP module.

Sub-1 GHz and 2.4 GHz

The antenna kit allows real-life testing to identify the optimal antenna for your

Antenna Kit for LaunchPad application. The antenna kit includes 16 antennas for frequencies from 169 MHz to

™ Development Kit and

SensorTag

2.4 GHz, including:

• PCB antennas

• Helical antennas

• Chip antennas

• Dual-band antennas for 868 MHz and 915 MHz combined with 2.4 GHz

The antenna kit includes a JSC cable to connect to the Wireless MCU LaunchPad

Development Kits and SensorTags.

Submit Document Feedback

53

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

10.5 Junction Temperature Calculation

This section shows the different techniques for calculating the junction temperature under various operating

conditions. For more details, see Semiconductor and IC Package Thermal Metrics.

There are three recommended ways to derive the junction temperature from other measured temperatures:

1. From package temperature:

T = ψ × P + T

case

(1)

(2)

(3)

J

JT

2. From board temperature:

T = ψ × P + T

board

J

JB

3. From ambient temperature:

T = R

× P + T

A

J

θJA

P is the power dissipated from the device and can be calculated by multiplying current consumption with supply

voltage. Thermal resistance coefficients are found in Section 8.8.

Example:

Using 方程式 3, the temperature difference between ambient temperature and junction temperature is

calculated. In this example, we assume a simple use case where the radio is transmitting continuously at 0 dBm

output power. Let us assume the ambient temperature is 80 °C and the supply voltage is 3 V. To calculate P, we

need to look up the current consumption for Tx at 80 °C in Typical Characteristics. From the plot, we see that the

current consumption is 8.25 mA. This means that P is 8.25 mA × 3 V = 24.75 mW.

The junction temperature is then calculated as:

°C

T = 23.4

× 23.4mW + T = 0.6°C + T

A

(4)

W

J

A

As can be seen from the example, the junction temperature is 0.6 °C higher than the ambient temperature when

running continuous Tx at 85 °C and, thus, well within the recommended operating conditions.

For various application use cases current consumption for other modules may have to be added to calculate the

appropriate power dissipation. For example, the MCU may be running simultaneously as the radio, peripheral

modules may be enabled, etc. Typically, the easiest way to find the peak current consumption, and thus the peak

power dissipation in the device, is to measure as described in Measuring CC13xx and CC26xx current

consumption.

54

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

11 Environmental Requirements and SMT Specifications

11.1 PCB Bending

The PCB follows IPC-A-600J for PCB twist and warpage < 0.75% or 7.5 mil per inch.

11.2 Handling Environment

11.2.1 Terminals

The product is mounted with motherboard through land-grid array (LGA). To prevent poor soldering, do not make

skin contact with the LGA portion.

11.2.2 Falling

The mounted components will be damaged if the product falls or is dropped. Such damage may cause the

product to malfunction.

11.3 Storage Condition

11.3.1 Moisture Barrier Bag Before Opened

A moisture barrier bag must be stored in a temperature of less than 30°C with humidity under 85% RH. The

calculated shelf life for the dry-packed product will be 24 months from the date the bag is sealed.

11.3.2 Moisture Barrier Bag Open

Humidity indicator cards must be blue, < 30%.

11.4 PCB Assembly Guide

The wireless MCU modules are packaged in a substrate base Leadless Quad Flatpack (QFM) package. The

modules are designed with pull back leads for easy PCB layout and board mounting.

11.4.1 PCB Land Pattern & Thermal Vias

We recommended a solder mask defined land pattern to provide a consistent soldering pad dimension in order

to obtain better solder balancing and solder joint reliability. PCB land pattern are 1:1 to module soldering pad

dimension. Thermal vias on PCB connected to other metal plane are for thermal dissipation purpose. It is critical

to have sufficient thermal vias to avoid device thermal shutdown. Recommended vias size are 0.2mm and

position not directly under solder paste to avoid solder dripping into the vias.

11.4.2 SMT Assembly Recommendations

The module surface mount assembly operations include:

• Screen printing the solder paste on the PCB

• Monitor the solder paste volume (uniformity)

• Package placement using standard SMT placement equipment

• X-ray pre-reflow check - paste bridging

• Reflow

• X-ray post-reflow check - solder bridging and voids

Submit Document Feedback

55

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

11.4.3 PCB Surface Finish Requirements

A uniform PCB plating thickness is key for high assembly yield. For an electroless nickel immersion gold finish,

the gold thickness should range from 0.05 µm to 0.20 µm to avoid solder joint embrittlement. Using a PCB with

Organic Solderability Preservative (OSP) coating finish is also recommended as an alternative to Ni-Au.

11.4.4 Solder Stencil

Solder paste deposition using a stencil-printing process involves the transfer of the solder paste through pre-

defined apertures with the application of pressure. Stencil parameters such as aperture area ratio and the

fabrication process have a significant impact on paste deposition. Inspection of the stencil prior to placement of

package is highly recommended to improve board assembly yields.

11.4.5 Package Placement

Packages can be placed using standard pick and place equipment with an accuracy of ±0.05 mm. Component

pick and place systems are composed of a vision system that recognizes and positions the component and a

mechanical system that physically performs the pick and place operation. Two commonly used types of vision

systems are:

• A vision system that locates a package silhouette

• A vision system that locates individual pads on the interconnect pattern

The second type renders more accurate placements but tends to be more expensive and time consuming. Both

methods are acceptable since the parts align due to a self-centering features of the solder joint during solder

reflow. It is recommended to avoid solder bridging to 2 mils into the solder paste or with minimum force to avoid

causing any possible damage to the thinner packages.

11.4.6 Solder Joint Inspection

After surface mount assembly, transmission X-ray should be used for sample monitoring of the solder

attachment process. This identifies defects such as solder bridging, shorts, opens, and voids. It is also

recommended to use side view inspection in addition to X-rays to determine if there are "Hour Glass" shaped

solder and package tilting existing. The "Hour Glass" solder shape is not a reliable joint. 90° mirror projection can

be used for side view inspection.

11.4.7 Rework and Replacement

TI recommends removal of modules by rework station applying a profile similar to the mounting process. Using a

heat gun can sometimes cause damage to the module by overheating.

11.4.8 Solder Joint Voiding

TI recommends to control solder joint voiding to be less than 30% (per IPC-7093). Solder joint voids could be

reduced by baking of components and PCB, minimized solder paste exposure duration, and reflow profile

optimization.

11.5 Baking Conditions

Products require baking before mounting if:

• Humidity indicator cards read > 30%

• Temp < 30°C, humidity < 70% RH, over 96 hours

Baking condition: 90°C, 12 to 24 hours

Baking times: 1 time

56

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

11.6 Soldering and Reflow Condition

• Heating method: Conventional convection or IR convection

• Temperature measurement: Thermocouple d = 0.1 mm to 0.2 mm CA (K) or CC (T) at soldering portion or

equivalent method

• Solder paste composition: SAC305

• Allowable reflow soldering times: 2 times based on the reflow soldering profile (see 图11-1)

• Temperature profile: Reflow soldering will be done according to the temperature profile (see

图11-1)

• Peak temperature: 260°C

图11-1. Temperature Profile for Evaluation of Solder Heat Resistance of a Component (at Solder Joint)

表11-1. Temperature Profile

Profile Elements

Convection or IR⁽¹⁾

Peak temperature range

235 to 240°C typical (260°C maximum)

Pre-heat / soaking (150 to 200°C)

Time above melting point

Time with 5°C to peak

Ramp up

60 to 120 seconds

60 to 90 seconds

30 seconds maximum

< 3°C / second

Ramp down

< -6°C / second

(1) For details, refer to the solder paste manufacturer's recommendation.

备注

TI does not recommend the use of conformal coating or similar material on the SimpleLink™ module.

This coating can lead to localized stress on the solder connections inside the module and impact the

module reliability. Use caution during the module assembly process to the final PCB to avoid the

presence of foreign material inside the module.

Submit Document Feedback

57

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

12 Device and Documentation Support

TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,

generate code, and develop solutions are listed as follows.

12.1 Device Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to all part numbers and/or date-

code. Each device has one of three prefixes/identifications: X, P, or null (no prefix) (for example, XCC2652RSIP

is in preview; therefore, an X prefix/identification is assigned).

Device development evolutionary flow:

X

P

Experimental device that is not necessarily representative of the final device's electrical specifications and

may not use production assembly flow.

Prototype device that is not necessarily the final silicon die and may not necessarily meet final electrical

specifications.

null Production version of the silicon die that is fully qualified.

Production devices have been characterized fully, and the quality and reliability of the device have been

demonstrated fully. TI's standard warranty applies.

Predictions show that prototype devices (X or P) have a greater failure rate than the standard production

devices. Texas Instruments recommends that these devices not be used in any production system because their

expected end-use failure rate still is undefined. Only qualified production devices are to be used.

TI device nomenclature also includes a suffix with the device family name. This suffix indicates the package type

(for example, RGZ).

For orderable part numbers of CC2652RSIP devices in the RGZ (7-mm x 7-mm) package type, see the Package

Option Addendum of this document, the Device Information in 节 3, the TI website (www.ti.com), or contact your

TI sales representative.

CC2652

R

SIP MOT

R

PREFIX

X = Experimental device

Blank = Qualified devie

R = Large Reel

PACKAGE DESIGNATOR

MOT = LGA Package

DEVICE

SimpleLink™ Ultra-Low-Power

Wireless MCU

MODULE

SIP = System-in-Package

CONFIGURATION

R = Regular

P = +10 dBm PA included

图12-1. Device Nomenclature

12.2 Tools and Software

The CC2652RSIP device is supported by a variety of software and hardware development tools.

Development Kit

CC2652PSIP

LaunchPad™

Development Kit

The CC2652PSIP LaunchPad^™Development Kit enables development of high-performance

wireless applications that benefit from low-power operation. The kit features the

CC2652PSIP SimpleLink Wireless system-in-Package, which allows you to quickly evaluate

and prototype 2.4-GHz wireless applications such as Bluetooth 5 Low Energy, Zigbee and

Thread, plus combinations of these. The kit works with the LaunchPad ecosystem, easily

enabling additional functionality like sensors, display and more. The built-in EnergyTrace^™

58

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

software is an energy-based code analysis tool that measures and displays the

application’s energy profile and helps to optimize it for ultra-low-power consumption.

Software

SimpleLink™

CC13XX-

CC26XX SDK

The SimpleLink CC13XX-CC26XX Software Development Kit (SDK) provides a complete

package for the development of wireless applications on the CC13X2 / CC26X2 family of

devices. The SDK includes a comprehensive software package for the CC2652RSIP device,

including the following protocol stacks:

• Bluetooth Low Energy 4 and 5.2

• Thread (based on OpenThread)

• Zigbee 3.0

• TI 15.4-Stack - an IEEE 802.15.4-based star networking solution for Sub-1 GHz and

2.4 GHz

• EasyLink - a large set of building blocks for building proprietary RF software stacks

• Multiprotocol support - concurrent operation between stacks using the Dynamic

Multiprotocol Manager (DMM)

The SimpleLink CC13XX-CC26XX SDK is part of TI’s SimpleLink MCU platform, offering a

single development environment that delivers flexible hardware, software and tool options for

customers developing wired and wireless applications. For more information about the

SimpleLink MCU Platform, visit http://www.ti.com/simplelink.

Submit Document Feedback

59

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

Development Tools

Code Composer

Code Composer Studio is an integrated development environment (IDE) that supports TI's

Microcontroller and Embedded Processors portfolio. Code Composer Studio comprises a

suite of tools used to develop and debug embedded applications. It includes an optimizing

C/C++ compiler, source code editor, project build environment, debugger, profiler, and many

other features. The intuitive IDE provides a single user interface taking you through each

step of the application development flow. Familiar tools and interfaces allow users to get

started faster than ever before. Code Composer Studio combines the advantages of the

Eclipse^®software framework with advanced embedded debug capabilities from TI resulting

in a compelling feature-rich development environment for embedded developers.

Studio^™

Integrated

Development

Environment (IDE)

CCS has support for all SimpleLink Wireless MCUs and includes support for EnergyTrace^™

software (application energy usage profiling). A real-time object viewer plugin is available for

TI-RTOS, part of the SimpleLink SDK.

Code Composer Studio is provided free of charge when used in conjunction with the XDS

debuggers included on a LaunchPad Development Kit.

Code Composer

Studio™ Cloud

IDE

Code Composer Studio (CCS) Cloud is a web-based IDE that allows you to create, edit and

build CCS and Energia™ projects. After you have successfully built your project, you can

download and run on your connected LaunchPad. Basic debugging, including features like

setting breakpoints and viewing variable values is now supported with CCS Cloud.

IAR Embedded

Workbench^®for

Arm^®

IAR Embedded Workbench^®is a set of development tools for building and debugging

embedded system applications using assembler, C and C++. It provides a completely

integrated development environment that includes a project manager, editor, and build tools.

IAR has support for all SimpleLink Wireless MCUs. It offers broad debugger support,

including XDS110, IAR I-jet^™and Segger J-Link^™. A real-time object viewer plugin is

available for TI-RTOS, part of the SimpleLink SDK. IAR is also supported out-of-the-box on

most software examples provided as part of the SimpleLink SDK.

A 30-day evaluation or a 32 KB size-limited version is available through iar.com.

SmartRF™ Studio

SmartRF™ Studio is a Windows^®application that can be used to evaluate and configure

SimpleLink Wireless MCUs from Texas Instruments. The application will help designers of

RF systems to easily evaluate the radio at an early stage in the design process. It is

especially useful for generation of configuration register values and for practical testing and

debugging of the RF system. SmartRF Studio can be used either as a standalone

application or together with applicable evaluation boards or debug probes for the RF device.

Features of the SmartRF Studio include:

• Link tests - send and receive packets between nodes

• Antenna and radiation tests - set the radio in continuous wave TX and RX states

• Export radio configuration code for use with the TI SimpleLink SDK RF driver

• Custom GPIO configuration for signaling and control of external switches

Sensor Controller

Studio

Sensor Controller Studio is used to write, test and debug code for the Sensor Controller

peripheral. The tool generates a Sensor Controller Interface driver, which is a set of C

source files that are compiled into the System CPU application. These source files also

contain the Sensor Controller binary image and allow the System CPU application to control

and exchange data with the Sensor Controller. Features of the Sensor Controller Studio

include:

• Ready-to-use examples for several common use cases

• Full toolchain with built-in compiler and assembler for programming in a C-like

programming language

60

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

• Provides rapid development by using the integrated sensor controller task testing and

debugging functionality, including visualization of sensor data and verification of

algorithms

CCS UniFlash

CCS UniFlash is a standalone tool used to program on-chip flash memory on TI MCUs.

UniFlash has a GUI, command line, and scripting interface. CCS UniFlash is available free

of charge.

12.2.1 SimpleLink™ Microcontroller Platform

The SimpleLink microcontroller platform sets a new standard for developers with the broadest portfolio of wired

and wireless Arm^®MCUs (System-on-Chip) in a single software development environment. Delivering flexible

hardware, software and tool options for your IoT applications. Invest once in the SimpleLink software

development kit and use throughout your entire portfolio. Learn more on ti.com/simplelink.

12.3 Documentation Support

To receive notification of documentation updates on data sheets, errata, application notes and similar, navigate

to the device product folder on ti.com/product/CC2652RSIP. In the upper right corner, click on Alert me to

register and receive a weekly digest of any product information that has changed. For change details, review the

revision history included in any revised document.

The current documentation that describes the MCU, related peripherals, and other technical collateral is listed as

follows.

TI Resource Explorer

Software examples, libraries, executables, and documentation are available for your

device and development board.

Errata

CC2652RSIP Silicon

Errata

The silicon errata describes the known exceptions to the functional specifications for

each silicon revision of the device and description on how to recognize a device

revision.

Application Reports

All application reports for the CC2652RSIP device are found on the device product folder at: ti.com/product/

CC2652RSIP/technicaldocuments.

Technical Reference Manual (TRM)

CC13xx, CC26xx SimpleLink™

Wireless MCU TRM

The TRM provides a detailed description of all modules and peripherals

available in the device family.

12.4 支持资源

TI E2E^™支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解

答或提出自己的问题可获得所需的快速设计帮助。

链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅

TI 的《使用条款》。

12.5 Trademarks

SimpleLink^™, LaunchPad^™, EnergyTrace^™, Code Composer Studio^™, and TI E2E^™are trademarks of Texas

Instruments.

I-jet^™is a trademark of IAR Systems AB.

J-Link^™is a trademark of SEGGER Microcontroller Systeme GmbH.

Submit Document Feedback

61

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

Zigbee^®is a registered trademark of Zigbee Alliance Inc.

Bluetooth^®is a registered trademark of Bluetooth SIG Inc.

Wi-Fi^®is a registered trademark of Wi-Fi Alliance.

Arm Thumb^®is a registered trademark of Arm Limited (or its subsidiaries).

Eclipse^®is a registered trademark of Eclipse Foundation.

IAR Embedded Workbench^®is a registered trademark of IAR Systems AB.

Windows^®is a registered trademark of Microsoft Corporation.

所有商标均为其各自所有者的财产。

12.6 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

12.7 术语表

TI 术语表

本术语表列出并解释了术语、首字母缩略词和定义。

62

Submit Document Feedback

Product Folder Links: CC2652RSIP

CC2652RSIP

ZHCSNG8B –FEBRUARY 2021 –REVISED SEPTEMBER 2022

www.ti.com.cn

13 Mechanical, Packaging, and Orderable Information

13.1 Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

备注

The total height of the module is 1.51 mm.

The weight of the CC2652RSIP module is typically 0.186 g.

Submit Document Feedback

63

Product Folder Links: CC2652RSIP

PACKAGE OUTLINE

MOT0048A

QFM - 1.51 mm max height

S

C

A

L

E

2

.

2

0

QUAD FLAT MODULE

7.1

6.9

B

A

PIN 1 CORNER

7.1

6.9

1.51

1.35

C

SEATING PLANE

0.1 C

0.372

0.292

0.338

44X

0.262

0.15

0.05

C A B

C

SYMM

13

25

0.538

0.462

44X

69

73

64

59

68

63

SYMM

6.2

2

54

49

58

53

0.338

0.262

0.15

25X

C A B

C

0.05

48

37

1

0.5 TYP

0.538

0.462

4X

2

0.15

0.05

C A B

C

6.2

4225653/C 12/2020

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

www.ti.com

EXAMPLE BOARD LAYOUT

MOT0048A

QFM - 1.51 mm max height

QUAD FLAT MODULE

(6.2)

(2)

4X ( 0.5)

48

37

1

METAL UNDER

SOLDER MASK

(0.5) TYP

SOLDER MASK

OPENING

49

53

58

54

59

SYMM

63

(6.2)

(2)

64

69

68

73

25X ( 0.3)

(R0.05)

TYP

44X (0.5)

25

13

SYMM

0.05 MIN

ALL AROUND

44X (0.3)

LAND PATTERN EXAMPLE

SOLDER MASK DEFINED

SCALE:15X

4225653/C 12/2020

NOTES: (continued)

3. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments

literature number SLUA271 (www.ti.com/lit/slua271).

www.ti.com

EXAMPLE STENCIL DESIGN

MOT0048A

QFM - 1.51 mm max height

QUAD FLAT MODULE

(6.2)

(2)

4X ( 0.5)

48

1

37

(0.5) TYP

49

53

58

54

59

63

SYMM

(6.2) (2)

64

69

68

73

44X (0.5)

25X ( 0.3)

(R0.05)

TYP

25

13

SYMM

44X (0.3)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4225653/C 12/2020

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

www.ti.com

重要声明和免责声明

TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，

不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担

保。

这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验

证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。

这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。

您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成

本、损失和债务，TI 对此概不负责。

TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改

TI 针对 TI 产品发布的适用的担保或担保免责声明。

TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE

邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	CC2652RSIP
厂家：	TEXAS INSTRUMENTS
描述：	具有 352KB 内存的 SimpleLink™ 多协议 2.4GHz 无线系统级封装模块无线
文件：	总70页 (文件大小：2816K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

CC2652RSIP [TI]

相关型号：

CC2652RSIPMOTR

CC2662R-Q1

CC2662R1FTWRGZRQ1

CC28-11EWA

CC2824B475R-10

CC2824D225R-10

CC2824E105R-10

CC2824E113R-10

CC2824E253R-10

CC2824E474R-10

CC2824E513R-10

CC2824J502R-10