CC8520RHAT [TI]
2.4 GHz RF SoC FOR WIRELESS DIGITAL AUDIO STREAMING CC8520 - PurePath™ Wireless; 2.4 GHz射频片上系统的无线数字音频流CC8520 - PurePath™无线型号: | CC8520RHAT |
厂家: | TEXAS INSTRUMENTS |
描述: | 2.4 GHz RF SoC FOR WIRELESS DIGITAL AUDIO STREAMING CC8520 - PurePath™ Wireless |
文件: | 总19页 (文件大小:592K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CC8520
www.ti.com
SWRS091A – MARCH 2010
2.4 GHz RF SoC FOR WIRELESS DIGITAL AUDIO STREAMING
CC8520 - PurePath™ Wireless
APPLICATIONS
-
Suited for systems targeting compliance
with worldwide radio frequency
regulations: ETSI EN 300 328 and EN
300 440 class 2 (Europe), FCC CFR47 Part
15 (US) and ARIB STD-T66 (Japan)
-
-
-
-
Wireless high-quality digital audio
Wireless point-to-point audio link
Wireless headphones
Wireless loudspeakers
Digital audio support
FEATURES
Built-in audio protocol
-
Digital I2S audio interface supports 1 or 2
audio channels at sample rates of 32,
40.275, 44.1 and 48 kHz, and supports 16 bit
word-widths
-
-
CD-quality uncompressed audio
Excellent robustness and co-existence
through multiple techniques
-
-
Audio latency down to 20 ms
-
-
-
-
-
Adaptive Frequency Hopping
Forward Error Correction
Buffering and Retransmission
Error Concealment
Optional
compression
Data side-channel allows data to be sent
alongside the audio between external host
controllers
high
quality
audio
Development tools
-
PC-based PurePath™ Wireless
Configurator (PPW Configurator) for
CC8520 configuration
CC8520 User’s Guide
CC85XXDK audio development kit
No software development needed
External system
-
-
-
Seamless connection and control of
selected TI audio codecs, DACs/ADCs and
digital audio amplifiers using I2S and I2C
HID functions like power control, binding,
volume control, audio channel selection
can be mapped to I/Os
-
-
-
RoHS compliant 6mm x 6mm QFN-40
package
RF section
-
-
-
5 Mbps over-the-air data rate
Bandwidth-efficient modulation format
Excellent link budget with programmable
output power up to +3.5 dBm and -83 dBm
sensitivity
-
Seamless support for CC2590 range
extender (+11dBm output power, -86dBm
sensitivity)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PurePath™ is a trademark for Texas Instruments
All other trademarks are the property of their respective owners.
Copyright © 2010, Texas Instruments Incorporated
CC8520
WWW.TI.COM
SWRS091A – MARCH 2010
DESCRIPTION
QFN-40 PACKAGE (TOP VIEW)
The PurePath™ Wireless platform is a cost-
effective and low-power solution optimized for
wireless transmission of high-quality digital audio.
The CC8520 includes a robust built-in wireless
audio transmission protocol and can control
selected external audio devices. Utilizing
numerous coexistence mechanisms allows the
CC8520 to avoid interfering with, or being
interfered by other 2.4 GHz radio systems. The
CC8520, which supports 2 audio channels, is the
first device in the PurePath™ Wireless platform.
The CC8520 operates autonomously, and can be
used with or without an external MCU. An external
host processor can be connected through SPI and
control some aspects of its operation. The CC8520
interfaces easily with other TI audio ICs and DSPs
(using I2S and DSP/TDM interfaces).
ABBREVIATIONS
ADC
ARIB
BER
Analog to Digital Converter
Association of Radio Industries and Businesses
Bit Error Rate
LAN
LED
LNA
MISO
MOSI
MCU
PA
Local Area Network
Light Emitting Diode
Low Noise Amplifier
Master In Slave Out
Master Out Slave In
Microcontroller
CODEC Coder/Decoder
DAC
DRC
DSP
EHIF
ESD
ETSI
FCC
FEC
FSK
FW
Digital to Analog Converter
Dynamic Range Control
Digital Signal Processor
Power Amplifier
External Host Interface
PCM
PER
PLL
Pulse Code Modulation
Packet Error Rate
Electro Static Discharge
European Telecommunications Standard Institute
Federal Communications Commission
Forward Error Correction
Phase Lock Loop
PM
Protocol Master
PPW
PS
PurePath™ Wireless
Protocol Slave
Frequency Shift Keying
Firmware
PWM
RoHS
RF
Pulse Width Modulation
Restriction of Hazardous Substances
Radio Frequency
HID
Human Interface Device
I2C
Inter-Integrated Circuit (serial communications bus)
Inter-IC Sound (serial bus for digital audio signals)
Institute of Electrical and Electronics Engineers
Industrial, Scientific, Medical
I2S
SPI
Serial Peripheral Interface
System-on-Chip
IEEE
ISM
SoC
STD
TDM
Standard
JEDEC
Joint Electron Device Engineering Council
Time-Division Multiplexing
2
Copyright ©2010, Texas Instruments Incorporated
CC8520
WWW.TI.COM
SWRS091A – MARCH 2010
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS(1)
PARAMETER
TEST CONDITIONS
Min
–0.3
–0.3
Max
Unit
V
Supply voltage
All supply pins must have the same voltage
3.9
Voltage on any digital pin
min(VDD +
0.3, 3.9)
V
Input RF level
10
85
dBm
°C
Storage temperature range
Reflow soldering temperature
ESD (2)
-40
According to IPC/JEDEC J-STD-020
260
2000
°C
All pads, according to human-body model
(HBM), JEDEC STD 22, method A114
V
According to charged-device model (CDM),
JEDEC STD 22, method C101E
400
V
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
CAUTION: ESD sensitive device. Precaution should be used when handing the device in order to prevent permanent damage.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
TEST CONDITIONS
Min
-40
2.0
Max
+85
3.6
Unit
°C
Operating ambient temperature range, TA
Operating supply voltage
V
3
Copyright ©2010, Texas Instruments Incorporated
CC8520
WWW.TI.COM
SWRS091A – MARCH 2010
GENERAL CHARACTERISTICS
Measured on Texas Instruments CC8520 EM reference designs with TA = 25°C and VDD = 3.3 V, unless otherwise noted.
PARAMETER
RF frequency range
Data rate
TEST CONDITION
MIN
TYP
MAX
UNIT
MHz
2400
2483.5
Shaped 8FSK
5
1
Mbps
Current consumption,
power down state
Voltage regulator / crystal oscillator off – status
lost (POWERED_DOWN state)
µA
Average current for audio sink with I2S interface
active and uncompressed stereo audio link at 48
kHz, 16 bits. (PCM16)
Current consumption,
audio sink
25
29
mA
Average current for audio source with I2S
interface active and uncompressed stereo audio
link at 48 kHz, 16 bits, maximum output power.
(PCM16)
Current consumption,
audio source
mA
Latency between I2S interface on audio source
and I2S interface on audio sink. Uncompressed
16 bit. Audio latency is programmable using the
PPW Configurator [1].
Audio latency
768
2048
Samples
48
44.1
40.275
32
Audio sample rate is programmable using the
PPW Configurator [1] (1)
Audio sample rate
kHz
(1) ±2000ppm tolerance
RF CHARACTERISTICS, CC8520
Measured on Texas Instruments CC8520 EM reference designs with TA = 25°C and VDD = 3.3 V, unless otherwise noted.
PARAMETER
TEST CONDITION
MIN
TYP
3.5
-83
-2
MAX
UNIT
dBm
dBm
dBm
Output power
Maximum output power setting
5 Mbps, 0.1 % BER
Receiver sensitivity
Saturation (maximum input level)
5 Mbps, 0.1 % BER
Adjacent channel, ±4MHz, wanted 3dB above
sensitivity
8
dB
Selectivity
Alternate channel, ±8MHz, wanted 3dB above
sensitivity
35
dB
Occupied bandwidth
Spurious emission
99% energy bandwidth
3.8
MHz
Suitable for systems targeting compliance with EN 300 328, EN 300 440(1), FCC CFR47 Part 15
and ARIB STD-T-66
(1) Systems with external antenna connector: Margins for passing conducted requirements at sub 1GHz frequencies can be improved by
using a simple band-pass filter connected between matching network and RF connector (1.6 pF in parallel with 1.6 nH); this filter must be
connected to a good RF ground.
48-MHz CRYSTAL REQUIREMENTS
General parameters with TA = 25°C and VDD = 3.3 V, unless otherwise noted.
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
MHz
ppm
ohm
pF
Crystal frequency
48
Crystal frequency accuracy requirement(1)
ESR Equivalent series resistance
C0 Crystal shunt capacitance
CL Crystal load capacitance
(1) Including aging and temperature dependency
-50
-
50
60
3
-
15
16
17
pF
4
Copyright ©2010, Texas Instruments Incorporated
CC8520
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SWRS091A – MARCH 2010
AUDIO PLL CHARACTERISTICS
TA = 25°C and VDD = 3.3 V, unless otherwise noted.
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
32·FWCLK
32·FWCLK
31.936
512·FWCLK
256·FWCLK
48.096
MCLK Frequency range
BCLK Frequency range
WCLK Frequency range
Programmable using the PPW Configurator [1]
Programmable using the PPW Configurator [1]
kHz
ps
80
200
RMS jitter
RMS period jitter for 1000 periods
1
PIN DESCRIPTION
Figure 1 - CC8520 QFN Package Top View
PIN
PIN NAME
PIN TYPE
DESCRIPTION
-
GND
Ground
The exposed die attach pad must be connected to a solid ground plane underneath the
chip
1
2
3
XANTN
XANTP
CS_N
Digital I/O1
Digital I/O1
FW2.0: Controlling external antenna switch (FW1.0/FW1.1: NC)
FW2.0: Controlling external antenna switch (FW1.0/FW1.1: NC)
Serial SPI configuration interface, active low chip select
Digital Input
(pull-up)
4
5
6
SCLK
MOSI
MISO
Digital I/O1
Digital I/O1
Serial SPI configuration interface, clock input/output
Serial SPI configuration interface, master data input, slave data output
Serial SPI configuration interface, master data output, slave data input GIO0 output when
CS_N is deasserted.
Digital I/O1
Digital I/O1
GIO0
GIO1
General-purpose digital I/O pin 0
7
General-purpose digital I/O pin 1
Configurable with PurePath™ Wireless Configurator
General-purpose digital I/O pin 2
8
9
GIO2
GIO3
Digital I/O1
Digital I/O2
General-purpose digital I/O pin 3
Configurable with PurePath™ Wireless Configurator
5
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CC8520
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SWRS091A – MARCH 2010
PIN
PIN NAME
PIN TYPE
DESCRIPTION
10
IODVDD
Power
Digital power supply for the digital I/Os in the SPI interface and GIO1-GIO3.
(I/O pads)
11
12
13
RSTN
Digital Input
(pull-up)
Active-low device reset
IOVDD
Power
(I/O pins)
Digital power supply for the RSTN and MCLK digital I/O pins.
MCLK
GIO4
BCLK
GIO5
WCLK
GIO6
AD0
Digital I/O1
Digital I/O1
Digital I/O1
Digital I/O1
Digital I/O1
Master clock output for external audio devices
General-purpose digital I/O pin 4
14
15
16
17
I2S/DSP audio interface bit clock (in/out)
General-purpose digital I/O pin 5
I2S/DSP audio interface word clock (in/out)
General-purpose digital I/O pin 6
I2S/DSP audio interface data line 0 (in/out)
General-purpose digital I/O pin 7
GIO7
AD1
I2S/DSP audio interface data line 1 (in/out)
General-purpose digital I/O pin 8
GIO8
IOVDD
18
19
Power
(I/O pins)
Digital power supply for the digital I/Os in audio interface (BCLK-AD2).
AD2
GIO9
AVDD
XI
Digital I/O2
I2S/DSP audio interface data line 2 (in/out)
Configurable with PurePath™ Wireless Configurator
2.0-3.6V analog power supply connection
20
21
22
23
24
Power (Analog)
Analog I/O
Crystal oscillator pin input, or external clock input (48 MHz)
Crystal oscillator pin output (48 MHz)
XO
Analog I/O
AVDD
RF_P
Power (Analog)
RF I/O
Analog power supply connection
Positive differential RF input signal to LNA in receive mode
Positive differential RF output signal from PA in transmit mode
Negative differential RF input signal to LNA in receive mode
Negative differential RF output signal from PA in transmit mode
Analog power supply connection
25
RF_N
RF I/O
26
27
28
29
AVDD
AVDD
AVDD
VBAT
Power (Analog)
Power (Analog)
Power (Analog)
Analog input
Analog power supply connection
Analog power supply connection
Battery voltage supervisor (threshold level programmable by external resistor to positive
battery terminal)
30
31
32
RBIAS
AVDD
SCL
Analog output
Power (Analog)
Digital I/O1
External precision bias resistor for reference current. 56 kΩ, 1%
Analog power supply connection (Guard ring AVDD connection for digital noise isolation)
I2C master clock line. Must be connected to external pull-up
General-purpose digital I/O pin 10
GIO10
SDA
33
Digital I/O1
I2C master data line. Must be connected to external pull-up
General-purpose digital I/O pin 11
GIO11
GIO12
GIO13
XLNAEN
IODVDD
XPAEN
34
35
36
37
38
Digital I/O1
Digital I/O1
Digital I/O2
General-purpose digital I/O pin 12
General-purpose digital I/O pin 13
Control external LNA
Power (I/O pads) Digital power supply for SCL-GIO15 pins.
Digital I/O2
Control external PA
6
Copyright ©2010, Texas Instruments Incorporated
CC8520
WWW.TI.COM
SWRS091A – MARCH 2010
PIN
PIN NAME
PIN TYPE
DESCRIPTION
39
DCPL
Power (Digital)
1.7V-1.85 V linear voltage regulator output to which a 1 uF decoupling capacitor should be
attached. For test-purposes an external digital supply voltage (1.62-1.98 V) can be applied
here, bypassing the voltage regulator.
NOTE: The voltage regulator is intended for use with the CC8520 chip only. It cannot be
used to provide supply voltage to other devices.
40
DVDD
Power (Digital)
Digital power supply for the linear voltage regulator.
1
2
Digital I/O pad with 4 mA source/sink capability, programmable direction and pull-up, pull-down or high-impedance.
Digital I/O pad with 20 mA source/sink capability, programmable direction and pull-up, pull-down or high-impedance.
2.0V-3.6V
Power Supply
C391
Antenna
(50 Ohm)
CC2590 +
Matching/
Filtering
Alternative:
CC2590 External LNA/PA
xANTM
xANTP
CSN
RBIAS
VBAT
AVDD
AVDD
AVDD
RF_N
RF_P
AVDD
1
2
3
4
5
6
7
8
9
30
29
28
27
26
25
24
23
Antenna
(50 Ohm)
SCLK
MOSI
MISO
GIO1
GIO2
GIO3
C301
L302
CC8520
Audio Device
C306
L303
C303
L304
C305
L301
C302
X0
X1
22
21
10 IOVDD
Figure 2 - CC8520 Application Circuit
7
Copyright ©2010, Texas Instruments Incorporated
CC8520
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SWRS091A – MARCH 2010
2
SYSTEM DESCRIPTION
The CC8520 is a 2.4GHz wireless SoC operating in the 2.4 GHz ISM band designed for streaming digital
audio wirelessly. It is designated to operate autonomously (without any host MCU) but certain aspects of
operation can be controlled by a host MCU.
Before operation, the CC8520 must be programmed with a user-specific FW image, which can be created
using the PPW Configurator [1]. The configuration file can be programmed into the on-chip Flash memory by
using the PPW Configurator and the CC Debugger [2] and is also programmable in a production line. The
configuration image contains information identifying the device as a master or a slave, how many channels are
supported, the direction of the audio channels, HID support, audio device supported and more.
If CC8520 is configured as a slave, it will automatically start searching for a valid audio network. If configured
as a master, it will start a new network. As soon as a network is formed, audio transmission will commence.
The CC8520 will automatically configure an attached supported audio IC (see compatibility list for a list of
supported ICs in chapter 3).
3
SUPPORTED AUDIO DEVICES
Supported ADC/DAC/Codec/Amplifier Devices
The following device drivers will initially be implemented:
Device
DESCRIPTION
Low-Power Stereo Codec with 6 Inputs, 6 Outputs,
Speaker/HP Amp and Enhanced Digital Effects
AIC3101
Low-Power Stereo CODEC with 6 Inputs, 6 Outputs, HP Amp
and Enhanced Digital Effects
92dB SNR Low-Power Stereo ADC with Digital Mic Support
AIC3204: Very Low-Power Stereo Audio CODEC with Power
Tune™ Technology
AIC3104
ADC3101
AIC3204
Note: The complete list of supported devices can be found in the PPW Configurator [1].
Supported SPDIF-RX / SPDIF-TX / DSP Devices
The following device drivers will be implemented:
Device
DIR9001
DIT4096
DSP
DESCRIPTION
96 kHz, 24-Bit Digital Audio Interface Receiver
96 kHz, Digital Audio Transmitter
Generic Digital Audio Device
Note: The complete list of supported devices can be found in the PPW Configurator [1].
Other audio devices
The CC8520 is compatible with any I2S-based audio device that does not need to be configured at power-up
and that is compatible with the requirements listed in the audio interface (Chapter 6). It is also compatible with
a wide range of TI DSPs using an I2S interface.
8
Copyright ©2010, Texas Instruments Incorporated
CC8520
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SWRS091A – MARCH 2010
4
NETWORK TOPOLOGY AND NOMENCLATURE
A CC8520 network consists of one Protocol Master (PM) and one or two Protocol Slave(s) (PS). The PM
provides the audio reference clock and controls network association. The PS regenerate the audio reference
clock based on the packets received. Audio can be transmitted from the PM to a PS. The device receiving the
audio is called an Audio Sink, the device sending the audio is called an Audio Source. A device can be both
Audio Sink and Audio Source at the same time (bidirectional audio will be supported in future revisions of the
firmware). The CC8520 network also includes a Data Side-Channel which is a bi-directional data link between
the PM and all PS in the network. This is further described in chapter 8.
Figure 3 illustrates the different network topologies that can be formed with CC8520 using the different
firmware versions.
Audio channel
FW1.0
FW1.0
PM
PS
PM
PS
Data channel
2 audio channels:
stereo audio PM to PS
1 audio channel:
mono audio PM to PS
FW1.1
FW1.1
PS1
PS1
PM
PM
PS2
PS2
2 channels:
2 channels:
mono audio PM to PS1
mono audio PM to PS2
mono audio PS1 to PM
mono audio PS2 to PM
FW2.0
FW2.0
PS1
PM
PS
PM
PS2
2 channels:
mono audio PM to PS
mono audio PS to PM
2 channels:
mono audio PM to PS1
mono audio PS2 to PM
Figure 3 CC8520 topologies supported for different CC8520 FW revisions
(Yellow arrow = audio channel. Blue arrow = data side channel. PM = Protocol Master. PS = Protocol Slave)
9
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CC8520
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SWRS091A – MARCH 2010
10
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CC8520
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SWRS091A – MARCH 2010
5
COEXISTENCE AND AUDIO COMPRESSION
The CC8520 implements a wide range of techniques to maximize coexistence performance when operating in
an environment with other 2.4 GHz wireless devices. The built-in protocol implements adaptive frequency
hopping. This helps improve coexistence with RF sources that do not move around in frequency, such as IEEE
802.11 (Wireless LAN) devices, as well as providing robust performance in a multipath RF environment. Audio
is buffered in the receiver, and any data which is not correctly received, is retransmitted utilizing the high raw
datarate (5Mbps). When link quality is poor (e.g. when moving out of range), audio is muted until a reliable link
is restored.
Forward Error Correction (FEC) is built into the CC8520 modulation scheme. Furthermore, packets are divided
into independent sections so that an error in one section does not mean the whole packet is lost.
The CC8520 supports uncompressed PCM16 audio, with no modifications made to the digital audio. High
quality audio compression can optionally be enabled and effectively reducing average current consumption by
lowering the radio duty-cycle. Compression improves robustness further, as there is less data sent and more
time available for retransmission.
6
AUDIO INTERFACE
The CC8520 audio interface is I2S compatible and it supports up to 2 audio channels. The audio interface on
the protocol master can be configured as clock master (supplied from the internal audio PLL) or as clock slave
(clock supplied from external audio IC).
The audio interface has 2 data pins. Each of these can be configured as an input, output or unused. The audio
interface can be configured to support I2S. The CC8520 supports word widths of 16 to 24 bits, but over-the-air
16 bits is always used.
7
HUMAN INTERACTION DRIVERS (HID)
The CC8520 supports basic HID functionality without an external MCU. This means that some basic
functionality can be controlled on the slave remotely from the master. The HID functionality supported
includes:
-
-
-
-
power control (to turn devices on/off)
network binding (to pair devices)
volume control (volume control can be managed locally)
Status LED (blinking diode to indicate the status of the RF link)
All HID functions are configurable in the PPW Configurator [1] and can be mapped to the CC8520 I/O pins.
8
EXTERNAL HOST INTERFACE (EHIF / Data side channel)
The external host interface (EHIF) allows an external host device, e.g. a microcontroller, to:
•
•
•
Control the operation of and poll status from the CC8520, mainly by taking over driver functionality.
Communicate with other external host devices through an integrated data side-channel
Get access to test functionality for audio, I/O and RF.
The external host interface is available via SPI with a single interrupt pin. The external host will act as SPI
master and CC8520 will act as SPI slave.
User specified data can be transferred between the master EHIF and the slave EHIFs, in both directions using
the data side-channel. The data side-channel establishes robust, ensured-delivery connections in both
directions from any slave to the master or from master to any slave (direct slave to slave communication is not
11
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CC8520
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SWRS091A – MARCH 2010
available). There is no specified minimum throughput for the data side-channel but under normal operating
conditions and data rate of up to 30 kbps is possible in each direction.
More details can be found in the CC8520 User’s Guide [2].
9
REFERENCES
[1] PurePath™ Wireless Configurator
[2] CC8520 product folder
[3] CC-Debugger
12
Copyright ©2010, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
5-Apr-2010
PACKAGING INFORMATION
Orderable Device
CC8520RHAR
CC8520RHAT
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
VQFN
RHA
40
2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
VQFN
RHA
40
250 Green (RoHS & CU NIPDAU Level-3-260C-168 HR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CC8520RHAR
CC8520RHAT
VQFN
VQFN
RHA
RHA
40
40
2500
250
330.0
330.0
16.4
16.4
6.3
6.3
6.3
6.3
1.5
1.5
12.0
12.0
16.0
16.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
20-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CC8520RHAR
CC8520RHAT
VQFN
VQFN
RHA
RHA
40
40
2500
250
333.2
333.2
345.9
345.9
28.6
28.6
Pack Materials-Page 2
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Applications
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Amplifiers
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
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www.ti.com/communications
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dsp.ti.com
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Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
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www.ti.com/consumer-apps
www.ti.com/energy
Logic
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www.ti.com/industrial
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Microcontrollers
RFID
power.ti.com
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www.ti.com/medical
microcontroller.ti.com
www.ti-rfid.com
Security
www.ti.com/security
Space, Avionics &
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www.ti.com/space-avionics-defense
RF/IF and ZigBee® Solutions www.ti.com/lprf
Video and Imaging
Wireless
www.ti.com/video
www.ti.com/wireless-apps
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2010, Texas Instruments Incorporated
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