CD4050BDWRE4 [TI]
CMOS Hex Buffer Converters; CMOS六缓冲器转换器
| 型号： | CD4050BDWRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | CMOS Hex Buffer Converters |
| 文件： | 总38页 (文件大小：1725K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD4049UB, CD4050B
August 1998 - Revised May 2004
Data sheet acquired from Harris Semiconductor
SCHS046I
CMOS Hex Buffer/Converters
Applications
The CD4049UB and CD4050B devices are inverting and
non-inverting hex buffers, respectively, and feature logic-
• CMOS to DTL/TTL Hex Converter
• CMOS Current “Sink” or “Source” Driver
• CMOS High-To-Low Logic Level Converter
level conversion using only one supply voltage (V ). The
CC
supply
input-signal high level (V ) can exceed the V
IH
CC
voltage when these devices are used for logic-level
conversions. These devices are intended for use as CMOS
to DTL/TTL converters and can drive directly two DTL/TTL
[ /Title
(CD40
49UB,
CD405
0B)
/Sub-
ject
(CMO
S Hex
Buffer/
Con-
verters)
/Autho
r ()
/Key-
words
(Harris
Semi-
con-
ductor,
CD400
0,
metal
gate,
Ordering Information
TEMP.
o
loads. (V
= 5V, V ≤ 0.4V, and I
≥ 3.3mA.)
PART NUMBER
CD4049UBF3A
CD4050BF3A
CD4049UBD
RANGE ( C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOP
CC
OL
OL
The CD4049UB and CD4050B are designated as
replacements for CD4009UB and CD4010B, respectively.
Because the CD4049UB and CD4050B require only one
power supply, they are preferred over the CD4009UB and
CD4010B and should be used in place of the CD4009UB
and CD4010B in all inverter, current driver, or logic-level
conversion applications. In these applications the
CD4049UB and CD4050B are pin compatible with the
CD4009UB and CD4010B respectively, and can be
substituted for these devices in existing as well as in new
designs. Terminal No. 16 is not connected internally on the
CD4049UB or CD4050B, therefore, connection to this
terminal is of no consequence to circuit operation. For
applications not requiring high sink-current or voltage
conversion, the CD4069UB Hex Inverter is recommended.
CD4049UBDR
CD4049UBDT
CD4049UBDW
CD4049UBDWR
CD4049UBE
CD4049UBNSR
CD4049UBPW
CD4049UBPWR
CD4050BD
16 Ld TSSOP
16 Ld TSSOP
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld SOIC
16 Ld PDIP
16 Ld SOP
Features
CD4050BDR
• CD4049UB Inverting
• CD4050B Non-Inverting
CD4050UBDT
CD4050BDW
CD4050BDWR
CD4050BE
• High Sink Current for Driving 2 TTL Loads
• High-To-Low Level Logic Conversion
• 100% Tested for Quiescent Current at 20V
• Maximum Input Current of 1µA at 18V Over Full Package
o
Temperature Range; 100nA at 18V and 25 C
CD4050NSR
•
5V, 10V and 15V Parametric Ratings
CD4050BPW
CD4050BPWR
16 Ld TSSOP
16 Ld TSSOP
CMOS
NOTE: When ordering, use the entire part number. The suffix R denotes tape
and reel. The suffix T denotes a small-quantity reel of 250.
Pinouts
CD4049UB (PDIP, CERDIP, SOIC, SOP, TSSOP)
CD4050B (PDIP, CERDIP, SOIC, SOP)
TOP VIEW
TOP VIEW
V
1
2
3
4
5
6
7
8
16 NC
15 L = F
14 F
V
1
2
3
4
5
6
7
8
16 NC
15 L = F
14 F
CC
CC
G = A
A
G = A
A
H = B
B
13 NC
12 K = E
11 E
H = B
B
13 NC
12 K = E
11 E
I = C
C
I = C
C
10 J = D
10 J = D
9
D
V
9
D
V
SS
SS
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
1
CD4049UB, CD4050B
Functional Block Diagrams
CD4049UB
CD4050B
3
5
2
3
2
A
B
C
D
E
F
G = A
H = B
I = C
A
B
C
D
E
F
G = A
H = B
I = C
4
5
7
4
7
6
6
9
10
12
15
9
10
12
15
J = D
K = E
L = F
J = D
K = E
L = F
11
14
11
14
1
1
V
V
V
V
CC
SS
CC
SS
8
8
NC = 13
NC = 16
NC = 13
NC = 16
Schematic Diagrams
V
CC
V
CC
P
N
P
N
P
N
R
OUT
R
IN
IN
OUT
V
SS
V
SS
FIGURE 1A. SCHEMATIC DIAGRAM OF CD4049UB, 1 OF 6
IDENTICAL UNITS
FIGURE 1B. SCHEMATIC DIAGRAM OF CD4050B, 1 OF 6
IDENTICAL UNITS
2
CD4049UB, CD4050B
Absolute Maximum Ratings
Thermal Information
Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . -0.5V to 20V
DC Input Current, Any One Input. . . . . . . . . . . . . . . . . . . . . . ±10mA
Package Thermal Impedance, θ (see Note1):
JA
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 C/W
D (SOIC) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 C/W
DW (SOIC) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 C/W
NS (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 C/W
PW (TSSOP) Package. . . . . . . . . . . . . . . . . . . . . . . . . . 108 C/W
Maximum Junction Temperature (Plastic Package). . . . . . . . .150 C
Maximum Storage Temperature Range. . . . . . . . . . . 65 C to 150 C
o
o
o
Operating Conditions
o
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
o
o
o
o
o
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .265 C
SOIC - Lead Tips Only
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
o
LIMITS AT INDICATED TEMPERATURE ( C)
TEST CONDITIONS
25
V
V
IN
O
PARAMETER
(V)
(V)
0,5
0,10
0,15
0,20
0,5
0,5
0,10
0,15
0,5
0,5
0,10
0,15
0,5
0,10
0,15
0,5
0,10
0,15
-
V
(V)
-55
1
-40
1
85
30
125
30
MIN
TYP
0.02
0.02
0.02
0.04
5.2
6.4
16
48
-1.2
-3.9
-3.0
-8.0
0
MAX
UNITS
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
mA
mA
V
CC
Quiescent Device Current
-
5
-
-
1
I
(Max)
DD
-
10
15
20
4.5
5
2
2
60
60
2
-
4
4
120
600
2.1
120
600
1.8
-
4
-
20
20
-
20
Output Low (Sink) Current
(Min)
0.4
0.4
0.5
1.5
4.6
2.5
9.5
13.5
-
3.3
4
3.1
3.8
9.6
25
2.6
3.2
8
-
I
OL
2.9
2.4
-
10
15
5
10
6.6
5.6
-
26
20
18
24
-0.65
-2.1
-1.65
-4.3
-
-
Output High (Source) Current
(Min)
-0.81
-2.6
-2.0
-5.2
0.05
0.05
0.05
4.95
9.95
-0.73
-2.4
-1.8
-4.8
0.05
0.05
0.05
4.95
9.95
-0.58
-1.9
-1.35
-3.5
0.05
0.05
0.05
4.95
9.95
-0.48
-1.55
-1.18
-3.1
0.05
0.05
0.05
4.95
9.95
-
I
OH
5
-
10
15
5
-
-
0.05
0.05
0.05
-
Out Voltage Low Level
(Max)
V
OL
-
10
15
5
-
0
V
-
-
0
V
Output Voltage High Level
(Min)
-
4.95
9.95
5
V
V
OH
-
10
15
5
10
15
-
-
V
-
14.95 14.95 14.95 14.95 14.95
-
V
Input Low Voltage, V (Max)
IL
4.5
9
1
2
1
2
1
2
1
2
-
-
-
-
-
-
1
V
CD4049UB
-
10
15
5
-
2
V
13.5
0.5
1
-
2.5
1.5
3
2.5
1.5
3
2.5
1.5
3
2.5
1.5
3
-
2.5
1.5
3
V
Input Low Voltage, V (Max)
IL
-
-
V
CD4050B
-
10
15
-
V
1.5
-
4
4
4
4
-
4
V
3
CD4049UB, CD4050B
DC Electrical Specifications
(Continued)
o
LIMITS AT INDICATED TEMPERATURE ( C)
TEST CONDITIONS
25
V
V
IN
O
PARAMETER
(V)
0.5
1
(V)
V
(V)
-55
4
-40
4
85
4
125
4
MIN
4
TYP
MAX
UNITS
CC
Input High Voltage, V Min
IH
-
5
-
-
-
-
-
-
-
V
V
CD4049UB
-
10
15
5
8
8
8
8
8
-
1.5
4.5
9
-
12.5
3.5
7
12.5
3.5
7
12.5
3.5
7
12.5
3.5
7
12.5
3.5
7
-
V
Input High Voltage, V Min
IH
-
-
V
CD4050B
-
-
10
15
18
-
-
V
13.5
-
11
±0.1
11
±0.1
11
±1
11
±1
11
-
V
-5
±10
Input Current, I Max
IN
0,18
±0.1
µA
o
AC Electrical Specifications T = 25 C, Input t , t = 20ns, C = 50pF, R = 200kΩ
A
r
f
L
L
TEST CONDITIONS
LIMITS (ALL PACKAGES)
PARAMETER
Propagation Delay Time
V
V
TYP
60
32
45
25
45
70
40
45
30
40
32
20
15
15
10
55
22
50
15
50
80
40
30
30
20
15
MAX
120
65
UNITS
IN
CC
5
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Low to High, t
CD4049UB
PLH
10
10
15
15
5
10
5
90
15
5
50
90
Propagation Delay Time
5
140
80
Low to High, t
CD4050B
PLH
10
10
15
15
5
10
5
90
15
5
60
80
Propagation Delay Time
5
65
High to Low, t
CD4049UB
PHL
10
10
15
15
5
10
5
40
30
15
5
30
20
Propagation Delay Time
5
110
55
High to Low, t
CD4050B
PHL
10
10
15
15
5
10
5
100
30
15
5
100
160
80
Transition Time, Low to High, t
Transition Time, High to Low, t
5
TLH
THL
10
15
5
10
15
5
60
60
10
15
10
15
40
30
4
CD4049UB, CD4050B
o
AC Electrical Specifications T = 25 C, Input t , t = 20ns, C = 50pF, R = 200kΩ (Continued)
A
r
f
L
L
TEST CONDITIONS
LIMITS (ALL PACKAGES)
PARAMETER
V
V
TYP
MAX
UNITS
IN
CC
Input Capacitance, C
-
-
15
22.5
pF
IN
CD4049UB
Input Capacitance, C
CD4050B
-
-
5
7.5
pF
IN
Typical Performance Curves
o
o
T
= 25 C
T
= 25 C
A
A
SUPPLY VOLTAGE (V ) = 5V
CC
SUPPLY VOLTAGE (V ) = 5V
CC
5
4
3
2
1
5
MINIMUM
MAXIMUM
4
3
MINIMUM
MAXIMUM
2
1
0
1
2
3
4
0
1
2
3
4
V , INPUT VOLTAGE (V)
V , INPUT VOLTAGE (V)
I
I
FIGURE 2. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS FOR CD4049UB
FIGURE 3. MINIMUM AND MAXIMUM VOLTAGE TRANSFER
CHARACTERISTICS FOR CD4050B
o
o
T
= 25 C
A
T
= 25 C
A
70
60
50
40
30
20
10
70
60
15V
10V
15V
10V
50
40
30
20
10
GATE TO SOURCE VOLTAGE (V ) = 5V
GS
GATE TO SOURCE VOLTAGE (V ) = 5V
GS
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
V
, DRAIN TO SOURCE VOLTAGE (V)
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
DS
FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 5. MINIMUM OUTPUT LOW (SINK) CURRENT DRAIN
CHARACTERISTICS
5
CD4049UB, CD4050B
Typical Performance Curves (Continued)
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
-8
-7
-6
-5
-4
-3
-2
-1
0
-8
-7
-6
-5
-4
-3
-2
-1
0
o
o
T
= 25 C
T = 25 C
A
A
-5
-5
GATE TO SOURCE VOLTAGE
= -5V
-10
GATE TO SOURCE VOLTAGE
= -5V
-10
-15
-20
-25
-30
-35
V
GS
V
GS
-15
-10V
-15V
-20
-25
-30
-10V
-15V
-35
FIGURE 6. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
10
10
9
9
SUPPLY VOLTAGE
SUPPLY VOLTAGE
o
8
7
6
5
4
3
2
1
0
V
= 10V
CC
8
7
6
5
4
3
2
1
0
V
= 10V
125 C
o
CC
125 C
o
o
T
= -55 C
T
A
= -55 C
A
V
= 5V
V
= 5V
CC
CC
o
-55 C
o
-55 C
o
o
125 C
125 C
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
V , INPUT VOLTAGE (V)
V , INPUT VOLTAGE (V)
I
I
FIGURE 8. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS
AS A FUNCTION OF TEMPERATURE FOR CD4049UB
FIGURE 9. TYPICAL VOLTAGE TRANSFER CHARACTERISTICS
AS A FUNCTION OF TEMPERATURE FOR CD4050B
5
10
o
o
T
= 25 C
T
= 25 C
A
A
5
4
10
10
4
3
2
10
10
15V; 1MHz
15V; 100kHz
10V; 100kHz
15V; 10kHz
10V; 10kHz
15V; 1kHz
3
2
10
10
LOAD CAPACITANCE
= 50pF
10
C
L
(11pF FIXTURE + 39pF EXT)
= 15pF
10
C
L
(11pF FIXTURE + 4pF EXT)
SUPPLY VOLTAGE V
CC
= 5V FREQUENCY (f) = 10kHz
10
2
3
4
5
2
3
4
5
6
7
8
10
10
10
10
10
10
10
10
10
10
10
10
10
f, INPUT FREQUENCY (kHz)
t , t , INPUT RISE AND FALL TIME (ns)
r
f
FIGURE 10. TYPICAL POWER DISSIPATION vs FREQUENCY
CHARACTERISTICS
FIGURE 11. TYPICAL POWER DISSIPATION vs INPUT RISE
AND FALL TIMES PER INVERTER FOR CD4049UB
6
CD4049UB, CD4050B
Typical Performance Curves (Continued)
6
5
4
3
2
10
10
10
10
10
o
T
= 25 C
A
15V; 1MHz
15V; 100kHz
10V; 100kHz
15V; 10kHz
10V; 10kHz
15V; 1kHz
10
1
SUPPLY VOLTAGE V
= 5V FREQUENCY (f) = 10kHz
CC
2
3
4
5
6
7
8
10
10
10
10
10
10
10
10
t , t , INPUT RISE AND FALL TIME (ns)
r
f
FIGURE 12. TYPICAL POWER DISSIPATION vs INPUT RISE
AND FALL TIMES PER INVERTER FOR CD4050B
Test Circuits
V
CC
V
CC
V
CC
INPUTS
INPUTS
OUTPUTS
V
IH
V
SS
+
DVM
-
V
IL
I
DD
V
SS
V
SS
NOTE: Test any one input with other inputs at V
or V
.
CC
SS
FIGURE 13. QUIESCENT DEVICE CURRENT TEST CIRCUIT
FIGURE 14. INPUT VOLTAGE TEST CIRCUIT
CMOS 10V LEVEL TO DTL/TTL 5V LEVEL
V
= 5V
CC
V
CC
COS/MOS
IN
OUTPUT
TO DTL/TTL
INPUTS
OUTPUTS
V
CC
CD4049
INPUTS
I
10V = V
5V = V
IH
OH
V
0 = V
IL
0 = V
OL
SS
V
SS
V
In Terminal - 3, 5, 7, 9, 11, or 14
Out Terminal - 2, 4, 6, 10, 12 or 15
SS
V
V
Terminal - 1
Terminal - 8
NOTE: Measure inputs sequentially, to both V
CC
and V connect
SS
CC
SS
all unused inputs to either V
or V .
CC
SS
FIGURE 16. LOGIC LEVEL CONVERSION APPLICATION
FIGURE 15. INPUT CURRENT TEST CIRCUIT
7
CD4049UB, CD4050B
Test Circuits (Continued)
V
DD
0.1µF
I
500µF
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
C
L
10kHz,
100kHz, 1MHz
C
INCLUDES FIXTURE CAPACITANCE
L
FIGURE 17. DYNAMIC POWER DISSIPATION TEST CIRCUITS
8
CD4049UB, CD4050B
9
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
PACKAGING INFORMATION
Orderable Device
CD4049UBD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4049UBDE4
CD4049UBDG4
CD4049UBDR
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4049UBDRE4
CD4049UBDRG4
CD4049UBDT
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4049UBDTE4
CD4049UBDTG4
CD4049UBDW
CD4049UBDWE4
CD4049UBDWG4
CD4049UBDWR
CD4049UBDWRE4
CD4049UBDWRG4
CD4049UBE
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DW
DW
DW
DW
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD4049UBEE4
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD4049UBF
CD4049UBF3A
ACTIVE
ACTIVE
CDIP
CDIP
CDIP
CDIP
SOIC
SOIC
SO
J
J
16
16
16
16
16
16
16
1
1
TBD
TBD
TBD
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
Call TI
A42
CD4049UBF3AS2283
CD4049UBF3AS2534
CD4049UBM
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
J
Call TI
Call TI
Call TI
Call TI
J
Call TI
D
D
NS
Call TI
CD4049UBM96
Call TI
CD4049UBNSR
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4049UBNSRE4
CD4049UBNSRG4
CD4049UBPW
ACTIVE
ACTIVE
ACTIVE
SO
SO
NS
NS
PW
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
CD4049UBPWE4
CD4049UBPWG4
CD4049UBPWR
CD4049UBPWRE4
CD4049UBPWRG4
CD4050BD
TSSOP
PW
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PW
PW
PW
PW
D
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BDE4
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BDG4
CD4050BDR
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BDRE4
CD4050BDRG4
CD4050BDT
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BDTE4
CD4050BDTG4
CD4050BDW
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DW
DW
DW
DW
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BDWE4
CD4050BDWG4
CD4050BDWR
CD4050BDWRE4
CD4050BDWRG4
CD4050BE
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD4050BEE4
PDIP
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD4050BF
CD4050BF3A
ACTIVE
ACTIVE
CDIP
CDIP
CDIP
CDIP
SOIC
SO
J
J
16
16
16
16
16
16
1
1
TBD
TBD
TBD
TBD
TBD
A42
N / A for Pkg Type
N / A for Pkg Type
Call TI
A42
CD4050BF3AS2283
CD4050BF3AS2534
CD4050BM
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
J
Call TI
Call TI
Call TI
J
Call TI
D
NS
Call TI
CD4050BNSR
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
15-Oct-2009
Orderable Device
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
CD4050BNSRE4
CD4050BNSRG4
CD4050BPW
SO
NS
16
16
16
16
16
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
PW
PW
PW
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD4050BPWE4
CD4050BPWG4
CD4050BPWR
CD4050BPWRE4
CD4050BPWRG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
JM38510/05553BEA
JM38510/05554BEA
ACTIVE
ACTIVE
CDIP
CDIP
J
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
CD4049UBDR
CD4049UBDWR
CD4049UBNSR
CD4049UBPWR
CD4050BDR
SOIC
SOIC
SO
D
16
16
16
16
16
16
16
16
2500
2000
2000
2000
2500
2000
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
12.4
16.4
16.4
16.4
12.4
6.5
10.75
8.2
10.3
10.7
10.5
5.6
2.1
2.7
2.5
1.6
2.1
2.7
2.5
1.6
8.0
12.0
12.0
8.0
16.0
16.0
16.0
12.0
16.0
16.0
16.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
DW
NS
PW
D
TSSOP
SOIC
SOIC
SO
7.0
6.5
10.3
10.7
10.5
5.6
8.0
CD4050BDWR
CD4050BNSR
CD4050BPWR
DW
NS
PW
10.75
8.2
12.0
12.0
8.0
TSSOP
7.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CD4049UBDR
CD4049UBDWR
CD4049UBNSR
CD4049UBPWR
CD4050BDR
SOIC
SOIC
SO
D
16
16
16
16
16
16
16
16
2500
2000
2000
2000
2500
2000
2000
2000
333.2
346.0
346.0
346.0
333.2
346.0
346.0
346.0
345.9
346.0
346.0
346.0
345.9
346.0
346.0
346.0
28.6
33.0
33.0
29.0
28.6
33.0
33.0
29.0
DW
NS
PW
D
TSSOP
SOIC
SOIC
SO
CD4050BDWR
CD4050BNSR
CD4050BPWR
DW
NS
PW
TSSOP
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
PACKAGING INFORMATION
Orderable Device
CD4049UBD
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBM
-55 to 125 CD4049UBE
-55 to 125 CD4049UBE
CD4049UBDE4
CD4049UBDG4
CD4049UBDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
D
D
Green (RoHS
& no Sb/Br)
40
Green (RoHS
& no Sb/Br)
D
2500
2500
2500
250
250
250
40
Green (RoHS
& no Sb/Br)
CD4049UBDRE4
CD4049UBDRG4
CD4049UBDT
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
CD4049UBDTE4
CD4049UBDTG4
CD4049UBDW
CD4049UBDWE4
CD4049UBDWG4
CD4049UBDWR
CD4049UBDWRE4
CD4049UBDWRG4
CD4049UBE
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
DW
DW
DW
DW
DW
DW
N
Green (RoHS
& no Sb/Br)
40
Green (RoHS
& no Sb/Br)
40
Green (RoHS
& no Sb/Br)
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Pb-Free
(RoHS)
CD4049UBEE4
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
CD4049UBF
ACTIVE
ACTIVE
CDIP
CDIP
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 CD4049UBF
CD4049UBF3A
J
-55 to 125 CD4049UBF3A
CD4049UBF3AS2283
CD4049UBF3AS2534
CD4049UBM
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
CDIP
CDIP
SOIC
SOIC
SO
J
J
16
16
16
16
16
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
D
Call TI
Call TI
-55 to 125
CD4049UBM96
D
Call TI
Call TI
-55 to 125
CD4049UBNSR
NS
2000
2000
2000
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125 CD4049UB
CD4049UBNSRE4
CD4049UBNSRG4
CD4049UBPW
CD4049UBPWE4
CD4049UBPWG4
CD4049UBPWR
CD4049UBPWRE4
CD4049UBPWRG4
CD4050BD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
NS
PW
PW
PW
PW
PW
PW
D
16
16
16
16
16
16
16
16
16
16
16
16
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 125 CD4049UB
-55 to 125 CD4049UB
-55 to 125 CM049UB
-55 to 125 CM049UB
-55 to 125 CM049UB
-55 to 125 CM049UB
-55 to 125 CM049UB
-55 to 125 CM049UB
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
SO
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
SOIC
Green (RoHS
& no Sb/Br)
90
Green (RoHS
& no Sb/Br)
90
Green (RoHS
& no Sb/Br)
2000
2000
2000
40
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CD4050BDE4
SOIC
D
40
Green (RoHS
& no Sb/Br)
CD4050BDG4
SOIC
D
40
Green (RoHS
& no Sb/Br)
CD4050BDR
SOIC
D
2500
2500
Green (RoHS
& no Sb/Br)
CD4050BDRE4
SOIC
D
Green (RoHS
& no Sb/Br)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
CD4050BDRG4
CD4050BDT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
16
16
16
16
16
16
16
16
16
16
16
16
2500
250
250
250
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BM
-55 to 125 CD4050BE
-55 to 125 CD4050BE
D
Green (RoHS
& no Sb/Br)
CD4050BDTE4
CD4050BDTG4
CD4050BDW
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
DW
DW
DW
DW
DW
DW
N
Green (RoHS
& no Sb/Br)
CD4050BDWE4
CD4050BDWG4
CD4050BDWR
CD4050BDWRE4
CD4050BDWRG4
CD4050BE
40
Green (RoHS
& no Sb/Br)
40
Green (RoHS
& no Sb/Br)
2000
2000
2000
25
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Pb-Free
(RoHS)
CD4050BEE4
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
CD4050BF
ACTIVE
ACTIVE
CDIP
CDIP
J
J
16
16
1
1
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 CD4050BF
CD4050BF3A
TBD
-55 to 125 CD4050BF3A
CD4050BF3AS2283
CD4050BF3AS2534
CD4050BM
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
CDIP
CDIP
SOIC
SO
J
J
16
16
16
16
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
D
Call TI
Call TI
-55 to 125
CD4050BNSR
NS
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125 CD4050B
CD4050BNSRE4
ACTIVE
SO
NS
16
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-55 to 125 CD4050B
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Orderable Device
Status Package Type Package Pins Package Qty
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
(1)
(2)
(3)
(4)
CD4050BNSRG4
CD4050BPW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
NS
PW
PW
PW
PW
PW
PW
J
16
16
16
16
16
16
16
16
16
16
16
2000
90
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
A42
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125 CD4050B
-55 to 125 CM050B
-55 to 125 CM050B
-55 to 125 CM050B
-55 to 125 CM050B
-55 to 125 CM050B
-55 to 125 CM050B
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
CDIP
Green (RoHS
& no Sb/Br)
CD4050BPWE4
90
Green (RoHS
& no Sb/Br)
CD4050BPWG4
CD4050BPWR
90
Green (RoHS
& no Sb/Br)
2000
2000
2000
1
Green (RoHS
& no Sb/Br)
CD4050BPWRE4
CD4050BPWRG4
JM38510/05553BEA
JM38510/05554BEA
M38510/05553BEA
M38510/05554BEA
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TBD
TBD
TBD
TBD
-55 to 125 JM38510/
05553BEA
CDIP
J
1
A42
-55 to 125 JM38510/
05554BEA
CDIP
J
1
A42
-55 to 125 JM38510/
05553BEA
CDIP
J
1
A42
-55 to 125 JM38510/
05554BEA
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
24-Jan-2013
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) Only one of markings shown within the brackets will appear on the physical device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF CD4049UB, CD4049UB-MIL, CD4050B, CD4050B-MIL :
Catalog: CD4049UB, CD4050B
•
Military: CD4049UB-MIL, CD4050B-MIL
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 5
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CD4049UBDR
CD4049UBDWR
CD4049UBPWR
CD4050BDR
SOIC
SOIC
D
16
16
16
16
16
16
2500
2000
2000
2500
2000
2000
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
12.4
16.4
16.4
12.4
6.5
10.3
2.1
2.7
1.6
2.1
2.7
1.6
8.0
12.0
8.0
16.0
16.0
12.0
16.0
16.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
DW
PW
D
10.75 10.7
TSSOP
SOIC
6.9
6.5
5.6
10.3
8.0
CD4050BDWR
CD4050BPWR
SOIC
DW
PW
10.75 10.7
6.9 5.6
12.0
8.0
TSSOP
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CD4049UBDR
CD4049UBDWR
CD4049UBPWR
CD4050BDR
SOIC
SOIC
D
16
16
16
16
16
16
2500
2000
2000
2500
2000
2000
333.2
367.0
367.0
333.2
367.0
367.0
345.9
367.0
367.0
345.9
367.0
367.0
28.6
38.0
35.0
28.6
38.0
35.0
DW
PW
D
TSSOP
SOIC
CD4050BDWR
CD4050BPWR
SOIC
DW
PW
TSSOP
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
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No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
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non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
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Copyright © 2013, Texas Instruments Incorporated
相关型号：
CD4050BE
4000/14000/40000 SERIES, HEX 1-INPUT NON-INVERT GATE, PDIP16, ROHS COMPLIANT, PLASTIC, DIP-16
ROCHESTER
CD4050BEE4
4000/14000/40000 SERIES, HEX 1-INPUT NON-INVERT GATE, PDIP16, ROHS COMPLIANT, PLASTIC, DIP-16
ROCHESTER
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