CD74AC238M96E4 [TI]
3 线至 8 线同向解码器/多路解复用器 | D | 16 | -55 to 125;
| 型号： | CD74AC238M96E4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3 线至 8 线同向解码器/多路解复用器 | D | 16 | -55 to 125 驱动 光电二极管 逻辑集成电路 复用器 解复用器 解码器 驱动器 |
| 文件： | 总7页 (文件大小：37K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74AC138, CD74ACT138,
CD74AC238, CD74ACT238
Data sheet acquired from Harris Semiconductor
SCHS234
3-to-8-Line Decoders/Demultiplexers
September 1998
Features
Description
• CD74AC138, CD74ACT138 . . . . . . . . . . . . . . . Inverting The CD74AC138, CD74ACT138, CD74AC238, and
CD74ACT238 are 3-to-8-line decoders/demultiplexers that
utilize the Harris Advanced CMOS Logic technology. Both
• CD74AC238, CD74ACT238 . . . . . . . . . . . Non-Inverting
circuits have three binary select inputs (A0, A1, and A2). If
the device is enabled, these inputs determine which one of
the eight normally HIGH outputs of the AC/ACT138 will go
LOW or which on of the normally LOW outputs of the
AC/ACT238 will go HIGH. Two active LOW and one active
HIGH enables (E1, E2 and E3) are provided to simplify the
cascading of these devices.
• Buffered Inputs
• Typical Propagation Delay
o
- 5ns at V
CC
= 5V, T = 25 C, C = 50pF
A L
• Exceeds 2kV ESD Protection MIL-STD-883, Method
3015
[ /Title
(CD74
AC138
,
CD74
ACT13
8,
CD74
AC238
,
CD74
ACT23
8)
/Sub-
ject (3-
to-8-
Line
Decod-
ers/De
multi-
plex-
ers)
/Autho
r ()
/Key-
words
(Har-
ris
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
Ordering Information
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
PART
NUMBER
TEMP.
RANGE ( C)
PKG.
NO.
o
PACKAGE
o
CD74AC138E
CD74ACT138E
CD74AC238E
CD74ACT238E
CD74AC138M
CD74ACT138M
CD74AC238M
CD74ACT238M
NOTES:
0 to 70 C, -40 to 85, 16 Ld PDIP
-55 to 125
E16.3
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
o
0 to 70 C, -40 to 85, 16 Ld PDIP
E16.3
-55 to 125
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
o
0 to 70 C, -40 to 85, 16 Ld PDIP
E16.3
-55 to 125
o
- Drives 50Ω Transmission Lines
0 to 70 C, -40 to 85, 16 Ld PDIP
E16.3
-55 to 125
o
0 to 70 C, -40 to 85, 16 Ld SOIC
M16.15
M16.15
M16.15
M16.15
Pinout
-55 to 125
o
0 to 70 C, -40 to 85, 16 Ld SOIC
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
-55 to 125
(PDIP, SOIC)
TOP VIEW
o
0 to 70 C, -40 to 85, 16 Ld SOIC
-55 to 125
o
0 to 70 C, -40 to 85, 16 Ld SOIC
-55 to 125
V
A0
A1
A2
E1
E2
E3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
Y0 AC/ACT138
Y0 AC/ACT238
Y1 AC/ACT138
Y1 AC/ACT238
Y2 AC/ACT138
Y2 AC/ACT238
Y3 AC/ACT138
Y3 AC/ACT238
Y4 AC/ACT138
Y4 AC/ACT238
Y5 AC/ACT138
Y5 AC/ACT238
17. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
18. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or Harris
customer service for ordering information.
AC/ACT138 Y7
AC/ACT238 Y7
Y6 AC/ACT138
Y6 AC/ACT238
GND
Semi-
con-
ductor,
Advan
ced
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
Copyright © Harris Corporation 1998
File Number 1909.1
1
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Functional Diagram
AC/ACT AC/ACT
238
138
1
2
3
15
14
13
12
11
10
9
A0
A1
A2
Y0
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y1
Y2
Y3
Y4
Y5
Y6
Y7
4
5
6
E1
E2
E3
7
CD74AC/ACT138 TRUTH TABLE
INPUTS
ENABLE
(NOTE 4)
ADDRESS
OUTPUTS
Y3
E
E0
H
X
L
A
A
A
0
Y0
H
H
L
Y1
H
H
H
L
Y2
H
H
H
H
L
Y4
H
H
H
H
H
H
L
Y5
H
H
H
H
H
H
H
L
Y6
H
H
H
H
H
H
H
H
L
Y7
H
H
H
H
H
H
H
H
H
L
3
2
1
X
X
X
X
H
H
H
H
H
L
L
X
L
X
L
X
L
H
H
H
H
H
H
H
H
L
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
L
L
L
H
H
H
L
H
H
L
H
H
L
H
H
CD74AC/ACT238 TRUTH TABLE
INPUTS
ENABLE
ADDRESS
OUTPUTS
(NOTE 4)
E
E0
A
A
A
0
Y0
L
Y1
L
Y2
L
Y3
L
Y4
L
Y5
L
Y6
L
Y7
L
3
2
1
X
H
X
L
L
L
L
L
L
L
L
X
X
X
X
L
L
X
L
X
L
L
L
L
L
L
L
L
L
H
H
L
L
L
L
L
L
L
L
H
L
L
H
L
H
L
L
L
L
L
L
L
H
L
H
H
L
L
H
L
L
L
L
L
L
H
L
H
L
L
L
H
L
L
L
L
L
H
H
H
H
H
L
L
L
H
L
L
L
L
H
L
H
L
L
L
L
L
H
L
L
L
H
H
H
H
L
L
L
L
L
H
L
L
H
L
L
L
L
L
L
H
NOTES:
19. H = High Level, L = Low Level, X = Don’t Care
20. E0 = E1 + E2
2
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V Thermal Resistance (Typical, Note 7)
θ
( C/W)
CC
DC Input Diode Current, I
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
For V < -0.5V or V > V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
160
o
DC Output Diode Current, I
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
DC V
or Ground Current, I
I
(Note 5) . . . . . . . . .±100mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
(Note 6)
CC
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
21. For up to 4 outputs per device, add ±25mA for each additional output.
22. Unless otherwise specified, all voltages are referenced to ground.
23. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
25 C
o
o
85 C
125 C
V
CC
PARAMETER
AC TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
MAX
MIN
MAX
MIN
MAX UNITS
O
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
V
-
-
-
1.5
3
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
V
V
V
V
V
V
V
V
V
V
V
V
IH
-
-
-
5.5
1.5
3
-
-
-
V
-
0.3
0.3
0.3
IL
-
0.9
-
0.9
-
0.9
5.5
1.5
3
-
1.65
-
1.65
-
1.65
V
V
or V
IH IL
-0.05
1.4
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
1.4
2.9
4.4
2.48
3.8
3.85
-
-
-
-
-
-
1.4
2.9
4.4
2.4
3.7
-
-
-
-
-
-
-
OH
-0.05
-0.05
-4
4.5
3
-24
4.5
5.5
-75
(Note 8, 9)
-50
5.5
-
-
-
-
3.85
-
V
(Note 8, 9)
3
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
DC Electrical Specifications (Continued)
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
o
o
25 C
MIN
85 C
125 C
V
CC
PARAMETER
SYMBOL
V (V)
I
(mA)
(V)
1.5
3
MAX
0.1
0.1
0.1
0.36
0.36
-
MIN
MAX
MIN
MAX UNITS
I
O
Low Level Output Voltage
V
V
or V
IH IL
0.05
0.05
0.05
12
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.5
0.5
-
V
V
V
V
V
V
OL
4.5
3
0.1
0.44
0.44
1.65
24
4.5
5.5
75
(Note 8, 9)
50
5.5
5.5
5.5
-
-
-
-
±0.1
8
-
-
-
-
-
-
-
1.65
±1
V
(Note 8, 9)
Input Leakage Current
I
V
or
-
±1
80
µA
µA
I
CC
GND
Quiescent Supply Current
MSI
I
V
GND
or
0
160
CC
CC
ACT TYPES
High Level Input Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
2
-
-
2
-
-
V
V
IH
Low Level Input Voltage
High Level Output Voltage
V
4.5 to
5.5
0.8
0.8
0.8
IL
V
V
V
or V
IH IL
-0.05
-24
4.5
4.5
5.5
4.4
3.94
-
-
-
-
4.4
3.8
-
-
-
4.4
3.7
-
-
-
-
V
V
V
OH
-75
(Note 8, 9)
3.85
-50
(Note 8, 9)
5.5
-
-
-
-
3.85
-
V
Low Level Output Voltage
V
or V
IH IL
0.05
24
4.5
4.5
5.5
-
-
-
0.1
0.36
-
-
-
-
0.1
-
-
-
0.1
0.5
-
V
V
V
OL
0.44
1.65
75
(Note 8, 9)
50
5.5
5.5
5.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.65
±1
V
(Note 8, 9)
Input Leakage Current
I
V
or
-
0
-
±0.1
8
±1
80
2.8
µA
µA
mA
I
CC
GND
Quiescent Supply Current
MSI
I
V
GND
or
160
3
CC
CC
Additional Supply Current per
Input Pin TTL Inputs High
1 Unit Load
∆I
V
4.5 to
5.5
2.4
CC
CC
-2.1
NOTES:
24. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
o
o
25. Test verifies a minimum 50Ω transmission-line-drive capability at 85 C, 75Ω at 125 C.
ACT Input Load Table
INPUT
UNIT LOAD
A0-A2
E1, E2
0.83
1
E3
0.42
NOTE: Unit load is ∆I
Table, e.g., 2.4mA max at 25 C.
limit specified in DC Electrical Specifications
o
CC
4
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Switching Specifications Input t , t = 3ns, C = 50pF (Worst Case)
r
f
L
o
o
o
o
-40 C TO 85 C
TYP
-55 C TO 125 C
PARAMETER
AC TYPES
SYMBOL
V
(V)
MIN
MAX
MIN
TYP
MAX
UNITS
CC
Propagation Delay,
An to Output
(CD74AC/ACT138)
t
, t
PLH PHL
1.5
3.3
-
-
-
125
14
-
-
-
138
ns
ns
4
3.9
15.4
(Note 11)
5
2.8
-
10
2.8
-
11
ns
(Note 12)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
t
t
t
t
t
, t
1.5
3.3
5
-
3.6
2.6
-
-
114
12.7
9.1
-
3.5
2.5
-
-
125
14
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
pF
PLH PHL
-
-
-
-
10
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
, t
PLH PHL
1.5
3.3
5
-
125
14
-
138
15.4
11
4
-
3.9
2.8
-
-
2.8
-
-
10
-
Propagation Delay,
An to Output
(CD74AC/ACT238)
, t
PLH PHL
1.5
3.3
5
-
170
19.1
13.6
135
15.2
10.7
189
21.1
15.1
10
-
187
21
5.4
3.9
-
-
5.3
3.8
-
-
-
-
15
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT238)
, t
PLH PHL
1.5
3.3
5
-
-
149
16.7
11.9
208
23.2
16.6
10
4.3
3.1
-
-
4.2
3
-
-
-
Propagation Delay,
E3 to Output
(CD74AC/ACT238)
, t
PLH PHL
1.5
3.3
5
-
-
-
6
-
5.8
4.2
-
-
4.3
-
-
-
-
-
Input Capacitance
C
-
I
Power Dissipation Capacitance
C
-
-
110
-
-
110
-
PD
(Note 13)
ACT TYPES
Propagation Delay,
An to Output
(CD74AC/ACT138)
t
t
t
t
t
, t
PLH PHL
5
3.1
2.7
2.8
4
-
-
-
-
-
10.9
9.5
3
-
-
-
-
-
12
ns
ns
ns
ns
ns
(Note 12)
Propagation Delay,
E1, E2 to Output
(CD74AC/ACT138)
, t
PLH PHL
5
5
5
5
2.6
2.8
3.9
3.6
10.5
11
Propagation Delay,
E3 to Output
(CD74AC/ACT138)
, t
PLH PHL
10
Propagation Delay,
An to Output
(CD74AC/ACT238)
, t
PLH PHL
14.2
12.9
15.6
14.2
Propagation Delay,
E1, E2 to Output
, t
PLH PHL
3.7
(CD74AC/ACT238)
5
CD74AC138, CD74ACT138, CD74AC238, CD74ACT238
Switching Specifications Input t , t = 3ns, C = 50pF (Worst Case) (Continued)
r
f
L
o
o
o
o
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
Propagation Delay,
SYMBOL
V
(V)
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
CC
t
, t
5
3.5
-
12.4
3.4
-
13.6
ns
PLH PHL
E3 to Output
(CD74AC/ACT238)
Input Capacitance
C
-
-
-
-
-
10
-
-
-
-
10
-
pF
pF
I
Power Dissipation Capacitance
C
110
110
PD
(Note 13)
NOTES:
26. Limits tested at 100%.
27. 3.3V Min at 3.6V, Max at 3V.
28. 5V Min at 5.5V, Max at 4.5V.
29. C
is used to determine the dynamic power consumption per package.
PD
AC: P = V
2
f (C
+ C )
D
CC
i
PD
L
2
ACT: P = V
f (C
+ C ) + V
∆I
where f = input frequency, C = output load capacitance, V
= supply voltage.
D
CC
i
PD
L
CC CC
i
L
CC
t = 3ns
f
t = 3ns
r
t = 3ns
r
t = 3ns
f
90%
V
S
INPUT
E1, E2
E3
90%
10%
V
INPUT
S
GND
GND
138 OUTPUT
138 OUTPUT
V
S
V
S
t
t
PHL
PLH
t
t
PLH
PHL
V
S
V
S
238 OUTPUT
238 OUTPUT
t
PLH
t
PHL
t
t
PLH
PHL
FIGURE 8. PROPAGATION DELAY TIMES
FIGURE 9. PROPAGATION DELAY TIMES
OUTPUT
R
(NOTE)
L
500Ω
DUT
OUTPUT
LOAD
C
L
50pF
NOTE: For AC Series Only: When V
Input Level
= 1.5V, R = 1kΩ.
L
CC
CD74AC
CD74ACT
3V
V
CC
Input Switching Voltage, V
0.5 V
0.5 V
1.5V
S
CC
CC
Output Switching Voltage, V
0.5 V
CC
S
FIGURE 10. PROPAGATION DELAY TIMES
6
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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