CD74AC280M96G4 [TI]
9-Bit Odd/Even Parity Generator/Checker; 9位奇/偶校验发生器/校验器型号: | CD74AC280M96G4 |
厂家: | TEXAS INSTRUMENTS |
描述: | 9-Bit Odd/Even Parity Generator/Checker |
文件: | 总12页 (文件大小:405K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
CD54/74AC280,
CD54/74ACT280
Data sheet acquired from Harris Semiconductor
SCHS250A
August 1998 - Revised May 2000
9-Bit Odd/Even Parity Generator/Checker
data inputs is HIGH. Odd parity is indicated (∑O output is
HIGH) when an odd number of data inputs is HIGH. Parity
checking for words larger than nine bits can be accom-
plished by tying the ∑E output to any input of an additional
’AC280, ’ACT280 parity checker.
Features
• Buffered Inputs
• Typical Propagation Delay
o
- 10ns at V
= 5V, T = 25 C, C = 50pF
A L
CC
• Exceeds 2kV ESD Protection per MIL-STD-883,
Method 3015
Ordering Information
PART
NUMBER
TEMP.
RANGE ( C)
• SCR-Latchup-Resistant CMOS Process and Circuit
Design
o
PACKAGE
14 Ld CERDIP
14 Ld PDIP
CD54AC280F3A
CD74AC280E
-55 to 125
• Speed of Bipolar FAST™/AS/S with Significantly
Reduced Power Consumption
o
0 to 70 C, -40 to 85,
-55 to 125
• Balanced Propagation Delays
o
CD74AC280M
0 to 70 C, -40 to 85,
14 Ld SOIC
• AC Types Feature 1.5V to 5.5V Operation and
Balanced Noise Immunity at 30% of the Supply
-55 to 125
CD54ACT280F3A
CD74ACT280E
-55 to 125
14 Ld CERDIP
14 Ld PDIP
o
• ±24mA Output Drive Current
- Fanout to 15 FAST™ ICs
0 to 70 C, -40 to 85,
-55 to 125
o
- Drives 50Ω Transmission Lines
CD74ACT280M
NOTES:
0 to 70 C, -40 to 85,
14 Ld SOIC
-55 to 125
Description
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
The ’AC280 and ’ACT280 are 9-bit odd/even parity genera-
tor/checkers that utilize Advanced CMOS Logic technology.
Both even and odd parity outputs are available for checking
or generating parity for words up to nine bits long. Even par-
ity is indicated (∑E output is HIGH) when an even number of
2. Wafer and die for this part number is available which meets all elec-
trical specifications. Please contact your local TI sales office or cus-
tomer service for ordering information.
Pinout
Functional Diagram
CD54AC280, CD54ACT280
(CERDIP)
CD74AC280, CD74ACT280
(PDIP, SOIC)
8
I0
TOP VIEW
9
I1
10
I2
I3
5
6
I6
I7
1
2
3
4
5
6
7
14 V
CC
∑ EVEN
∑ ODD
11
12
13
1
13 I5
12 I4
11 I3
10 I2
NC
I8
I4
I5
I6
∑E
∑O
GND
9
8
I1
I0
2
4
I7
I8
GND = 7
= 14
V
CC
NC = 3
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
FAST™ is a Trademark of Fairchild Semiconductor.
1
Copyright © 2000, Texas Instruments Incorporated
CD54/74AC280, CD54/74ACT280
F
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
Thermal Resistance (Typical, Note 5)
θ
( C/W)
CC
DC Input Diode Current, I
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
___
___
For V < -0.5V or V > V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
o
DC Output Diode Current, I
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
O
O
CC
DC V
or Ground Current, I
I
(Note 3) . . . . . . . . .±100mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
(Note 4)
CC
AC Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.5V to 5.5V
ACT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Slew Rate, dt/dv
AC Types, 1.5V to 3V . . . . . . . . . . . . . . . . . . . . . . . . . 50ns (Max)
AC Types, 3.6V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . . 20ns (Max)
ACT Types, 4.5V to 5.5V. . . . . . . . . . . . . . . . . . . . . . . 10ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
3. For up to 4 outputs per device, add ±25mA for each additional output.
4. Unless otherwise specified, all voltages are referenced to ground.
5. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
25 C
o
o
85 C
125 C
V
CC
PARAMETER
AC TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
MAX
MIN
MAX
MIN
MAX UNITS
O
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
V
-
-
-
1.5
3
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
1.2
2.1
3.85
-
-
V
V
V
V
V
V
V
V
V
V
V
V
IH
-
-
-
5.5
1.5
3
-
-
-
V
-
0.3
0.3
0.3
IL
-
0.9
-
0.9
-
0.9
5.5
1.5
3
-
1.65
-
1.65
-
1.65
V
V
or V
IH IL
-0.05
1.4
2.9
4.4
2.58
3.94
-
-
-
-
-
-
-
1.4
2.9
4.4
2.48
3.8
3.85
-
-
-
-
-
-
1.4
2.9
4.4
2.4
3.7
-
-
-
-
-
-
-
OH
-0.05
-0.05
-4
4.5
3
-24
4.5
5.5
-75
(Note 6, 7)
-50
5.5
-
-
-
-
3.85
-
V
(Note 6, 7)
2
CD54/74AC280, CD54/74ACT280
DC Electrical Specifications (Continued)
o
o
TEST
CONDITIONS
-40 C TO
-55 C TO
o
o
o
25 C
MIN
85 C
125 C
V
CC
PARAMETER
SYMBOL
V (V)
I
(mA)
(V)
1.5
3
MAX
0.1
0.1
0.1
0.36
0.36
-
MIN
MAX
MIN
MAX UNITS
I
O
Low Level Output Voltage
V
V
or V
IH IL
0.05
0.05
0.05
12
-
-
-
-
-
-
-
-
-
-
-
-
0.1
0.1
-
-
-
-
-
-
0.1
0.1
0.1
0.5
0.5
-
V
V
V
V
V
V
OL
4.5
3
0.1
0.44
0.44
1.65
24
4.5
5.5
75
(Note 6, 7)
50
5.5
5.5
5.5
-
-
-
-
±0.1
8
-
-
-
-
-
-
-
1.65
±1
V
(Note 6, 7)
Input Leakage Current
I
V
or
-
±1
80
µA
µA
I
CC
GND
Quiescent Supply Current
MSI
I
V
GND
or
0
160
CC
CC
ACT TYPES
High Level Input Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
2
-
-
2
-
-
V
V
IH
Low Level Input Voltage
High Level Output Voltage
V
4.5 to
5.5
0.8
0.8
0.8
IL
V
V
V
or V
IH IL
-0.05
-24
4.5
4.5
5.5
4.4
3.94
-
-
-
-
4.4
3.8
-
-
-
4.4
3.7
-
-
-
-
V
V
V
OH
-75
(Note 6, 7)
3.85
-50
(Note 6, 7)
5.5
-
-
-
-
3.85
-
V
Low Level Output Voltage
V
or V
IH IL
0.05
24
4.5
4.5
5.5
-
-
-
0.1
0.36
-
-
-
-
0.1
-
-
-
0.1
0.5
-
V
V
V
OL
0.44
1.65
75
(Note 6, 7)
50
5.5
5.5
5.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.65
±1
V
(Note 6, 7)
Input Leakage Current
I
V
or
-
0
-
±0.1
8
±1
80
2.8
µA
µA
mA
I
CC
GND
Quiescent Supply Current
MSI
I
V
GND
or
160
3
CC
CC
Additional Supply Current per
Input Pin TTL Inputs High
1 Unit Load
∆I
CC
V
4.5 to
5.5
2.4
CC
-2.1
NOTES:
6. Test one output at a time for a 1-second maximum duration. Measurement is made by forcing current and measuring voltage to minimize
power dissipation.
o
o
7. Test verifies a minimum 50Ω transmission-line-drive capability at 85 C, 75Ω at 125 C.
ACT Input Load Table
INPUT
UNIT LOAD
All
1.43
NOTE: Unit load is ∆I limit specified in DC Electrical Specifications
CC
o
Table, e.g., 2.4mA max at 25 C.
3
CD54/74AC280, CD54/74ACT280
Switching Specifications Input t , t = 3ns, C = 50pF (Worst Case)
r
f
L
o
o
o
o
-40 C TO 85 C
TYP
-55 C TO 125 C
PARAMETER
AC TYPES
SYMBOL
V
(V)
MIN
MAX
MIN
TYP
MAX
UNITS
CC
Propagation Delay,
Any Input to ∑O
t , t
PLH PHL
1.5
3.3
-
-
-
239
26
-
-
-
263
29
ns
ns
7.5
7.3
(Note 9)
5
5.4
-
19.1
5.3
-
21
ns
(Note 10)
Propagation Delay,
Any Input to ∑E
t
, t
PLH PHL
1.5
3.3
5
-
7.2
5.2
-
-
227
25
-
7
5
-
-
250
28
20
10
-
ns
ns
ns
pF
pF
-
-
-
-
18.2
10
-
-
Input Capacitance
C
-
I
Power Dissipation Capacitance
C
-
-
115
-
-
115
PD
(Note 11)
ACT TYPES
Propagation Delay,
Any Input to ∑O
t
, t
PLH PHL
5
5.6
5.6
-
-
19.6
19.6
5.4
5.4
-
-
21.6
21.6
ns
ns
(Note 10)
Propagation Delay,
t , t
PLH PHL
5
Any Input to ∑E
Input Capacitance
C
-
-
-
-
-
10
-
-
-
-
10
-
pF
pF
I
Power Dissipation Capacitance
C
115
115
PD
(Note 11)
NOTES:
8. Limits tested 100%
9. 3.3V Min is at 3.6V, Max is at 3V.
10. 5V Min is at 5.5V, Max is at 4.5V.
11. C
is used to determine the dynamic power consumption per package.
PD
AC: P = V
2
f (C
+ C )
D
CC
i
PD
L
2
ACT: P = V
f (C
+ C ) + V
∆I
where f = input frequency, C = output load capacitance, V
= supply voltage.
CC
D
CC
i
PD
L
CC CC
i
L
OUTPUT
t = 3ns
r
t = 3ns
f
R
(NOTE)
500Ω
INPUT
LEVEL
L
DUT
V
V
I
S
S
n
10%
10%
V
0V
OUTPUT
LOAD
C
L
50pF
t
t
PHL
PLH
PHL
NOTE: For AC Series Only: When V
= 1.5V, R = 1kΩ.
V
S
CC
L
S
ΣO
0V
AC
ACT
3V
t
t
PLH
Input Level
V
CC
ΣE
V
V
S
S
Input Switching Voltage, V
0.5 V
0.5 V
1.5V
S
CC
CC
0V
Output Switching Voltage, V
0.5 V
CC
S
FIGURE 1.
FIGURE 2. PROPAGATION DELAY TIMES
4
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PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
CDIP
PDIP
Drawing
CD54AC280F3A
CD54ACT280F3A
CD74AC280E
ACTIVE
ACTIVE
ACTIVE
J
J
14
14
14
1
1
TBD
TBD
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74AC280EE4
CD74AC280M
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
N
D
D
D
D
D
D
N
N
D
D
D
D
D
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74AC280M96
CD74AC280M96E4
CD74AC280M96G4
CD74AC280ME4
CD74AC280MG4
CD74ACT280E
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74ACT280EE4
CD74ACT280M
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74ACT280M96
CD74ACT280M96E4
CD74ACT280M96G4
CD74ACT280ME4
CD74ACT280MG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
9-Oct-2007
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
CD74AC280M96
CD74ACT280M96
D
D
14
14
SITE 41
SITE 41
6.5
6.5
9.0
9.0
2.1
2.1
8
8
16
16
Q1
Q1
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
CD74AC280M96
CD74ACT280M96
D
D
14
14
SITE 41
SITE 41
346.0
346.0
346.0
346.0
33.0
33.0
Pack Materials-Page 2
相关型号:
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