CD74ACT157EE4 [TI]
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER; 四路2号线到1线数据选择器/多路复用器型号: | CD74ACT157EE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER |
文件: | 总23页 (文件大小:1133K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃꢄ ꢀꢅ ꢆꢇ ꢂ
ꢈ ꢉꢄꢁ ꢊ ꢉꢋꢌ ꢍ ꢎ ꢏꢌ ꢐꢑꢍ ꢅ ꢒ ꢆ ꢏꢌ ꢐꢑꢍ ꢁꢄꢅꢄ ꢓꢍ ꢌꢍ ꢀꢅꢒ ꢊꢔꢕ ꢉꢌꢅꢐ ꢋ ꢌꢍ ꢖꢍ ꢊ
SCHS340B − MARCH 2003 - REVISED JUNE 2003
D
D
Inputs Are TTL-Voltage Compatible
Speed of Bipolar F, AS, and S, With
Significantly Reduced Power Consumption
E, M, OR PW PACKAGE
(TOP VIEW)
V
A/B
1A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
D
Balanced Propagation Delays
G
D
24-mA Output Drive Current
− Fanout to 15 F Devices
4A
4B
4Y
3A
3B
3Y
1B
1Y
2A
2B
2Y
GND
D
D
SCR-Latchup-Resistant CMOS Process and
Circuit Design
Exceeds 2-kV ESD Protection Per
MIL-STD-883, Method 3015
description/ordering information
This quadruple 2-line to 1-line data selector/multiplexer is designed for 4.5-V to 5.5-V V
operation.
CC
The CD74ACT157 features a common strobe (G) input. When the strobe is high, all outputs are low. When the
strobe is low, a 4-bit word is selected from one of two sources and is routed to the four outputs. The device
provides true data.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − E
SOIC − M
Tube
Tube
CD74ACT157E
CD74ACT157M
CD74ACT157E
ACT157M
Tape and reel CD74ACT157M96
Tube CD74ACT157PW
Tape and reel CD74ACT157PWR
−55°C to 125°C
TSSOP − PW
HM157
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OUTPUT
Y
G
H
L
A/B
A
X
L
B
X
X
X
L
X
L
L
L
L
L
H
X
X
H
L
L
H
H
L
H
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢀ ꢅ ꢆ ꢇꢂ
ꢈꢉ ꢄ ꢁꢊ ꢉ ꢋꢌ ꢍ ꢎ ꢏꢌ ꢐ ꢑꢍ ꢅ ꢒ ꢆ ꢏꢌꢐ ꢑ ꢍ ꢁꢄꢅꢄ ꢓꢍ ꢌꢍ ꢀꢅꢒ ꢊꢔꢕ ꢉꢌꢅ ꢐꢋ ꢌꢍ ꢖꢍꢊ
SCHS340B − MARCH 2003 - REVISED JUNE 2003
logic diagram (positive logic)
2
1A
4
1Y
3
1B
5
2A
7
9
2Y
3Y
6
2B
11
3A
10
3B
14
4A
12
4Y
13
4B
15
G
1
A/B
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6 V
CC
I
Input clamp current, I (V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 V or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
OK
O O CC
Continuous output current, I (V > 0 V or V < V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Continuous current through V
O
O
CC
O
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
Package thermal impedance, θ (see Note 2): E package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
JA
M package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃꢄ ꢀꢅ ꢆꢇ ꢂ
ꢈ ꢉꢄꢁ ꢊ ꢉꢋꢌ ꢍ ꢎ ꢏꢌ ꢐꢑꢍ ꢅ ꢒ ꢆ ꢏꢌ ꢐꢑꢍ ꢁꢄꢅꢄ ꢓꢍ ꢌꢍ ꢀꢅꢒ ꢊꢔꢕ ꢉꢌꢅꢐ ꢋ ꢌꢍ ꢖꢍ ꢊ
SCHS340B − MARCH 2003 - REVISED JUNE 2003
recommended operating conditions (see Note 3)
−55°C to
125°C
−40°C to
85°C
T
A
= 25°C
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
5.5
V
V
CC
IH
IL
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
0.8
V
0
0
V
V
0
0
V
V
0
0
V
V
V
I
CC
CC
CC
Output voltage
V
O
CC
CC
CC
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
−24
24
−24
24
−24
24
mA
mA
ns/V
OH
OL
∆t/∆v
10
10
10
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
−55°C to
125°C
−40°C to
85°C
T
A
= 25°C
PARAMETER
TEST CONDITIONS
V
CC
UNIT
MIN
4.4
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
I
I
I
I
= −50 µA
= −24 mA
= −50 mA
= −75 mA
= 50 µA
4.5 V
4.5 V
5.5 V
5.5 V
4.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
OH
OH
OH
OH
OL
OL
OL
OL
3.94
3.7
3.8
V
V
V = V or V
IH
V
OH
I
IL
†
†
3.85
3.85
0.1
0.1
0.5
0.1
= 24 mA
0.36
0.44
V = V or V
V
OL
I
IH
IL
†
= 50 mA
= 75 mA
1.65
†
1.65
1
I
I
V = V
or GND
or GND,
0.1
8
1
µA
µA
I
I
CC
V = V
I
I
O
= 0
160
80
CC
CC
‡
V = V
I
− 2.1 V
4.5 V to 5.5 V
2.4
10
3
2.8
10
mA
pF
DI
CC
CC
C
10
i
†
‡
Test one output at a time, not exceeding 1-second duration. Measurement is made by forcing indicated current and measuring voltage to minimize
power dissipation. Test verifies a minimum 50-Ω transmission-line drive capability at 85°C and 75-Ω transmission-line drive capability at 125°C.
Additional quiescent supply current per input pin, TTL inputs high, 1 unit load
ACT INPUT LOADING TABLE
INPUT
A or B
G
UNIT LOAD
0.37
0.83
A/B
1.33
Unit load is ∆I
electrical characteristics table
limit specified in
CC
(e.g., 2.4 mA at 25°C).
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂꢃ ꢄꢀ ꢅ ꢆ ꢇꢂ
ꢈꢉ ꢄ ꢁꢊ ꢉ ꢋꢌ ꢍ ꢎ ꢏꢌ ꢐ ꢑꢍ ꢅ ꢒ ꢆ ꢏꢌꢐ ꢑ ꢍ ꢁꢄꢅꢄ ꢓꢍ ꢌꢍ ꢀꢅꢒ ꢊꢔꢕ ꢉꢌꢅ ꢐꢋ ꢌꢍ ꢖꢍꢊ
SCHS340B − MARCH 2003 - REVISED JUNE 2003
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V, C = 50 pF (unless otherwise noted) (see Figure 1)
CC
L
−55°C to
125°C
−40°C to
85°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
2.4
2.4
3.6
3.6
3.4
3.4
MAX
MIN
2.5
2.5
3.8
3.8
3.6
3.6
MAX
t
t
t
t
t
t
9.5
9.5
8.6
8.6
PLH
PHL
PLH
PHL
PLH
PHL
A or B
A/B
G
Any Y
Any Y
Any Y
ns
ns
ns
14.5
14.5
13.5
13.5
13.2
13.2
12.3
12.3
operating characteristics, V
= 5 V, T = 25°C
CC
A
PARAMETER
TYP
UNIT
C
Power dissipation capacitance
156
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃꢄ ꢀꢅ ꢆꢇ ꢂ
ꢈ ꢉꢄꢁ ꢊ ꢉꢋꢌ ꢍ ꢎ ꢏꢌ ꢐꢑꢍ ꢅ ꢒ ꢆ ꢏꢌ ꢐꢑꢍ ꢁꢄꢅꢄ ꢓꢍ ꢌꢍ ꢀꢅꢒ ꢊꢔꢕ ꢉꢌꢅꢐ ꢋ ꢌꢍ ꢖꢍ ꢊ
SCHS340B − MARCH 2003 - REVISED JUNE 2003
PARAMETER MEASUREMENT INFORMATION
2 × V
CC
TEST
S1
S1
t
t
/t
Open
R1 = 500 Ω
R2 = 500 Ω
Open
GND
PLH PHL
From Output
Under Test
t
/t
2 × V
CC
GND
PLZ PZL
/t
PHZ PZH
C
= 50 pF
L
(see Note A)
t
w
3 V
0 V
1.5 V
1.5 V
Input
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATION
3 V
Reference
Input
3 V
0 V
1.5 V
CLR
Input
1.5 V
0 V
t
t
h
su
t
rec
3 V
0 V
Data
Input
90%
t
90%
3 V
0 V
1.5 V
10%
1.5 V
10%
1.5 V
CLK
t
r
f
VOLTAGE WAVEFORMS
RECOVERY TIME
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
3 V
0 V
3 V
Input
1.5 V
1.5 V
Output
Control
1.5 V
1.5 V
0 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
OH
Output
Waveform 1
In-Phase
Output
90%
t
≈V
CC
50%
10%
50% V
10%
CC
V
20% V
CC
20% V
CC
S1 at 2 × V
(see Note B)
OL
CC
t
f
r
V
OL
t
t
PLH
PHL
90%
t
t
PHZ
PZH
V
V
OH
90%
Output
Waveform 2
S1 at GND
Out-of-Phase
Output
50% V
10%
50%
10%
CC
V
OH
80% V
CC
80% V
CC
OL
t
t
r
f
≈0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A.
C includes probe and test-fixture capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.
O
r
f
Phase relationships between waveforms are arbitrary.
D. For clock inputs, f is measured with the input duty cycle at 50%.
max
E. The outputs are measured one at a time with one input transition per measurement.
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
.
.
.
PLH
PZL
PLZ
PHL
PZH
PHZ
pd
are the same as t
are the same as t
en
dis
I. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
CD74ACT157E
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
16
16
16
16
16
16
16
16
16
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74ACT157EE4
CD74ACT157M
PDIP
SOIC
N
D
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74ACT157M96
CD74ACT157M96E4
CD74ACT157M96G4
CD74ACT157ME4
CD74ACT157MG4
CD74ACT157PW
CD74ACT157PWE4
CD74ACT157PWG4
CD74ACT157PWR
CD74ACT157PWRE4
CD74ACT157PWRG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
CD74ACT157M96
CD74ACT157PWR
SOIC
D
16
16
2500
2000
330.0
330.0
16.4
12.4
6.5
7.0
10.3
5.6
2.1
1.6
8.0
8.0
16.0
12.0
Q1
Q1
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
19-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CD74ACT157M96
CD74ACT157PWR
SOIC
D
16
16
2500
2000
333.2
346.0
345.9
346.0
28.6
29.0
TSSOP
PW
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2010
PACKAGING INFORMATION
Orderable Device
CD74ACT157E
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
16
16
16
16
16
16
16
16
16
16
16
16
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CD74ACT157EE4
CD74ACT157M
PDIP
SOIC
N
D
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
CD74ACT157M96
CD74ACT157M96E4
CD74ACT157M96G4
CD74ACT157ME4
CD74ACT157MG4
CD74ACT157PW
CD74ACT157PWE4
CD74ACT157PWG4
CD74ACT157PWR
CD74ACT157PWRE4
CD74ACT157PWRG4
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
7-May-2010
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CD74ACT157M96
CD74ACT157PWR
SOIC
D
16
16
2500
2000
330.0
330.0
16.4
12.4
6.5
6.9
10.3
5.6
2.1
1.6
8.0
8.0
16.0
12.0
Q1
Q1
TSSOP
PW
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CD74ACT157M96
CD74ACT157PWR
SOIC
D
16
16
2500
2000
333.2
367.0
345.9
367.0
28.6
35.0
TSSOP
PW
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time
of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
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Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
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Copyright © 2012, Texas Instruments Incorporated
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