CD74HC4060E [TI]
High Speed CMOS Logic 14-Stage Binary Counter with Oscillator; 高速CMOS逻辑14级二进制计数器与振荡器
| 型号： | CD74HC4060E |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High Speed CMOS Logic 14-Stage Binary Counter with Oscillator |
| 文件： | 总10页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HC4060,
CD74HCT4060
Data sheet acquired from Harris Semiconductor
SCHS207
High Speed CMOS Logic
14-Stage Binary Counter with Oscillator
February 1998
Features
• Onboard Oscillator
• Common Reset
• Negative Edge Clocking
[ /Title
(CD74
HC406
0,
• Typical f
MAX
= 50MHz at V = 5V, C = 15pF,
CC L
o
T = 25 C
A
CD74
HCT40
60)
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
/Sub-
ject
(High
Speed
CMOS
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N = 30%, N = 30% of V
IL IH CC
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
- CMOS Input Compatibility, I ≤ 1µA at V , V
l
OL OH
Pinout
CD74HC4060, CD74HCT4060
(PDIP, SOIC)
TOP VIEW
Q12
Q13
Q14
Q6
1
2
3
4
5
6
7
8
16 V
CC
15 Q10
14 Q8
13 Q9
12 MR
11 φI
Q5
Q7
10 φO
Q4
9
φO
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 1654.1
Copyright © Harris Corporation 1998
1
CD74HC4060, CD74HCT4060
TTL switching levels.
Description
The Harris CD74HC4060 and CD74HCT4060 each consist
of an oscillator section and 14 ripple-carry binary counter
stages. The oscillator configuration allows design of either
RC or crystal oscillator circuits. A Master Reset input is
provided which resets the counter to the all-0’s state and
disables the oscillator. A high level on the MR line
accomplishes the reset function. All counter stages are
master-slave flip-flops. The state of the counter is advanced
one step in binary order on the negative transition of φI (and
φO). All inputs and outputs are buffered. Schmitt trigger
action on the input-pulse-line permits unlimited rise and fall
times.
Ordering Information
PKG.
NO.
o
PART NUMBER TEMP. RANGE ( C) PACKAGE
CD74HC4060E
CD74HCT4060E
CD74HC4060M
CD74HCT4060M
NOTES:
-55 to 125
-55 to 125
-55 to 125
-55 to 125
16 Ld PDIP
16 Ld PDIP
E16.3
E16.3
16 Ld SOIC M16.15
16 Ld SOIC M16.15
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
In order to achieve a symmetrical waveform in the oscillator
section the HCT4060 input pulse switch points are the same
as in the HC4060; only the MR input in the HCT4060 has
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
Functional Diagram
7
Q4
5
Q5
4
Q6
6
12
MR
Q7
14
13
15
1
14-STAGE
Q8
RIPPLE
COUNTER
AND
11
Q9
φI
OSCILLATOR
Q10
Q12
Q13
Q14
2
3
9
φO
φO
GND = 8
= 16
10
V
CC
2
CD74HC4060, CD74HCT4060
9
øO
ø4 Q4
FF4
ø5
Q13
ø14 Q14
FF14
ø1 Q1
FF1
10
11
øO
ø1
FF5 - FF13
Q13
ø1 Q1
R
ø4 Q4
R
ø5
ø14 Q14
R
R
12
MR
7
2
3
Q13
Q4 5, 4, 6, 14, 13, 15, 1
Q5 - Q10, Q12
Q14
FIGURE 1. LOGIC BLOCK DIAGRAM
TRUTH TABLE
øI
↑
MR
L
OUTPUT STATE
No Change
↓
L
Advance to Next State
All Outputs are Low
X
H
3
CD74HC4060, CD74HCT4060
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V Thermal Resistance (Typical, Note 3)
θ
( C/W)
CC
DC Input Diode Current, I
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
For V < -0.5V or V > V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
160
o
DC Output Diode Current, I
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
O
O
CC
o
DC Drain Current, per Output, I
O
For -0.5V < V < V
+ 0.5V. . . . . . . . . . . . . . . . . . . . . . . . . .±25mA
O
CC
(SOIC - Lead Tips Only)
DC V
CC
or Ground Current, I
. . . . . . . . . . . . . . . . . . . . . . . . .±50mA
CC
Operating Conditions
o
o
Temperature Range, T . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
TEST
CONDITIONS
o
o
o
o
o
25 C
TYP
-40 C TO 85 C -55 C TO 125 C
V
(V)
CC
PARAMETER
HC TYPES
SYMBOL
V (V)
I
I
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
O
High Level Input
Voltage
V
-
-
-
2
4.5
6
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5
-
1.5
3.15
4.2
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
IH
3.15
-
3.15
-
-
4.2
-
4.2
-
-
Low Level Input
Voltage
V
-
2
-
0.5
-
0.5
0.5
IL
4.5
6
-
-
1.35
-
-
1.35
-
1.35
1.8
1.8
-
1.8
High Level Output
Voltage Q Outputs
CMOS Loads
V
V
or V
IH IL
-0.02
2
1.9
4.4
5.9
-
-
1.9
4.4
5.9
-
-
1.9
4.4
5.9
-
-
OH
-0.02
-0.02
-
4.5
6
-
-
-
-
-
-
-
High Level Output
Voltage Q Outputs
TTL Loads
-
-
-
-4
4.5
6
3.98
5.48
-
-
-
3.84
5.34
-
-
-
3.7
5.2
-
-
-5.2
0.02
0.02
0.02
-
-
Low Level Output
Voltage Q Outputs
CMOS Loads
V
V
or V
IH IL
2
0.1
0.1
0.1
-
0.1
0.1
0.1
-
0.1
0.1
0.1
-
OL
4.5
6
-
-
-
-
-
-
Low Level Output
Voltage Q Outputs
TTL Loads
-
-
-
-
4
4.5
6
-
0.26
0.26
-
-
0.33
0.33
-
-
0.4
0.4
-
5.2
-
-
-
High-Level Output
Voltage φO Output
(Pin 10)
V
V
or
-0.02
-0.02
-0.02
2
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
OH
CC
GND
4.5
6
-
-
-
-
-
-
CMOS Loads
4
CD74HC4060, CD74HCT4060
DC Electrical Specifications (Continued)
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
V
CC
PARAMETER
SYMBOL
V (V)
I
(mA)
(V)
4.5
6
MIN
3.98
5.48
TYP
MAX
MIN
3.84
5.34
MAX
MIN
3.7
MAX
UNITS
I
O
High-Level Output
Voltage φO Output
(Pin 10)
V
V
or
-2.6
-3.3
-
-
-
-
-
-
-
-
V
V
OH
CC
GND
5.2
TTL Loads
Note 6
Low-Level Output
Voltage φO Output
(Pin 10)
V
V
GND
or
0.02
0.02
0.02
2
4.5
6
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
0.1
0.1
0.1
-
-
-
0.1
0.1
0.1
V
V
V
OL
CC
CMOS Loads
Low-Level Output
Voltage φO Output
(Pin 10)
V
V
GND
or
2.6
3.3
4.5
6
-
-
-
-
0.26
0.26
-
-
0.33
0.33
-
-
0.4
0.4
V
V
OL
CC
TTL Loads
High-Level Output
Voltage φO Output
(Pin 9)
V
V
V
or V
or V
-3.2
-4.2
4.5
6
3.98
5.48
-
-
-
-
3.84
5.34
-
-
3.7
5.2
-
-
V
V
OH
IL
IL
IH
IH
TTL Loads
Low-Level Output
Voltage φO Output
(Pin 9)
V
-2.6
-3.3
4.5
6
-
-
-
-
0.26
0.26
-
-
0.33
0.33
-
-
0.4
0.4
V
V
OL
TTL Loads
Input Leakage
Current
I
V
or
-
6
6
-
-
-
-
±0.1
-
-
±1
-
-
±1
µA
µA
I
CC
GND
Quiescent Device
Current
I
V
or
0
8
80
160
CC
CC
GND
HCT TYPES
High Level Input
Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
-
-
-
0.8
-
2
-
-
0.8
-
2
-
-
0.8
-
V
V
V
IH
Low Level Input
Voltage
V
4.5 to
5.5
IL
High Level Output
Voltage Q Outputs
CMOS Loads
V
V
V
or V
Note 5
-0.02
4.5
4.5
4.5
4.5
4.5
4.4
4.4
4.4
OH
IH
IL
High Level Output
Voltage Q Outputs
TTL Loads
-4
0.02
4
3.98
-
-
-
-
-
0.1
0.26
-
3.84
-
0.1
0.33
-
3.7
-
-
V
V
V
V
Low Level Output
Voltage Q Outputs
CMOS Loads
V
or V
-
-
-
-
0.1
0.4
-
OL
IH
Note 5
IL
Low Level Output
Voltage Q Outputs
TTL Loads
-
High-Level Output
Voltage φO Output
(Pin 10)
V
V
or
-0.02
4.4
4.4
4.4
OH
CC
GND
CMOS Loads
High-Level Output
Voltage φO Output
(Pin 10)
V
V
GND
or
-2.6
4.5
4.5
3.98
-
-
-
3.84
-
3.7
-
-
V
V
OH
CC
TTL Loads Note 6
Low-Level Output
Voltage φO Output
(Pin 10)
V
V
or
0.02
-
0.1
-
0.1
0.1
OL
CC
GND
CMOS Loads
5
CD74HC4060, CD74HCT4060
DC Electrical Specifications (Continued)
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
V
CC
PARAMETER
SYMBOL
V (V)
I
(mA)
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
I
O
Low-Level Output
Voltage φO Output
(Pin 10)
V
V
GND
or
2.6
4.5
-
-
0.26
-
0.33
-
0.4
V
OL
CC
TTL Loads
High-Level Output
Voltage φO Output
(Pin 9)
V
V
V
or V
IH
-3.2
3.2
0
4.5
4.5
5.5
3.98
-
-
3.84
-
3.7
-
V
V
OH
IL
TTL Loads
Low-Level Output
Voltage φO Output
(Pin 9)
V
or V
IL
Note 5
-
-
0.26
±0.1
-
-
0.33
±1
-
-
0.4
±1
OL
IH
TTL Loads
Input Leakage
Current
I
Any
µA
I
Voltage
Between
V
and
CC
GND
Quiescent Device
Current
I
V
GND
or
0
-
5.5
-
-
-
8
-
-
80
-
-
160
490
µA
µA
CC
CC
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
V
4.5 to
5.5
100
360
450
CC
(Note 4)
CC
-2.1
NOTES:
4. For dual-supply systems theoretical worst case (V = 2.4V, V
= 5.5V) specification is 1.8mA.
CC
I
5. For pin 11 V = 3.15V, V = 0.9V.
IH IL
6. Limits not valid when pin 12 (instead of pin 11) is used as control input.
HCT Input Loading Table
INPUT
MR
UNIT LOADS
0.35
NOTE: Unit Load is ∆I
tions Table, e.g. 360µA max at 25 C.
limit specified in DC Electrical Specifica-
o
CC
Prerequisite for Switching Specifications
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
HC TYPES
SYMBOL
V
(V) MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX UNITS
CC
Maximum Input Pulse
Frequency
t
2
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
4
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MHz
MHz
MHz
ns
MAX
4.5
6
30
35
80
16
14
100
20
17
25
20
29
23
Input Pulse Width
t
2
100
20
120
24
W
4.5
6
ns
17
20
ns
Reset Removal Time
t
2
125
25
150
30
ns
REM
4.5
6
ns
21
26
ns
6
CD74HC4060, CD74HCT4060
Prerequisite for Switching Specifications (Continued)
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
SYMBOL
V
(V) MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX UNITS
CC
Reset Pulse Width
t
2
80
-
-
-
-
-
-
100
20
-
-
-
-
-
-
120
24
-
-
-
-
-
-
ns
ns
ns
W
4.5
6
16
14
17
20
HCT TYPES
Maximum Input,
Pulse Frequency
t
4.5
30
-
-
25
-
-
20
-
-
MHz
MAX
Input Pulse Width
Reset Removal Time
Reset Pulse Width
t
4.5
4.5
4.5
16
26
25
-
-
-
-
-
-
20
33
31
-
-
-
-
-
-
24
39
38
-
-
-
-
-
-
ns
ns
ns
W
t
REM
t
W
Switching Specifications Input t , t = 6ns
r
f
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
PARAMETER
HC TYPES
SYMBOL CONDITIONS
V
(V) MIN
TYP MAX
MIN
MAX
MIN
MAX UNITS
CC
t
, t
PLH PHL
2
-
-
-
300
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
375
75
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
450
90
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
C
C
= 50pF
= 15pF
L
φI to Q4
4.5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
25
-
L
C = 50pF
6
51
80
16
-
64
100
20
-
78
120
24
-
L
Q to Q
t , t
PLH PHL
C
= 50pF
2
-
n
n+1
L
4.5
5
-
C
= 15pF
6
-
L
C = 50pF
6
14
175
35
-
17
220
44
-
20
265
53
-
L
MR to Q
t
C
= 50pF
2
-
n
PHL
L
4.5
5
-
C
= 15pF
14
-
L
C = 50pF
6
30
75
15
13
37
95
19
16
45
110
22
19
L
Output Transition Time
Input Capacitance
t
, t
C
= 50pF
2
-
THL TLH
L
4.5
6
-
-
C
I
(TBD)
Propagation Dissipation
Capacitance
C
-
-
-
40
-
-
-
-
-
pF
PD
HCT TYPES
t
, t
2
4.5
5
PLH PHL
Propagation Delay
C
C
= 50pF
= 15pF
-
-
-
-
-
-
-
-
-
-
-
-ns
ns
L
φI to Q4
66
83
100
-
-
25
-
-
-
-
-
-
-
-
-
-
-
-ns
-ns
L
C = 50pF
6
L
7
CD74HC4060, CD74HCT4060
Switching Specifications Input t , t = 6ns (Continued)
r
f
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
PARAMETER
Q to Q
SYMBOL CONDITIONS
V
(V) MIN
TYP MAX
MIN
MAX
MIN
MAX UNITS
CC
t
, t
C
= 50pF
2
-
-
-
-
16
-
-
-
-
-
24
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
n
n+1
PLH PHL
L
4.5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
20
-
-
-
-
-
-
-
-
-
-
-
C
= 15pF
6
-
L
C = 50pF
6
-
-
-
L
MR to Q
t
C
= 50pF
2
-
-
-
-
n
PHL
L
4.5
5
-
44
-
55
-
66
-
C
= 15pF
17
-
L
C = 50pF
6
-
-
-
L
Output Transition Time
Input Capacitance
t
, t
C
= 50pF
2
-
-
-
-
THL TLH
L
4.5
6
-
15
-
19
-
22
-
-
C
I
(TBD)
Propagation Dissipation
Capacitance
C
-
-
-
40
-
-
-
-
-
pF
PD
NOTES:
7. C
is used to determine the dynamic power consumption, per package.
PD
2
2
1
2
3
14
8. P = C
D
V
f ∑(C V
f /M) where M = 2 , 2 , 2 , ...2 , f = input frequency, C = output load capacitance.
PD CC
i
L
CC
i
i
L
TYPICAL LIMIT VALUES FOR R AND C
X
X
TYPICAL
MAXIMUM
LIMITS
2
10
TEST
o
T
R
= 25 C
A
X
PARAMETER
CONDITIONS VOLTAGE
= 1KΩ
10
10KΩ
100KΩ
1MΩ
R
R
C
Minimum
Maximum
Minimum
C
C
C
C
C
C
R
R
R
R
R
R
> 1000pF
> 10pF
> 10pF
> 10pF
> 10pF
> 10pF
> 10KΩ
> 10KΩ
> 10KΩ
= 1KΩ
2
4.5
6
1KΩ
20MΩ
10pF
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
10MΩ
-1
10
2
4.5
6
-2
10
-3
10
2
4.5
6
-4
10
10
2
1000pF
10pF
-5
5
6
3
-1
0
2
4
10
10
10
OSCILLATOR FREQUENCY (Hz)
10
10
10
10
10
= 1KΩ
4.5
6
= 1KΩ
10pF
Maximum
Astable Oscillator
Frequency
C
R
= 1000pF,
= 1KΩ
2
0.5MHz
(Note 9)
X
X
NOTE: OSC Frequency ≈ 1/2.2 R C
X X
For 1MΩ > R > 1KΩ, C > 10pF, f < 1MHz
X
X
C
R
= 100pF,
= 1KΩ
4.5
6
3MHz
(Note 9)
X
X
FIGURE 2. FREQUENCY OF ON-BOARD OSCILLATOR AS A
FUNCTION OF C AND R
X
X
C
R
= 100pF,
= 1KΩ
3MHz
(Note 9)
X
X
NOTE:
9. At very high frequencies f = 1/2.2 R C no longer gives an
X
X
yaccurate approximation.
8
Typical Performance Curves
I
t
+ t =
WH
WL
I
t C = 6ns
fC
r
L
t
+ t
=
L
WL
WH
t C = 6ns
t C
f
L
fC
t C
f
L
L
r
L
3V
V
CC
90%
10%
2.7V
0.3V
CLOCK
CLOCK
50%
10%
1.3V
0.3V
50%
t
50%
1.3V
t
1.3V
GND
GND
t
t
WH
WL
WH
WL
NOTE: Outputs should be switching from 10% V
to 90% V
in
NOTE: Outputs should be switching from 10% V
to 90% V
in
CC
CC
CC
CC
accordance with device truth table. For f
, input duty cycle = 50%. accordance with device truth table. For f , input duty cycle = 50%.
MAX
MAX
FIGURE 3. HC CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
FIGURE 4. HCT CLOCK PULSE RISE AND FALL TIMES AND
PULSE WIDTH
t = 6ns
t = 6ns
t = 6ns
t = 6ns
r
f
r
f
V
3V
CC
90%
50%
10%
2.7V
1.3V
0.3V
INPUT
INPUT
GND
GND
t
t
t
t
THL
TLH
THL
TLH
90%
1.3V
90%
50%
10%
INVERTING
OUTPUT
INVERTING
OUTPUT
10%
t
t
PLH
PHL
t
t
PLH
PHL
FIGURE 5. HC AND HCT TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 6. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
9
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明