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CD74HC688PWRE4 [TI]

High-Speed CMOS Logic 8-Bit Magnitude Comparator; 高速CMOS逻辑8位幅度比较
CD74HC688PWRE4
型号： CD74HC688PWRE4
厂家： TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述：

High-Speed CMOS Logic 8-Bit Magnitude Comparator
高速CMOS逻辑8位幅度比较

运算电路 逻辑集成电路 光电二极管
文件： 总14页 (文件大小：358K)
中文：  中文翻译
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CD54HC688, CD74HC688,  
CD54HCT688, CD74HCT688  
Data sheet acquired from Harris Semiconductor  
SCHS196C  
High-Speed CMOS Logic  
8-Bit Magnitude Comparator  
September 1997 - Revised August 2003  
Features  
Description  
• Cascadable  
The ’HC688 and ’HCT688 are 8-bit magnitude comparators  
designed for use in computer and logic applications that  
require the comparison of two 8-bit binary words. When the  
compared words are equal the output (Y) is low and can be  
used as the enabling input for the next device in a cascaded  
application.  
• Fanout (Over Temperature Range)  
[ /Title  
(CD74  
HC688  
,
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
CD74  
HCT68  
8)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Ordering Information  
o
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
PART NUMBER  
CD54HC688F3A  
CD54HCT688F3A  
CD74HC688E  
TEMP. RANGE ( C)  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
PACKAGE  
20 Ld CERDIP  
20 Ld CERDIP  
20 Ld PDIP  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30%of V  
IL IH  
at  
CC  
V
= 5V  
CC  
CD74HC688M  
20 Ld SOIC  
20 Ld SOIC  
20 Ld SOP  
• HCT Types  
CD74HC688M96  
CD74HC688NSR  
CD74HC688PWR  
CD74HC688PWT  
CD74HCT688E  
CD74HCT688M  
CD74HCT688M96  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
20 Ld TSSOP  
20 Ld TSSOP  
20 Ld PDIP  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
20 Ld SOIC  
20 Ld SOIC  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC688, CD54HCT688 (CERDIP)  
CD74HC688 (PDIP, SOIC, SOP, TSSOP)  
CD74HCT688 (PDIP, SOIC)  
TOP VIEW  
1
2
3
4
5
6
7
8
9
V
Y
E
A0  
B0  
A1  
B1  
A2  
B2  
A3  
B3  
20  
19  
CC  
18 B7  
17 A7  
16 B6  
15 A6  
14 B5  
13 A5  
12  
B4  
GND 10  
11 A4  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688  
Functional Diagram  
2
4
A0  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
B0  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
6
8
11  
13  
15  
17  
3
Y
19  
5
7
9
12  
14  
16  
18  
1
E
TRUTH TABLE  
INPUTS  
OUPUTS  
A, B  
A = B  
A ≠ B  
X
E
L
Y
L
L
H
H
H
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care  
2
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688  
Logic Diagram  
A0  
2
B0  
3
A1  
4
B1  
5
A2  
6
B2  
7
A3  
8
B3  
9
A4  
11  
B4 A5  
12 13  
B5  
14  
A6  
15  
B6  
16  
A7  
17  
B7  
18  
E
1
10  
20  
GND  
V
CC  
19  
Y
3
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688  
Absolute Maximum Ratings  
Thermal Information  
o
DC Supply Voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V  
Thermal Resistance (Typical, Note 1)  
θ
( C/W)  
CC  
DC Input Diode Current, I  
For V < -0.5V or V > V  
JA  
IK  
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .  
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .  
NSR (SOP) Package . . . . . . . . . . . . . . . . . . . . . . . .  
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . .  
69  
58  
60  
83  
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA  
OK  
For V < -0.5V or V > V  
I
I
CC  
DC Output Diode Current, I  
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA  
O
O
CC  
o
DC Output Source or Sink Current per Output Pin, I  
O
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C  
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C  
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C  
o
o
For V > -0.5V or V < V  
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA  
O
O
CC  
o
DC V  
or Ground Current, I  
I
. . . . . . . . . . . . . . . . . .±50mA  
CC  
CC or GND  
(SOIC - Lead Tips Only)  
Operating Conditions  
o
o
Temperature Range (T ) . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
A
Supply Voltage Range, V  
CC  
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V  
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V  
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V  
I
O
CC  
Input Rise and Fall Time  
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)  
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)  
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. The package thermal impedance is calculated in accordance with JESD 51-7.  
DC Electrical Specifications  
TEST  
CONDITIONS  
o
o
o
o
o
25 C  
-40 C TO 85 C -55 C TO 125 C  
V
CC  
PARAMETER  
HC TYPES  
SYMBOL  
V (V)  
I
I
(mA)  
(V)  
MIN  
TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
O
High Level Input  
Voltage  
V
-
-
-
2
4.5  
6
1.5  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5  
-
1.5  
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA  
IH  
3.15  
-
-
3.15  
-
-
3.15  
4.2  
4.2  
4.2  
-
Low Level Input  
Voltage  
V
-
2
-
0.5  
1.35  
1.8  
-
-
0.5  
1.35  
1.8  
-
-
0.5  
1.35  
1.8  
-
IL  
4.5  
6
-
-
-
-
-
-
High Level Output  
Voltage  
CMOS Loads  
V
V
or V  
IH IL  
-0.02  
2
1.9  
1.9  
1.9  
OH  
-0.02  
-0.02  
-
4.5  
6
4.4  
-
4.4  
-
4.4  
-
5.9  
-
5.9  
-
5.9  
-
High Level Output  
Voltage  
TTL Loads  
-
-
-
-
-
-
-
-4  
4.5  
6
3.98  
-
3.84  
-
3.7  
-
-5.2  
0.02  
0.02  
0.02  
-
5.48  
-
5.34  
-
5.2  
-
Low Level Output  
Voltage  
CMOS Loads  
V
V
or V  
IH IL  
2
-
-
-
-
-
-
-
0.1  
0.1  
0.1  
-
-
-
-
-
-
-
-
0.1  
0.1  
0.1  
-
-
-
-
-
-
-
-
0.1  
0.1  
0.1  
-
OL  
4.5  
6
Low Level Output  
Voltage  
TTL Loads  
-
4
4.5  
6
0.26  
0.26  
±0.1  
0.33  
0.33  
±1  
0.4  
0.4  
±1  
5.2  
-
Input Leakage  
Current  
I
V
or  
6
I
CC  
GND  
Quiescent Device  
Current  
I
V
GND  
or  
0
6
-
-
8
-
80  
-
160  
µA  
CC  
CC  
4
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688  
DC Electrical Specifications (Continued)  
TEST  
CONDITIONS  
o
o
o
o
o
25 C  
-40 C TO 85 C -55 C TO 125 C  
V
CC  
PARAMETER  
HCT TYPES  
SYMBOL  
V (V)  
I
I
(mA)  
(V)  
MIN  
TYP  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
O
High Level Input  
Voltage  
V
-
-
-
-
4.5 to  
5.5  
2
-
-
-
-
-
0.8  
-
2
-
-
0.8  
-
2
-
-
0.8  
-
V
V
V
IH  
Low Level Input  
Voltage  
V
4.5 to  
5.5  
IL  
High Level Output  
Voltage  
CMOS Loads  
V
V
V
or V  
-0.02  
4.5  
4.5  
4.5  
4.5  
4.4  
4.4  
4.4  
OH  
IH  
IH  
IL  
High Level Output  
Voltage  
TTL Loads  
-4  
3.98  
-
-
-
-
3.84  
-
3.7  
-
V
V
V
Low Level Output  
Voltage  
CMOS Loads  
V
or V  
0.02  
4
-
-
0.1  
0.26  
-
-
0.1  
0.33  
-
-
0.1  
0.4  
OL  
IL  
Low Level Output  
Voltage  
TTL Loads  
Input Leakage  
Current  
I
V
and  
0
0
-
5.5  
5.5  
-
-
-
-
-
±0.1  
8
-
-
-
±1  
80  
-
-
-
±1  
µA  
µA  
µA  
I
CC  
GND  
Quiescent Device  
Current  
I
V
or  
160  
490  
CC  
CC  
GND  
Additional Quiescent  
Device Current Per  
Input Pin: 1 Unit Load  
∆I  
CC  
(Note 2)  
V
4.5 to  
5.5  
100  
360  
450  
CC  
-2.1  
NOTE:  
2. For dual-supply systems theoretical worst case (V = 2.4V, V  
I
= 5.5V) specification is 1.8mA.  
CC  
HCT Input Loading Table  
INPUT  
Enable  
UNIT LOADS  
0.7  
Data Inputs  
0.35  
NOTE: Unit Load is ∆I  
360µA max at 25 C.  
limit specified in DC Electrical Table, e.g.,  
CC  
o
Switching Specifications Input t , t = 6ns  
r
f
o
o
o
o
o
25 C  
-40 C TO 85 C -55 C TO 125 C  
TEST  
SYMBOL CONDITIONS  
V
CC  
(V)  
PARAMETER  
HC TYPES  
MIN TYP MAX  
MIN  
MAX  
MIN  
MAX UNITS  
Propagation Delay (Figure 1)  
An to Output  
t
t
C = 50pF  
2
4.5  
5
-
-
-
-
-
-
-
-
-
-
170  
34  
-
-
-
-
-
-
-
-
-
210  
42  
-
-
-
-
-
-
-
-
-
255  
51  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
PLH,  
L
PHL  
C =15pF  
14  
-
L
C = 50pF  
6
29  
170  
34  
-
36  
210  
42  
-
43  
255  
51  
-
L
Bn to Output  
t
t
C = 50pF  
2
-
PLH,  
L
PHL  
4.5  
5
-
C =15pF  
14  
-
L
C = 50pF  
6
29  
36  
43  
L
5
CD54HC688, CD74HC688, CD54HCT688, CD74HCT688  
Switching Specifications Input t , t = 6ns (Continued)  
r
f
o
o
o
o
o
25 C  
-40 C TO 85 C -55 C TO 125 C  
TEST  
V
CC  
(V)  
PARAMETER  
E to Output  
SYMBOL CONDITIONS  
MIN TYP MAX  
MIN  
MAX  
150  
30  
-
MIN  
MAX UNITS  
t
t
C = 50pF  
2
4.5  
5
-
-
-
-
-
-
-
-
-
-
-
120  
24  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
180  
36  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
pF  
PLH,  
L
PHL  
C =15pF  
9
-
L
C = 50pF  
6
20  
75  
15  
13  
10  
-
26  
95  
19  
16  
10  
-
30  
110  
22  
19  
10  
-
L
Output Transition Time  
(Figure 1)  
t
, t  
C = 50pF  
2
-
TLH THL  
L
4.5  
6
-
-
Input Capacitance  
C
C = 50pF  
-
-
IN  
L
Power Dissipation Capacitance  
(Notes 3, 4)  
C
C =15pF  
5
22  
PD  
L
HCT TYPES  
Propagation Delay (Figure 1)  
t
t
t
C = 50pF  
4.5  
5
-
-
-
-
-
-
-
-
14  
-
34  
-
-
-
-
-
-
-
-
42  
-
-
-
-
-
-
-
-
51  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
PLH,  
L
t
PHL  
An to Output  
Bn to Output  
C =15pF  
L
C = 50pF  
4.5  
5
34  
-
42  
-
51  
-
PLH,  
L
t
PHL  
C =15pF  
14  
-
L
E to Output  
C = 50pF  
4.5  
5
24  
-
30  
-
36  
-
PLH,  
L
t
PHL  
C =15pF  
9
L
Output Transition Time  
(Figure 1)  
t
, t  
C = 50pF  
4.5  
-
15  
19  
22  
TLH THL  
L
Input Capacitance  
C
C = 50pF  
-
-
-
-
10  
-
-
-
10  
-
-
-
10  
-
pF  
pF  
IN  
L
Power Dissipation Capacitance  
(Notes 3, 4)  
C
C =15pF  
5
22  
PD  
L
NOTES:  
3. C  
is used to determine the dynamic power consumption, per gate.  
2
PD  
4. P = V  
f (C  
PD  
+ C ) where f = Input Frequency, C = Output Load Capacitance, V = Supply Voltage.  
CC  
D
CC  
i
L
i
L
Test Circuit and Waveform  
t = 6ns  
t = 6ns  
f
r
ANY INPUT  
A OR B  
INPUT LEVEL  
90%  
V
S
10%  
GND  
t
t
PHL  
PLH  
OUTPUT Y  
V
S
t
t
THL  
TLH  
FIGURE 1. PROPAGATION DELAY AMD TRANSITION TIMES  
6
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Oct-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
CDIP  
CDIP  
CDIP  
CDIP  
PDIP  
Drawing  
5962-8685701RA  
CD54HC688F3A  
CD54HCT688F  
CD54HCT688F3A  
CD74HC688E  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
J
J
20  
20  
20  
20  
20  
1
1
TBD  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
Level-NC-NC-NC  
J
1
J
1
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
CD74HC688EE4  
CD74HC688M  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SO  
N
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
DW  
DW  
DW  
DW  
NS  
NS  
PW  
PW  
PW  
PW  
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74HC688M96  
CD74HC688M96E4  
CD74HC688ME4  
CD74HC688NSR  
CD74HC688NSRE4  
CD74HC688PWR  
CD74HC688PWRE4  
CD74HC688PWT  
CD74HC688PWTE4  
CD74HCT688E  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SO  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
PDIP  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
CD74HCT688EE4  
CD74HCT688M  
N
20  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
DW  
DW  
DW  
DW  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74HCT688M96  
CD74HCT688M96E4  
CD74HCT688ME4  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Oct-2005  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°–8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to discontinue  
any product or service without notice. Customers should obtain the latest relevant information before placing  
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms  
and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI  
deems necessary to support this warranty. Except where mandated by government requirements, testing of all  
parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for  
their products and applications using TI components. To minimize the risks associated with customer products  
and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,  
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process  
in which TI products or services are used. Information published by TI regarding third-party products or services  
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.  
Use of such information may require a license from a third party under the patents or other intellectual property  
of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction  
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for  
such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that  
product or service voids all express and any implied warranties for the associated TI product or service and  
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
www.ti.com/audio  
Data Converters  
dataconverter.ti.com  
Automotive  
www.ti.com/automotive  
DSP  
dsp.ti.com  
Broadband  
Digital Control  
Military  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Interface  
Logic  
interface.ti.com  
logic.ti.com  
Power Mgmt  
Microcontrollers  
power.ti.com  
Optical Networking  
Security  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
microcontroller.ti.com  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright 2005, Texas Instruments Incorporated  

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