CD74HC93_08 [TI]

High-Speed CMOS Logic 4-Bit Binary Ripple Counter; 高速CMOS逻辑4位二进制异步计数器
CD74HC93_08
型号: CD74HC93_08
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

High-Speed CMOS Logic 4-Bit Binary Ripple Counter
高速CMOS逻辑4位二进制异步计数器

计数器
文件: 总13页 (文件大小:382K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CD74HC93,  
CD74HCT93  
Data sheet acquired from Harris Semiconductor  
SCHS138C  
High-Speed CMOS Logic  
4-Bit Binary Ripple Counter  
August 1997 - Revised September 2003  
Features  
Description  
• Can Be Configured to Divide By 2, 8, and 16  
• Asynchronous Master Reset  
The CD74HC93 and CD74HCT93 are high-speed silicon-gate  
CMOS devices and are pin-compatible with low power  
Schottky TTL (LSTTL). These 4-bit binary ripple counters  
consist of four master-slave flip-flops internally connected to  
provide a divide-by-two section and a divide- by-eight section.  
Each section has a separate clock input (CP0 and CP1) to  
initiate state changes of the counter on the HIGH to LOW  
[ /Title  
(CD74  
HC93,  
CD74  
HCT93  
)
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
clock transition. State changes of the Q outputs do not occur  
n
simultaneously because of internal ripple delays. Therefore,  
decoded output signals are subject to decoding spikes and  
should not be used for clocks or strobes.  
/Sub-  
ject  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
A gated AND asynchronous master reset (MR1 and MR2 is  
provided which overrides both clocks and resets (clears) all  
flip-flops.  
(High  
Speed  
CMOS  
Logic  
4-Bit  
Binary  
Ripple  
Counte  
r)  
• HC Types  
- 2V to 6V Operation  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
Because the output from the divide by two section is not  
internally connected to the succeeding stages, the device  
may be operated in various counting modes.  
CC  
• HCT Types  
- 4.5V to 5.5V Operation  
- Direct LSTTL Input Logic Compatibility,  
In a 4-bit ripple counter the output Q must be connected  
0
externally to input CP1. The input count pulses are applied  
to clock input CP0. Simultaneous frequency divisions of 2, 4,  
V = 0.8V (Max), V = 2V (Min)  
IL IH  
- CMOS Input Compatibility, I 1µA at V , V  
l
OL OH  
8, and 16 are performed at the Q , Q , Q , and Q outputs  
0
1
2
3
as shown in the function table. As a 3-bit ripple counter the  
input count pulses are applied to input CP1.  
Pinout  
Simultaneous frequency divisions of 2, 4, and 8 are available  
CD74HC93  
(PDIP, SOIC)  
CD74HCT93  
(PDIP)  
at the Q , Q , Q outputs. Independent use of the first flip-  
1
2
3
flop is available if the reset function coincides with the reset  
of the 3-bit ripple-through counter.  
TOP VIEW  
Ordering Information  
CP1  
MR1  
MR2  
NC  
1
2
3
4
5
6
7
14 CPO  
13 NC  
TEMP. RANGE  
o
PART NUMBER  
CD74HC93E  
( C)  
PACKAGE  
14 Ld PDIP  
12  
Q
0
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
11 Q  
3
CD74HC93M  
CD74HC93MT  
CD74HC93M96  
CD74HCT93E  
14 Ld SOIC  
14 Ld SOIC  
14 Ld SOIC  
14 Ld PDIP  
V
10 GND  
CC  
NC  
NC  
9
8
Q
1
2
Q
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel. The suffix T denotes a small-quantity reel  
of 250.  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
CD74HC93, CD74HCT93  
TRUTH TABLE  
OUTPUTS  
COUNT  
Q
Q
Q
Q
3
0
1
2
0
1
L
L
L
L
H
L
L
H
H
L
L
L
L
L
2
3
H
L
L
L
4
H
H
H
H
L
L
5
H
L
L
L
6
H
H
L
L
7
H
L
L
8
H
H
H
H
H
H
H
H
9
H
L
L
L
10  
11  
12  
13  
14  
15  
H
H
L
L
H
L
L
H
H
H
H
H
L
L
H
H
H
H = High Voltage Level, L = Low Voltage Level  
MODE SELECTION  
RESET OUTPUTS  
OUTPUTS  
MR1  
H
MR2  
H
Q
Q
Q
Q
3
0
1
2
L
L
L
L
L
H
Count  
Count  
Count  
Count  
H
L
L
L
H = High Voltage Level, L = Low Voltage Level  
2
CD74HC93, CD74HCT93  
Absolute Maximum Ratings  
Thermal Information  
o
DC Supply Voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V  
Thermal Resistance (Typical, Note 1)  
θ
( C/W)  
CC  
DC Input Diode Current, I  
For V < -0.5V or V > V  
JA  
IK  
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . .  
M (SOIC) Package. . . . . . . . . . . . . . . . . . . . . . . . . .  
80  
86  
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA  
OK  
For V < -0.5V or V > V  
I
I
CC  
o
DC Output Diode Current, I  
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C  
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C  
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C  
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA  
O
O
CC  
o
DC Output Source or Sink Current per Output Pin, I  
O
For V > -0.5V or V < V  
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA  
O
O
CC  
(SOIC - Lead Tips Only)  
DC V  
or Ground Current, I  
I
. . . . . . . . . . . . . . . . . .±50mA  
CC  
CC or GND  
Operating Conditions  
o
o
Temperature Range (T ) . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C  
A
Supply Voltage Range, V  
CC  
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V  
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V  
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V  
I
O
CC  
Input Rise and Fall Time  
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)  
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)  
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)  
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation  
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.  
NOTE:  
1. The package thermal impedance is calculated in accordance with JESD 51-7.  
DC Electrical Specifications  
TEST  
CONDITIONS  
o
o
o
o
o
25 C  
-40 C TO 85 C  
-55 C TO 125 C  
PARAMETER  
HC TYPES  
SYMBOL V (V)  
I
(mA)  
V
(V) MIN TYP MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
I
O
CC  
High Level Input  
Voltage  
V
-
-
-
2
1.5  
3.15  
4.2  
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5  
3.15  
4.2  
-
-
1.5  
3.15  
4.2  
-
-
V
V
V
V
V
V
V
V
V
V
V
IH  
4.5  
-
-
-
6
2
-
-
-
Low Level Input  
Voltage  
V
-
0.5  
0.5  
0.5  
IL  
4.5  
6
-
1.35  
-
1.35  
-
1.35  
-
1.8  
-
1.8  
-
1.8  
High Level Output  
Voltage  
CMOS Loads  
V
V
V
or  
-0.02  
2
1.9  
4.4  
5.9  
3.98  
5.48  
-
-
-
-
-
1.9  
4.4  
5.9  
3.84  
5.34  
-
-
-
-
-
1.9  
4.4  
5.9  
3.7  
5.2  
-
-
-
-
-
OH  
IH  
V
IL  
-0.02  
-0.02  
-4  
4.5  
6
High Level Output  
Voltage  
TTL Loads  
4.5  
6
-5.2  
Low Level Output  
Voltage  
CMOS Loads  
V
or  
0.02  
0.02  
0.02  
4
2
4.5  
6
-
-
-
-
-
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
-
-
-
-
-
0.1  
0.1  
0.1  
0.4  
0.4  
V
V
V
V
V
OL  
IH  
V
IL  
0.1  
0.1  
Low Level Output  
Voltage  
TTL Loads  
4.5  
6
0.26  
0.26  
0.33  
0.33  
5.2  
Input Leakage  
Current  
I
V
or  
-
6
6
-
-
-
-
±0.1  
-
-
±1  
-
-
±1  
µA  
µA  
I
CC  
GND  
Quiescent Device  
Current  
I
V
or  
0
8
80  
160  
CC  
CC  
GND  
3
CD74HC93, CD74HCT93  
DC Electrical Specifications  
(Continued)  
TEST  
CONDITIONS  
o
o
o
o
o
25 C  
-40 C TO 85 C  
-55 C TO 125 C  
PARAMETER  
HCT TYPES  
SYMBOL V (V)  
I
(mA)  
V (V) MIN TYP MAX  
CC  
MIN  
MAX  
MIN  
MAX  
UNITS  
I
O
High Level Input  
Voltage  
V
-
-
-
-
4.5 to  
5.5  
2
-
-
-
-
-
0.8  
-
2
-
-
0.8  
-
2
-
-
0.8  
-
V
V
V
IH  
Low Level Input  
Voltage  
V
4.5 to  
5.5  
IL  
High Level Output  
Voltage  
CMOS Loads  
V
V
V
or  
IH  
-0.02  
4.5  
4.5  
4.5  
4.5  
4.4  
4.4  
4.4  
OH  
V
IL  
High Level Output  
Voltage  
TTL Loads  
-4  
3.98  
-
-
-
-
3.84  
-
3.7  
-
V
V
V
Low Level Output  
Voltage  
CMOS Loads  
V
or  
0.02  
4
-
-
0.1  
0.26  
-
-
0.1  
0.33  
-
-
0.1  
0.4  
OL  
IH  
V
IL  
Low Level Output  
Voltage  
TTL Loads  
Input Leakage  
Current  
I
V
to  
0
0
-
5.5  
5.5  
-
-
-
-
-
±0.1  
8
-
-
-
±1  
80  
-
-
-
±1  
µA  
µA  
µA  
I
CC  
GND  
Quiescent Device  
Current  
I
V
or  
160  
490  
CC  
CC  
GND  
Additional Quiescent  
Device Current Per  
Input Pin: 1 Unit Load  
I  
CC  
(Note 2)  
V
4.5 to  
5.5  
100  
360  
450  
CC  
-2.1  
NOTE:  
2. For dual-supply systems theoretical worst case (V = 2.4V, V  
I
= 5.5V) specification is 1.8mA.  
CC  
HCT Input Loading Table  
INPUT  
CP0, CP1  
UNIT LOADS  
0.6  
0.4  
MR1, MR2  
NOTE: Unit Load is I  
Specifications table, e.g. 360µA max at 25 C.  
limit specified in DC Electrical  
o
CC  
Prerequisite For Switching Specifications  
o
o
o
o
o
25 C  
-40 C TO 85 C  
-55 C TO 125 C  
TEST CONDITIONS  
PARAMETER  
HC TYPES  
SYMBOL  
V
(V)  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
CC  
Maximum Clock Frequency  
f
2
6
-
-
-
-
-
-
5
24  
28  
100  
20  
17  
-
-
-
-
-
-
4
20  
24  
120  
24  
20  
-
-
-
-
-
-
MHz  
MHz  
MHz  
ns  
MAX  
4.5  
30  
35  
80  
16  
14  
6
2
Clock Pulse Width  
CP0, CP1  
t
w
4.5  
6
ns  
ns  
4
CD74HC93, CD74HCT93  
Prerequisite For Switching Specifications (Continued)  
o
o
o
o
o
25 C  
-40 C TO 85 C  
-55 C TO 125 C  
TEST CONDITIONS  
PARAMETER  
SYMBOL  
V
(V)  
MIN  
80  
16  
14  
50  
10  
9
MAX  
MIN  
100  
20  
MAX  
MIN  
120  
24  
MAX  
UNITS  
ns  
CC  
Reset Pulse Width  
t
2
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
W
4.5  
ns  
6
2
17  
20  
ns  
Reset Removal Time  
t
65  
75  
ns  
REM  
4.5  
6
13  
15  
ns  
11  
13  
ns  
HCT TYPES  
Maximum Clock Frequency  
f
4.5  
4.5  
30  
16  
-
-
24  
20  
-
-
20  
24  
-
-
mHz  
ns  
MAX  
Clock Pulse Width  
CP0, CP1  
t
W
Reset Pulse Width  
t
4.5  
4.5  
16  
10  
-
-
20  
13  
-
-
24  
15  
-
-
ns  
ns  
W
Reset Removal Time  
t
REM  
Switching Specifications Input t , t = 6ns  
r
f
o
-55 C TO  
125 C  
o
o
o
o
25 C  
-40 C TO 85 C  
TEST  
V
CC  
PARAMETER  
HC TYPES  
SYMBOL CONDITIONS (V)  
MIN TYP MAX  
MIN  
MAX  
MIN  
MAX UNITS  
Propagation Delay Time  
CP0 to Q0  
t
, t  
PLH PHL  
C = 50pF  
2
4.5  
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
125  
25  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
155  
31  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
190  
38  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
pF  
L
C = 50pF  
L
C = 15pF  
10  
-
L
C = 50pF  
6
21  
135  
27  
26  
170  
34  
29  
230  
46  
39  
305  
61  
-
32  
205  
41  
35  
280  
56  
48  
370  
74  
-
L
CP1 to Q1  
CP1 to Q2  
CP1 to Q3  
t
t
t
, t  
PLH PHL  
C = 50pF  
2
L
C = 50pF  
4.5  
6
L
C = 50pF  
23  
L
, t  
PLH PHL  
C = 50pF  
2
185  
37  
L
C = 50pF  
4.5  
6
L
C = 50pF  
31  
L
, t  
PLH PHL  
C = 50pF  
2
245  
49  
L
C = 50pF  
4.5  
5
L
C = 15pF  
21  
-
-
L
C = 50pF  
6
42  
52  
195  
39  
63  
235  
47  
-
L
MR1, MR2 to Qn  
t
, t  
PLH PHL  
C = 50pF  
2
155  
31  
L
C = 50pF  
4.5  
5
L
C = 15pF  
13  
L
C = 50pF  
6
26  
75  
15  
13  
10  
-
33  
95  
19  
16  
10  
10  
40  
110  
22  
19  
10  
19  
L
Output Transition Time  
t
, t  
TLH THL  
C = 50pF  
2
-
-
L
4.5  
6
-
Input Capacitance  
C
C = 50pF  
L
-
-
IN  
Power Dissipation Capacitance  
C
-
-
25  
PD  
5
CD74HC93, CD74HCT93  
Switching Specifications Input t , t = 6ns (Continued)  
r
f
o
-55 C TO  
125 C  
o
o
o
o
25 C  
-40 C TO 85 C  
TEST  
V
CC  
PARAMETER  
HCT TYPES  
SYMBOL CONDITIONS (V)  
MIN TYP MAX  
MIN  
MAX  
MIN  
MAX UNITS  
Propagation Delay Time  
CP0 to Q0  
t
, t  
PLH PHL  
C = 50pF  
4.5  
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
14  
-
34  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
43  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
51  
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
pF  
pF  
L
C = 15pF  
L
CP1 to Q1  
t
t
t
t
, t  
PLH PHL  
C = 50pF  
4.5  
5
34  
-
43  
-
51  
-
L
C = 15pF  
-
L
CP1 to Q2  
, t  
PLH PHL  
C = 50pF  
4.5  
5
-
46  
-
58  
-
69  
-
L
C = 15pF  
-
L
CP1 to Q3  
, t  
PLH PHL  
C = 50pF  
4.5  
5
-
58  
-
73  
-
87  
-
L
C = 15pF  
24  
-
L
MR1, MR2 to Qn  
, t  
PLH PHL  
C = 50pF  
4.5  
5
33  
-
41  
-
50  
-
L
C = 15pF  
13  
-
L
Output Transition Time  
Input Capacitance  
t
, t  
C = 50pF  
4.5  
-
15  
10  
-
19  
10  
-
22  
10  
-
TLH THL  
L
C
C = 50pF  
L
-
IN  
Power Dissipation Capacitance  
C
-
-
25  
PD  
Test Circuits and Waveforms  
t C  
t C  
t C  
f
t C  
r
L
f
L
L
r
L
V
3V  
CC  
90%  
10%  
2.7V  
0.3V  
CLOCK  
INPUT  
CLOCK  
INPUT  
50%  
1.3V  
GND  
GND  
t
t
H(H)  
t
t
H(L)  
H(H)  
H(L)  
V
3V  
CC  
DATA  
INPUT  
DATA  
INPUT  
50%  
1.3V  
t
SU(L)  
1.3V  
1.3V  
GND  
GND  
t
t
t
SU(H)  
SU(H)  
SU(L)  
t
t
90%  
50%  
t
t
THL  
TLH  
THL  
TLH  
90%  
1.3V  
90%  
90%  
1.3V  
OUTPUT  
OUTPUT  
10%  
10%  
t
t
t
PLH  
t
PHL  
PHL  
PLH  
t
REM  
t
REM  
V
3V  
CC  
SET, RESET  
OR PRESET  
SET, RESET  
OR PRESET  
50%  
1.3V  
GND  
GND  
IC  
IC  
C
C
L
L
50pF  
50pF  
FIGURE 1. HC SETUP TIMES, HOLD TIMES, REMOVAL TIME,  
AND PROPAGATION DELAY TIMES FOR EDGE  
TRIGGERED SEQUENTIAL LOGIC CIRCUITS  
FIGURE 2. HCT SETUP TIMES, HOLD TIMES, REMOVAL TIME,  
AND PROPAGATION DELAY TIMES FOR EDGE  
TRIGGERED SEQUENTIAL LOGIC CIRCUITS  
6
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Apr-2007  
PACKAGING INFORMATION  
Orderable Device  
CD74HC93E  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
PDIP  
N
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
14  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74HC93EE4  
CD74HC93M  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
N
D
D
D
D
D
D
D
D
D
N
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74HC93M96  
CD74HC93M96E4  
CD74HC93M96G4  
CD74HC93ME4  
CD74HC93MG4  
CD74HC93MT  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
CD74HC93MTE4  
CD74HC93MTG4  
CD74HCT93E  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
CD74HCT93EE4  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Apr-2007  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
CD74HC93M96  
SOIC  
D
14  
2500  
330.0  
16.4  
6.5  
9.0  
2.1  
8.0  
16.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC 14  
SPQ  
Length (mm) Width (mm) Height (mm)  
346.0 346.0 33.0  
CD74HC93M96  
D
2500  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information  
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a  
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property of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied  
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Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all  
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responsible or liable for any such statements.  
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acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products  
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be  
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such safety-critical applications.  
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are  
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:  
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Applications  
Audio  
Automotive  
Broadband  
Digital Control  
Medical  
Amplifiers  
Data Converters  
DSP  
Clocks and Timers  
Interface  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
www.ti.com/audio  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/medical  
www.ti.com/military  
Logic  
Military  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
microcontroller.ti.com  
www.ti-rfid.com  
Optical Networking  
Security  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
RF/IF and ZigBee® Solutions www.ti.com/lprf  
www.ti.com/wireless  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2008, Texas Instruments Incorporated  

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