CD74HCT123 [TI]
High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets; 高速CMOS逻辑双路可重触发单稳态触发器与复位
| 型号： | CD74HCT123 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | High Speed CMOS Logic Dual Retriggerable Monostable Multivibrators with Resets |
| 文件： | 总8页 (文件大小：58K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HC123, CD74HCT123,
CD74HC423, CD74HCT423
Data sheet acquired from Harris Semiconductor
SCHS142
High Speed CMOS Logic Dual Retriggerable
Monostable Multivibrators with Resets
September 1997
Features
Description
• Overriding Reset Terminates Output Pulse
• Triggering From the Leading or Trailing Edge
• Q and Q Buffered Outputs
The Harris CD74HC123, CD74HCT123, CD74HC423 and
CD74HCT423 are dual monostable multivibrators with
resets. They are all retriggerable and differ only in that the
123 types can be triggered by a negative to positive reset
pulse; whereas the 423 types do not have this feature. An
[ /Title
(CD74
HC123
,
CD74
HCT12
3,
CD74
HC423
,
CD74
HCT42
3)
• Separate Resets
external resistor (R ) and an external capacitor (C ) control
X
X
the timing and the accuracy for the circuit. Adjustment of Rx
• Wide Range of Output-Pulse Widths
• Schmitt Trigger on Both A and B Inputs
and C provides a wide range of output pulse widths from
X
the Q and Q terminals. Pulse triggering on the A and B
inputs occur at a particular voltage level and is not related to
the rise and fall times of the trigger pulses.
• Fanout (Over Temperature Range)
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
Once triggered, the output pulse width may be extended by
retriggering inputs A and B. The output pulse can be
terminated by a LOW level on the Reset (R) pin. Trailing
edge triggering (A) and leading edge triggering (B) inputs
are provided for triggering from either edge of the input
pulse. If either Mono is not used each input on the unused
device (A, B, and R) must be terminated high or low.
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
/Sub-
ject
(High
Speed
• HC Types
The minimum value of external resistance, Rx is typically 5kΩ.
- 2V to 6V Operation
The minimum value external capacitance, C , is 0pF. The
X
calculation for the pulse width is t = 0.45 R C at V
= 5V.
- High Noise Immunity: N = 30%, N = 30%of V
IL IH
at
W
X X CC
CC
V
= 5V
CC
Ordering Information
• HCT Types
- 4.5V to 5.5V Operation
PKG.
NO.
o
PART NUMBER TEMP. RANGE ( C) PACKAGE
- Direct LSTTL Input Logic Compatibility,
V = 0.8V (Max), V = 2V (Min)
IL IH
CD74HC123E
CD74HCT123E
CD74HC423E
CD74HCT423E
CD74HC123M
CD74HCT123M
CD74HC423M
CD74HCT423M
NOTES:
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
16 Ld PDIP
16 Ld PDIP
16 Ld PDIP
16 Ld PDIP
E16.3
E16.3
E16.3
E16.3
- CMOS Input Compatibility, I ≤ 1µA at V , V
OL OH
l
Pinout
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
(PDIP, SOIC)
TOP VIEW
16 Ld SOIC M16.15
16 Ld SOIC M16.15
16 Ld SOIC M16.15
16 Ld SOIC M16.15
1A
1B
1R
1Q
2Q
1
2
3
4
5
6
7
8
16 V
CC
15 1R C
X
X
14 1C
X
13 1Q
12 2Q
11 2R
10 2B
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2C
X
X
2R C
2. Wafer or die for this part number is available which meets all elec-
trical specifications. Please contact your local sales office or
Harris customer service for ordering information.
X
9
2A
GND
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
File Number 1708.1
Copyright © Harris Corporation 1997
1
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
Functional Diagram
1Cx
1Rx
V
CC
14
1Cx
15
1RxCx
13
4
1A
1Q
1Q
1
2
MONO 1
1B
1R
3
11
2R
2A
5
9
2Q
2Q
MONO 2
12
10
2B
2Cx
2RxCx
7
6
V
CC
2Cx
2Rx
TRUTH TABLE
R
INPUTS
B
OUTPUTS
A
Q
Q
CD74HC/HCT123
H
X
L
X
L
↑
H
H
H
L
L
H
H
↓
H
H
X
L
X
H
L
L
H
↑
CD74HC/HCT423
H
X
L
X
L
↑
H
H
H
L
L
H
H
↓
H
X
H
L
X
L
H
NOTE: H = High Voltage Level, L = Low Voltage Level,
X = Don’t Care.
2
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
Absolute Maximum Ratings
Thermal Information
o
DC Supply Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
Thermal Resistance (Typical, Note 3)
θ
( C/W)
CC
DC Input Diode Current, I
For V < -0.5V or V > V
JA
IK
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
+ 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
OK
For V < -0.5V or V > V
I
I
CC
115
o
DC Output Diode Current, I
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . .-65 C to 150 C
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
o
o
+ 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
O
O
CC
o
DC Output Source or Sink Current per Output Pin, I
O
For V > -0.5V or V < V
+ 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
O
O
CC
(SOIC - Lead Tips Only)
DC V
or Ground Current, I
I
. . . . . . . . . . . . . . . . . .±50mA
CC
CC or GND
Operating Conditions
o
o
Temperature Range (T ) . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
A
Supply Voltage Range, V
CC
HC Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
HCT Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5V to 5.5V
DC Input or Output Voltage, V , V . . . . . . . . . . . . . . . . . 0V to V
I
O
CC
Input Rise and Fall Time
2V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (Max)
4.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (Max)
6V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (Max)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
3. θ is measured with the component mounted on an evaluation PC board in free air.
JA
DC Electrical Specifications
TEST
CONDITIONS
o
o
o
o
o
25 C
TYP
-40 C TO 85 C -55 C TO 125 C
V
(V)
CC
PARAMETER
HC TYPES
SYMBOL
V (V)
I
I
(mA)
MIN
MAX
MIN
MAX
MIN
MAX
UNITS
O
High Level Input
Voltage
V
-
-
-
2
4.5
6
1.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
1.5
-
1.5
-
-
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
IH
3.15
-
-
3.15
-
-
3.15
4.2
4.2
4.2
-
Low Level Input
Voltage
V
-
2
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
-
0.5
1.35
1.8
-
IL
4.5
6
-
-
-
-
-
-
High Level Output
Voltage
CMOS Loads
V
V
or V
IH IL
-0.02
2
1.9
1.9
1.9
OH
-0.02
-0.02
-
4.5
6
4.4
-
4.4
-
4.4
-
5.9
-
5.9
-
5.9
-
High Level Output
Voltage
TTL Loads
-
-
-
-
-
-
-
-4
4.5
6
3.98
-
3.84
-
3.7
-
-5.2
0.02
0.02
0.02
-
5.48
-
5.34
-
5.2
-
Low Level Output
Voltage
CMOS Loads
V
V
or V
IH IL
2
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
-
-
-
-
-
-
-
0.1
0.1
0.1
-
OL
4.5
6
Low Level Output
Voltage
TTL Loads
-
4
4.5
6
0.26
0.26
±0.1
0.33
0.33
±1
0.4
0.4
±1
5.2
-
Input Leakage
Current
I
V
or
6
I
CC
GND
Quiescent Device
Current
I
V
GND
or
0
6
-
-
8
-
80
-
160
µA
CC
CC
3
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
DC Electrical Specifications (Continued)
TEST
CONDITIONS
o
o
o
o
o
25 C
-40 C TO 85 C -55 C TO 125 C
V
CC
PARAMETER
HCT TYPES
SYMBOL
V (V)
I
I
(mA)
(V)
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
O
High Level Input
Voltage
V
-
-
-
-
4.5 to
5.5
2
-
-
-
-
-
0.8
-
2
-
-
0.8
-
2
-
-
0.8
-
V
V
V
IH
Low Level Input
Voltage
V
4.5 to
5.5
IL
High Level Output
Voltage
CMOS Loads
V
V
V
or V
-0.02
4.5
4.5
4.5
4.5
4.4
4.4
4.4
OH
IH
IH
IL
High Level Output
Voltage
TTL Loads
-4
3.98
-
-
-
-
3.84
-
3.7
-
V
V
V
Low Level Output
Voltage
CMOS Loads
V
or V
0.02
4
-
-
0.1
0.26
-
-
0.1
0.33
-
-
0.1
0.4
OL
IL
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
I
V
and
0
0
-
5.5
5.5
-
-
-
±0.1
8
-
-
-
±1
80
-
-
-
±1
µA
µA
µA
I
CC
GND
Quiescent Device
Current
I
V
or
-
160
490
CC
CC
GND
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
V
4.5 to
5.5
100
360
450
CC
-2.1
NOTE: For dual-supply systems theoretical worst case (V = 2.4V, V
I
= 5.5V) specification is 1.8mA.
CC
HCT Input Loading Table
INPUT
All
UNIT LOADS
0.35
NOTE: Unit Load is ∆I
360µA max at 25 C.
limit specified in DC Electrical Table, e.g.
CC
o
Prerequisite for Switching Specifications
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
HC TYPES
SYMBOL
V
(V) MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX UNITS
CC
Minimum Input,
Pulse Width
t
WL
A
2
100
-
-
-
-
-
-
-
-
-
-
-
-
125
25
-
-
-
-
-
-
-
-
-
-
-
-
150
30
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
4.5
6
20
17
21
26
B
t
2
100
20
125
25
150
30
WH
4.5
6
17
21
26
4
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
Prerequisite for Switching Specifications (Continued)
o
o
o
o
o
25 C
-40 C TO 85 C
-55 C TO 125 C
PARAMETER
SYMBOL
V
(V) MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX UNITS
CC
R
t
2
100
-
-
-
-
-
-
-
-
-
-
-
-
-
125
25
21
65
13
11
65
13
11
-
-
-
-
-
-
-
-
-
-
-
-
-
-
150
30
26
75
15
13
75
15
13
-
-
-
150
30
26
75
15
13
75
15
13
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WL
4.5
6
20
17
50
10
9
-
-
-
A and B Hold Time
t
2
-
-
-
H
4.5
6
-
-
-
-
-
-
Reset Removal Time
Retrigger Time Number
t
2
50
10
9
-
-
-
REM
4.5
6
-
-
-
-
-
-
t
t
5
-
-
-
-
rT
W
R
= 10KΩ, C = 0
-
50
-
63
-
76
-
X
X
Output Pulse Width
Q or Q
5
5
R
= 10KΩ, C = 10nF
40
-
50
38.7
-
51.3
38.2
-
51.8
µs
X
X
HCT TYPES
Minimum Input,
Pulse Width
-
t
WL
A
20
20
20
10
10
-
-
-
-
-
-
-
-
-
-
25
25
25
13
13
-
-
-
-
-
-
-
-
-
-
30
30
30
15
15
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
B
t
WH
R
t
WL
A and B Hold Time
Reset Removal Time
t
5
5
H
t
REM
Retrigger Time Number
(Note 4)
R
= 10KΩ, C = 0
t
t
5
5
-
50
-
-
-
63
-
-
-
76
-
-
ns
X
X
rT
Output Pulse Width Q or Q
= 10KΩ, C = 10nF
40
50
38.7
51.3
38.2
51.8
µs
W
R
X
X
NOTE:
4. Time to trigger depends on the values of R and C . The output pulse width can only be extended when the time between the active-
X
X
going edges of the trigger input pulses meet the minimum retrigger time requirement.
5
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
Switching Specifications C = 50pF, Input t , t = 6ns, R = 10KΩ, C = 0
L
r
f
X
X
o
o
-40 C TO
-55 C TO
o
o
o
25 C
85 C
125 C
TEST
SYMBOL CONDITIONS
PARAMETER
HC TYPES
V
(V) MIN
TYP MAX
MIN
MAX
MIN
MAX UNITS
CC
Trigger Propagation Delay
A, B, R to Q
t
PHL
C
= 50pF
L
2
4.5
5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
300
60
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
375
75
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
450
90
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
C
C
= 15pF
= 50pF
= 50pF
25
-
L
L
L
6
51
320
64
-
64
400
80
-
76
480
96
-
A, B, R to Q
t
PHL
2
-
4.5
5
-
C
C
C
= 15pF
= 50pF
= 50pF
26
-
L
L
L
6
54
215
43
37
75
15
13
68
270
54
46
95
19
16
82
325
65
55
110
22
19
Reset Propagation Delay
R to Q or Q
t
, t
PHL PLH
2
-
4.5
6
-
-
Output Transition Time
t
, t
C
= 50pF
2
-
THL TLH
L
4.5
6
-
-
Output Pulse Width
-
-
-
-
5
R
= 10KΩ, C = 10pF
-
45
-
-
-
-
-
µs
X
X
Pulse Width Match Between
Circuits In the Same Package
5
R
= 10KΩ, C = 10pF
-
-
±2
-
-
-
-
-
-
-
-
-
-
-
-
-
%
X
X
Power Dissipation Capacitance
Input Capacitance
NOTES:
C
C
C
= 15pF
= 50pF
5
-
pF
pF
PD
L
C
10
-
10
10
10
IN
L
5. C
is used to determine the dynamic power consumption, per multivibrator.
PD
2
2
6. P = (C
+ C ) V
CC
f ∑(C V
f ) where f = input frequency, f = Output Frequency, C = Output Load Capacitance,
D
PD
X
i
L
CC
O
i
O
L
I
C
= External Capacitance V
= Supply Voltage assuming f «
X
CC
i
------
t
W
6
CD74HC123, CD74HCT123, CD74HC423, CD74HCT423
Test Circuits and Waveforms
A
B = LOW
A = HIGH
A
B = LOW
A = HIGH
B
R
B
R
V
S
V
S
t
W
t
t
W
W
V
S
V
S
Q
Q
t
t
t
t
W
W
W
W
FIGURE 1. OUTPUT PULSE CONTROL USING RESET INPUT
(R) PULSE FOR 123
FIGURE 2. OUTPUT PULSE CONTROL USING RESET INPUT
(R) FOR 423
A
B
t
W
B
A
(R = HIGH)
t
rT
V
S
Q
t
W
t
t
W
W
NOTE: Output pulse control using retrigger pulse for 123 and 423.
FIGURE 3. TRIGGERING OF ONE SHOT BY INPUT A OR INPUT B FOR A PERIOD t
W
8
6
4
0.9
EXTERNAL CAPACITANCE (C ) = 10nF
X
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
EXTERNAL RESISTANCE (R ) = 10kΩ TO 100kΩ
X
2
o
3
2
1
AMBIENT TEMPERATURE (T ) = 25 C
A
10
10
10
8
6
4
2
HCT
8
6
4
2
8
6
4
DC SUPPLY VOLTAGE (V ) = 5V
CC
o
AMBIENT TEMPERATURE (T ) = 25 C
A
2
2
4
6 8
10
2
4
6 8
2
4
6 8
2
4 6 8
3
4
5
6
7
1
2
3
4
5
6
7
8
9
10
11
10
10
10
10
EXTERNAL CAPACITANCE (C ) - pF
DC SUPPLY VOLTAGE (V ) - VOLTS
CC
X
FIGURE 4. TYPICAL OUTPUT PULSE WIDTH AS A FUNCTION
OF C FOR R = 10kΩ AND 100kΩ
FIGURE 5. TYPICAL “K” FACTOR AS A FUNCTION OF V
CC
X
X
7
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO
BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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