CDC340DW [TI]
1-LINE TO 8-LINE CLOCK DRIVER; 1线路至8线路时钟驱动器
| 型号： | CDC340DW |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 1-LINE TO 8-LINE CLOCK DRIVER |
| 文件： | 总7页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
DW PACKAGE
(TOP VIEW)
Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications
V
V
CC
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
CC
TTL-Compatible Inputs and Outputs
1G
2G
A
P0
P1
1Y1
1Y2
GND
1Y3
1Y4
GND
Distributes One Clock Input to Eight
Outputs
Distributed V
Switching Noise
and Ground Pins Reduce
CC
V
High-Drive Outputs (–48-mA I
,
CC
2Y4
OH
13 2Y1
12 2Y2
48-mA I
)
OL
2Y3
GND
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
11
GND
Package Options Include Plastic
Small-Outline (DW) and Shrink
description
The CDC340 is a high-performance clock-driver circuit that distributes one (A) input signal to eight (Y) outputs
with minimum skew for clock distribution. Through the use of the control pins (1G and 2G), the outputs can be
placed in a high state regardless of the A input.
The propagation delays are adjusted at the factory using the P0 and P1 pins. These pins are not intended for
customer use and should be strapped to GND.
The CDC340 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OUTPUTS
1G
X
2G
X
A
L
1Y1–1Y4 2Y1–2Y4
H
H
H
L
H
H
L
L
L
H
H
H
H
L
H
L
H
H
H
L
H
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
†
logic symbol
2
1G
G1
G2
3
2G
19
18
16
15
1
1
1
1
1Y1
1Y2
1Y3
1Y4
4
A
13
12
9
2
2
2
2
2Y1
2Y2
2Y3
2Y4
8
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
2
19
18
16
15
1G
1Y1
1Y2
1Y3
1Y4
3
2G
4
A
13
12
9
2Y1
2Y2
2Y3
2Y4
8
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high state or power-off state,
V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
CC
O
Current into any output in the low state, I
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Maximum power dissipation at T = 55°C (in still air) (see Note 2): DW package . . . . . . . . . . . . . . . . . . 1.6 W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
IK
I
A
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerations Application Note in the ABT Advanced BiCMOS Technology
Data Book, literature number SCBD002.
recommended operating conditions (see Note 3)
MIN
4.75
2
MAX
UNIT
V
V
V
V
V
Supply voltage
5.25
CC
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
V
IL
0
V
CC
V
I
I
High-level output current
Low-level output current
–48
48
mA
mA
OH
OL
I
One output back loaded
Both output banks loaded
80
f
Input clock frequency
MHz
clock
40
T
A
Operating free-air temperature
0
70
°C
NOTE 3: Unused inputs must be held high or low to prevent them from floating.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
A
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
‡
MIN TYP
MAX
V
V
V
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 4.75 V,
= 4.75 V,
= 5 V,
I = –18 mA
–1.2
–1.2
V
IK
I
I
I
I
I
= – 3 mA
= – 3 mA
= – 48 mA
= 48 mA
2.5
3
2.5
3
OH
OH
OH
OL
V
OH
= 4.75 V,
= 4.75 V,
= 5.25 V,
= 5.25 V,
2
2
0.5
V
OL
I
I
V = V
or GND
±1
±1
µA
mA
I
I
CC
= 2.5 V
O
§
V
–50 –100 –200
–50 –200
O
Outputs high
Outputs low
2
24
3
3.5
33
V
= 5.25 V,
I
O
= 0,
CC
I
mA
pF
CC
V = V
I
or GND
CC
C
V = 2.5 V or 0.5 V
I
i
‡
§
All typical values are at V
= 5 V.
CC
No more than one output should be tested at a time, and the duration of the test should not exceed one second.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
switching characteristics, C = 50 pF (see Figure 1 and Figure 2)
L
V
T
= 5 V,
= 25°C
V
CC
= 4.75 V to 5.25 V,
T = 0°C to 70°C
A
CC
A
FROM
(INPUT) (OUTPUT)
TO
PARAMETER
UNIT
MIN
3.4
3.2
2
TYP
MAX
4.5
4.3
3.8
3.8
0.5
0.8
1.1
MIN
MAX
4.8
4.7
4
t
t
t
t
t
t
t
t
t
Propagation delay time, low-to-high level
Propagation delay time, high-to-low level
Propagation delay time, low-to-high level
Propagation delay time, high-to-low level
Skew time, output
3
2.8
2
PLH
PHL
PLH
PHL
sk(o)
sk(p)
sk(pr)
r
A
Y
Y
ns
ns
G
2
2
4
0.3
0.6
0.6
0.9
1.1
1.5
1.5
Skew time, pulse
A
Y
ns
Skew time, process
Rise time
A
A
Y
Y
ns
ns
Fall time
f
t
performance information relative to V
and temperature variation (see Note 4)
pd
CC
PARAMETER
from 0°C to 70°C
∆ change
†
†
∆t
∆t
∆t
∆t
Temperature drift of t
Temperature drift of t
–53 ps/10°C
–58 ps/10°C
43 ps/100 mV
–33 ps/100 mV
PLH(TA)
PHL(TA)
PLH
from 0°C to 70°C
PHL
‡
‡
V
drift of t
drift of t
from 4.75 V to 5.25 V
from 4.75 V to 5.25 V
PLH(VCC)
PHL(VCC)
CC
CC
PLH
PHL
V
†
‡
Virtually independent of V
CC
Virtually independent of temperature
NOTE 4: The data extracted is from a wide range of characterization material.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
C
= 50 pF
L
500 Ω
(see Note A)
LOAD CIRCUIT
3 V
0 V
Input
(see Note B)
1.5 V
1.5 V
t
t
PHL
PLH
V
V
OH
2 V
1.5 V
0.8 V
1.5 V
0.8 V
Output
OL
t
t
r
f
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NOTES: A.
C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
Figure 1. Load Circuit and Voltage Waveforms
A
1G
2G
1Yn
t
t
PHL1
PLH1
2Yn
t
t
PHL2
PLH2
NOTES: A. Output skew, t
, is calculated as the greater of:
sk(o)
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
(n = 1, 2)
(n = 1, 2)
PLHn
PHLn
B. Pulse skew, t
, is calculated as the greater of | t
– t
| (n = 1, 2).
sk(p)
PLHn PHLn
, is calculated as the greater of:
C. Process skew, t
sk(pr)
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
(n = 1, 2) across multiple devices under identical operating conditions
(n = 1, 2) across multiple devices under identical operating conditions
PLHn
PHLn
Figure 2. Waveforms for Calculation of t
, t
, t
sk(o) sk(p) sk(pr)
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC340
1-LINE TO 8-LINE CLOCK DRIVER
SCAS332B – DECEMBER 1992 – REVISED MAY 1997
MECHANICAL INFORMATION
DW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
16 PIN SHOWN
PINS **
0.050 (1,27)
16
20
24
28
DIM
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
0.410
0.510
0.610
0.710
A MAX
(10,41) (12,95) (15,49) (18,03)
16
9
0.400
0.500
0.600
0.700
A MIN
(10,16) (12,70) (15,24) (17,78)
0.419 (10,65)
0.400 (10,15)
0.010 (0,25) NOM
0.299 (7,59)
0.293 (7,45)
Gage Plane
0.010 (0,25)
1
8
0°–8°
0.050 (1,27)
0.016 (0,40)
A
Seating Plane
0.004 (0,10)
0.012 (0,30)
0.004 (0,10)
0.104 (2,65) MAX
4040000/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-013
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
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any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER
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BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating
safeguards must be provided by the customer to minimize inherent or procedural hazards.
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that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other
intellectual property right of TI covering or relating to any combination, machine, or process in which such
semiconductor products or services might be or are used. TI’s publication of information regarding any third
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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