CSD17381F4_16 [TI]
30 V N-Channel FemtoFET MOSFET;
| 型号： | CSD17381F4_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 30 V N-Channel FemtoFET MOSFET |
| 文件： | 总11页 (文件大小：1100K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CSD17381F4
www.ti.com
SLPS411A –APRIL 2013–REVISED JULY 2013
30-V, N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD17381F4
PRODUCT SUMMARY
1
FEATURES
VDS
Qg
Drain to Source Voltage
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
30
V
2
•
•
•
•
Ultra Low On Resistance
Ultra Low Qg and Qgd
1040
133
pC
pC
Qgd
Low Threshold Voltage
VGS = 1.8V
160
110
90
RDS(on) Drain to Source On Resistance
VGS = 2.5V
VGS = 4.5V
mΩ
Ultra Small Footprint (0402 Case Size)
–
1.0 mm x 0.6 mm
Ultra Low Profile
0.35 mm Height
Integrated ESD Protection Diode
VGS(th)
Threshold Voltage
0.85
V
•
•
–
Text Added For Spacing
ORDERING INFORMATION
Device
CSD17381F4
Qty
Media
Package
Ship
–
–
Rated > 4kV HBM
Rated > 2kV CDM
7-Inch
Reel
3,000
Femto(0402) 1.0mm x
0.6mm SMD Lead Less
Tape and
Reel
•
•
Pb and Halogen Free
RoHS Compliant
13-Inch
Reel
CSD17381F4R 18,000
Text Added For Spacing
APPLICATIONS
ABSOLUTE MAXIMUM RATINGS
•
•
Optimized for Load Switch Applications
TA = 25°C unless otherwise stated
VALUE
UNIT
V
Optimized for General Purpose Switching
Applications
VDS
VGS
ID
Drain to Source Voltage
30
Gate to Source Voltage
12
V
Continuous Drain Current, TA = 25°C(1)
Pulsed Drain Current, TA = 25°C(2)
Power Dissipation(1)
3.1
10
A
•
•
Single Cell Battery Applications
Handheld and Mobile Applications
IDM
PD
A
500
4
mW
kV
kV
Human Body Model (HBM)
Charged Device Model (CDM)
DESCRIPTION
ESD
Rating
2
The FemtoFET™ MOSFET technology has been
designed and optimized to minimize the footprint in
many handheld and mobile applications. This
technology is capable of replacing standard small
signal MOSFETs while providing at least a 60%
reduction in footprint size.
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
2.7
°C
Avalanche Energy, single pulse ID = 7.4A,
L = 0.1mH, RG = 25Ω
EAS
mJ
(1) Typical RθJA = 90°C/W on 1-inch2 (6.45-cm2), 2-oz. (0.071-
mm thick) Cu pad on a 0.06-inch (1.52-mm) thick FR4 PCB.
(2) Pulse duration ≤300μs, duty cycle ≤2%
On Resistance vs. Gate Voltage
160
Top View
TC = 25°C Id = 0.5A
TC = 125ºC Id = 0.5A
150
140
130
120
110
100
90
D
80
70
G
S
60
0
2
4
6
8
10
12
VGS - Gate-to- Source Voltage (V)
G001
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FemtoFET is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2013, Texas Instruments Incorporated
CSD17381F4
SLPS411A –APRIL 2013–REVISED JULY 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Static Characteristics
TEST CONDITIONS
MIN
TYP
MAX
UNIT
BVDSS
IDSS
Drain to Source Voltage
VGS = 0V, IDS = 250μA
30
V
Drain to Source Leakage Current
Gate to Source Leakage Current
Gate to Source Threshold Voltage
VGS = 0V, VDS = 24V
VDS = 0V, VGS = 10V
VDS = VGS, IDS = 250μA
VGS = 1.8V, IDS =0.5A
VGS = 2.5V, IDS =0.5A
VGS = 4.5V, IDS = 0.5A
VGS = 8V, IDS =0.5A
VDS = 15V, IDS = 0.5A
1
100
1.10
250
143
117
109
μA
nA
V
IGSS
VGS(th)
0.65
0.85
160
110
90
mΩ
mΩ
mΩ
mΩ
S
RDS(on)
Drain to Source On Resistance
Transconductance
84
gfs
4.8
Dynamic Characteristics
Ciss
Coss
Crss
RG
Input Capacitance
150
44
195
57
pF
pF
pF
Ω
VGS = 0V, VDS = 15V,
f = 1MHz
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance
Gate Charge Total (4.5V)
Gate Charge Gate to Drain
Gate Charge Gate to Source
Gate Charge at Vth
Output Charge
2.2
2.9
23
Qg
1040
133
226
150
1110
3.4
1350
pC
pC
pC
pC
pC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 15V, IDS = 0.5A
VDS = 15V, VGS = 0V
Turn On Delay Time
Rise Time
1.4
VDS = 0V, VGS = 4.5V,
IDS = 0.5A,RG = 2Ω
td(off)
tf
Turn Off Delay Time
Fall Time
10.8
3.6
Diode Characteristics
VSD
Qrr
trr
Diode Forward Voltage
ISD = 0.5A, VGS = 0V
0.73
1500
5.6
0.9
V
Reverse Recovery Charge
Reverse Recovery Time
pC
ns
VDS= 15V, IF = 0.5A, di/dt = 300A/μs
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
Typical Values
UNIT
°C/W
°C/W
Thermal Resistance Junction to Ambient(1)
Thermal Resistance Junction to Ambient(2)
90
RθJA
250
(1) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.
2
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Product Folder Links: CSD17381F4
CSD17381F4
www.ti.com
SLPS411A –APRIL 2013–REVISED JULY 2013
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
8
5
4
3
2
1
0
VDS = 5V
7
6
5
4
3
2
1
0
TC = 125°C
TC = 25°C
TC = −55°C
VGS =8V
VGS =4.5V
VGS =2.5V
VGS =1.8V
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
VDS - Drain-to-Source Voltage (V)
1
0
0.4
0.8
1.2
1.6
2
2.4
VGS - Gate-to-Source Voltage (V)
G001
G001
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
Copyright © 2013, Texas Instruments Incorporated
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3
Product Folder Links: CSD17381F4
CSD17381F4
SLPS411A –APRIL 2013–REVISED JULY 2013
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
10
9
8
7
6
5
4
3
2
1
0
1000
100
10
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
ID = 0.5A
VDS =15V
1
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2
0
3
6
9
12
15
18
21
24
27
30
Qg - Gate Charge (nC)
VDS - Drain-to-Source Voltage (V)
G001
G001
Figure 4. Gate Charge
Figure 5. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.2
1.1
1
160
150
140
130
120
110
100
90
ID = 250uA
TC = 25°C Id = 0.5A
TC = 125ºC Id = 0.5A
0.9
0.8
0.7
0.6
0.5
0.4
80
70
60
−75
−25
25
75
125
175
0
2
4
6
8
10
12
TC - Case Temperature (ºC)
VGS - Gate-to- Source Voltage (V)
G001
G001
Figure 6. Threshold Voltage vs. Temperature
TEXT ADDED FOR SPACING
Figure 7. On-State Resistance vs. Gate-to-Source Voltage
TEXT ADDED FOR SPACING
1.5
1.4
1.3
1.2
1.1
1
10
VGS = 1.8V
VGS = 8V
ID =0.5A
TC = 25°C
TC = 125°C
1
0.1
0.01
0.9
0.8
0.7
0.001
0.0001
−75
−25
25
75
125
175
0
0.2
0.4
0.6
0.8
1
TC - Case Temperature (ºC)
VSD − Source-to-Drain Voltage (V)
G001
G001
Figure 8. Normalized On-State Resistance vs. Temperature
Figure 9. Typical Diode Forward Voltage
4
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: CSD17381F4
CSD17381F4
www.ti.com
SLPS411A –APRIL 2013–REVISED JULY 2013
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
100
100
10
1
TC = 25ºC
TC = 125ºC
1ms
100ms
1s
DC
10ms
10
1
0.1
0.01
Single Pulse
TypicalRthetaJA =250ºC/W(min Cu)
0.1
0.001
0.01
0.1
1
10
50
0.01
0.1
1
VDS - Drain-to-Source Voltage (V)
TAV - Time in Avalanche (mS)
G001
G001
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TypicalRthetaJA =90ºC/W(max Cu)
−50 −25
0
25
50
75
100 125 150 175
TA - AmbientTemperature (ºC)
G001
Figure 12. Maximum Drain Current vs. Temperature
Copyright © 2013, Texas Instruments Incorporated
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5
Product Folder Links: CSD17381F4
CSD17381F4
SLPS411A –APRIL 2013–REVISED JULY 2013
www.ti.com
MECHANICAL DATA
0402 Mechanical Dimensions
(1) All linear dimensions are in millimeters (dimensions and tolerancing per AME T14.5M-1994)
(2) This drawing is subject to change without notice
(3) This package is a PB-Free solder land design
Recommended Minimum PCB Layout
(1) All dimensions are in millimeters.
6
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: CSD17381F4
CSD17381F4
www.ti.com
SLPS411A –APRIL 2013–REVISED JULY 2013
Recommended Stencil Pattern
(1) All dimensions are in millimeters.
Copyright © 2013, Texas Instruments Incorporated
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7
Product Folder Links: CSD17381F4
CSD17381F4
SLPS411A –APRIL 2013–REVISED JULY 2013
www.ti.com
CSD17381F4 Embossed Carrier Tape Dimensions
(1) Pin 1 will be oriented in the top right quadrant of the tape enclosure (Quadrant 2), closest to the carrier tape sprocket
holes.
spacer
REVISION HISTORY
Changes from Original (April 2013) to Revision A
Page
•
•
•
•
Added ESD info to Features ................................................................................................................................................. 1
Included Jumbo Real Ordering Information .......................................................................................................................... 1
Added ESD Rating Info to Absolute Maximum Table ........................................................................................................... 1
Added Circuit Schematic to PinOut View ............................................................................................................................. 1
8
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Copyright © 2013, Texas Instruments Incorporated
Product Folder Links: CSD17381F4
PACKAGE MATERIALS INFORMATION
www.ti.com
16-May-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD17381F4
PICOST
AR
YJC
3
3000
180.0
8.4
0.7
1.1
0.46
4.0
8.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-May-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
PICOSTAR YJC
SPQ
Length (mm) Width (mm) Height (mm)
210.0 185.0 35.0
CSD17381F4
3
3000
Pack Materials-Page 2
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