CSD18542KCS [TI]
采用 TO-220 封装的单路、4mΩ、60V、N 沟道 NexFET™ 功率 MOSFET;
| 型号： | CSD18542KCS |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 TO-220 封装的单路、4mΩ、60V、N 沟道 NexFET™ 功率 MOSFET 局域网 脉冲 |
| 文件： | 总13页 (文件大小：776K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CSD18542KCS
ZHCSDT3 –JUNE 2015
CSD18542KCS 60V N 通道 NexFET™ 功率 MOSFET
1 特性
产品概要
1
•
•
•
•
•
•
•
•
超低 Qg 和 Qgd
TA = 25°C
VDS
典型值
单位
V
低热阻
漏源极电压
60
44
雪崩额定值
Qg
栅极电荷总量 (10V)
栅漏栅极电荷
nC
nC
mΩ
mΩ
V
逻辑电平
Qgd
6.9
VGS = 4.5V
VGS = 10V
1.8
4.0
3.3
无铅引脚镀层
符合 RoHS 标准
无卤素
RDS(on) 漏源导通电阻
VGS(th) 阈值电压
晶体管 (TO)-220 塑料封装
订购信息(1)
器件
CSD18542KCS
数量 包装介质
封装
运输
2 应用范围
50
管
TO-220 塑料封装
管
•
•
•
直流 - 直流转换
次级侧同步整流器
电机控制
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
绝对最大额定值
TA = 25°C
值
60
单位
V
VDS
VGS
漏源极电压
3 说明
栅源极电压
±20
200
V
这款 60V，3.3mΩ，TO-220 NexFET™ 功率金属氧化
物半导体场效应晶体管 (MOSFET) 被设计成在功率转
换应用中最大限度地降低功率损耗。
持续漏极电流（受封装限制）
持续漏极电流（受芯片限制），TC = 25°C
时测得
170
120
ID
A
持续漏极电流（受芯片限制），TC = 100°C
时测得
Drain (Pin 2)
(1)
IDM
PD
脉冲漏极电流
400
200
A
功率耗散
W
TJ， 工作结温，
-55 至 175
°C
Tstg
储存温度
Gate
(Pin 1)
雪崩能量，单一脉冲
ID = 75A，L = 0.1mH，RG = 25Ω
EAS
281
mJ
(1) 最大 RθJC = 0.6°C/W，脉冲持续时间 ≤ 100μs，占空比 ≤ 1%
Source (Pin 3)
RDS(on) 与 VGS 间的关系
栅极电荷
12
10
TC = 25°C, I D = 100 A
TC = 125°C, I D = 100 A
ID = 100 A
VDS = 30 V
9
10
8
7
6
5
4
3
2
1
0
8
6
4
2
0
0
2
4
6
8
10
12
14
16
18
20
0
5
10
15
20
25
30
35
40
45
50
VGS - Gate-to-Source Voltage (V)
Qg - Gate Charge (nC)
D007
D004
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS557
CSD18542KCS
ZHCSDT3 –JUNE 2015
www.ti.com.cn
目录
5.3 Typical MOSFET Characteristics.............................. 4
器件和文档支持........................................................ 7
6.1 社区资源.................................................................... 7
6.2 商标........................................................................... 7
6.3 静电放电警告............................................................. 7
6.4 术语表 ....................................................................... 7
机械、封装和可订购信息 ......................................... 8
7.1 KCS 封装尺寸 ........................................................... 8
1
2
3
4
5
特性.......................................................................... 1
6
7
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Specifications......................................................... 3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information.................................................. 3
4 修订历史记录
日期
修订版本
注释
2015 年 6 月
*
首次发布。
2
Copyright © 2015, Texas Instruments Incorporated
CSD18542KCS
www.ti.com.cn
ZHCSDT3 –JUNE 2015
5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STATIC CHARACTERISTICS
BVDSS
IDSS
Drain-to-source voltage
VGS = 0 V, ID = 250 μA
60
V
Drain-to-source leakage current
Gate-to-source leakage current
Gate-to-source threshold voltage
VGS = 0 V, VDS = 48 V
VDS = 0 V, VGS = 20 V
VDS = VGS, ID = 250 μA
VGS = 4.5 V, ID = 100 A
VGS = 10 V, ID = 100 A
VDS = 30 V, ID = 100 A
1
100
2.2
5.1
4.0
μA
nA
V
IGSS
VGS(th)
1.5
1.8
4.0
3.3
198
mΩ
mΩ
S
RDS(on)
gfs
Drain-to-source on-resistance
Transconductance
DYNAMIC CHARACTERISTICS
Ciss
Coss
Crss
RG
Input capacitance
3900
570
11
1.3
21
44
6.9
10
7.3
63
6
5070
740
14
pF
pF
pF
Ω
Output capacitance
Reverse transfer capacitance
Series gate resistance
Gate charge total (4.5 V)
Gate charge total (10 V)
Gate charge gate-to-drain
Gate charge gate-to-source
Gate charge at Vth
Output charge
VGS = 0 V, VDS = 30 V, ƒ = 1 MHz
2.6
27
Qg
nC
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qg
57
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VDS = 30 V, ID = 100 A
VDS = 30 V, VGS = 0 V
Turn on delay time
Rise time
5
VDS = 30 V, VGS = 10 V,
IDS = 100 A, RG = 0 Ω
td(off)
tf
Turn off delay time
Fall time
18
21
DIODE CHARACTERISTICS
VSD
Qrr
trr
Diode forward voltage
Reverse recovery charge
Reverse recovery time
ISD = 100 A, VGS = 0 V
0.9
148
53
1.0
V
nC
ns
VDS= 30 V, IF = 100 A,
di/dt = 300 A/μs
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
THERMAL METRIC
Junction-to-case thermal resistance
Junction-to-ambient thermal resistance
MIN
TYP
MAX
UNIT
°C/W
°C/W
RθJC
RθJA
0.6
62
Copyright © 2015, Texas Instruments Incorporated
3
CSD18542KCS
ZHCSDT3 –JUNE 2015
www.ti.com.cn
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
200
175
150
125
100
75
200
TC = 125°C
TC = 25°C
TC = -55°C
175
150
125
100
75
50
50
VGS = 4.5 V
VGS = 6.5 V
VGS = 10 V
25
0
25
0
0
0.2
0.4
0.6
0.8
1
1.2
0
1
2
3
4
5
VDS - Drain-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
D003
D002
VDS = 5 V
Figure 3. Transfer Characteristics
Figure 2. Saturation Characteristics
4
Copyright © 2015, Texas Instruments Incorporated
CSD18542KCS
www.ti.com.cn
ZHCSDT3 –JUNE 2015
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
10000
1000
100
10
10
9
8
7
6
5
4
3
2
1
0
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
1
0
5
10
15
20
25
30
35
40
45
50
0
10
20
30
40
50
60
Qg - Gate Charge (nC)
VDS - Drain-to-Source Voltage (V)
D004
D005
ID = 100 A
VDS = 30 V
Figure 4. Gate Charge
Figure 5. Capacitance
12
10
8
2.4
TC = 25°C, I D = 100 A
TC = 125°C, I D = 100 A
2.2
2
1.8
1.6
1.4
1.2
1
6
4
2
0.8
0.6
0
0
-75 -50 -25
0
25 50 75 100 125 150 175 200
2
4
6
8
10
12
14
16
18
20
TC - Case Temperature (°C)
VGS - Gate-to-Source Voltage (V)
D006
D007
ID = 250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Resistance vs Gate-to-Source Voltage
100
2.4
2.2
2
TC = 25°C
TC = 125°C
VGS = 4.5 V
VGS = 10 V
10
1.8
1.6
1.4
1.2
1
1
0.1
0.01
0.8
0.6
0.4
0.001
0.0001
-75 -50 -25
0
25 50 75 100 125 150 175 200
0
0.2
0.4
0.6
0.8
1
TC - Case Temperature (°C)
VSD - Source-to-Drain Voltage (V)
D008
D009
ID = 100 A
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Typical Diode Forward Voltage
Copyright © 2015, Texas Instruments Incorporated
5
CSD18542KCS
ZHCSDT3 –JUNE 2015
www.ti.com.cn
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
1000
200
100
TC = 25q C
TC = 125q C
100
10
1
DC
10 ms
1 ms
100 µs
10 µs
0.1
0.1
10
0.01
1
10
100
0.1
1
VDS - Drain-to-Source Voltage (V)
TAV - Time in Avalanche (ms)
D010
D011
Single Pulse, Max RθJC = 0.6°C/W
Figure 10. Maximum Safe Operating Area
Figure 11. Single Pulse Unclamped Inductive Switching
240
200
160
120
80
40
0
-50 -25
0
25
50
75 100 125 150 175 200
TC - Case Temperature (°C)
D012
Figure 12. Maximum Drain Current vs Temperature
6
版权 © 2015, Texas Instruments Incorporated
CSD18542KCS
www.ti.com.cn
ZHCSDT3 –JUNE 2015
6 器件和文档支持
6.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.2 商标
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
6.4 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
版权 © 2015, Texas Instruments Incorporated
7
CSD18542KCS
ZHCSDT3 –JUNE 2015
www.ti.com.cn
7 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不
对本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
7.1 KCS 封装尺寸
引脚配置
位置
引脚 1
名称
栅极
漏极
源极
引脚 2 / 标签
引脚 3
8
版权 © 2015, Texas Instruments Incorporated
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Copyright © 2015, 德州仪器半导体技术（上海）有限公司
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD18542KCS
ACTIVE
TO-220
KCS
3
50
RoHS-Exempt
& Green
SN
N / A for Pkg Type
-55 to 175
CSD18542KCS
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OUTLINE
KCS0003B
TO-220 - 19.65 mm max height
SCALE 0.850
TO-220
4.7
4.4
1.32
1.22
10.36
9.96
8.55
8.15
2.9
2.6
6.5
6.1
(6.3)
(
3.84)
12.5
12.1
19.65 MAX
9.25
9.05
3X
3.9 MAX
13.12
12.70
1
3
0.47
0.34
0.90
3X
0.77
2.79
2.59
2X 2.54
1.36
3X
1.23
5.08
4222214/B 08/2018
NOTES:
1. Dimensions are in millimeters. Any dimension in brackets or parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-220.
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EXAMPLE BOARD LAYOUT
KCS0003B
TO-220 - 19.65 mm max height
TO-220
0.07 MAX
ALL AROUND
2X (1.7)
METAL
3X (1.2)
2X SOLDER MASK
OPENING
(1.7)
0.07 MAX
ALL AROUND
1
2
3
R (0.05)
(2.54)
SOLDER MASK
OPENING
(5.08)
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:15X
4222214/B 08/2018
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