CSD25202W15 [TI]
采用 1.5mm x 1.5mm WLP 封装、具有栅极 ESD 保护的单路、26mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET;
| 型号： | CSD25202W15 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 1.5mm x 1.5mm WLP 封装、具有栅极 ESD 保护的单路、26mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET 栅 开关 晶体管 栅极 |
| 文件： | 总17页 (文件大小：1380K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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CSD25202W15
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
CSD25202W15 20V P 通道 NexFET™ 功率金属氧化物半导体场效应晶体
管 (MOSFET)
1 特性
产品概要
1
•
•
•
•
•
•
•
低电阻
TA = 25°C
典型值
-20
单位
V
小尺寸封装 1.5mm x 1.5mm
栅极静电放电 (ESD) 保护 - 3kV
无铅
VDS
Qg
漏源电压
栅极电荷总量 (-4.5V)
5.8
nC
nC
mΩ
mΩ
mΩ
V
Qgd
栅漏栅极电荷
0.8
VGS = -1.8V
40
26
21
符合 RoHS 环保标准
无卤素
RDS(on) 漏源导通电阻
VGS(th) 阀值电压
VGS = -2.5V
VGS = -4.5V
栅 - 源电压钳位
-0.75
2 应用范围
订购信息(1)
介质
•
•
电池管理
电池保护
器件
数量
封装
出货
卷带封装
CSD25202W15
CSD25202W15T
3000 7 英寸卷带
1.5mm x 1.5mm
晶圆级封装
250
7 英寸卷带
3 说明
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
这款 21mΩ，20V 器件设计用于在超薄且具有出色散
热特性的 1.5mm × 1.5mm 小外形封装内提供最低的导
通电阻和栅极电荷。 低导通电阻与小型封装尺寸和低
高度结合在一起，使得此器件非常适合于电池供电运行
的空间受限应用。
增加文本，调节间距
最大绝对额定值
TA = 25°C
值
-20
-6
单位
V
VDS
VGS
漏源电压
栅源电压
V
持续漏极电流(1)
脉冲漏极电流(2)
持续栅极电流(1)
脉冲栅极电流(2)
功率耗散
-4
A
Top View
Symbol
ID
Pin A1 Indicator
-38
-0.5
-7
A
Source
A
G
D
D
D
D
S
S
S
S
IG
A
PD
0.5
W
Gate
TJ，
Tstg
运行结温和
储存温度范围
-55 至 150
°C
Drain
(1) 焊球受限
P0117-01
(2) RθJA = 220ºC/W（典型值），脉冲持续时间 ≤100µs，占空比 ≤
1%
RDS(on) 与 VGS 间的关系
栅极电荷
50
46
42
38
34
30
26
22
18
14
10
4.5
TC = 25°C,I D = −2A
TC = 125°C,I D = −2A
ID = −2A
VDS = −10V
4
3.5
3
2.5
2
1.5
1
0.5
0
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Qg - Gate Charge (nC)
−VGS - Gate-to- Source Voltage (V)
G001
G001
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SLPS508
CSD25202W15
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
www.ti.com.cn
目录
1
2
3
4
5
特性.......................................................................... 1
应用范围................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Specifications......................................................... 3
5.1 Electrical Characteristics........................................... 3
5.2 Thermal Information.................................................. 3
5.3 Typical MOSFET Characteristics.............................. 4
6
7
器件和文档支持........................................................ 7
6.1 商标........................................................................... 7
6.2 静电放电警告............................................................. 7
6.3 术语表 ....................................................................... 7
机械封装和可订购信息............................................. 8
7.1 CSD25202W15 封装尺寸.......................................... 8
7.2 建议焊盘图案............................................................. 9
7.3 卷带信息.................................................................... 9
4 修订历史记录
Changes from Original (June 2014) to Revision A
Page
•
“漏漏电压”已更正为“漏源电压” ............................................................................................................................................... 1
2
版权 © 2014, Texas Instruments Incorporated
CSD25202W15
www.ti.com.cn
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STATIC CHARACTERISTICS
BVDSS
BVGSS
IDDS
Drain-to-Source Voltage
VGS = 0 V, IDS = –250 μA
–20
–6
V
Gate-to-Source Voltage
VDS = 0 V, IG = –250 μA
VGS = 0 V, VDS = –16 V
VDS = 0 V, VGS = –6 V
VDS = VGS, IDS = –250 μA
VGS = –1.8 V, IDS = –2 A
VGS = –2.5 V, IDS = –2 A
VGS = –4.5 V, IDS = –2 A
VDS = –2 V, IDS = –2 A
–7.2
–1
V
μA
nA
V
Drain-to-Source Leakage Current
Gate-to-Source Leakage Current
Gate-to-Source Threshold Voltage
IGSS
–100
VGS(th)
–0.45 –0.75 –1.05
40
26
21
16
52
32
26
mΩ
mΩ
mΩ
S
RDS(on)
Drain-to-Source On Resistance
Transconductance
gƒs
DYNAMIC CHARACTERISTICS
CISS
COSS
CRSS
RG
Input Capacitance
778
400
21
1010
520
27
pF
pF
pF
Ω
VGS = 0 V, VDS = –10 V,
ƒ = 1 MHz
Output Capacitance
Reverse Transfer Capacitance
Series Gate Resistance(1)
Gate Charge Total (–4.5 V)
Gate Charge - Gate-to-Drain
Gate Charge - Gate-to-Source
Gate Charge at Vth
31
Qg
5.8
0.8
1.1
0.6
8.7
15
7.5
nC
nC
nC
nC
nC
ns
ns
ns
ns
Qgd
Qgs
Qg(th)
QOSS
td(on)
tr
VDS = –10 V,
ID = –2 A
Output Charge
VDS = –9.5 V, VGS = 0 V
Turn On Delay Time(2)
Rise Time(2)
Turn Off Delay Time(2)
Fall Time(2)
12
VDS = –10 V, VGS = –4.5 V,
IDS = –2 A, RG = 2 Ω
td(off)
tf
64
28
DIODE CHARACTERISTICS
VSD
Qrr
trr
Diode Forward Voltage
Reverse Recovery Charge
Reverse Recovery Time
IDS = –2 A, VGS = 0 V
–0.75
19
–1
V
nC
ns
VSD = –10 V, IF = –2 A,
di/dt = 200 A/μs
26
(1) Includes gate clamp resistor
(2) External RG is in addition to the internal gate clamp resistor
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
THERMAL METRIC
Junction-to-Ambient Thermal Resistance(1)
Junction-to-Ambient Thermal Resistance(2)
MIN
TYP
220
140
MAX UNIT
RθJA
°C/W
(1) Device mounted on FR4 material with minimum Cu mounting area.
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
Copyright © 2014, Texas Instruments Incorporated
3
CSD25202W15
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
www.ti.com.cn
Typ RθJA = 140°C/W
Typ RθJA = 220°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
M0149-01
M0150-01
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
4
Copyright © 2014, Texas Instruments Incorporated
CSD25202W15
www.ti.com.cn
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
20
25
20
15
10
5
18
16
14
12
10
8
6
VGS = −4.5V
VGS = −2.5 V
VGS = −1.8V
TC = 125°C
TC = 25°C
TC = −55°C
4
2
0
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
1
0
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
−VDS - Drain-to-Source Voltage (V)
−VGS - Gate-to-Source Voltage (V)
G001
G001
VDS = –5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
4.5
4
1000
900
800
700
600
500
400
300
200
100
0
3.5
3
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
2.5
2
1.5
1
0.5
0
0
1
2
3
4
5
6
2
4
6
8
10
12
14
16
18
20
Qg - Gate Charge (nC)
−VDS - Drain-to-Source Voltage (V)
G001
G001
ID = –2 A
VDS = –10 V
Figure 4. Gate Charge
Figure 5. Capacitance
1.05
0.95
0.85
0.75
0.65
0.55
0.45
0.35
0.25
50
46
42
38
34
30
26
22
18
14
10
TC = 25°C,I D = −2A
TC = 125°C,I D = −2A
−75 −50 −25
0
25
50
75 100 125 150 175
1
2
3
4
5
6
TC - Case Temperature (ºC)
−VGS - Gate-to- Source Voltage (V)
G001
G001
ID = –250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Resistance vs Gate-to-Source Voltage
Copyright © 2014, Texas Instruments Incorporated
5
CSD25202W15
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
www.ti.com.cn
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
1.4
10
1
VGS = −2.5V
VGS = −4.5V
TC = 25°C
TC = 125°C
1.3
1.2
1.1
1
0.1
0.01
0.001
0.0001
0.9
0.8
0.7
−75 −50 −25
0
25
50
75 100 125 150 175
0
0.2
0.4
0.6
0.8
1
TC - Case Temperature (ºC)
−VSD − Source-to-Drain Voltage (V)
G001
G001
ID = –2 A
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Typical Diode Forward Voltage
100
5
4
3
2
1
0
10
1
10us
100us
1ms
10ms
100ms
0.1
0.1
1
10
100
−50 −25
0
25
50
75 100 125 150 175 200
TC - Case Temperature (ºC)
VDS - Drain-to-Source Voltage (V)
G001
G001
Single Pulse, Max RθJA = 220°C/W
Figure 10. Maximum Safe Operating Area
Figure 11. Maximum Drain Current vs Temperature
6
版权 © 2014, Texas Instruments Incorporated
CSD25202W15
www.ti.com.cn
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
6 器件和文档支持
6.1 商标
NexFET is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
6.2 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
6.3 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
版权 © 2014, Texas Instruments Incorporated
7
CSD25202W15
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
www.ti.com.cn
7 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
7.1 CSD25202W15 封装尺寸
Pin 1
Mark
Solder Ball
Ø 0.31 0.075
2
3
3
2
1
1
A
B
C
A
B
C
+0.00
–0.08
1.50
0.62 Max
0.50
Bottom View
Top View
Side View
Seating Plate
Front View
M0171-01
NOTE: 全部尺寸单位为 mm（除非另外注明）
引脚分配
位置
名称
栅极
漏
A1
A2，B1，B2，C1
A3，B3，C2，C3
源
8
版权 © 2014, Texas Instruments Incorporated
CSD25202W15
www.ti.com.cn
ZHCSCK4A –JUNE 2014–REVISED JULY 2014
7.2 建议焊盘图案
Ø 0.25
1
2
3
A
B
C
0.50
M0172-01
NOTE: 全部尺寸单位为 mm（除非另外注明）
7.3 卷带信息
4.00 0.10
2.00 0.0ꢀ
Ø 1.ꢀ0 0.10
ꢀ° Max
4.00 0.10
Ø 0.ꢀ0 0.0ꢀ
0.86 0.0ꢀ
0.2ꢀ4 0.02
ꢀ° Max
1.60 0.0ꢀ
M0173-01
NOTES: 1. 10 个链齿孔的累积容差为 ±0.2
2. 每 100mm 长度的外倾角不能超过 1mm，在 250mm 长度上不累积
3. 材料：黑色抗静电聚苯乙烯
4. 全部尺寸单位为 mm（除非另外注明）
5. 厚度：0.30 ± 0.05mm
6. MSL1 260°C（红外 (IR) 和传导）PbF 回流焊兼容
版权 © 2014, Texas Instruments Incorporated
9
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD25202W15
CSD25202W15T
ACTIVE
ACTIVE
DSBGA
DSBGA
YZF
YZF
9
9
3000 RoHS & Green
250 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
25202
25202
SNAGCU
-55 to 150
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CSD25202W15
CSD25202W15
CSD25202W15T
CSD25202W15T
DSBGA
DSBGA
DSBGA
DSBGA
YZF
YZF
YZF
YZF
9
9
9
9
3000
3000
250
180.0
179.0
180.0
179.0
9.0
14.4
9.0
1.69
1.6
1.69
1.6
0.69
0.86
0.69
0.86
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q1
Q1
Q1
Q1
1.69
1.6
1.69
1.6
250
14.4
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Mar-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CSD25202W15
CSD25202W15
CSD25202W15T
CSD25202W15T
DSBGA
DSBGA
DSBGA
DSBGA
YZF
YZF
YZF
YZF
9
9
9
9
3000
3000
250
195.0
199.0
195.0
199.0
210.0
211.0
210.0
211.0
39.0
35.0
39.0
35.0
250
Pack Materials-Page 2
PACKAGE OUTLINE
YZF0009
DSBGA - 0.625 mm max height
SCALE 8.000
DIE SIZE BALL GRID ARRAY
A
B
E
BALL A1
CORNER
D
C
0.625 MAX
SEATING PLANE
0.05 C
BALL TYP
0.35
0.15
1 TYP
SYMM
C
1
TYP
SYMM
B
A
D: Max = 1.49 mm, Min = 1.43 mm
E: Max = 1.49 mm, Min = 1.43 mm
0.5
TYP
3
1
2
0.35
0.25
9X
0.015
0.5 TYP
C A B
4219558/A 10/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
9X ( 0.245)
(0.5) TYP
1
2
3
A
SYMM
B
C
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 40X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.245)
METAL
(
0.245)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4219558/A 10/2018
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
www.ti.com
EXAMPLE STENCIL DESIGN
YZF0009
DSBGA - 0.625 mm max height
DIE SIZE BALL GRID ARRAY
(0.5) TYP
(R0.05) TYP
3
9X ( 0.25)
1
2
A
B
(0.5) TYP
SYMM
METAL
TYP
C
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 40X
4219558/A 10/2018
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
www.ti.com
重要声明和免责声明
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