CSD25304W1015 [TI]

采用 1mm x 1.5mm WLP 封装的单路、32.5mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET;
CSD25304W1015
型号: CSD25304W1015
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

采用 1mm x 1.5mm WLP 封装的单路、32.5mΩ、-20V、P 沟道 NexFET™ 功率 MOSFET

开关 晶体管
文件: 总17页 (文件大小:1385K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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CSD25304W1015  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
CSD25304W1015 20V P 通道 NexFET™ 功率金属氧化物半导体场效应晶  
体管 (MOSFET)  
1 特性  
产品概要  
1
超低 Qg Qgd  
TA = 25°C  
VDS  
典型值  
-20  
单位  
V
小封装尺寸  
漏源电压  
低高度(高度为 0.62mm)  
Qg  
栅极电荷总量 (4.5V)  
栅漏栅极电荷  
3.3  
nC  
nC  
mΩ  
mΩ  
mΩ  
V
无铅  
Qgd  
0.5  
VGS = –1.8V  
65  
36  
27  
符合 RoHS 环保标准  
RDS(on) 漏源导通电阻  
VGS = -2.5V  
VGS = -4.5V  
无卤素  
芯片级封装 (CSP) 1 x 1.5mm 晶圆级封装  
VGS(th)  
电压阀值  
-0.8  
2 应用范围  
订购信息(1)  
电池管理  
负载开关  
电池保护  
器件  
CSD25304W1015 3000 7 英寸卷带  
CSD25304W1015T 250 7 英寸卷带  
数量  
介质  
封装  
出货  
卷带封装  
1.0mm × 1.5mm  
晶圆级封装  
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。  
3 说明  
最大绝对额定值  
这款 27mΩ20V P 通道器件设计用于在超薄且具有  
出色散热特性的 1.0mm × 1.5mm 小外形封装内提供最  
低的导通电阻和栅极电荷。  
TA = 25°C  
-20  
单位  
V
VDS  
VGS  
ID  
漏源电压  
栅源电压  
±8  
V
持续漏极电流(1)  
脉冲漏极电流(2)  
功率耗散  
–3.0  
–41  
0.75  
A
顶视图  
IDM  
PD  
A
W
D
S
S
D
S
G
TJ  
Tstg  
运行结温和  
储存温度范围  
-55 150  
°C  
(1) 器件在 105ºC 温度下运行  
(2) RθJA 典型值 = 165°C/W,脉宽 100μs,占空比 1%  
P0099-01  
RDS(on) VGS 间的关系  
栅极电荷  
80  
70  
60  
50  
40  
30  
20  
4.5  
TC = 25°C,I D = −1.5 A  
TC = 125°C,I D = −1.5 A  
ID = −1.5A  
VDS = −10V  
4
3.5  
3
2.5  
2
1.5  
1
0.5  
0
0
1
2
3
4
5
6
7
8
0
0.5  
1
1.5  
2
2.5  
3
3.5  
Qg - Gate Charge (nC)  
VGS - Gate-to- Source Voltage (V)  
G001  
G001  
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.  
English Data Sheet: SLPS510  
 
 
 
 
 
 
 
CSD25304W1015  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
www.ti.com.cn  
目录  
1
2
3
4
5
特性.......................................................................... 1  
应用范围................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Specifications......................................................... 3  
5.1 Electrical Characteristics........................................... 3  
5.2 Thermal Information.................................................. 3  
5.3 Typical MOSFET Characteristics.............................. 4  
6
7
器件和文档支持........................................................ 7  
6.1 ........................................................................... 7  
6.2 静电放电警告............................................................. 7  
6.3 术语表 ....................................................................... 7  
机械封装和可订购信............................................. 8  
7.1 CSD25304W1015 封装尺寸...................................... 8  
7.2 焊盘布局建议............................................................. 9  
7.3 卷带封装信息............................................................. 9  
4 修订历史记录  
Changes from Original (July 2014) to Revision A  
Page  
已将功耗额定值降至 0.75WCu 计算得出的最小值) .......................................................................................................... 1  
Corrected Min Thermal Information from 85 to 165 .............................................................................................................. 3  
Corrected Max Thermal Information from 165 to 85 ............................................................................................................. 3  
已更新机械制图以提高精度..................................................................................................................................................... 8  
2
版权 © 2014, Texas Instruments Incorporated  
 
CSD25304W1015  
www.ti.com.cn  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
5 Specifications  
5.1 Electrical Characteristics  
(TA = 25°C unless otherwise stated)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
STATIC CHARACTERISTICS  
BVDSS  
IDSS  
Drain-to-Source Voltage  
VGS = 0 V, ID = –250 μA  
–20  
V
Drain-to-Source Leakage Current  
Gate-to-Source Leakage Current  
Gate-to-Source Threshold Voltage  
VGS = 0 V, VDS = –16 V  
VDS = 0 V, VGS = ±8 V  
VDS = VGS, ID = –250 μA  
VGS = –1.8 V, ID = –1.5 A  
VGS = –2.5 V, ID = –1.5 A  
VGS = –4.5 V, ID = –1.5 A  
VDS = –10 V, ID = –1.5 A  
–1  
μA  
nA  
V
IGSS  
–100  
VGS(th)  
–0.55  
–0.8 –1.15  
65  
36  
27  
12  
92  
45.5  
32.5  
mΩ  
mΩ  
mΩ  
S
RDS(on)  
Drain-to-Source On-Resistance  
gƒs  
Transconductance  
DYNAMIC CHARACTERISTICS  
CISS  
COSS  
CRSS  
Qg  
Input Capacitance  
458  
231  
12  
595  
300  
15.6  
4.4  
pF  
pF  
pF  
nC  
nC  
nC  
nC  
nC  
ns  
Output Capacitance  
Reverse Transfer Capacitance  
Gate Charge Total (–4.5 V)  
Gate Charge Gate-to-Drain  
Gate Charge Gate-to-Source  
Gate Charge at Vth  
Output Charge  
VGS = 0 V, VDS = –10 V, ƒ = 1 MHz  
3.3  
0.5  
0.7  
0.4  
3.7  
6
Qgd  
Qgs  
VDS = –10 V, ID = –1.5 A  
VDS = –10 V, VGS = 0 V  
Qg(th)  
QOSS  
td(on)  
tr  
Turn On Delay Time  
Rise Time  
4
ns  
VDS = –10 V, VGS = –4.5 V, ID = –1.5 A  
RG = 20 Ω  
td(off)  
tƒ  
Turn Off Delay Time  
Fall Time  
24  
ns  
10  
ns  
DIODE CHARACTERISTICS  
VSD  
Qrr  
trr  
Diode Forward Voltage  
Reverse Recovery Charge  
Reverse Recovery Time  
IS = –1.5 A, VGS = 0 V  
–0.75  
7.2  
–1  
V
VDS= –10 V, IF = –1.5 A, di/dt = 200 A/μs  
VDS= –10 V, IF = –1.5 A, di/dt = 200 A/μs  
nC  
ns  
11.6  
5.2 Thermal Information  
(TA = 25°C unless otherwise stated)  
THERMAL METRIC  
Junction-to-Ambient Thermal Resistance(1)  
Junction-to-Ambient Thermal Resistance(2)  
MIN  
TYP  
165  
85  
MAX UNIT  
RθJA  
°C/W  
(1) Device mounted on FR4 material with minimum Cu mounting area.  
(2) Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.  
Copyright © 2014, Texas Instruments Incorporated  
3
CSD25304W1015  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
www.ti.com.cn  
P-Chan 1.0x1.5 CSP TTA MAX Rev1  
P-Chan 1.0x1.5 CSP TTA MIN Rev1  
Typ RθJA = 165°C/W  
Typ RθJA = 85°C/W  
when mounted on  
minimum pad area of  
2 oz. Cu.  
when mounted on  
1 inch2 of 2 oz. Cu.  
M0155-01  
M0156-01  
5.3 Typical MOSFET Characteristics  
(TA = 25°C unless otherwise stated)  
Figure 1. Transient Thermal Impedance  
4
Copyright © 2014, Texas Instruments Incorporated  
CSD25304W1015  
www.ti.com.cn  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
Typical MOSFET Characteristics (continued)  
(TA = 25°C unless otherwise stated)  
10  
10  
8
VGS = −4.5 V  
VGS = −2.5 V  
VGS = −1.8 V  
9
8
7
6
5
4
3
2
1
0
6
4
TC = 125°C  
TC = 25°C  
TC = −55°C  
2
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9  
1
0
0
0
0.2 0.4 0.6 0.8  
1
1.2 1.4 1.6 1.8  
2
VDS - Drain-to-Source Voltage (V)  
VGS - Gate-to-Source Voltage (V)  
G001  
G001  
VDS = –5 V  
Figure 2. Saturation Characteristics  
Figure 3. Transfer Characteristics  
4.5  
4
600  
500  
400  
300  
200  
100  
0
3.5  
3
Ciss = Cgd + Cgs  
Coss = Cds + Cgd  
Crss = Cgd  
2.5  
2
1.5  
1
0.5  
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
2
4
6
8
10  
12  
14  
16  
18  
20  
Qg - Gate Charge (nC)  
VDS - Drain-to-Source Voltage (V)  
G001  
G001  
ID = –1.5 A  
VDS = –10 V  
Figure 4. Gate Charge  
Figure 5. Capacitance  
1.1  
1
80  
70  
60  
50  
40  
30  
20  
TC = 25°C,I D = −1.5 A  
TC = 125°C,I D = −1.5 A  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
−75 −50 −25  
0
25  
50  
75 100 125 150 175  
1
2
3
4
5
6
7
8
TC - Case Temperature (ºC)  
VGS - Gate-to- Source Voltage (V)  
G001  
G001  
ID = –250 µA  
Figure 6. Threshold Voltage vs Temperature  
Figure 7. On-State Resistance vs Gate-to-Source Voltage  
Copyright © 2014, Texas Instruments Incorporated  
5
CSD25304W1015  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
www.ti.com.cn  
Typical MOSFET Characteristics (continued)  
(TA = 25°C unless otherwise stated)  
1.4  
10  
1
VGS = −2.5V  
VGS = −4.5V  
TC = 25°C  
TC = 125°C  
1.3  
1.2  
1.1  
1
0.1  
0.01  
0.001  
0.0001  
0.9  
0.8  
0.7  
−75 −50 −25  
0
25  
50  
75 100 125 150 175  
0
0.2  
0.4  
0.6  
0.8  
1
TC - Case Temperature (ºC)  
VSD − Source-to-Drain Voltage (V)  
G001  
G001  
ID = –1.5 A  
Figure 8. Normalized On-State Resistance vs Temperature  
Figure 9. Typical Diode Forward Voltage  
100  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
10  
1
10us  
100us  
1ms  
10ms  
100ms  
0.1  
0.1  
1
10  
100  
−50 −25  
0
25  
50  
75 100 125 150 175 200  
TC - Case Temperature (ºC)  
VDS - Drain-to-Source Voltage (V)  
G001  
G001  
Single Pulse, Max RθJA = 165°C/W  
Figure 10. Maximum Safe Operating Area  
Figure 11. Maximum Drain Current vs Temperature  
6
版权 © 2014, Texas Instruments Incorporated  
CSD25304W1015  
www.ti.com.cn  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
6 器件和文档支持  
6.1 商标  
NexFET is a trademark of Texas Instruments.  
6.2 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
6.3 术语表  
SLYZ022 TI 术语表。  
这份术语表列出并解释术语、首字母缩略词和定义。  
版权 © 2014, Texas Instruments Incorporated  
7
CSD25304W1015  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
www.ti.com.cn  
7 机械封装和可订购信息  
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
7.1 CSD25304W1015 封装尺寸  
注意:全部尺寸单位为 mm(除非另外注明)。  
引脚分配  
位置  
C1C2  
A1  
名称  
漏极  
栅极  
源极  
A2B1B2  
8
版权 © 2014, Texas Instruments Incorporated  
CSD25304W1015  
www.ti.com.cn  
ZHCSCN1A JULY 2014REVISED AUGUST 2014  
7.2 焊盘布局建议  
Ø 0.25  
1
2
A
B
C
0.50  
M0158-01  
注意:全部尺寸单位为 mm(除非另外注明)。  
7.3 卷带封装信息  
4.00 0.10  
2.00 0.0ꢀ  
Ø 1.ꢀ0 0.10  
2° Max  
+0.0ꢀ  
4.00 0.10  
Ø 0.60  
–0.10  
0.86 0.0ꢀ  
0.2ꢀ4 0.02  
2° Max  
1.19 0.0ꢀ  
M01ꢀ9-01  
注意:全部尺寸单位为 mm(除非另外注明)。  
版权 © 2014, Texas Instruments Incorporated  
9
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
CSD25304W1015  
CSD25304W1015T  
ACTIVE  
ACTIVE  
DSBGA  
DSBGA  
YZC  
YZC  
6
6
3000 RoHS & Green  
250 RoHS & Green  
SNAGCU  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
25304  
25304  
SNAGCU  
-55 to 150  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Mar-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CSD25304W1015  
CSD25304W1015T  
CSD25304W1015T  
DSBGA  
DSBGA  
DSBGA  
YZC  
YZC  
YZC  
6
6
6
3000  
250  
179.0  
179.0  
180.0  
14.4  
14.4  
9.0  
1.18  
1.18  
1.18  
1.68  
1.68  
1.68  
0.83  
0.83  
0.83  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
Q1  
Q1  
Q1  
250  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Mar-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CSD25304W1015  
CSD25304W1015T  
CSD25304W1015T  
DSBGA  
DSBGA  
DSBGA  
YZC  
YZC  
YZC  
6
6
6
3000  
250  
199.0  
199.0  
195.0  
211.0  
211.0  
210.0  
35.0  
35.0  
39.0  
250  
Pack Materials-Page 2  
PACKAGE OUTLINE  
YZC0006  
DSBGA - 0.625 mm max height  
SCALE 9.000  
DIE SIZE BALL GRID ARRAY  
A
B
E
BALL A1  
CORNER  
D
0.625 MAX  
C
SEATING PLANE  
0.08 C  
0.35  
0.15  
BALL TYP  
0.5 TYP  
0.25 TYP  
C
SYMM  
B
D: Max = 1.49 mm, Min = 1.43 mm  
1
TYP  
E: Max = 0.996 mm, Min =0.936 mm  
0.5  
TYP  
A
1
2
0.35  
0.25  
6X  
0.015  
SYMM  
C A  
B
4219522/A 02/2015  
NanoFree Is a trademark of Texas Instruments.  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. NanoFreeTM package configuration.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
YZC0006  
DSBGA - 0.625 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
6X ( 0.265)  
1
2
A
B
(0.5) TYP  
SYMM  
C
SYMM  
LAND PATTERN EXAMPLE  
SCALE:30X  
0.05 MAX  
0.05 MIN  
(
0.265)  
METAL  
METAL  
UNDER  
SOLDER MASK  
(
0.265)  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
NON-SOLDER MASK  
SOLDER MASK  
DEFINED  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
NOT TO SCALE  
4219522/A 02/2015  
NOTES: (continued)  
4. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.  
For more information, see Texas Instruments literature number SNVA009 (www.ti.com/lit/snva009).  
www.ti.com  
EXAMPLE STENCIL DESIGN  
YZC0006  
DSBGA - 0.625 mm max height  
DIE SIZE BALL GRID ARRAY  
(0.5) TYP  
6X ( 0.25)  
(R0.05) TYP  
1
2
A
B
(0.5)  
TYP  
SYMM  
METAL  
TYP  
C
SYMM  
SOLDER PASTE EXAMPLE  
BASED ON 0.1 mm THICK STENCIL  
SCALE:40X  
4219522/A 02/2015  
NOTES: (continued)  
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.  
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