CSD85302LT [TI]
采用 1.35mm x 1.35mm LGA 封装、具有栅极 ESD 保护的双路共漏极、24mΩ、20V、N 沟道 NexFET™ 功率 MOSFET | YME | 4 | -55 to 150;型号: | CSD85302LT |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用 1.35mm x 1.35mm LGA 封装、具有栅极 ESD 保护的双路共漏极、24mΩ、20V、N 沟道 NexFET™ 功率 MOSFET | YME | 4 | -55 to 150 栅 开关 晶体管 栅极 |
文件: | 总14页 (文件大小:717K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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CSD85302L
ZHCSEH8 –NOVEMBER 2015
CSD85302L 20V 双路 N 沟道 NexFET™ 功率 MOSFET
1 特性
增加文本,调节间距
1
•
•
•
•
•
•
共漏极配置
低导通电阻
产品概要
TA=25°C
VS1S2
Qg
典型值
20
单位
V
1.35mm × 1.35mm 小外形封装
无铅且无卤素
源源电压
栅极电荷总量 (4.5V)
栅极电荷(栅极到漏极)
6
nC
nC
mΩ
mΩ
mΩ
V
Qgd
1.4
符合 RoHS 标准
VGS = 2.5V
29
20
人体放电模式 (HBM) 静电放电 (ESD) 保护 >
RS1S2(on)
源源导通电阻
阈值电压
VGS = 4.5V
VGS = 6.5V
0.9
2.5kV
18.7
VGS(th)
2 应用
•
•
•
USB Type-C/PD
订购信息(1)
电池管理
电池保护
器件
数量
包装介
质
封装
运输
CSD85302L
3000
250
7 英寸卷 1.35mm × 1.35mm 接合栅
格阵列 (LGA) 封装
卷带封装
带
3 说明
CSD85302LT
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。
这款 20V、18.7mΩ、采用 1.35mm × 1.35mm 接合栅
格阵列 (LGA) 封装的双路NexFET™功率金属氧化物半
导体场效应晶体管 (MOSFET) 设计为在最小外形尺寸
中最大限度地降低电阻。该器件的外形尺寸较小并采用
共漏极配置,非常适合小型手持设备中 由电池供电的
应用。
绝对最大额定值
TA = 25°C
值
20
单位
V
VS1S2 源源电压
VGS
IS
栅源电压
±10
7
V
持续源极电流(1)
脉冲源极电流(2)
功率耗散(1)
A
ISM
PD
37
A
俯视图
1.7
2.5
W
kV
V(ESD) 人体放电模式 (HBM)
D1
{1
TJ,
Tstg
运行结温和
储存温度范围
-55 至 150
°C
(1) RθJA = 75℃/W,这是在厚度为 0.06 英寸的环氧板 (FR4) 印刷
电路板 (PCB) 上的 1 英寸2 2 盎司的铜过渡垫片上测得的典型
值。
{2
D2
(2) RθJA = 90℃/W(最大值),脉冲持续时间 ≤ 100μs,占空比 ≤
配置
1%
{ource 1
{ource 2
Date 1
Date 2
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLPS561
CSD85302L
ZHCSEH8 –NOVEMBER 2015
www.ti.com.cn
.
.
RDS(on) 与 VGS 间的关系
栅极电荷
60
54
48
42
36
30
24
18
12
6
8
7
6
5
4
3
2
1
0
TC = 25°C, I S = 2 A
TC = 125°C, I S = 2 A
IS1S2 = 2 A
VS1S2 = 10 V
0
0
1
2
3
4
5
6
7
8
9
10
0
2
4
6
8
10
12
VGS - Gate-to-Source Voltage (V)
Qg - Gate Charge (nC)
D007
D004
2
版权 © 2015, Texas Instruments Incorporated
CSD85302L
www.ti.com.cn
ZHCSEH8 –NOVEMBER 2015
目录
6.1 社区资源.................................................................... 8
6.2 商标........................................................................... 8
6.3 静电放电警告............................................................. 8
6.4 Glossary.................................................................... 8
机械、封装和可订购信息 ......................................... 9
7.1 封装尺寸.................................................................... 9
7.2 推荐的 PCB 布局..................................................... 10
7.3 推荐的模板布局 ....................................................... 10
7.4 Q3A 卷带信息.......................................................... 11
1
2
3
4
5
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 3
Specifications......................................................... 4
5.1 Electrical Characteristics........................................... 4
5.2 Thermal Information.................................................. 4
5.3 Typical MOSFET Characteristics.............................. 5
器件和文档支持........................................................ 8
7
6
4 修订历史记录
日期
修订版本
注释
2015 年 11 月
*
最初发布。
版权 © 2015, Texas Instruments Incorporated
3
CSD85302L
ZHCSEH8 –NOVEMBER 2015
www.ti.com.cn
5 Specifications
5.1 Electrical Characteristics
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
STATIC CHARACTERISTICS
BVS1S2
IS1S2
Source-to-source voltage
VGS = 0 V, IS = 250 μA
20
V
Source-to-source leakage current
Gate-to-source leakage current
VGS = 0 V, VS1S2 = 16 V
VS1S2 = 0 V, VGS = 6 V
VS1S2 = 0 V, VGS = 10V
VS1S2 = VGS, IS = 250 μA
VGS = 2.5 V, IS = 2 A
VGS = 4.5 V, IS = 2 A
VGS = 6.5 V, IS = 2 A
VS1S2 = 2 V, IS = 2 A
1
0.5
4
μA
µA
µA
V
IGSS
VGS(th)
Gate-to-source threshold voltage
0.68
20
0.9
29
1.3
36
mΩ
mΩ
mΩ
S
RS1S2(on) Source-to-source on-resistance
14
20
24
13
18.7
19
22.5
gfs
Transconductance
DYNAMIC CHARACTERISTICS(1)
Ciss
Coss
Crss
Qg
Input capacitance
Output capacitance
Reverse transfer capacitance
Gate charge total (4.5 V)
Gate charge gate-to-drain
Gate charge gate-to-source
Gate charge at Vth
Output charge
718
92
933
120
79
pF
pF
pF
nC
nC
nC
nC
nC
ns
VGS = 0 V, VS1S2 = 10 V, ƒ = 1 MHz
61
6.0
1.4
1.2
0.6
2.3
37
7.8
Qgd
Qgs
Qg(th)
Qoss
td(on)
tr
VS1S2 = 10 V, IS = 2 A
VS1S2 = 10 V, VGS = 0 V
Turn-on delay time
Rise time
54
ns
VS1S2 = 10 V, VGS = 4.5 V,
IS1S2 = 2 A, RG = 0 Ω
td(off)
tf
Turn-off delay time
Fall time
173
99
ns
ns
(1) Charge and timing values specified are per single FET.
5.2 Thermal Information
(TA = 25°C unless otherwise stated)
THERMAL METRIC
Junction-to-ambient thermal resistance(1)
MIN
TYP
75
MAX UNIT
°C/W
RθJA
Junction-to-ambient thermal resistance(2)
175
°C/W
(1) Device mounted on FR4 material with 1 inch2 (6.45 cm2), 2 oz. (0.071 mm thick) Cu.
(2) Device mounted on FR4 material with minimum Cu mounting area.
4
Copyright © 2015, Texas Instruments Incorporated
CSD85302L
www.ti.com.cn
ZHCSEH8 –NOVEMBER 2015
5.3 Typical MOSFET Characteristics
(TA = 25°C unless otherwise stated)
Figure 1. Transient Thermal Impedance
20
18
16
14
12
10
8
20
16
12
8
TC = 125°C
TC = 25°C
TC = -55°C
6
4
4
VG1S1 = 2.5 V
VG1S1 = 4.5 V
VG1S1 = 6.5 V
2
0
0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0
0.5
1
1.5
2
2.5
VS1S2 - Source-to-Source Voltage (V)
VGS - Gate-to-Source Voltage (V)
D002
D003
VG2S2 = 9 V
VG2S2 = 9 V
VS1S2 = 5 V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
Copyright © 2015, Texas Instruments Incorporated
5
CSD85302L
ZHCSEH8 –NOVEMBER 2015
www.ti.com.cn
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
10000
1000
100
8
Ciss = Cgd + Cgs
Coss = Cds + Cgd
Crss = Cgd
7
6
5
4
3
2
1
0
10
0
2
4
6
8
10
12
0
4
8
12
16
20
Qg - Gate Charge (nC)
VS1S2 - Source-to-Source Voltage (V)
D004
D005
IS = 2 A
VS1S2 = 6 V
Figure 4. Gate Charge
Figure 5. Capacitance
60
54
48
42
36
30
24
18
12
6
1.2
TC = 25°C, I S = 2 A
TC = 125°C, I S = 2 A
1.1
1
0.9
0.8
0.7
0.6
0.5
0.4
0
0
-75 -50 -25
0
25
50
75 100 125 150 175
1
2
3
4
5
6
7
8
9
10
TC - Case Temperature (°C)
VGS - Gate-to-Source Voltage (V)
D006
D007
IS = 250 µA
Figure 6. Threshold Voltage vs Temperature
Figure 7. On-State Source-to-Source Resistance vs
Gate-to-Source Voltage
1.5
1.4
1.3
1.2
1.1
1
100
10
VGS = 2.5 V
VGS = 6.5 V
1
0.9
0.8
0.7
0.1
DC
10 s
1 s
100 ms
10 ms
1 ms
0.01
-75 -50 -25
0
25
50
75 100 125 150 175
0.01
0.1
1
10
100
TC - Case Temperature (èC)
VS1S2 - Source-to-Source Voltage (V)
D008
D009
IS = 2 A
Single pulse, max RθJA = 90°C/W
Figure 8. Normalized On-State Resistance vs Temperature
Figure 9. Maximum Safe Operating Area
6
Copyright © 2015, Texas Instruments Incorporated
CSD85302L
www.ti.com.cn
ZHCSEH8 –NOVEMBER 2015
Typical MOSFET Characteristics (continued)
(TA = 25°C unless otherwise stated)
8
7
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100 125 150 175
TA - Ambient Temperature (°C)
D010
Typical RθJA = 75°C/W
Figure 10. Maximum Source Current vs Temperature
版权 © 2015, Texas Instruments Incorporated
7
CSD85302L
ZHCSEH8 –NOVEMBER 2015
www.ti.com.cn
6 器件和文档支持
6.1 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
6.2 商标
NexFET, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
6.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损
伤。
6.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
8
版权 © 2015, Texas Instruments Incorporated
CSD85302L
www.ti.com.cn
ZHCSEH8 –NOVEMBER 2015
7 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。要获得这份数据表的浏览器版本,请查阅左侧的导航栏。
7.1 封装尺寸
1.35
1.27
B
A
PIN 1 INDEX AREA
1.35
1.27
C
0.22 MAX
SEATING PLANE
2X 0.66
2X 0.25
2X 0.41
0.26
0.24
2X
0.015
C B
A
3
2
2X 0.33
2X 0.41
2X 0.74
0.42
0.40
2X
1
4
(R0.08) TYP
0.58
0.56
2X
0.015
C A
B
引脚配置
引脚编号
名称
G1
S2
1
2
3
4
G2
S1
增加文本,调节间距
1. 所有线性尺寸的单位均为毫米。
版权 © 2015, Texas Instruments Incorporated
9
CSD85302L
ZHCSEH8 –NOVEMBER 2015
www.ti.com.cn
7.2 推荐的 PCB 布局
METAL UNDER
SOLDER MASK
2X (0.57)
0.05 MIN
ALL AROUND
SOLDER MASK
OPENING
1
4
2X (0.41)
2X (0.41)
2X (0.74)
PKG
2X (0.33)
2
3
(R0.05) TYP
2X ( 0.25)
2X (0.25)
2X (0.41)
PKG
2X (0.66)
焊盘图案示例
焊接掩模
标度:50X
7.3 推荐的模板布局
SOLDER MASK OPENING
TYP
2X (0.51)
(R0.05) TYP
1
4
2X (0.37)
2X (0.41)
2X (0.74)
PKG
2X (0.33)
2
2X ( 0.25)
3
METAL
ALL AROUND
TYP
2X (0.25)
2X (0.41)
PKG
2X (0.66)
焊膏示例
基于厚度为 0.1mm 的模板
焊盘 2 和 4:按焊接面积的 81% 印刷
标度:80X
1. 所有线性尺寸的单位均为毫米。
2. 具有漏斗形壁和圆角的激光切割窗孔将提供更佳的焊锡膏脱离。IPC-7525 可能提供其他替代性设计建议。
10
版权 © 2015, Texas Instruments Incorporated
CSD85302L
www.ti.com.cn
ZHCSEH8 –NOVEMBER 2015
7.4 Q3A 卷带信息
1.42
±0.05
Pin 1 Orientation
!0
t1
Cavity
4.00
±0.10
2º max
All Measurements in
Millimeters (mm)
0.29
±0.05
K0
Notes: 1. 10 链轮孔距累积容差 ±0.2
2. 每 100mm 长度的翘曲不能超过 1mm,在 250mm 长度上不累积
3. 材料:黑色抗静电聚苯乙烯
4. MSL1 260°C(红外 (IR) 和传导)PbF 回流焊兼容
版权 © 2015, Texas Instruments Incorporated
11
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jan-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
CSD85302L
ACTIVE
ACTIVE
PICOSTAR
PICOSTAR
YME
YME
4
4
3000 RoHS & Green
250 RoHS & Green
NIAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 150
-55 to 150
85302
85302
CSD85302LT
NIAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Jan-2022
Addendum-Page 2
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