CY5474FCT163T [TI]
4-Bit Binary Counter; 4位二进制计数器型号: | CY5474FCT163T |
厂家: | TEXAS INSTRUMENTS |
描述: | 4-Bit Binary Counter |
文件: | 总7页 (文件大小:70K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY54/74FCT163T
SCCS015 - May 1994 - Revised February 2000
4-Bit Binary Counter
• Sink current
Source current
64 mA (Com’l),
32 mA (Mil)
32 mA (Com’l),
12 mA (Mil)
Features
• Function, pinout, and drive compatible with FCT and
F logic
• FCT-C speed at 5.8 ns max. (Com’l),
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
Functional Description
The FCT163T is a high-speed synchronous modulo-16 binary
counter. It is synchronously presettable for application in pro-
grammable dividers and has two types of count enable inputs
plus a terminal count output for versatility in forming synchro-
nous multi-staged counters. The FCT163T has a Synchronous
Reset input that overrides counting and parallel loading and
allows the outputs to be simultaneously reset on the rising
edge of the clock.
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable feature
• ESD > 2000V
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• Extended commercial range of −40˚C to +85˚C
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
P
0
P
1
P
2
P
3
PE
CEP
CET
TC
CP
CP
CP
CP
D
D
Q
Q
Detail A
Detail A
Detail A
Q
0
Q
0
Detail A
SR
Q
0
Q
1
Q
2
Q
3
Pin Configurations
LCC
Top View
SOIC/QSOP
Top View
SR
CP
1
2
3
4
5
6
V
16
CC
7
6 5 4
8
15
14
13
12
TC
CEP
CP
SR
9
3
2
1
P
0
Q
Q
Q
0
1
2
GND
NC
10
11
P
1
NC
V
P2
PE
CC
12
13
20
19
P
3
Q3
TC
11
10
9
CET
CEP
GND
1516 17 18
14
CET
PE
7
8
Copyright © 2000, Texas Instruments Incorporated
CY54/74FCT163T
Maximum Ratings[2,3]
Function Table[1]
Inputs
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Action on the Rising
Clock Edge(s)
SR
PE
CET
CEP
Storage Temperature .....................................−65°C to +150°C
L
X
L
H
H
H
X
X
H
L
X
X
H
X
L
Reset (Clear)
Load (Pn Qn)
Count (Incremental)
No Charge (Hold)
No Charge (Hold)
H
H
H
H
Ambient Temperature with
Power Applied..................................................−65°C to +135°C
Supply Voltage to Ground Potential..................−0.5V to +7.0V
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage ..............................................−0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
X
Pin Description
Name
Description
CEP
CET
CP
SR
P
Count Enable Parallel Input
Count Enable Trickle Input
Clock Pulse Input (Active Rising Edge)
Synchronous Reset Input (Active LOW)
Parallel Data Inputs
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Ambient
Range
Range
Temperature
−40°C to +85°C
−55°C to +125°C
VCC
PE
Q
Parallel Enable Input (Active LOW)
Flip-Flop Outputs
Commercial All
Military[4]
5V ± 5%
5V ± 10%
All
TC
Terminal Count Output
Electrical Characteristics Over the Operating Range
Parameter
Description
Test Conditions
Min.
2.0
Typ.[5]
Max.
Unit
V
VOH
Output HIGH Voltage
VCC=Min., IOH=−32 mA
Com’l
Com’l
Mil
VCC=Min., IOH=−15 mA
VCC=Min., IOH=−12 mA
VCC=Min., IOL=64 mA
VCC=Min., IOL=32 mA
2.4
3.3
3.3
0.3
0.3
V
2.4
V
VOL
Output LOW Voltage
Com’l
Mil
0.55
0.55
V
V
VIH
VIL
VH
VIK
II
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
2.0
V
0.8
V
All inputs
0.2
V
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC=Min., IIN=−18 mA
VCC=Max., VIN=VCC
VCC=Max., VIN=2.7V
VCC=Max., VIN=0.5V
−0.7
−1.2
5
V
µA
µA
µA
mA
µA
IIH
IIL
±1
±1
IOS
Output Short Circuit Current[7] VCC=Max., VOUT=0.0V
−60
−120
−225
±1
IOFF
Power-Off Disable VCC=0V, VOUT=4.5V
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY54/74FCT163T
Capacitance[6]
Parameter
CIN
Description
Typ.[5]
Max.
10
Unit
pF
Input Capacitance
Output Capacitance
5
9
COUT
12
pF
Power Supply Characteristics
Parameter
ICC
Description
Test Conditions
Typ.[5]
0.1
Max.
0.2
Unit
Quiescent Power Supply Current
VCC=Max., VIN≤0.2V, VIN≥VCC−0.2V
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
mA
mA
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
0.2
2.0
ICCD
Dynamic Power Supply Current[9]
VCC=Max., One Bit Toggling, Load Mode,
50% Duty Cycle, Outputs Open,
CEP=CET=PE=GND,
0.06
0.7
0.12
1.4
mA/MHz
SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V
IC
Total Power Supply Current[10]
VCC=Max., f0=10 MHz, Load Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
CEP=CET=PE=GND,
mA
SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V
VCC=Max., f0=10 MHz, Load Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
1.2
1.6
2.9
3.4
mA
mA
mA
CEP=CET=PE=GND, SR=VCC
,
VIN=3.4V or VIN=GND
VCC=Max., f0=10 MHz, Load Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f1=5 MHz,
CEP=CET=PE=GND,
3.2[11]
SR=VCC, VIN≤0.2V or VIN≥VCC−0.2V
VCC=Max., f0=10 MHz, Load Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f1=5 MHz,
8.2[11]
CEP=CET=PE=GND, SR=VCC
,
VIN=3.4V or VIN=GND
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY54/74FCT163T
Switching Characteristics Over the Operating Range
CY54FCT163T
Military
CY74FCT163CT
Commercial
Min.[12]
Max.
Parameter
tPLH
tPHL
Description
Min.[12]
Max.
11.5
Unit Fig. No.[13]
Propagation Delay CP to Q
(PE Input HIGH)
2.0
1.5
1.5
1.5
1.5
5.8
5.2
7.8
4.4
ns
ns
ns
ns
1, 5
1, 5
1, 5
1, 5
tPLH
tPHL
Propagation Delay CP to TC
(PE Input LOW)
2.0
2.0
1.5
10.0
16.5
9.0
tPLH
tPHL
Propagation Delay CP to TC
tPLH
tPHL
Propagation Delay CET to TC
tS
Set-Up Time, HIGH or LOW P to CP
Hold Time, HIGH or LOW P to CP
5.5
2.0
3.5
1.5
7.6
ns
ns
ns
4
4
4
tH
tSU
Set-Up Time HIGH or LOW
PE or SR to CP
13.5
tH
Hold Time HIGH or LOW
PE or SR to CP
1.5
13.0
0
1.0
7.6
0
ns
ns
ns
ns
ns
4
4
4
5
5
tSU
tH
Set-Up Time HIGH or LOW
CEP or CET to CP
Hold Time HIGH or LOW
CEP or CET to CP
tW
Clock Pulse Width (Load)
HIGH or LOW
5.0
8.0
4.0
5.0
tW
Clock Pulse Width(Count)
HIGH or LOW
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
Ordering Information
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
CY74FCT163CTQCT
Package Type
5.8
Q1
S1
16-Lead (150-Mil) QSOP
Commercial
CY74FCT163CTSOC/SOCT
CY54FCT163TLMB
16-Lead (300-Mil) Molded SOIC
20-Square Leadless Chip Carrier
11.5
L61
Military
Document #: 38−00285−B
4
CY54/74FCT163T
Package Diagrams
20-Pin Square Leadless Chip Carrier L61
MIL−STD−1835 C−2A
16-Lead Quarter Size Outline Q1
5
CY54/74FCT163T
Package Diagrams (continued)
16-Lead Molded SOIC S1
6
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Copyright 2000, Texas Instruments Incorporated
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