CY74FCT163373 [TI]
16-Bit Latch; 16位锁存器
| 型号： | CY74FCT163373 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-Bit Latch |
| 文件： | 总6页 (文件大小：61K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT163373
SCCS053 - March 1997 - Revised March 2000
16-Bit Latch
Features
Functional Description
• Low power, pin-compatible replacement for LCX and
LPT families
• 5V tolerant inputs and outputs
This device is a 16-bit, D-type latch, designed for use in bus
applications requiring high speed and low power. It can either
be used as two independent 8-bit latches, or as a single 16-bit
latch by connecting the Output Enable (OE) and Latch (LE)
inputs. The outputs are 24-mA balanced output drivers with
current limiting resistors to reduce the need for external
terminating resistors and provide for minimal undershoot and
reduced ground bounce. Flow-through pinout and small shrink
packaging aid in simplifying board layout.
• 24 mA balanced drive outputs
• Power-off disable outputs permits live insertion
• Edge-rate control circuitry for reduced noise
• FCT-C speed at 4.2 ns
• Latch-up performance exceeds JEDEC standard no. 17
• Typical output skew < 250 ps
The CY74FCT163373 is designed with inputs and outputs
capable of being driven by 5.0V buses, allowing its use in
mixed voltage systems as a translator. The outputs are also
designed with a power off disable feature enabling its use in
applications requiring live insertion.
• Industrial temperature range of –40˚C to +85˚C
• TSSOP (19.6-mil pitch) or SSOP (25-mil pitch)
• TypicalV
olp
(groundbounce)performanceexceedsMil
Std 883D
• VCC = 2.7V to 3.6V
• ESD (HBM) > 2000V
Pin Configuration
Logic Block Diagrams CY74FCT163373
SSOP/TSSOP
Top View
OE
LE
1
1
48
47
46
45
44
43
42
41
OE
O
LE
1
1
1
D
1
2
1
1
2
O
D
2
3
1
1
1
GND
O
4
GND
D
D
C
D
1
1
5
1
1
3
4
1
1
3
4
O
1
1
O
D
6
V
CC
V
CC
7
O
D
1
1
5
6
1
1
5
6
8
O
D
9
40
39
38
GND
GND
10
11
TO 7 OTHERCHANNELS
O
D
1
1
7
8
1
1
7
8
O
D
12
13
37
36
35
34
33
O
O
D
D
2
2
1
2
2
1
OE
LE
2
14
15
16
17
18
2
2
GND
O
GND
D
2
2
2
3
4
2
2
3
4
32
31
30
29
28
27
26
25
O
D
D
C
D
2
1
V
CC
V
CC
O
2
1
O
5
D
5
19
20
21
22
23
24
2
2
2
2
O
6
D
6
GND
O
GND
D
2
2
7
8
2
7
8
O
D
2
2
TO 7 OTHERCHANNELS
OE
LE
2
Copyright © 2000, Texas Instruments Incorporated
CY74FCT163373
Maximum Ratings[2, 3]
Pin Description
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Name
Description
D
Data Inputs
Storage Temperature......................................−55°C to +125°C
LE
OE
O
Latch Enable Inputs (Active HIGH)
Output Enable Inputs (Active LOW)
Three-State Outputs
Ambient Temperature with
Power Applied..................................................−55°C to +125°C
Supply Voltage Range..................................... 0.5V to +4.6V
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage ..............................................−0.5V to +7.0V
Function Table[1]
DC Output Current
Inputs
Outputs
(Maximum Sink Current/Pin) ...........................−60 to +120 mA
D
H
L
LE
H
H
L
OE
L
O
H
Power Dissipation..........................................................1.0W
Operating Range
L
L
X
X
L
Q0
Z
Ambient
Range
Industrial
Temperature
VCC
X
H
−40°C to +85°C
2.7V to 3.6V
Electrical Characteristics for Non Bus Hold Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter
Description
Input HIGH Voltage
Test Conditions
All Inputs
Min.
Typ.[4] Max.
Unit
V
VIH
VIL
VH
VIK
IIH
2.0
5.5
Input LOW Voltage
Input Hysteresis[5]
0.8
V
100
mV
V
Input Clamp Diode Voltage
Input HIGH Current
VCC=Min., IIN=–18 mA
VCC=Max., VI=5.5
–0.7
–1.2
±1
µA
IIL
Input LOW Current
VCC=Max., VI=GND
±1
±1
µA
µA
IOZH
High Impedance Output Current
(Three-State Output pins)
VCC=Max., VOUT=5.5V
IOZL
High Impedance Output Current
(Three-State Output pins)
VCC=Max., VOUT=GND
±1
µA
IOS
Short Circuit Current[6]
VCC=Max., VOUT=GND
–60
–135
–240
±100
10
mA
µA
µA
IOFF
ICC
Power-Off Disable
VCC=0V, VOUT≤4.5V
Quiescent Power Supply Current
VIN≤0.2V,
VCC=Max.
0.1
2.0
VIN>VCC–0.2V
VIN=VCC–0.6V[7] VCC=Max.
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
30
µA
Note:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q0=Previous state of flip-flop.
2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature
range.
3. With the exception of inputs with bus hold, unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. Typical values are at VCC=3.3V, TA = +25˚C ambient.
5. This parameter is specified but not tested.
6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
7. Per TTL driven input; all other inputs at VCC or GND.
2
CY74FCT163373
Electrical Characteristics For Balanced Drive Devices Over the Operating Range VCC=2.7V to 3.6V
Parameter
IODL
Description
Test Conditions
VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V
VCC=3.3V, VIN=VIH or VIL, VOUT=1.5V
VCC=Min., IOH= –0.1 mA
Min.
45
Typ.[4] Max.
Unit
mA
mA
V
Output LOW Dynamic Current[6]
Output HIGH Dynamic Current[6]
Output HIGH Voltage
180
IODH
–45
–
–180
VOH
VCC–0.2
2.4[8]
2.0
VCC=Min., IOH= –8 mA
3.0
3.0
V
VCC=3.0V, IOH= –24 mA
V
VOL
Output LOW Voltage
VCC=Min., IOL= 0.1mA
0.2
V
VCC=Min., IOL= 24 mA
0.3
0.55
Note:
8.
VOH=VCC–0.6 V at rated current.
Capacitance[5](TA = +25˚C, f = 1.0 MHz)
Parameter
CIN
Description
Input Capacitance
Output Capacitance
Test Conditions
Typ.[4]
Max.
Unit
VIN = 0V
VOUT = 0V
4.5
5.5
6.0
8.0
pF
pF
COUT
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[4]
Max.
Unit
ICCD
Dynamic Power Supply VCC=Max., One Input Toggling,
VIN=VCC or
VIN=GND
50
75
µA/MHz
Current[9]
50% Duty Cycle,
Outputs Open, OE=GND
IC
Total Power Supply
Current[10]
VCC=Max., f1=10 MHz, 50% Duty VIN=VCC or
0.5
0.5
2.0
2.0
0.8
0.8
mA
mA
mA
mA
Cycle, Outputs Open,
VIN=GND
One Bit Toggling, OE=GND
VIN=VCC–0.6V or
VIN=GND
VCC=Max., f1=2.5 MHz, 50% Duty VIN=VCC or
Cycle, Outputs Open, Sixteen Bits VIN=GND
Toggling, OE=GND
3.0[11]
3.3[11]
VIN=VCC–0.6V or
VIN=GND
3
CY74FCT163373
Switching Characteristics Over the Operating Range VCC=3.0V to 3.6V[12,13]
CY74FCT163373C
Parameter
Description
Propagation Delay D to Q Output
Min.
Max.
Unit
Fig. No.[14]
tPLH
1.5
4.1
ns
1, 3
tPHL
tPLH
tPHL
Propagation Delay LE to Q Output
Output Enable Time
2.0
1.5
1.5
5.5
5.8
5.2
ns
ns
ns
1, 5
tPZH
tPZL
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
tSU
tH
Input Setup time
Input Hold time
Output Skew[15]
2.0
1.5
-
-
ns
ns
ns
1, 4
1, 4
—
tSK(O)
0.5
Notes:
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
12. Minimum limits are specified but not tested on Propagation Delays.
13. For VCC =2.7, propagation delay, output enable and output disable times should be degraded by 20%.
14. See “Parameter Measurement Information” in the General Information section.
15. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.
Ordering Information CY74FCT163373
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
CY74FCT163373CPACT
CY74FCT163373CPVC/PVCT
Package Type
48-Lead (240-Mil) TSSOP
48-Lead (300-Mil) SSOP
4.2
Z48
O48
Industrial
4
CY74FCT163373
Package Diagrams
48-Lead Shrunk Small Outline Package O48
48-Lead Thin Shrunk Small Outline Package Z48
5
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Copyright 2000, Texas Instruments Incorporated
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