CY74FCT2245CTSOC [TI]
8-Bit Transceiver; 8位收发器
| 型号： | CY74FCT2245CTSOC |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-Bit Transceiver |
| 文件： | 总7页 (文件大小：69K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT2245T
SCCS037 - July 1994 - Revised March 2000
8-Bit Transceiver
Features
Functional Description
• Function and pinout compatible with FCT and F logic
• 25Ω output series resistors to reduce transmission line
reflection noise
• FCT-C speed at 4.1 ns max.
FCT-A speed at 4.6 ns max.
• Edge-rate control circuitry for significantly improved
noise characteristics
The FCT2245T contains eight non-inverting, bidirectional buffers
with three-state outputs intended for bus oriented applications.
On-chip termination resistors have been added to the outputs to
reduce system noise caused by reflections. For this reason, the
FCT2245T can be used in an existing design to replace the
FCT245T. The FCT2245T current sinking capability is 12 mA at the
A and B ports.
The Transmit/Receive (T/R) input determines the direction of data
flow through the bidirectional transceiver. Transmit (Active HIGH)
enables data from A ports to B ports; receive (Active LOW) enables
data from B ports to A ports. The output enable (OE) input, when
HIGH, disables both the A and B ports by putting them in a High Z
condition.
• Power-off disable feature
• Fully compatible with TTL input and output logic levels
• ESD > 2000V
• Sink current
Source current
12 mA
15 mA
• Extended commercial temp. range of –40˚C to +85˚C
• Three-state outputs
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
Pin Configurations
T/R
OE
DIP/SOIC/QSOP
Top View
A
0
20
19
18
17
16
1
2
3
4
5
6
B
T/R
V
CC
0
OE
A
0
A
1
A
1
B
0
B
B
1
2
A
2
B
B
B
1
2
3
A
2
A
3
15
14
A
4
A
5
7
B
B
4
5
A
3
13
12
11
A
6
8
A
7
B
B
B
9
6
7
3
10
GND
A
4
FCT2245T–3
B
B
4
5
A
5
A
6
B
B
6
7
A
7
FCT2245T–1
Function Table[1]
Inputs
OE
L
T/R
L
Output
Bus B Data to Bus A
Bus A Data to Bus B
High Z State
L
H
H
X
Note:
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care.
Copyright © 2000, Texas Instruments Incorporated
CY74FCT2245T
Maximum Ratings[2,3]
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Operating Range
Ambient
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
DC Input Voltage............................................ –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
Range
Range
Temperature
VCC
Commercial T, AT, CT
–40°C to +85°C
5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter
VOH
VOL
ROUT
VIH
Description
Output HIGH Voltage
Output LOW Voltage
Output Resistance
Input HIGH Voltage
Input LOW Voltage
Hysteresis[6]
Test Conditions
Min.
Typ.[5]
3.3
Max.
Unit
V
VCC=Min., IOH=–15 mA
VCC=Min., IOL=12 mA
VCC=Min., IOL=12 mA
Com’l
Com’l
Com’l
2.4
0.3
0.55
40
V
20
25
Ω
2.0
V
VIL
0.8
V
VH
All inputs
0.2
V
VIK
Input Clamp Diode Voltage
Input HIGH Current
Input HIGH Current
Input LOW Current
VCC=Min., IIN=–18 mA
VCC=Max., VIN=VCC
VCC=Max., VIN=2.7V
VCC=Max., VIN=0.5V
–0.7
–1.2
5
V
II
µA
µA
µA
mA
µA
IIH
±1
IIL
±1
IOS
Output Short Circuit Current[7] VCC=Max., VOUT=0.0V
–60
–120
–225
±1
IOFF
Power-Off Disable VCC=0V, VOUT=4.5V
Capacitance[6]
Parameter
Description
Test Conditions
Typ.[5] Max.
Unit
pF
CIN
Input Capacitance
5
9
10
12
COUT
Output Capacitance
pF
Notes:
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY74FCT2245T
Power Supply Characteristics
Parameter
Description
Test Conditions
VCC=Max., VIN < 0.2V,
IN > VCC–0.2V
Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current
0.1
0.2
mA
V
∆ICC
Quiescent Power Supply Current
(TTL inputs)
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
0.5
2.0
mA
ICCD
Dynamic Power Supply
Current[9]
VCC=Max., One Input Toggling,
50% Duty Cycle, Outputs Open,
T/R=OE=GND,
0.06
0.12
mA/MHz
VIN < 0.2V or VIN > VCC–0.2V
IC
Total Power Supply Current[10]
VCC=Max., 50% Duty Cycle,
Outputs Open,
One Bit Toggling at f1=10 MHz,
0.7
1.0
1.3
3.3
1.4
2.4
mA
mA
mA
mA
T/R=OE=GND,
VIN < 0.2V or VIN > VCC–0.2V
VCC=Max.,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=10 MHz,
T/R=OE=GND,
VIN=3.4V or VIN=GND
VCC=Max.,
2.6[11]
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
T/R=OE=GND,
VIN < 0.2V or VIN > VCC–0.2V
VCC=Max.,
10.6[11]
50% Duty Cycle, Outputs Open,
Eight Bits Toggling at f1=2.5 MHz,
T/R=OE=GND,
VIN=3.4V or VIN=GND
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. IC
IC
=
=
=
=
=
=
=
=
=
=
IQUIESCENT + IINPUTS + IDYNAMIC
ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
Quiescent Current with CMOS input levels
Power Supply Current for a TTL HIGH input (VIN=3.4V)
Duty Cycle for TTL inputs HIGH
ICC
∆ICC
DH
NT
ICCD
f0
Number of TTL inputs at DH
Dynamic Current caused by an input transition pair (HLH or LHL)
Clock frequency for registered devices, otherwise zero
Input signal frequency
f1
N1
Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT2245T
]
Switching Characteristics—Over the Operating Range[12]
FCT2245T
Commercial
FCT2245AT
Commercial
FCT2245CT
Commercial
Fig.
Parameter
Description
Propagation Delay
An to Bn or Bn to An
Min.
Max.
Min.
Max.
Min.
Max.
Unit
No.[13]
tPLH
tPHL
1.5
7.0
1.5
4.6
1.5
4.1
ns
1, 3
tPZH
tPZL
Output Enable Time
1.5
1.5
9.5
7.5
1.5
1.5
6.2
5.0
1.5
1.5
5.8
4.5
ns
ns
1, 7, 8
1, 7, 8
tPHZ
tPLZ
Output Disable Time
Ordering Information—FCT2245T
Speed
Package
Operating
Range
(ns)
Ordering Code
CY74FCT2245CTQCT
CY74FCT2245CTSOC/SOCT
CY74FCT2245ATPC
Name
Q5
S5
Package Type
4.1
20-Lead (150-Mil) QSOP
Commercial
20-Lead (300-Mil) Molded SOIC
20-Lead (300-Mil) Molded DIP
20-Lead (150-Mil) QSOP
4.6
P5
Commercial
CY74FCT2245ATQCT
Q5
S5
CY74FCT2245ATSOC/SOCT
CY74FCT2245TQCT
20-Lead (300-Mil) Molded SOIC
20-Lead (150-Mil) QSOP
7.5
Q5
S5
Commercial
CY74FCT2245TSOC/SOCT
20-Lead (300-Mil) Molded SOIC
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
4
CY74FCT2245T
Package Diagrams
20-Lead (300-Mil) Molded DIP P5
20-Lead Quarter Size Outline Q5
5
CY74FCT2245T
Package Diagrams (continued)
20-Lead (300-Mil) Molded SOIC S5
6
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Copyright 2000, Texas Instruments Incorporated
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