CY74FCT2245TQCTG4 [TI]
FCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, QSOP-20;
| 型号： | CY74FCT2245TQCTG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | FCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, QSOP-20 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总18页 (文件大小：799K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
P, Q, OR SO PACKAGE
(TOP VIEW)
Function and Pinout Compatible With FCT
and F Logic
25-Ω Output Series Resistors to Reduce
Transmission-Line Reflection Noise
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
T/R
V
CC
OE
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
B
B
B
B
B
B
B
B
0
1
2
3
4
5
6
7
I
Supports Partial-Power-Down Mode
off
Operation
Fully Compatible With TTL Input and
Output Logic Levels
GND
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
12-mA Output Sink Current
15-mA Output Source Current
3-State Outputs
description
The CY74FCT2245T contains eight noninverting, bidirectional buffers with 3-state outputs intended for
bus-oriented applications. On-chip termination resistors at the outputs reduce system noise caused by
reflections. For this reason, the CY74FCT2245T can replace the CY74FCT245T in an existing design. The
CY74FCT2245T current-sinking capability is 12 mA at the A and B ports.
The transmit/receive (T/R) input determines the direction of data flow through the bidirectional transceiver.
Transmit (active high) enables data from A ports to B ports; receive (active low) enables data from B ports to
A ports. The output-enable (OE) input, when high, disables both the A and B ports by putting them in the
high-impedance state.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
SPEED
(ns)
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QSOP – Q
SOIC – SO
Tape and reel
Tube
4.1
4.1
4.1
4.6
4.6
4.6
4.6
7.0
7.0
7.0
CY74FCT2245CTQCT
CY74FCT2245CTSOC
CY74FCT2245CTSOCT
CY74FCT2245ATPC
CY74FCT2245ATQCT
CY74FCT2245ATSOC
CY74FCT2245ATSOCT
CY74FCT2245TQCT
CY74FCT2245TSOC
CY74FCT2245TSOCT
FCT2245
FCT2245
Tape and reel
Tube
DIP – P
74FCT2245ATPC
FCT2245A
QSOP – Q
Tape and reel
Tube
–40°C to 85°C
SOIC – SO
QSOP – Q
SOIC – SO
FCT2245A
FCT2245
FCT2245
Tape and reel
Tape and reel
Tube
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
FUNCTION TABLE
INPUTS
OUTPUT
OE
L
T/R
L
Bus B data to bus A
Bus A data to bus B
Z
L
H
H
X
H = High logic level, L = Low logic level,
X = Don’t care, Z = High-impedance state
logic diagram (positive logic)
1
T/R
19
18
OE
2
A
0
B
0
To Seven Other Channels
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA
Package thermal impedance, θ (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
JA
Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 135°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
MIN NOM
MAX
UNIT
V
V
V
V
Supply voltage
4.75
2
5
5.25
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Operating free-air temperature
V
IH
0.8
–15
12
V
IL
I
mA
mA
°C
OH
OL
I
T
A
–40
85
NOTE 2: All unused inputs of the device must be held at V
or GND to ensure proper device operation.
CC
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
PARAMETER
TEST CONDITIONS
MIN
2.4
20
TYP
MAX
UNIT
V
V
V
V
V
CC
V
CC
V
CC
V
CC
= 4.75,
= 4.75,
= 4.75,
= 4.75,
I
I
I
I
= –18 mA
–0.7
3.3
0.3
25
–1.2
IK
IN
= –15 mA
= 12 mA
= 12 mA
V
OH
OL
OH
OL
OL
0.55
40
V
R
Ω
out
V
hys
All inputs
0.2
V
I
I
I
V
V
V
V
V
V
V
V
V
V
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 5.25 V,
= 0 V,
V
V
V
V
V
V
V
V
= V
CC
5
±1
µA
µA
µA
µA
µA
mA
µA
mA
mA
I
CC
CC
CC
CC
CC
CC
CC
CC
CC
CC
IN
IN
IN
= 2.7 V
= 0.5 V
IH
IL
±1
I
I
= 2.7 V
= 0.5 V
= 0 V
10
OZH
OUT
OUT
OUT
OUT
–10
–225
±1
OZL
‡
I
I
I
–60
–120
OS
off
= 4.5 V
= 5.25 V,
≤ 0.2 V,
V ≥ V
IN CC
– 0.2 V
0.1
0.5
0.2
2
CC
IN
§
∆I
= 5.25 V, V = 3.4 V , f = 0, Outputs open
IN
CC
1
= 5.25 V, One input switching at 50% duty cycle, Outputs open,
mA/
MHz
¶
I
0.06
0.12
CCD
T/R = OE = GND, V ≤ 0.2 V or V ≥ V
IN IN CC
– 0.2 V
V
V
≤ 0.2 V or
One input switching
IN
IN
0.7
1
1.4
2.4
≥ V
CC
– 0.2 V
at f = 10 MHz
1
V
= 5.25 V,
at 50% duty cycle
Eight bits switching
CC
V
IN
= 3.4 V or GND
#
I
C
mA
Outputs open,
V
IN
V
IN
≤ 0.2 V or
||
2.6
T/R = OE = GND
1.3
≥ V
– 0.2 V
at f = 2.5 MHz
1
at 50% duty cycle
CC
||
10.6
V
IN
= 3.4 V or GND
3.3
5
C
C
10
12
pF
pF
i
9
o
†
‡
Typical values are at V
CC
= 5 V, T = 25°C.
A
Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus
and/or sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise,
prolonged shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In
any sequence of parameter tests, I
tests should be performed last.
OS
§
¶
#
Per TTL-driven input (V = 3.4 V); all other inputs at V
or GND
IN CC
This parameter is derived for use in total power-supply calculations.
= I + ∆I × D × N + I (f /2 + f × N )
I
C
CC
CC
H
T
CCD
0
1
1
Where:
I
I
∆I
D
N
= Total supply current
= Power-supply current with CMOS input levels
C
CC
CC
H
T
= Power-supply current for a TTL high input (V = 3.4 V)
IN
= Duty cycle for TTL inputs high
= Number of TTL inputs at D
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
= Input signal frequency
CCD
0
1
N
= Number of inputs changing at f
1
1
All currents are in milliamperes and all frequencies are in megahertz.
||
Values for these conditions are examples of the I
CC
formula.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
switching characteristics over operating free-air temperature range (see Figure 1)
CY74FCT2245T CY74FCT2245AT CY74FCT2245CT
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
ns
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
7
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
4.6
4.6
6.2
6.2
5
MIN
1.5
1.5
1.5
1.5
1.5
1.5
MAX
4.1
4.1
5.8
5.8
4.5
4.5
t
t
t
t
t
t
PLH
PHL
PZH
PZL
PHZ
PLZ
A
n
or B
B or A
n n
n
7
9.5
9.5
7.5
7.5
A or B
A or B
ns
OE
OE
ns
5
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CY74FCT2245T
8-BIT TRANSCEIVER
WITH 3-STATE OUTPUTS
SCCS037B – JULY 1994 – REVISED NOVEMBER 2001
PARAMETER MEASUREMENT INFORMATION
7 V
Open
GND
S1
500 Ω
From Output
Under Test
From Output
Under Test
Test
Point
TEST
S1
t
/t
Open
7 V
PLH PHL
t /t
C
= 50 pF
C
= 50 pF
L
L
500 Ω
500 Ω
PLZ PZL
/t
(see Note A)
(see Note A)
t
Open
PHZ PZH
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
LOAD CIRCUIT FOR
3-STATE OUTPUTS
3 V
0 V
1.5 V
Timing Input
Data Input
t
w
t
h
t
3 V
su
3 V
0 V
1.5 V
Input
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
t
t
t
PLH
PHL
PLH
PZL
PZH
PLZ
≈3.5 V
V
Output
Waveform 1
(see Note B)
OH
In-Phase
Output
1.5 V
1.5 V
1.5 V
1.5 V
V
V
+ 0.3 V
OL
V
OL
V
OL
t
t
PHL
PHZ
V
V
V
OH
OH
Output
Waveform 2
(see Note B)
Out-of-Phase
Output
– 0.3 V
OH
1.5 V
1.5 V
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
74FCT2245ATSOCTE4
74FCT2245ATSOCTG4
74FCT2245CTSOCTE4
74FCT2245CTSOCTG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
DW
DW
DW
DW
20
20
20
20
2000
2000
2000
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CY74FCT2245ATPC
CY74FCT2245ATPCE4
CY74FCT2245ATPWR
ACTIVE
ACTIVE
ACTIVE
PDIP
PDIP
N
N
20
20
20
20
20
Pb-Free (RoHS)
Pb-Free (RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
CU NIPDAU Level-1-260C-UNLIM
TSSOP
PW
2000
Green (RoHS
& no Sb/Br)
CY74FCT2245ATPWRE4
CY74FCT2245ATPWRG4
CY74FCT2245ATQCT
CY74FCT2245ATQCTE4
CY74FCT2245ATQCTG4
CY74FCT2245ATSOC
CY74FCT2245ATSOCE4
CY74FCT2245ATSOCG4
CY74FCT2245ATSOCT
CY74FCT2245CTQCT
CY74FCT2245CTQCTE4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SSOP
SSOP
SSOP
SOIC
PW
PW
20
20
20
20
20
20
20
20
20
20
20
2000
2000
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
DBQ
DBQ
DBQ
DW
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SOIC
DW
25
Green (RoHS
& no Sb/Br)
SOIC
DW
25
Green (RoHS
& no Sb/Br)
SOIC
DW
2000
2500
2500
Green (RoHS
& no Sb/Br)
SSOP
SSOP
DBQ
DBQ
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
CY74FCT2245CTQCTG4
CY74FCT2245CTSOCT
CY74FCT2245TQCT
SSOP
SOIC
SSOP
SSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
DBQ
DW
DBQ
DBQ
DW
DW
DW
DW
DW
DW
20
20
20
20
20
20
20
20
20
20
2500
2000
2500
2500
25
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-2-260C-1 YEAR
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
CY74FCT2245TQCTG4
CY74FCT2245TSOC
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
CY74FCT2245TSOCE4
CY74FCT2245TSOCG4
CY74FCT2245TSOCT
CY74FCT2245TSOCTE4
CY74FCT2245TSOCTG4
25
Green (RoHS
& no Sb/Br)
25
Green (RoHS
& no Sb/Br)
2000
2000
2000
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
16-Aug-2012
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
CY74FCT2245ATPWR TSSOP
PW
DBQ
DW
20
20
20
20
20
20
20
2000
2500
2000
2500
2000
2500
2000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
24.4
16.4
24.4
16.4
24.4
6.95
6.5
7.1
9.0
1.6
2.1
2.7
2.1
2.7
2.1
2.7
8.0
8.0
16.0
16.0
24.0
16.0
24.0
16.0
24.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
CY74FCT2245ATQCT
CY74FCT2245ATSOCT
CY74FCT2245CTQCT
CY74FCT2245CTSOCT
CY74FCT2245TQCT
CY74FCT2245TSOCT
SSOP
SOIC
SSOP
SOIC
SSOP
SOIC
10.8
6.5
13.0
9.0
12.0
8.0
DBQ
DW
10.8
6.5
13.0
9.0
12.0
8.0
DBQ
DW
10.8
13.0
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
CY74FCT2245ATPWR
CY74FCT2245ATQCT
CY74FCT2245ATSOCT
CY74FCT2245CTQCT
CY74FCT2245CTSOCT
CY74FCT2245TQCT
CY74FCT2245TSOCT
TSSOP
SSOP
SOIC
PW
DBQ
DW
20
20
20
20
20
20
20
2000
2500
2000
2500
2000
2500
2000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
38.0
45.0
38.0
45.0
38.0
45.0
SSOP
SOIC
DBQ
DW
SSOP
SOIC
DBQ
DW
Pack Materials-Page 2
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