CY74FCT540CTQCTE4 [TI]

8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS;
CY74FCT540CTQCTE4
型号: CY74FCT540CTQCTE4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

8-BIT BUFFERS/LINE DRIVERS WITH 3-STATE OUTPUTS

驱动 光电二极管 输出元件 逻辑集成电路
文件: 总13页 (文件大小:465K)
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CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 – OCTOBER 2001  
CY54FCT541T . . . D PACKAGE  
CY74FCT541T . . . P, Q, OR SO PACKAGE  
(TOP VIEW)  
Function, Pinout, and Drive Compatible  
With FCT and F Logic  
Reduced V  
of Equivalent FCT Functions  
(Typically = 3.3 V) Versions  
OH  
OE  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
A
Edge-Rate Control Circuitry for  
Significantly Improved Noise  
Characteristics  
D
D
D
D
D
D
D
D
OE  
0
1
2
3
4
5
6
7
B
O
0
O
1
O
I
Supports Partial-Power-Down Mode  
2
off  
O
3
Operation  
O
4
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
O
O
O
5
6
7
GND  
– 1000-V Charged-Device Model (C101)  
Matched Rise and Fall Times  
CY54FCT541T . . . L PACKAGE  
(TOP VIEW)  
Fully Compatible With TTL Input and  
Output Logic Levels  
CY54FCT541T  
– 48-mA Output Sink Current  
– 12-mA Output Source Current  
3
2
1
20 19  
18  
D
D
D
D
D
O
O
O
O
O
4
5
6
7
8
2
3
4
5
6
0
1
2
3
4
CY74FCT541T  
– 64-mA Output Sink Current  
– 32-mA Output Source Current  
17  
16  
15  
14  
3-State Outputs  
9 10 11 12 13  
description  
The ’FCT541T noninverting buffers/line drivers  
can be employed as memory address drivers,  
clock drivers, and bus-oriented transmitters/receivers. These devices provide speed and drive capabilities  
equivalent to their fastest bipolar-logic counterparts, while reducing power dissipation. The input and output  
voltage levels allow direct interface with TTL, NMOS, and CMOS devices without external components.  
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the  
off  
off  
outputs, preventing damaging current backflow through the device when it is powered down.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
unless otherwise noted. On all other products, production  
testing of all parameters.  
processing does not necessarily include testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
ORDERING INFORMATION  
SPEED  
(ns)  
ORDERABLE  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
PART NUMBER  
CY74FCT541CTQCT  
CY74FCT541CTSOC  
CY74FCT541CTSOCT  
CY74FCT541ATPC  
CY74FCT541ATQCT  
CY74FCT541ATSOC  
CY74FCT541ATSOCT  
CY74FCT541TSOC  
CY74FCT541TSOCT  
CY54FCT541CTDMB  
CY54FCT541TDMB  
CY54FCT541TLMB  
QSOP Q  
SOIC SO  
Tape and reel  
Tube  
4.1  
4.1  
4.1  
4.8  
4.8  
4.8  
4.8  
8
FCT541C  
FCT541C  
Tape and reel  
Tube  
DIP P  
CY74FCT541ATPC  
FCT541A  
40°C to 85°C  
QSOP Q  
Tape and reel  
Tube  
SOIC SO  
SOIC SO  
FCT541A  
FCT541  
Tape and reel  
Tube  
Tape and reel  
Tube  
8
CDIP D  
CDIP D  
LCC L  
4.6  
8
55°C to 125°C  
Tube  
Tube  
8
Packagedrawings,standardpackingquantities,thermaldata,symbolization,andPCBdesignguidelinesareavailable  
at www.ti.com/sc/package.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
O
OE  
L
OE  
L
D
L
A
B
L
H
Z
L
L
H
X
H
H
H = High logic level, L = Low logic level,  
X = Dont care, Z = High-impedance state  
logic diagram (positive logic)  
1
OE  
OE  
A
19  
B
2
18  
D
O
0
0
To Seven Other Channels  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
absolute maximum rating over operating free-air temperature range (unless otherwise noted)  
Supply voltage range to ground potential . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 V to 7 V  
DC output current (maximum sink current/pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 mA  
Package thermal impedance, θ (see Note 1): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W  
JA  
Q package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68°C/W  
SO package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W  
Ambient temperature range with power applied, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 135°C  
A
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunderrecommendedoperatingconditionsisnotimplied.  
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.  
recommended operating conditions (see Note 2)  
CY54FCT541T  
CY74FCT541T  
MIN NOM MAX  
UNIT  
MIN NOM  
MAX  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.75  
2
5
5.25  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
IH  
0.8  
12  
48  
0.8  
32  
64  
V
IL  
I
mA  
mA  
°C  
OH  
OL  
I
T
A
55  
125  
40  
85  
NOTE 2: All unused inputs of the device must be held at V  
or GND to ensure proper device operation.  
CC  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
CY54FCT541T  
CY74FCT541T  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
= 4.5, V  
= 4.75 V,  
=4.5 V,  
I
I
I
I
I
I
I
= 18 mA  
= 18 mA  
0.7  
1.2  
CC  
CC  
CC  
IN  
V
V
IK  
0.7  
1.2  
IN  
= 12 mA  
= 32 mA  
= 15 mA  
= 48 mA  
= 64 mA  
2.4  
3.3  
OH  
OH  
OH  
OL  
OL  
V
OH  
2
V
V
CC  
= 4.75 V  
2.4  
3.3  
V
V
= 4.5 V,  
0.3  
0.2  
0.55  
CC  
V
V
V
V
OL  
= 4.75 V,  
0.3  
0.2  
0.55  
CC  
All inputs  
hys  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 5.5 V,  
= 5.25 V,  
= 0 V,  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
= V  
= V  
5
±1  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
IN  
IN  
IN  
IN  
IN  
IN  
CC  
CC  
I
I
I
I
I
µA  
I
5
±1  
= 2.7 V  
= 2.7 V  
= 0.5 V  
= 0.5 V  
µA  
µA  
µA  
µA  
IH  
±1  
IL  
±1  
= 2.7 V  
= 2.7 V  
= 0.5 V  
= 0.5 V  
= 0 V  
10  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OUT  
OZH  
OZL  
10  
10  
225  
10  
60  
120  
mA  
µA  
I
I
I
OS  
= 0 V  
60  
120  
225  
±1  
= 4.5 V  
±1  
off  
= 5.5 V,  
= 5.25 V,  
0.2 V,  
V
V
V  
V  
0.2 V  
0.2 V  
0.1  
0.5  
0.2  
IN  
IN  
IN  
CC  
mA  
CC  
0.2 V,  
0.1  
0.5  
0.2  
2
IN  
CC  
§
2
V
CC  
V
CC  
V
CC  
= 5.5 V, V = 3.4 V , f = 0, Outputs open  
IN  
1
I  
mA  
CC  
§
= 5.25 V, V = 3.4 V , f = 0, Outputs open  
IN  
1
= 5.5 V, 50% duty cycle, Outputs open,  
One bit switching at f = 10 MHz,  
OE = OE = GND or OE = GND and OE = V  
1
0.06  
0.12  
,
A
B
A
B
CC  
CC  
V
IN  
0.2 V or V V  
0.2 V  
mA/  
MHz  
IN CC  
I
CCD  
V
CC  
= 5.25 V, 50% duty cycle, Outputs open,  
One bit switching at f = 10 MHz,  
1
0.06  
0.12  
OE = OE = GND or OE = GND and OE = V  
,
A
B
A
B
V
IN  
0.2 V or V V  
0.2 V  
IN CC  
Typical values are at V  
= 5 V, T = 25°C.  
CC  
A
Notmorethanoneoutputshouldbeshortedatatime.Durationofshortshouldnotexceedonesecond.Theuseofhigh-speedtestapparatusand/or  
sample-and-holdtechniquesarepreferabletominimizeinternalchipheatingandmoreaccuratelyreflectoperationalvalues.Otherwise,prolonged  
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence  
of parameter tests, I  
Per TTL-driven input (V = 3.4 V); all other inputs at V  
This parameter is derived for use in total power-supply calculations.  
tests should be performed last.  
OS  
§
or GND  
IN CC  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted) (continued)  
CY54FCT541T  
CY74FCT541T  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
0.2 V or  
One bit switching  
IN  
IN  
0.7  
1
1.4  
V
= 5.5 V,  
CC  
Outputs open,  
V  
0.2 V  
at f = 10 MHz  
CC  
1
at 50% duty cycle  
Eight bits switching  
V
IN  
= 3.4 V or GND  
2.4  
OE = OE  
GND or  
OE = GND and  
OE = V  
=
A
B
V
IN  
V
IN  
0.2 V or  
||  
2.6  
1.3  
V  
0.2 V  
A
B
at f = 2.5 MHz  
CC  
1
CC  
at 50% duty cycle  
One bit switching  
||  
V
IN  
= 3.4 V or GND  
3.3 10.6  
#
I
C
mA  
V
IN  
V
IN  
0.2 V or  
0.7  
1
1.4  
2.4  
V
= 5.25 V,  
CC  
Outputs open,  
V  
0.2 V  
at f = 10 MHz  
CC  
1
at 50% duty cycle  
Eight bits switching  
V
IN  
= 3.4 V or GND  
OE = OE  
GND or  
OE = GND and  
OE = V  
=
A
B
V
IN  
V
IN  
0.2 V or  
||  
||  
1.3  
2.6  
V  
0.2 V  
A
B
at f = 2.5 MHz  
CC  
1
CC  
at 50% duty cycle  
V
IN  
= 3.4 V or GND  
3.3 10.6  
C
C
5
9
10  
12  
pF  
pF  
i
o
#
Typical values are at V  
CC  
= 5 V, T = 25°C.  
A
I
= I  
+ I  
× D × N + I  
(f /2 + f × N )  
C
CC  
CC  
H
T
CCD 0 1 1  
Where:  
I
I
I  
D
N
= Total supply current  
= Power-supply current with CMOS input levels  
= Power-supply current for a TTL high input (V = 3.4 V)  
IN  
= Duty cycle for TTL inputs high  
C
CC  
CC  
H
T
= Number of TTL inputs at D  
H
I
f
f
= Dynamic current caused by an input transition pair (HLH or LHL)  
= Clock frequency for registered devices, otherwise zero  
= Input signal frequency  
CCD  
0
1
N
= Number of inputs changing at f  
1
1
All currents are in milliamperes and all frequencies are in megahertz.  
||  
Values for these conditions are examples of the I  
CC  
formula.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
switching characteristics over operating free-air temperature range (see Figure 1)  
CY54FCT541T CY54FCT541CT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.6  
4.6  
6.5  
6.5  
5.7  
5.7  
t
t
t
t
t
t
8
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
O
O
O
8
10.5  
10.5  
10  
ns  
OE  
OE  
ns  
10  
switching characteristics over operating free-air temperature range (see Figure 1)  
CY74FCT541T CY74FCT541AT CY74FCT541CT  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
ns  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.8  
4.8  
6.2  
6.2  
5.6  
5.6  
MIN  
1.5  
1.5  
1.5  
1.5  
1.5  
1.5  
MAX  
4.1  
4.1  
5.8  
5.8  
5.2  
5.2  
t
t
t
t
t
t
8
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
O
O
O
8
10  
ns  
OE  
OE  
10  
9.5  
9.5  
ns  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
CY54FCT541T, CY74FCT541T  
8-BIT BUFFERS/LINE DRIVERS  
WITH 3-STATE OUTPUTS  
SCCS072 OCTOBER 2001  
PARAMETER MEASUREMENT INFORMATION  
7 V  
Open  
GND  
S1  
500 Ω  
From Output  
Under Test  
From Output  
Under Test  
Test  
Point  
TEST  
/t  
S1  
t
Open  
7 V  
PLH PHL  
C
= 50 pF  
C
= 50 pF  
L
L
500 Ω  
500 Ω  
t
/t  
PLZ PZL  
/t  
(see Note A)  
(see Note A)  
t
Open  
PHZ PZH  
LOAD CIRCUIT FOR  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT FOR  
3-STATE OUTPUTS  
3 V  
0 V  
1.5 V  
Timing Input  
Data Input  
t
w
t
h
t
3 V  
su  
3 V  
0 V  
1.5 V  
Input  
1.5 V  
1.5 V  
1.5 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
t
t
t
t
t
PLH  
PHL  
PLH  
PZL  
PZH  
PLZ  
3.5 V  
V
Output  
Waveform 1  
(see Note B)  
OH  
In-Phase  
Output  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
V
V
+ 0.3 V  
OL  
V
OL  
V
OL  
t
t
PHL  
PHZ  
V
V
V
OH  
OH  
Output  
Waveform 2  
(see Note B)  
Out-of-Phase  
Output  
0.3 V  
OH  
1.5 V  
1.5 V  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. The outputs are measured one at a time with one input transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Aug-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
5962-9223701M2A  
5962-9223701MRA  
5962-9223705MRA  
CY54FCT541TDMB  
CY54FCT541TLMB  
CY74FCT541ATPC  
CY74FCT541ATPCE4  
CY74FCT541ATQCT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CDIP  
CDIP  
LCCC  
PDIP  
PDIP  
SSOP  
FK  
J
20  
20  
20  
20  
20  
20  
20  
20  
1
1
TBD  
TBD  
Call TI  
Call TI  
A42  
Call TI  
Call TI  
J
1
TBD  
N / A for Pkg Type  
N / A for Pkg Type  
J
1
TBD  
A42  
FK  
N
1
TBD  
POST-PLATE N / A for Pkg Type  
CU NIPDAU N / A for Pkg Type  
CU NIPDAU N / A for Pkg Type  
CU NIPDAU Level-2-260C-1 YEAR  
20  
20  
2500  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
N
DBQ  
Green (RoHS  
& no Sb/Br)  
CY74FCT541ATQCTE4  
CY74FCT541ATQCTG4  
CY74FCT541ATSOC  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
DBQ  
DBQ  
DW  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
2500  
2500  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
CY74FCT541ATSOCE4  
CY74FCT541ATSOCG4  
CY74FCT541ATSOCT  
CY74FCT541ATSOCTE4  
CY74FCT541ATSOCTG4  
CY74FCT541CTQCT  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DW  
25  
Green (RoHS  
& no Sb/Br)  
DW  
2000  
2000  
2000  
2500  
2500  
2500  
25  
Green (RoHS  
& no Sb/Br)  
DW  
Green (RoHS  
& no Sb/Br)  
DW  
Green (RoHS  
& no Sb/Br)  
DBQ  
DBQ  
DBQ  
DW  
Green (RoHS  
& no Sb/Br)  
CY74FCT541CTQCTE4  
CY74FCT541CTQCTG4  
CY74FCT541CTSOC  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Aug-2012  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
CY74FCT541CTSOCE4  
CY74FCT541CTSOCG4  
CY74FCT541CTSOCT  
CY74FCT541CTSOCTE4  
CY74FCT541CTSOCTG4  
CY74FCT541TQCT  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SSOP  
SSOP  
SSOP  
SOIC  
SOIC  
SOIC  
DW  
DW  
DW  
DW  
DW  
DBQ  
DBQ  
DBQ  
DW  
DW  
DW  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
25  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
2000  
2000  
2000  
2500  
2500  
2500  
25  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
CY74FCT541TQCTE4  
CY74FCT541TQCTG4  
CY74FCT541TSOC  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
CY74FCT541TSOCE4  
CY74FCT541TSOCG4  
25  
Green (RoHS  
& no Sb/Br)  
25  
Green (RoHS  
& no Sb/Br)  
CY74FCT541TSOCT  
CY74FCT541TSOCTE4  
CY74FCT541TSOCTG4  
OBSOLETE  
OBSOLETE  
OBSOLETE  
SOIC  
SOIC  
SOIC  
DW  
DW  
DW  
20  
20  
20  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
25-Aug-2012  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
CY74FCT541ATQCT  
CY74FCT541ATSOCT  
CY74FCT541CTQCT  
CY74FCT541CTSOCT  
CY74FCT541TQCT  
SSOP  
SOIC  
SSOP  
SOIC  
SSOP  
DBQ  
DW  
20  
20  
20  
20  
20  
2500  
2000  
2500  
2000  
2500  
330.0  
330.0  
330.0  
330.0  
330.0  
16.4  
24.4  
16.4  
24.4  
16.4  
6.5  
10.8  
6.5  
9.0  
13.0  
9.0  
2.1  
2.7  
2.1  
2.7  
2.1  
8.0  
12.0  
8.0  
16.0  
24.0  
16.0  
24.0  
16.0  
Q1  
Q1  
Q1  
Q1  
Q1  
DBQ  
DW  
10.8  
6.5  
13.0  
9.0  
12.0  
8.0  
DBQ  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
17-Aug-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
CY74FCT541ATQCT  
CY74FCT541ATSOCT  
CY74FCT541CTQCT  
CY74FCT541CTSOCT  
CY74FCT541TQCT  
SSOP  
SOIC  
SSOP  
SOIC  
SSOP  
DBQ  
DW  
20  
20  
20  
20  
20  
2500  
2000  
2500  
2000  
2500  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
367.0  
38.0  
45.0  
38.0  
45.0  
38.0  
DBQ  
DW  
DBQ  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All  
semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time  
of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or  
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the  
third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered  
documentation. Information of third parties may be subject to additional restrictions.  
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.  
TI is not responsible or liable for any such statements.  
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements  
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support  
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harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use  
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to  
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requirements. Nonetheless, such components are subject to these terms.  
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties  
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Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in  
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components  
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regulatory requirements in connection with such use.  
TI has specifically designated certain components which meet ISO/TS16949 requirements, mainly for automotive use. Components which  
have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such  
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Applications  
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