CY74FCT573TSOCR [TI]

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型号：	CY74FCT573TSOCR
厂家：	TEXAS INSTRUMENTS
描述：	暂无描述锁存器
文件：	总8页 (文件大小：83K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Data sheet acquired from Cypress Semiconductor Corporation.

Data sheet modiﬁed to remove devices not offered.

CY54/74FCT373T

CY54/74FCT573T

SCCS021 - May 1994 - Revised February 2000

8-Bit Latches

Features

Functional Description

• Function and pinout compatible with FCT, and F logic

• FCT-C speed at 4.2 ns max. (Com’l),

FCT-A speed at 5.2 ns max. (Com’l)

• Reduced V_OH(typically = 3.3V) versions of equivalent

FCT functions

• Edge-rate control circuitry for signiﬁcantly improved

noise characteristics

• Power-off disable feature

• ESD > 2000V

• Matched rise and fall times

• Extended commercial range of −40˚C to +85˚C

• Fully compatible with TTL input and output logic levels

The FCT373T and FCT573T consist of eight latches with

three-state outputs for bus organized applications. When latch

enable (LE) is HIGH, the ﬂip-ﬂops appear transparent to the

data. Data that meets the required set-up times are latched

when LE transitions from HIGH to LOW. Data appears on the

bus when the (OE) is LOW. When output enable is HIGH, the

bus output is in the impedance state. In this mode, data may

be entered into the latches. The FCT573T is identical to the

FCT373T except for the ﬂow-through pinout, which simpliﬁes

board design.

The outputs are designed with a power-off disable feature to

allow for live insertion of boards.

• Sink current

64 mA (Com’l), 32 mA (Mil)

Source current 32 mA (Com’l), 12 mA (Mil)

Logic Block Diagram

Pin Configurations

DIP/SOIC/QSOP

Top View

DIP/SOIC/QSOP

Top View

FCT573T

FCT373T

GND

Logic Symbol

CY54/74FCT373T

CY54/74FCT573T

Function Table^[1]

Supply Voltage to Ground Potential............... –0.5V to +7.0V

DC Input Voltage ........................................... –0.5V to +7.0V

DC Output Voltage......................................... –0.5V to +7.0V

DC Output Current (Maximum Sink Current/Pin) ......120 mA

Power Dissipation..........................................................0.5W

Inputs

Outputs

Static Discharge Voltage............................................>2001V

(per MIL-STD-883, Method 3015)

Q₀

Operating Range

Maximum Ratings^{[2, 3]}

Ambient

Range

Temperature

–40°C to +85°C

–55°C to +125°C

V_CC

(Above which the useful life may be impaired. For user guide-

lines, not tested.)

Commercial T, AT, CT

Military^[4]

5V ± 5%

5V ± 10%

Storage Temperature .................................–65°C to +150°C

All

Ambient Temperature with

Power Applied.............................................–65°C to +135°C

Electrical Characteristics Over the Operating Range

Parameter

Description

Test Conditions

V_CC=Min., I_OH=–32 mA

Min.

2.0

Typ.^[5]

Max.

Unit

V_OH

Output HIGH Voltage

Com’l

Mil

V_CC=Min., I_OH=–15 mA

V_CC=Min., I_OH=–12 mA

V_CC=Min., I_OL=64 mA

V_CC=Min., I_OL=32 mA

2.4

3.3

0.3

2.4

V_OL

Output LOW Voltage

Com’l

Mil

0.55

V_IH

V_IL

V_H

V_IK

I_I

Input HIGH Voltage

Input LOW Voltage

Hysteresis^[6]

2.0

0.8

All inputs

0.2

Input Clamp Diode Voltage

Input HIGH Current

Input LOW Current

V_CC=Min., I_IN=–18 mA

V_CC=Max., V_IN=V_CC

V_CC=Max., V_IN=2.7V

V_CC=Max., V_IN=0.5V

V_CC=Max., V_OUT=2.7V

–0.7

–1.2

µA

I_IH

±1

I_IL

I_OZH

Off State HIGH-Level Output

Current

I_OZL

I_OS

Off State LOW-Level

Output Current

Output Short Circuit Current^[7]V_CC=Max., V_OUT=0.0V

V_CC=Max., V_OUT=0.5V

–10

µA

–60

–120

–225

I_OFF

Power-Off Disable V_CC=0V, V_OUT=4.5V

±1

µA

Notes:

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = HIGH Impedance

Q_n= Previous state of ﬂip ﬂops (Q_n-1

)

2. Unless otherwise noted, these limits are over the operating free-air temperature range.

3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V_CCor ground.

4. T_Ais the “instant on” case temperature.

5. Typical values are at V_CC=5.0V, T_A=+25˚C ambient.

6. This parameter is speciﬁed but not tested.

7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample

and hold techniques are preferable in order to minimize internal chip heating and more accurately reﬂect operational values. Otherwise prolonged shorting of

a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter

tests, I_OStests should be performed last.

CY54/74FCT373T

CY54/74FCT573T

Capacitance^[6]

Parameter

C_IN

Description

Typ.^[5]

Max.

Unit

Input Capacitance

Output Capacitance

C_OUT

Power Supply Characteristics

Parameter

I_CC

Description

Test Conditions

Typ.^[5]

0.1

Max.

Unit

Quiescent Power Supply Current

V_CC=Max., V_IN≤ 0.2V, V_IN≥ V_CC– 0.2V

V_CC=Max., V_IN=3.4V, f₁=0, Outputs Open^[8]

0.2

2.0

∆I_CC

Quiescent Power Supply Current

(TTL inputs HIGH)

0.5

I_CCD

Dynamic Power Supply Current^[9]V_CC=Max., One Input Toggling,

50% Duty Cycle, Outputs Open,

0.6

0.7

0.12

1.4

mA/MHz

OE=GND, V_IN≤ 0.2V or V_IN≥ V_CC– 0.2V

I_C

Total Power Supply Current^[10]

V_CC=Max., 50% Duty Cycle, Outputs Open,

One Bit Toggling at f₁=10 MHz,

OE=GND, LE=V_CC

V_IN≤ 0.2V or V_IN≥ V_CC– 0.2V

V_CC=Max., 50% Duty Cycle, Outputs Open,

One Bit Toggling at f₁=10 MHz,

OE=GND, LE=V_CC, V_IN=3.4V or V_IN=GND

1.0

1.3

2.4

V_CC=Max., 50% Duty Cycle, Outputs Open,

Eight Bits Toggling at f₁=2.5 MHz,

2.6^[11]

OE=GND, LE=V_CC

_IN≤ 0.2V or V_IN≥ V_CC– 0.2V

V_CC=Max., 50% Duty Cycle, Outputs Open,

Eight Bits Toggling at f₁=2.5 MHz,

3.3

10.6^[11]

OE=GND, LE=V_CCV_IN=3.4V or V_IN=GND

Notes:

8. Per TTL driven input (V_IN=3.4V); all other inputs at V_CCor GND.

9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.

10. I_C

I_C

= I_QUIESCENT+ I_INPUTS+ I_DYNAMIC

= I_CC+∆I_CCD_HN_T+I_CCD(f₀/2 + f₁N₁)

I_CC= Quiescent Current with CMOS input levels

∆I_CC= Power Supply Current for a TTL HIGH input (V_IN=3.4V)

D_H= Duty Cycle for TTL inputs HIGH

N_T

= Number of TTL inputs at D_H

I_CCD= Dynamic Current caused by an input transition pair (HLH or LHL)

f₀

f₁

= Clock frequency for registered devices, otherwise zero

= Input signal frequency

N₁

= Number of inputs changing at f₁

All currents are in milliamps and all frequencies are in megahertz.

11. Values for these conditions are examples of the I_CCformula. These limits are speciﬁed but not tested.

CY54/74FCT373T

CY54/74FCT573T

Switching Characteristics Over the Operating Range^[12]

FCT373T/FCT573T

FCT373AT/FCT573AT

Military Commercial

Military

Commercial

Fig.

Parameter

Description

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit No.^[13]

t_PLH

t_PHL

Propagation Delay

D to O

1.5

2.0

1.5

2.0

8.5

1.5

8.0

1.5

2.0

1.5

2.0

5.6

1.5

5.2

1, 3

1, 5

t_PLH

t_PHL

Propagation Delay

LE to O

15.0

13.5

10.0

2.0

1.5

2.0

13.0

12.0

7.5

9.8

7.5

6.5

2.0

1.5

2.0

8.5

6.5

5.5

t_PZH

t_PZL

Output Enable Time

1, 7, 8

t_PHZ

t_PLZ

Output Disable Time

t_S

Set-Up Time

HIGH to LOW

D to LE

t_H

Set-Up Time

HIGH to LOW

D to LE

1.5

6.0

1.5

6.0

1.5

6.0

1.5

5.0

t_W

LE Pulse

Width HIGH

FCT373CT/

FCT573CT

Commercial

Parameter

Description

Min.

Max.

Unit

Fig. No.^[13]

t_PLH

t_PHL

Propagation Delay D to O

Propagation Delay LE to O

Output Enable Time

1.5

4.2

5.5

5.0

1, 3

t_PLH

t_PHL

2.0

1.5

1, 5

t_PZH

t_PZL

1, 7, 8

t_PHZ

t_PLZ

Output Disable Time

t_S

t_H

Set-Up Time, HIGH to LOW D to LE

LE Pulse Width HIGH

2.0

1.5

5.0

t_W

Note:

12. Minimum limits are speciﬁed but not tested on Propagation Delays.

13. See “Parameter Measurement Information” in the General Information section.

CY54/74FCT373T

CY54/74FCT573T

Ordering Information–FCT373T

Speed

Package

Name

Operating

Range

(ns)

Ordering Code

CY74FCT373CTQCT

Package Type

20-Lead (150-Mil) QSOP

4.2

Commercial

CY74FCT373CTSOC/SOCT

CY74FCT373ATQCT

20-Lead (300-Mil) Molded SOIC

20-Lead (150-Mil) QSOP

5.2

Commercial

CY74FCT373ATSOC/SOCT

CY54FCT373ATDMB

20-Lead (300-Mil) Molded SOIC

20-Lead (300-Mil) CerDIP

5.6

8.0

8.5

Military

CY74FCT373TSOC/SOCT

CY54FCT373TDMB

20-Lead (300-Mil) Molded SOIC

20-Lead (300-Mil) CerDIP

Commercial

Military

Ordering Information—FCT573T

Speed

Package

Name

Operating

Range

(ns)

Ordering Code

CY74FCT573CTQCT

CY74FCT573CTSOC/SOCT

CY74FCT573ATPC

Package Type

20-Lead (150-Mil) QSOP

4.2

Commercial

20-Lead (300-Mil) Molded SOIC

20-Lead (300-Mil) Molded DIP

20-Lead (150-Mil) QSOP

5.2

Commercial

CY74FCT573ATQCT

CY74FCT573ATSOC/SOCT

CY74FCT573TQCT

20-Lead (300-Mil) Molded SOIC

20-Lead (150-Mil) QSOP

8.0

8.5

Commercial

Military

CY74FCT573TSOC/SOCT

CY54FCT573TDMB

20-Lead (300-Mil) Molded SOIC

20-Lead (300-Mil) CerDIP

Document #: 38-00272-B

CY54/74FCT373T

CY54/74FCT573T

Package Diagrams

20-Lead (300-Mil) CerDIP D6

MIL-STD-1835

D-8 Config.A

20-Lead (300-Mil) Molded DIP P5

CY54/74FCT373T

CY54/74FCT573T

Package Diagrams (continued)

20-Lead Quarter Size Outline Q5

20-Lead (300-Mil) Molded SOIC S5

IMPORTANT NOTICE

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue

any product or service without notice, and advise customers to obtain the latest version of relevant information

to verify, before placing orders, that information being relied on is current and complete. All products are sold

subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those

pertaining to warranty, patent infringement, and limitation of liability.

TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in

accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent

TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily

performed, except those mandated by government requirements.

CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF

DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL

APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR

WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER

CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO

BE FULLY AT THE CUSTOMER’S RISK.

In order to minimize risks associated with the customer’s applications, adequate design and operating

safeguards must be provided by the customer to minimize inherent or procedural hazards.

TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent

that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other

intellectual property right of TI covering or relating to any combination, machine, or process in which such

semiconductor products or services might be or are used. TI’s publication of information regarding any third

party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.

CY74FCT573TSOCR [TI]

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