DCPA10505D [TI]
微型 1W 隔离式非稳压直流/直流转换器;
| 型号： | DCPA10505D |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 微型 1W 隔离式非稳压直流/直流转换器 转换器 |
| 文件： | 总27页 (文件大小：924K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Support &
Community
Product
Folder
Order
Now
Tools &
Software
Technical
Documents
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
DCPA1 系列 1W、隔离式非稳压直流/直流转换器模块
1 特性
3 说明
1
•
•
•
•
•
•
2.0kV 直流隔离（运行）
DCPA1 系列是一系列 1W、隔离式非稳压直流/直流转
换器模块。DCPA1 系列器件需要至少两个外部组件，
其包含片上器件保护装置，且能够同步至外部时钟。
具有软启动，可减小浪涌电流
频率同步
EN55022 B 类 EMC 性能
UL1950 认证组件
DCPA1 系列器件集 这些特性 和小型尺寸于一体，适
合各种 应用且在需要信号路径隔离的 应用中 是一种易
于使用的解决方案。
7 引脚 PDIP 和 7 引脚 SOP 封装
2 应用
警告：此产品具有运行隔离功能，仅可用于信号隔离。
不可作为需要增强型隔离的安全隔离电路的一部分使
用。请参见功能 描述部分中的定义。
•
•
•
•
•
信号路径隔离
消除接地环路
数据采集
器件信息 (1)
工业控制和仪器
测试设备
部件号
DCPA1xxxx
封装
PDIP (7)
SOP (7)
封装尺寸（标称值）
19.18mm × 10.60mm
(1) 要了解所有可用封装，请参见数据表末尾的可订购产品附录。
单路输出方框图
SWOUT
+VS
TEMP
+VOUT
OSC
÷ 2
œVOUT
FET
Driver
SYNCIN
Clock
Detect
I-LIM
Power Controller
œVS
双路输出方框图
SWOUT
+VS
TEMP
+VOUT
COM
œVOUT
OSC
÷ 2
FET
Driver
SYNCIN
Clock
Detect
I-LIM
Power Controller
œVS
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SBVS276
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
目录
7.2 Functional Block Diagrams ..................................... 13
7.3 Feature Description................................................. 14
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application ................................................. 18
Power Supply Recommendations...................... 19
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings ............................................................ 4
6.3 Recommended Operating Conditions....................... 4
6.4 Electrical Characteristics........................................... 4
6.5 Switching Characteristics.......................................... 6
6.6 Typical Characteristics (DCPA10505) ...................... 7
6.7 Typical Characteristics (DCPA10512) ...................... 8
6.8 Typical Characteristics (DCPA10515) ...................... 9
6.9 Typical Characteristics (DCPA10505D).................. 10
6.10 Typical Characteristics (DCPA10512D)................ 11
6.11 Typical Characteristics (DCPA10515D)................ 12
Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
8
9
10 Layout................................................................... 20
10.1 Layout Guidelines ................................................. 20
10.2 Layout Example .................................................... 20
11 器件和文档支持 ..................................................... 21
11.1 器件支持 ............................................................... 21
11.2 文档支持 ............................................................... 21
11.3 社区资源................................................................ 21
11.4 相关链接................................................................ 21
11.5 商标....................................................................... 21
11.6 静电放电警告......................................................... 22
11.7 Glossary................................................................ 22
12 机械、封装和可订购信息....................................... 22
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
日期
修订版本
注释
2017 年 4 月
*
首次发布。
2
Copyright © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
5 Pin Configuration and Functions
NVA and DUA Package
7-Pin PDIP and SOP (Single Output)
(Top View)
1
2
14
+VS
SYNCIN
œVS
5/t!1
5
6
7
œVOUT
+VOUT
NC
8
SWOUT
NVA and DUA Package
7-Pin PDIP and SOP (Dual Output)
(Top View)
1
2
14
+VS
SYNCIN
œVS
5/t!1
5
6
7
COM
+VOUT
œVOUT
8
SWOUT
Pin Functions
PIN NUMBER
(1)
PIN NAME
I/O
Description
SINGLE-
DUAL-
OUTPUT
OUTPUT
COM
NC
—
7
5
O
Output side common
No connection
—
—
Synchronization. This pin is used to synchronize to an external clock.
Internally it is pulled to GND. If valid clock is not detected on this pin, the
SN6505 shifts automatically to internal clock.
SYNCIN
14
14
I
SWOUT
+VOUT
+VS
8
6
1
5
2
8
6
1
7
2
O
O
I
Unrectified transformer output.
Positive output voltage
Input voltage
–VOUT
–VS
O
I
Negative output voltage
Input side common
(1) I = Input, O = Output
Copyright © 2017, Texas Instruments Incorporated
3
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
–0.5
–1.0
–0.5
–1.0
MAX
UNIT
V
6
7
+VS
Input voltage
50ns transient
50ns transient
V
+VS
6
V
SYNCIN
V
Lead temperature (soldering, 10 s)
Storage temperature, Tstg
260
125
°C
°C
–60
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±1000
±250
UNIT
(1)
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
Charged-device model (CDM), per JEDEC specification JESD22-C101
Electrostatic
discharge
V(ESD)
V
(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
4.5
NOM
MAX
5.5
1
UNIT
V
Input voltage
5
Output power
0.05
–40
W
Operating ambient temperature range
100
°C
6.4 Electrical Characteristics
TA = 25°C, +VS = nominal, CIN = 2.2 µF, COUT = 1.0 µF, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
OUTPUT
POUT
Output power
Over +VS range, IOUT = 100% (full load)
DCPA10505
1
200
200(1)
W
mA
mA
mA
mA
mA
mA
DCPA10505D
DCPA10512
83
IOUT
Output current
DCPA10512D
83(1)
66
66(1)
DCPA10515
DCPA10515D
(1) IOUT1 + IOUT2
4
Copyright © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
Electrical Characteristics (continued)
TA = 25°C, +VS = nominal, CIN = 2.2 µF, COUT = 1.0 µF, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
DCPA10505
MIN
TYP
5.0
MAX UNIT
V
V
DCPA10505D
DCPA10512
DCPA10512D
DCPA10515
DCPA10515D
±5.0
12.0
±12.0
15.0
±15.0
0.02
10%
10%
5%
V
(2)
Output voltage
IOUT = 100% load
V
V
VOUT
V
Temperature variation
Line regulation
–40°C ≤ TA ≤ 100°C, IOUT = 100% load
+VS(MIN) to +VS(TYP), IOUT = 10% load
+VS(TYP) to +VS(MAX), IOUT = 10% load
10% to 100% load
%/°C
Load regulation(3)
VRIPPLE Output voltage ripple(4)
COUT = 1 μF, IOUT = 50%
20
mVPP
INPUT
+VS
Input voltage range
4.5
1.7
5.5
V
+VS increasing threshold
+VS decreasing threshold
DCPA10505
2.25
V
UVLO
+VS Undervoltage lockout
V
35
25
29
36
31
38
mA
mA
mA
mA
mA
mA
DCPA10505D
DCPA10512
IOUT = 0% load
IQ
Quiescient current
DCPA10512D
DCPA10515
DCPA10515D
(2) See Load Regulation graphs in the Typical Characterization section for typical voltage at all load conditions.
(3) Load regulation = (VOUT at 10% load – VOUT at 100%)/VOUT at 75% load
(4) Guaranteed by design. Not production tested.
Copyright © 2017, Texas Instruments Incorporated
5
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
MAX UNIT
Electrical Characteristics (continued)
TA = 25°C, +VS = nominal, CIN = 2.2 µF, COUT = 1.0 µF, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
ISOLATION
DC
2.0(5)(4)
1.5(5)
kVDC
kVrms
1-second flash test,
voltage
AC
1-second flash test, leakage current
30
60
µA
VISO
Isolation
DC
VDC
VAC
Continuous working
voltage across isolation
barrier
AC
42.5
dV/dt
50 V/ms
pF
CISO
Barrier capacitance
VISO = 750 Vrms
28
PERFORMANCE
DCPA10505
DCPA10505D
DCPA10512
DCPA10512D
DCPA10515
DCPA10515D
DCPA10505
DCPA10512
DCPA10515
DCPA10505D
DCPA10512D
DCPA10515D
85%
85%
87%
88%
86%
86%
3.0%
1.9%
2.0%
2.7%
2.0%
1.6%
Efficiency
IOUT = 100%
50% to 100% load step
Transient response(4)
50% to 100% load step
per output(6)
RELIABILITY
Demonstrated
CAPACITANCE
TA = 55°C
55
FITS
µF
CIN
External input capacitance
External output capacitance
Ceramic
Ceramic
2.2
0.1
COUT
1.0
200
µF
THERMAL SHUTDOWN
TSD
ISD
Die temperature at shutdown
Shutdown current
168
3
°C
mA
(5) See Isolation Voltage section for more information.
(6) Transient testing for dual output devices are tested with one output loaded with a 50% static load and the other output loaded with a
50% to 100% dynamic load step.
6.5 Switching Characteristics
at TA = +25°C, +VS = nominal, CIN = 2.2 µF, COUT = 1.0 µF, (unless otherwise noted)
PARAMETER
TEST CONDITIONS
fSW = fOSC/2
MIN
TYP
MAX
1000
0.3
UNIT
kHz
kHz
V
fOSC
fSYNC
VIH
Oscillator frequency
850
Synchronization frequency range
High-level input threshold, SYNCIN
Low-level input threshold, SYNCIN
750
0.7
VIL
V
6
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
6.6 Typical Characteristics (DCPA10505)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
100
90
80
70
60
50
40
30
20
10
0
40
35
30
25
20
15
10
5
0
10
20
30
40
50
60
70
80
90 100
10
20
30
40
50
60
70
80
90
100
Load (%)
Load (%)
D001
D002
DCPA10505
DCPA10505
COUT = 1 µF
20-MHz BW
图 1. Efficiency vs Load
图 2. Output Ripple vs Load
6
5.8
5.6
5.4
5.2
5
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.8
4.6
4.4
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D003
D004
DCPA10505
DCPA10505
图 3. Load Regulation
图 4. Line Regulation
版权 © 2017, Texas Instruments Incorporated
7
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
6.7 Typical Characteristics (DCPA10512)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
100
90
80
70
60
50
40
30
20
10
0
35
30
25
20
15
10
5
0
0
10
20
30
40
50
60
70
80
90 100
10
20
30
40
50
60
70
80
90
100
Load (%)
Load (%)
D005
D006
DCPA10512
DCPA10512
COUT = 1 µF
20-MHz BW
图 5. Efficiency vs Load
图 6. Output Ripple vs Load
12.25
13.5
13.2
12.9
12.6
12.3
12
12.20
12.15
12.10
12.05
12.00
11.95
11.90
11.85
11.80
11.75
11.7
11.4
11.1
10.8
10.5
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D007
D008
DCPA10512
DCPA10512
图 7. Load Regulation
图 8. Line Regulation
8
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
6.8 Typical Characteristics (DCPA10515)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
30
25
20
15
10
5
100
90
80
70
60
50
40
30
20
10
0
0
0
10
20
30
40
50
60
70
80
90 100
10
20
30
40
50
60
70
80
90
100
Load (%)
Load (%)
D009
D010
DCPA10515
DCPA10515
COUT = 1 µF
20-MHz BW
图 9. Efficiency vs Load
图 10. Output Ripple vs Load
15.35
17
16.5
16
15.25
15.15
15.05
14.95
14.85
14.75
15.5
15
14.5
14
13.5
13
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D011
D012
DCPA10515
DCPA10515
图 11. Load Regulation
图 12. Line Regulation
版权 © 2017, Texas Instruments Incorporated
9
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
6.9 Typical Characteristics (DCPA10505D)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
160
140
120
100
80
100
90
80
70
60
50
40
30
20
10
0
+Vout
-Vout
60
40
20
0
0
10
20
30
40
50
60
70
80
90 100
10
20
30
40
50
60
70
80
90
100
Load (%)
Load (%)
D013
D014
DCPA10505D
DCPA10505D
COUT = 1 µF
20-MHz BW
图 13. Efficiency vs Load
图 14. Output Ripple vs Load
6
5.8
5.6
5.4
5.2
5
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
4.95
4.8
4.6
4.4
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D015
D017
DCPA10505D
+VOUT
DCPA10505D
+VOUT
图 15. +VOUT Load Regulation
图 16. +VOUT Line Regulation
-4.4
-4.6
-4.8
-5
-4.95
IOUT = 100%
IOUT = 10%
-5.00
-5.05
-5.10
-5.15
-5.20
-5.25
-5.30
-5.35
-5.2
-5.4
-5.6
-5.8
-6
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D016
D018
DCPA10505D
–VOUT
DCPA10505D
–VOUT
图 17. –VOUT Load Regulation
图 18. –VOUT Line Regulation
10
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
6.10 Typical Characteristics (DCPA10512D)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
+Vout
-Vout
0
10
20
30
40
50
60
70
80
90 100
10
20
30
40
50
60
70
80
90
100
Load (%)
Load (%)
D019
D020
DCPA10512D
DCPA10512D
COUT = 1 µF
20-MHz BW
图 19. Efficiency vs Load
图 20. Output Ripple vs Load
12.60
14.1
13.8
13.5
13.2
12.9
12.6
12.3
12
12.55
12.50
12.45
12.40
12.35
12.30
12.25
12.20
12.15
12.10
11.7
11.4
11.1
10.8
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D021
D023
DCPA10512D
图 21. +VOUT Load Regulation
+VOUT
DCPA10512D
图 22. +VOUT Line Regulation
+VOUT
-10.8
-11.1
-11.4
-11.7
-12
-12.10
-12.15
-12.20
-12.25
-12.30
-12.35
-12.40
-12.45
-12.50
-12.55
-12.60
IOUT = 100%
IOUT = 10%
-12.3
-12.6
-12.9
-13.2
-13.5
-13.8
-14.1
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D022
D024
DCPA10512D
图 23. –VOUT Load Regulation
–VOUT
DCPA10512D
图 24. –VOUT Line Regulation
–VOUT
版权 © 2017, Texas Instruments Incorporated
11
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
6.11 Typical Characteristics (DCPA10515D)
At TA = 25°C, +VS = nominal, (unless otherwise noted)
100
90
80
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
+Vout
-Vout
0
10
20
30
40
50
Load (%)
60
70
80
90 100
10
20
30
40
50
Load (%)
60
70
80
90
100
D025
D026
DCPA10515D
DCPA10515D
COUT = 1 µF
20-MHz BW
图 25. Efficiency vs Load
图 26. Output Ripple vs Load
15.40
17
15.35
15.30
15.25
15.20
15.15
15.10
15.05
15.00
14.95
14.90
14.85
14.80
16.5
16
15.5
15
14.5
14
13.5
13
IOUT = 10%
IOUT = 100%
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D027
D029
DCPA10515D
+VOUT
DCPA10515D
+VOUT
图 27. +VOUT Load Regulation
图 28. +VOUT Line Regulation
-14.80
-14.85
-14.90
-14.95
-15.00
-15.05
-15.10
-15.15
-15.20
-15.25
-15.30
-15.35
-15.40
-13
-13.5
-14
IOUT = 100%
IOUT = 10%
-14.5
-15
-15.5
-16
-16.5
-17
10
20
30
40
50
60
70
80
90
100
4.5 4.6 4.7 4.8 4.9
5
5.1 5.2 5.3 5.4 5.5
Load (%)
Input Voltage (V)
D028
D030
DCPA10515D
–VOUT
DCPA10515D
–VOUT
图 29. –VOUT Load Regulation
图 30. –VOUT Line Regulation
12
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
7 Detailed Description
7.1 Overview
The DCPA1 offers up to 1 W of isolated, unregulated output power from a 5-V input source with a typical
efficiency of up to 87%. This efficiency is achieved through highly integrated packaging technology and the
implementation of a custom power stage and control device. The DCPA1 devices are specified for operational
isolation only. The circuit design uses an advanced BiCMOS and DMOS process.
7.2 Functional Block Diagrams
SWOUT
+VS
TEMP
+VOUT
OSC
÷ 2
œVOUT
C9Ç
5river
SYNCIN
/lock
5etect
L-[La
Power Controller
œVS
图 31. Single Output Device
SWOUT
+VS
TEMP
+VOUT
COM
OSC
÷ 2
C9Ç
5river
SYNCIN
œVOUT
/lock
5etect
L-[La
Power Controller
œVS
图 32. Dual Output Device
版权 © 2017, Texas Instruments Incorporated
13
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
7.3 Feature Description
7.3.1 Isolation
Underwriters Laboratories, UL™ defines several classes of isolation that are used in modern power supplies.
Safety extra low voltage (SELV) is defined by UL (UL1950 E199929) as a secondary circuit which is so
designated and protected that under normal and single fault conditions the voltage between any two accessible
parts, or between an accessible part and the equipment earthing terminal for operational isolation does not
exceed steady state 42 V peak or 60 VDC for more than 1 second.
7.3.1.1 Operation or Functional Isolation
Operational or functional isolation is defined by the use of a high-potential (hipot) test only. Typically, this
isolation is defined as the use of insulated wire in the construction of the transformer as the primary isolation
barrier. The hipot one-second duration test (dielectric voltage, withstand test) is a production test used to verify
that the isolation barrier is functioning. Products with operational isolation should never be used as an element in
a safety-isolation system.
7.3.1.2 Basic or Enhanced Isolation
Basic or enhanced isolation is defined by specified creepage and clearance limits between the primary and
secondary circuits of the power supply. Basic isolation is the use of an isolation barrier in addition to the insulated
wire in the construction of the transformer. Input and output circuits must also be physically separated by
specified distances.
7.3.1.3 Continuous Voltage
For a device that has no specific safety agency approvals (operational isolation), the continuous voltage that can
be applied across the part in normal operation is less than 42.4 VRMS, or 60 VDC. Ensure that both input and
output voltages maintain normal SELV limits. The isolation test voltage represents a measure of immunity to
transient voltages.
WARNING
Do not use the device as an element of a safety isolation system that exceeds
the SELV limit.
If the device is expected to function correctly with more than 42.4 VRMS or 60 VDC applied continuously across the
isolation barrier, then the circuitry on both sides of the barrier must be regarded as operating at an unsafe
voltage, and further isolation or insulation systems must form a barrier between these circuits and any user-
accessible circuitry according to safety standard requirements.
7.3.1.4 Isolation Voltage
The terms Hipot test, flash-tested, withstand voltage, proof voltage, dielectric withstand voltage, and isolation test
voltage all describe the same spec. The terms describe a test voltage applied for a specified time across a
component designed to provide electrical isolation to verify the integrity of that isolation. TI’s DCPA1 series of dc-
dc converters are all 100% production tested at 1.5 kVAC for one second.
7.3.1.5 Repeated High-Voltage Isolation Testing
Repeated high-voltage isolation testing of a barrier component can degrade the isolation capability, depending on
materials, construction, and environment. The DCPA1 series of dc-dc converters have toroidal, enameled, wire
isolation transformers with no additional insulation between the primary and secondary windings. While a device
can be expected to withstand several times the stated test voltage, the isolation capability depends on the wire
insulation. Any material, including this enamel (typically polyurethane), is susceptible to eventual chemical
degradation when subject to very-high applied voltages. Therefore, strictly limit the number of high-voltage tests
and repeated high-voltage isolation testing. However, if it is absolutely required, reduce the voltage by 20% from
specified test voltage with a duration limit of one second per test.
14
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
Feature Description (接下页)
7.3.2 Power Stage
The DCPA1 series of devices uses a push-pull, center-tapped topology. The DCPA1 devices switch at 425 kHz
(divide-by-2 from an 850-kHz oscillator).
7.3.3 Input and Output Capacitors
For all DCPA1 designs, a minimum 2.2-μF, low-ESR, ceramic input capacitor is required. Place the input
capacitor as close as possible to the device input pins, +VS and –VS, to ensure good startup performance.
The recommended typical output capacitance for each output of any DCPA1 device is 1.0-μF of low-ESR,
ceramic capacitance. Adding additional output capacitance will aid in ripple reduction, however, any additional
capacitance will also require additional input current at start-up.
7.3.4 Oscillator And Watchdog Circuit
The onboard, 850-kHz oscillator generates the switching frequency via a divide-by-2 circuit. The oscillator can be
synchronized to an external source, and is used to minimize system noise. A watchdog circuit checks the
operation of the oscillator circuit.
7.3.5 Synchronization
When more than one DC/DC converter is needed onboard, beat frequencies and other electrical interference can
be generated. This interference occurs because of the small variations in switching frequencies between the
DC/DC converters.
The DCPA1 series of devices overcomes this interference by allowing devices to synchronize to an external
clock. The SYNCIN pin responds to the rising edge of the external clock. If the external clock is removed, the
DCPA1 will return to the frequency of the internal oscillator. If unused, it is recommended to connect this pin to
the input side common, –VS.
7.3.6 SWOUT
The SWOUT pin is directly connected to one winding of the transformer secondary prior to the output rectifier. It is
not recommended to pull current from this pin. Do not connect capacitance directly to this pin as it will degrade
performance. The SWOUT pin is not compatible with the SYNCIN pin, therefore these two pins should not be
connected together.
7.3.7 Soft Start
The DCPA1 series of devices includes a soft-start feature that prevents high in-rush current during power up.
Once input power is applied, there is a delay of typically 10 ms before the output voltage begins to rise. Once the
output voltage begins to rise, the soft start time is typically 5 ms.
7.3.8 Load Regulation
The load regulation of the DCPA1 series of devices is specified at 10% to 100% load. Operation below 10% load
may cause the output voltage to increase up to 40% higher than the typical output voltage. Placing a minimum
10% load will ensure the output voltage is within the range specified in the Electrical Characteristics table.
版权 © 2017, Texas Instruments Incorporated
15
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
Feature Description (接下页)
7.3.9 Thermal Performance
The DCPA1 family of devices have been characterized to operate over an ambient temperature range of –40°C
to +100°C. The Safe Operating Area curve shown below in 图 33, represents the operating conditions of the
DCPA1 devices where the maximum thermal ratings will not be exceeded. 图 33 shows that all DCPA1 devices
can safely operate over the full ambient temperature range, without airflow, to the full current rating of the device.
125
115
105
95
85
75
65
55
45
DCPA10505
35
Nat Conv
25
0
10
20
30
40
50
60
70
80
90 100
Load (%)
D031
图 33. Thermal Safe Operating Area
7.3.9.1 Thermal Protection
The DCPA1 series of devices are protected by a thermal-shutdown circuit.
If the on-chip temperature rises above 150°C, the device shuts down. Normal operation resumes as soon as the
temperature falls below 150°C. While the overtemperature condition continues, operation randomly cycles on and
off. This cycling continues until the temperature is reduced.
7.3.10 Current Limit
For protection against a short circuit on the output, the DCPA1 series of devices have a built in current limit
protection threshold of 1.75A (typical). These devices are not intended to be used at output currents greater than
the device's output current rating as shown in the Electrical Characteristics table. Operating at currents greater
than the device's current rating, but less than current limit threshold will cause excessive stress to the internal
components. For protection against a partial short circuit condition, an input fuse or output fuse is recommended.
7.3.11 Construction
The basic construction of the DCPA1 series of devices is the same as standard integrated circuits. The molded
package contains no substrate. The DCPA1 series of devices are constructed using an IC, rectifier diodes, and a
wound magnetic toroid on a leadframe. Because the package contains no solder, the devices do not require any
special printed circuit board (PCB) assembly processing. This architecture results in an isolated DC/DC converter
with inherently high reliability.
16
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Ripple Reduction
The high switching frequency of 425 kHz allows simple filtering. To reduce output voltage ripple, it is
recommended that a minimum of 1-µF capacitor be used on the +VOUT pin. For dual output devices, decouple
both of the outputs to the COM pin. The required 2.2-µF, low ESR ceramic input capacitor also helps to reduce
ripple and noise. See DC-to-DC Converter Noise Reduction (SBVA012).
8.1.2 Connecting the DCPA1 in Series
Multiple DCPA1 isolated 1-W DC/DC converters can be connected in series to provide non-standard voltage
rails. This configuration is possible by using the floating outputs provided by the galvanic isolation of the DCPA1
devices by connecting the +VOUT from one DCPA1 to the –VOUT of another as shown in 图 34. The
synchronization feature allows easy synchronization to prevent power-rail beat frequencies at no additional
filtering cost.
V
+V
+V
OUT1
IN
S
C
1.0 ꢀF
C
OUT
IN
DCPA1
SYNCIN
–V
CLOCK
INPUT
–V
+V
S
OUT1
V
V
OUT1
+
OUT2
V
S
OUT2
C
1.0 ꢀF
C
OUT
IN
DCPA1
SYNCIN
–V
–V
OUT2
S
图 34. Multiple DCPA1 Devices Connected in Series
The outputs of a dual-output DCPA1 device can also be connected in series to provide two times the magnitude
of +VOUT, as shown in 图 35. For example, connect a dual-output, ±15-V, DCPA10515D device to provide a 30-V
rail.
V
+V
+V
–V
+V
–V
IN
S
OUT
OUT
C
1.0 ꢀF
OUT
C
IN
DCPA1
OUT
OUT
C
OUT
1.0 ꢀF
–V
S
COM
图 35. Dual Output Devices Connected in Series
版权 © 2017, Texas Instruments Incorporated
17
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
8.1.3 Connecting the DCPA1 in Parallel
If the output power from one DCPA1 is not sufficient, it is possible to parallel the outputs of multiple DCPA1s, as
shown in 图 36, (applies to single output devices only). The synchronization feature allows easy synchronization
to prevent power-rail beat frequencies at no additional filtering cost.
V
+V
+V
IN
S
OUT1
OUT1
DCPA1
C
OUT
SYNCIN
–V
C
IN
1.0 ꢀF
–V
S
CLOCK
INPUT
2 × Power Out
+V
+V
–V
S
OUT2
C
OUT
DCPA1
1.0 ꢀF
SYNCIN
–V
C
IN
S
OUT2
GND
图 36. Multiple DCPA1 Devices Connected in Parallel
8.2 Typical Application
V
+V
+V
–V
+V
IN
S
OUT
OUT
DCPA1
C
2.2 ꢀF
C
OUT
1.0 ꢀF
IN
SYNC
–V
S
–V
OUT
OUT
图 37. Typical DCPA10505 Application
8.2.1 Design Requirements
For this design example, use the parameters listed in 表 1 and follow the design procedures shown in Detailed
Design Procedure section.
表 1. Design Example Parameters
PARAMETER
Input voltage
V(+VOUT) Output voltage
IOUT Output current rating
fSW Operating frequency
VALUE
UNIT
V
V(+VS)
5
5
V
200
425
mA
kHz
18
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
8.2.2 DCPA10505 Application Curves
图 38. DCPA10505 Turn-ON
图 39. DCPA10505 Turn-OFF
8.2.3 Detailed Design Procedure
8.2.3.1 Input Capacitor
For all DCPA1, 5-V input voltage designs, select a 2.2-μF low-ESR ceramic input capacitor to ensure a good
startup performance.
8.2.3.2 Output Capacitor
For any DCPA1 design, select a 1.0-μF low-ESR ceramic output capacitor to reduce output ripple.
8.2.3.3 SYNCIN Pin
In a stand-alone application, it is recommended to connect this pin to the input side common, –VS.
8.2.4 PCB Design
The copper losses (resistance and inductance) can be minimized by the use of mutual ground and power planes
where possible. If that is not possible, use wide traces to reduce the losses. If several devices are being powered
from a common power source, a star-connected system for the traces must be deployed. Do not connect the
devices in series, because that type of connection cascades the resistive losses. The position of the decoupling
capacitors is important. They must be as close to the devices as possible in order to reduce losses. See the PCB
Layout section for more details.
9 Power Supply Recommendations
The DCPA1 is a switching power supply, and as such can place high peak current demands on the input supply.
In order to avoid the supply falling momentarily during the fast switching pulses, ground and power planes should
be used to connect the power to the input of DCPA1 device. If this connection is not possible, then the supplies
must be connected in a star formation with the traces made as wide as possible.
版权 © 2017, Texas Instruments Incorporated
19
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
10 Layout
10.1 Layout Guidelines
Due to the high power density of these devices, provide ground planes on the input and output rails.
图 40 shows the schematic for a single output DCPA1 device. 图 40 illustrates a printed circuit board (PCB)
layout for the schematics.
Including input power and ground planes provides a low-impedance path for the input power. For the output, the
COM signal connects via a ground plane, while the connections for the positive and negative voltage outputs
conduct via wide traces in order to minimize losses.
The output should be taken from the device using ground and power planes, thereby ensuring minimum losses.
The location of the decoupling capacitors in close proximity to their respective pins ensures low losses due to the
effects of stray inductance, thus improving the ripple performance. This location is of particular importance to the
input decoupling capacitor, because this capacitor supplies the transient current associated with the fast
switching waveforms of the power drive circuits.
If the SYNCIN pin is unused, it is recommended to connect this pin to the input side common, –VS. Allow the
SWOUT pin, to remain configured as a floating pad.
10.2 Layout Example
图 40. Typical Layout
20
版权 © 2017, Texas Instruments Incorporated
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
www.ti.com.cn
ZHCSG81 –APRIL 2017
11 器件和文档支持
11.1 器件支持
11.1.1 器件命名规则
DCPA1 05
05 (D) (P)
Basic model number: 1-W product
Voltage input:
5 V
Voltage output:
5 V, 12 V or 15 V
Output type:
D (dual) or No Character (single)
Package code:
P = 7-pin PDIP (NVA package)
P-U = 7-pin SOP (DUA package)
图 41. 补充订购信息
11.2 文档支持
11.2.1 相关文档
直流到直流转换器降噪 (SBVA012)
DCP01/02 系列直流/直流转换器的外部同步 (SBAA035)
优化 DCP01/02 系列直流/直流转换器的性能 (SBVA013)
11.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 相关链接
以下表格列出了快速访问链接。范围包括技术文档、支持与社区资源、工具和软件，并且可以快速访问样片或购买
链接。
表 2. 相关链接
器件
产品文件夹
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
样片与购买
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
技术文档
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
工具与软件
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
支持与社区
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
请单击此处
DCPA10505
DCPA10505D
DCPA10512
DCPA10512D
DCPA10515
DCPA10515D
11.5 商标
E2E is a trademark of Texas Instruments.
Underwriters Laboratories, UL are trademarks of UL LLC.
All other trademarks are the property of their respective owners.
版权 © 2017, Texas Instruments Incorporated
21
DCPA10505, DCPA10505D
DCPA10512, DCPA10512D
DCPA10515, DCPA10515D
ZHCSG81 –APRIL 2017
www.ti.com.cn
11.6 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
22
版权 © 2017, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
NVA
DUA
NVA
DUA
NVA
DUA
NVA
DUA
NVA
DUA
NVA
DUA
Qty
(1)
(2)
(3)
(4/5)
(6)
DCPA10505DP
DCPA10505DP-U/700
DCPA10505P
ACTIVE
PDIP
SOP
PDIP
SOP
PDIP
SOP
PDIP
SOP
PDIP
SOP
PDIP
SOP
7
7
7
7
7
7
7
7
7
7
7
7
25
RoHS &
Non-Green
NIPDAU
N / A for Pkg Type
Level-3-260C-168 HR
N / A for Pkg Type
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
-40 to 100
DCPA10505DP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
700
25
RoHS &
Non-Green
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
DCPA10505DP-U
DCPA10505P
RoHS &
Non-Green
DCPA10505P-U/700
DCPA10512DP
700
25
RoHS &
Non-Green
Level-3-260C-168 HR
N / A for Pkg Type
DCPA10505P-U
DCPA10512DP
DCPA10512DP-U
DCPA10512P
RoHS &
Non-Green
DCPA10512DP-U/700
DCPA10512P
700
25
RoHS &
Non-Green
Level-3-260C-168 HR
N / A for Pkg Type
RoHS &
Non-Green
DCPA10512P-U/700
DCPA10515DP
700
25
RoHS &
Non-Green
Level-3-260C-168 HR
N / A for Pkg Type
DCPA10512P-U
DCPA10515DP
DCPA10515DP-U
DCPA10515P
RoHS &
Non-Green
DCPA10515DP-U/700
DCPA10515P
700
25
RoHS &
Non-Green
Level-3-260C-168 HR
N / A for Pkg Type
RoHS &
Non-Green
DCPA10515P-U/700
700
RoHS &
Level-3-260C-168 HR
DCPA10515P-U
Non-Green
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
重要声明和免责声明
TI 均以“原样”提供技术性及可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资
源，不保证其中不含任何瑕疵，且不做任何明示或暗示的担保，包括但不限于对适销性、适合某特定用途或不侵犯任何第三方知识产权的暗示
担保。
所述资源可供专业开发人员应用TI 产品进行设计使用。您将对以下行为独自承担全部责任：(1) 针对您的应用选择合适的TI 产品；(2) 设计、
验证并测试您的应用；(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。所述资源如有变更，恕不另行通知。TI 对您使用
所述资源的授权仅限于开发资源所涉及TI 产品的相关应用。除此之外不得复制或展示所述资源，也不提供其它TI或任何第三方的知识产权授权
许可。如因使用所述资源而产生任何索赔、赔偿、成本、损失及债务等，TI对此概不负责，并且您须赔偿由此对TI 及其代表造成的损害。
TI 所提供产品均受TI 的销售条款 (http://www.ti.com.cn/zh-cn/legal/termsofsale.html) 以及ti.com.cn上或随附TI产品提供的其他可适用条款的约
束。TI提供所述资源并不扩展或以其他方式更改TI 针对TI 产品所发布的可适用的担保范围或担保免责声明。IMPORTANT NOTICE
邮寄地址：上海市浦东新区世纪大道 1568 号中建大厦 32 楼，邮政编码：200122
Copyright © 2020 德州仪器半导体技术（上海）有限公司
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明