DCT104803P [TI]

SWITCHING REGULATOR, 440kHz SWITCHING FREQ-MAX, PDIP22, PLASTIC, DIP-28;
DCT104803P
型号: DCT104803P
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

SWITCHING REGULATOR, 440kHz SWITCHING FREQ-MAX, PDIP22, PLASTIC, DIP-28

开关 光电二极管
文件: 总11页 (文件大小:150K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DCT104803  
DCT104805  
SLVS407 – OCTOBER 2001  
10-WATT ISOLATED TELECOMS DC/DC CONVERTER  
D
D
Central Office Line Cards  
Point-of-Use Power Conversion  
FEATURES  
D
D
D
D
28-Pin (0.6Wide) PDIP and SMD  
Output Variants: 5 V, 3.3 V  
Input Range: 32 V – 75 V  
DESCRIPTION  
The DCT1048 family is a series of galvanically isolated  
dc/dc converters designed for telecommunications  
applications. With a low component count and highly  
compact magnetics sets, the devices offer extremely  
high power density in JEDEC standard with through-  
hole and surface-mount IC packages. The unique  
application of custom-level silicon integration, together  
with an advanced thermal design, provides extremely  
high reliability and allows operation at ambient  
temperatures up to 85°C.  
High Reliability (Measured): TBD Failures In  
Time (FITs)  
D
D
D
D
D
D
D
1500 V  
Isolation  
RMS  
Basic Insulation  
Remote Sensing  
Remote Shutdown  
Undervoltage Lockout  
Soft Start  
85°C Operation (No Heatsinking)  
Thecircuitprovidesisolationto1500V  
requirements  
,meetingthe  
RMS  
of  
UL1950/CSA22.2/EN  
60950  
APPLICATIONS  
(pending), with basic insulation to 75 V. The  
DCT10480x is a part of Texas Instrument’s range of  
isolated dc/dc converters.  
D
Network Access Equipment  
functional block diagram  
Output  
Choke  
Isolating  
Transformer  
0 V  
O
V
I
Primary  
Control  
IC  
V
O
0 V  
I
Rectifiers  
REF  
Isolation  
Reference  
RSD  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCT PREVIEW information concerns products in the formative or  
Copyright 2001, Texas Instruments Incorporated  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
www.ti.com  
DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
NVM/DVM PACKAGE  
(TOP VIEW)  
1
2
3
4
28  
27  
26  
25  
PWMa  
0 V  
RSD  
0 V  
0 V  
(dev)  
I
V
I
(dev)  
SNUB1  
SNUB2  
7
8
0 V  
PWMb  
(dev)  
21  
20  
19  
18  
17  
16  
15  
DNC  
V
V
O
O
BIAS  
COMP  
10  
11  
12  
13  
14  
DNC  
DNC  
0 V  
(sense)  
REF  
0 V  
0 V  
O
O
NC  
NC No internal connection  
AVAILABLE OPTIONS  
PACKAGE  
T
A
PLASTIC  
(DIL)  
PLASTIC DIL  
(GULLWING)  
DCT104803P  
DCT104805P  
DCT104803P-U  
DCT104805P-U  
40°C to 85°C  
absolute maximum ratings over operating free-air temperature (unless otherwise noted)  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76 V  
I
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 125°C  
stg  
Operating ambient temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40°C to 85°C  
Lead temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 270°C  
A
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
2
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
electrical characteristics, T = 25°C, V = 48 VDC, V set to nominal output voltage, Load = 2A  
A
I
O
(unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
32  
TYP  
MAX  
75  
UNIT  
V
I
Input voltage range  
V
V = 32 V75 V,  
See Figure 1  
Relative to V = 48 V,  
I
I
Line regulation  
±0.2  
±0.5  
%V  
V
O
Under voltage lockout  
See Figure 1  
28  
3.5  
Input current during remote shutdown  
Reference voltage  
V = 75 V,  
I
See Figure 1  
mA  
V
V
ref  
See output voltage programming section  
1.223 1.238  
1.252  
DCT104803 See Figure 1  
DCT104805 See Figure 1  
3.3  
5
V
Nominal output voltage  
V
V = 40 V60 V, Tested at nominal output volts,  
See Figure 1  
I
10%  
10%  
DCT104803,  
DCT104805  
Output voltage trim range  
V = 32 V75 V, Tested at nominal output  
volts, See Figure 1  
I
2%  
2%  
Load regulation  
Output current  
I
O
= 10% to 100% I  
, relative to 50% I  
max  
±0.5  
±1  
2
%V  
A
max  
O
I
O
0.2  
DCT104803  
DCT104805  
6.6  
10  
Output power  
W
Output ripple and noise  
I
O
= 100% I  
, See Note 1 and Figure 1  
50  
mV  
pp  
max  
Output voltage temperature coefficient  
Transient response  
Relative to 25°C, See Figure 1  
±0.02  
%/C  
%V  
I
= 50 to 75% I  
, See Figure 1  
5
250  
5
O
O
max  
max  
O
Transient recovery  
(Time to within 1% of nominal volts)  
I
= 50 to 75% I  
, See Figure 1  
µs  
V
OS  
Start-up overshoot  
See Figure 1  
See Figure 1  
%V  
S
O
Start-up time  
(Time to within 1% of nominal volts)  
TBD  
DCT104803  
DCT104805  
76%  
80%  
I
= 75% I  
at nominal output voltage,  
O
max  
Efficiency  
thermal steady state, See Figure 1  
See  
Note 3  
Maximum output short circuit duration  
S
V
Remote shutdown on logic low input  
voltage  
V
T
See Note 2  
0.3  
0.8  
IL  
Logic low pullup current  
Operating temperature  
Storage temperature  
Switching frequency  
Tested at V = 0.8 V  
IL  
1300  
40  
640  
200  
85  
µA  
°C  
40  
125  
°C  
stg  
440  
kHz  
Assured by design.  
NOTES: 1. Measurement made using tip and barrel technique, decoupled with a 100-nF ceramic capacitor. Bandwidth of oscilloscope limited  
to 20 MHz.  
2. Remote shutdown (RSD) pin is active low. See application section for more information.  
3. Continuous  
3
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
Package Pin Assignments  
PIN  
1
SIGNAL  
PWMa  
0V  
PIN  
8
SIGNAL  
PWMb  
PIN  
15  
16  
17  
18  
19  
20  
21  
SIGNAL  
PIN  
22  
23  
24  
25  
26  
27  
28  
SIGNAL  
Not present  
Not present  
Not present  
SNUB2  
0V  
0V  
O
2
9
Not present  
BIAS  
(dev)  
O
3
V
I
10  
11  
12  
13  
14  
DNC  
DNC  
4
SNUB1  
COMP  
5
Not present  
Not present  
0V  
(sense)  
V
V
0V  
0V  
O
(dev)  
6
REF  
NC  
O
I
7
0V  
(dev)  
DNC  
RSD  
Terminal Functions  
TERMINAL  
DESCRIPTION  
NAME  
NO.  
2, 7, 26  
0 V  
0 V  
0 V  
0 V  
Device 0 V  
(dev)  
12  
15,16  
27  
Output 0 V  
Output 0 V  
Input 0 V  
(sense)  
(sense)  
O
I
BIAS  
10  
Bias voltage. Bias point for internal circuitry.  
Compensation. Frequency compensation for control loop shaping.  
COMP  
DNC  
11  
17, 18, 21 Do not connect. Pin has internal electrical connection and must be left open circuit.  
14 No connection. Pin has no internal electrical connection.  
NC  
Not present  
5, 6, 9, 22, These pins have been removed.  
23, 24  
PWMa  
PWMb  
REF  
1
8
Pulse width modulator A. Input to pulse width modulator.  
Pulse width modulator B. Control loop signal for pulse width modulator.  
Reference voltage. Used to provide regulated output voltage. For internal use only.  
Remote shutdown. Active low with respect to primary side ground to shutdown the DCT10.  
Snubber connection  
13  
28  
4
RSD  
SNUB1  
SNUB2  
25  
3
Snubber connection  
V
I
Input voltage (positive)  
19,20  
Output voltage (positive). Regulated output voltage.  
V
O
4
www.ti.com  
DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
R1  
Input  
Volts  
3
10  
V
BIAS  
I
Output  
Volts  
25  
19,20  
SNUB2  
V
O
C7  
220 pF  
DCT1048XX  
R7 470 R  
11  
13  
R2  
47 R  
COMP  
REF  
C1  
22 µF  
C2  
100 nF  
4
28  
1
V
(sense)  
C4  
100 nF  
SNUB1  
RSD  
PWMa  
Remote  
Shutdown  
R3  
R4  
C5  
100 nF  
C6  
470 µF  
R5  
1 kΩ  
C3  
100 nF  
8
PWMb  
0 V  
(dev)  
0 V  
2,7,26  
12  
R6  
0.75 Ω  
0 V  
(sense)  
(sense)  
27  
15,16  
Input 0 V  
0 V  
0 V  
O
Output 0 V  
I
Figure 1. Schematic  
schematic information  
ITEM  
REF  
DESCRIPTION  
GENERAL INFORMATION  
1
C1  
22 µF, 100 V, ultralow impedance electrolytic capacitor. 105°C. Ripple  
current at 100 kHz >80 mA.  
2
3
4
5
6
C2  
C3  
C4  
C5  
C6  
100 nF, 100 V, X7R dielectric  
100 nF, 25 V, X7R dielectric  
100 nF, 25 V, X7R dielectric  
100 nF, 25 V, X7R dielectric  
470 µF, 10 V, ultralow impedance electrolytic capacitor. 105°C. Ripple  
Capacitor value should not exceed 470 µF  
current at 100 kHz > 400 mA  
7
8
C7  
R1  
220 pF, 100 V, X7R, dielectric  
5%, power rating > 10 mW  
R1 = 100 , DCT104803  
R1 = 270 , DCT104805  
9
R2  
R3  
47 R, 5%, power rating 250 mW  
10  
R3 = 20 k, DCT104803  
R3 = 10 k, DCT104805  
Power rating > 10 mW  
See application section for more information  
11  
R4  
R4 = 12 k, DCT104803  
R4 = 3.3 k, DCT104805  
Power rating > 10 mW  
See application section for more information  
12  
13  
14  
R5  
R6  
R7  
1 k, 5%, power rating >10 mW  
0.75 , 5%, power rating 250 mW  
470 R, 5%, power rating > 10 mW  
detailed description  
The DCT10 switching topology is based on a buck derived, full-bridge converter. The output is sensed and  
compared with a secondary side reference and an error signal is fed back via an optocoupler to the PWM  
controller.  
The converter construction is based on well developed industry standard integrated circuit processes. A copper  
leadframe is used for mounting the components. The magnetic devices are glued into position and the  
terminations are soldered onto the leadframe using high temperature solder. The silicon dice are mounted onto  
the leadframe with silver loaded epoxy and the bond connections are ultrasonically welded onto the leadframe.  
The complete assembly is transfer moulded using a silica-filled epoxy material.  
5
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
APPLICATION INFORMATION  
remote shutdown  
The remote shutdown (RSD) allows the converter to be put into a low power dissipation state and is active low.  
The RSD input can typically source 640 µA and should be pulled to less than 0.8 V with respect to 0 V . The  
I
switch device should be rated to V  
40 V.  
(CEO)  
RSD  
0 V  
I
Figure 2. Remote Shutdown Circuit  
When using the remote shutdown, start-up load sequencing conditions apply, where the input voltage is greater  
than 60 VDC. Under these conditions, the output load should not be greater than 0.25 A. As soon as the output  
rail has reached the correct voltage, any specified load can be applied.  
output voltage programming  
The output voltage is determined by programming R4 (see Figure 1 schematic) according to the following  
formula:  
3.3-V variant: R4 = 24600/ (V V ), where V is the value of the reference voltage.  
O
ref  
ref  
R4 cannot be less than 10.25 k or greater than 14 k. For example, for a 3.3-V output, R4 = 12k.  
5-V variant: R4 = 12300/(V V ), where V is the value of the reference voltage.  
O
ref  
ref  
R4 cannot be less than 2.9 k or greater than 3.8 k. For example, for a 5-V output, R4 = 3.3k.  
Output set-point can be determined by taking into account the tolerance of R3, R4 and V and applying the  
ref  
following formula:  
R4 ) R3  
V
+ V  
x
O
ref  
R4  
6
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
APPLICATION INFORMATION  
remote sensing  
Full-differentialremotesensingcanbeachievedbyconnectingV  
(seeFigure1schematic)and0V  
(sense)  
(sense)  
at the point of load. The maximum terminal voltage should not exceed the defined output voltage trim range  
values. Care should be taken when laying out the sense connections to avoid noise pickup. If wire is used for  
sense leads, it is recommended that it be formed into a twisted pair. Additional noise suppression can be  
provided by adding 0.1-µF ceramic capacitors between each of the output pins and the corresponding sense  
connection.  
Protection can be added in the event of one of the remote sense leads breaking by inserting 50-resistors  
betweenV  
andV and0V  
and0V . TheseprotectionresistorsshouldbeconnectedlocallytoV  
(sense)  
O
(sense) O O  
and 0 V  
O.  
Ifremotesensingisnotrequired,V  
and0V  
shouldbeconnectedlocallytoV and0V respectively.  
(sense)  
(sense) O O  
safety  
For safety agency approval of the end-system in which the DCT10408x is used, the unit must be installed in  
compliance with the safety and separation requirements of the end-use safety standard: UL 1950, CSA 22.2  
and EN 60 950.  
The isolation system deployed in the DCT10408x is considered to be basic insulation in accordance with UL  
1950, CSA 22.2 and EN 60 950. The following circuits can be connected together:  
BETWEEN (INPUT)  
AND (OUTPUT)  
TNV-2 Circuit  
TNV-3 Circuit  
Unearthed SELV circuit  
Earthed SELV circuit  
Earthed or unearthed  
Hazardous voltage  
Secondary circuit  
Earthed SELV circuit  
ELV Circuit  
Unearthed hazardous voltage  
Secondary circuit  
In order to maintain basic insulation between the above circuits, special consideration must be given to the  
layout of the host application printed-circuit board. It is assumed that the application installation is category II  
and the comparative tracking index is IIIa + IIIb.  
Creepage/clearance distances must be adhered to between the various pin/tracking connections as shown in  
the following table:  
Between pins  
And pins  
10 to 21  
Creepage (minimum) Clearance (minimum)  
1,3 mm 0,7 mm  
1 to 8 and 2528  
To ensure there are no operational issues, the following creepage/clearance distances should be adhered to:  
Between pin  
And pin  
Creepage (minimum) Clearance (minimum)  
V (3)  
I
0V  
(2), PWMa (1), DNC (4)  
(26)  
1,3 mm  
1,2 mm  
0,7 mm  
0,7 mm  
(dev)  
(dev)  
DNC (21)  
0V  
The input to the DCT10, should be protected by a 5-A slow-blow fuse.  
7
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
APPLICATION INFORMATION  
safety (continued)  
Overvoltage protection is required to protect downstream circuitry and to ensure the output of the DCT10  
complies with SELV limits during fault conditions. In the event of a single point failure of basic insulation or a  
component, it is imperative that the voltage appearing across the output rails will not exceed 42.4-V peak, or  
60 VDC for longer than 0.2 s. Moreover, a limit of 71-V peak, or 120 VDC will not be exceeded.  
It is recommended that a clamp type circuit be applied across the output rails. In the event of a failure, this circuit  
detects that an overvoltage condition has occurred and then applies a low-impedance across the output rails  
forcing the input fuse to blow. Either a transorb (SMBJ6.0A manufactured by Semtech and General Instrument)  
or a crowbar circuit as shown in Figure 3 can be used.  
+V  
O
D1, 6V2  
BZX55c6v2  
SCR1  
R1  
100 ,1/8 W  
C1  
100 nF, 25 Vdc  
Ceramic  
0 V  
O
Figure 3. Protection Circuit  
layout considerations  
Special care should be taken when laying out the PCB to accommodate the DCT10 module with respect to  
safety, EMC, output voltage ripple/noise, and thermal performance.  
safety  
See the safety section in the Application Information of this document.  
thermal  
The main thermal path for the extraction of heat is via the pins and the host printed-circuit board. The pins that  
carry the heat on the primary side of the device are pins 2 and 26, and the pins that carry the heat on the  
secondary side are pins 15 and 16 and 19 and 20.  
output voltage ripple/noise  
Large ground loops between V and 0 V should be avoided. Filter capacitors should be positioned as close  
O
O
as possible to these connections.  
8
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
MECHANICAL DATA  
DVM (R-PDSO-G22/28)  
PLASTIC SMALL-OUTLINE  
C
1.565 (39,75)  
1.380 (35,05)  
28  
15  
0.580 (14,73)  
0.485 (12,32)  
C
Index  
Area  
1
14  
0±5°  
0.310 (7,87)  
0.300 (7,62)  
0.625 (15,88)  
0.600 (15,24)  
0.350 (8,89)  
MAX  
0.070 (1,78)  
0.030 (0,76)  
D
Base  
Plane  
C–  
Seating  
Plane  
0±5°  
0.022 (0,56)  
0.014 (0,36)  
0.020 (0,51)  
MIN  
0.057 (1,45)  
0.045 (1,15)  
0.005 (0,13)  
MIN 4 PL  
C
0.010 (0,25) M  
0.015 (0,38)  
0.008 (0,20)  
0.730 (18,54)  
0.690 (17,53)  
C
Full Lead  
0.100 (2,54)  
4202652/A 08/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25).  
D. Maximum dimension does not include dambar protrusions. Dambar protrusions shall not exceed 0.005 (0,13).  
E. Lead shoulder dimension for leads 2, 3, 4, 25, 26 less than nominal to maintain specified lead spacing.  
F. A visual index feature must be located within the cross-hatched area.  
G. For automatic insertion, any raised irregularity on the top surface (step, mesa, etc.) shall be symmetrical about the lateral and  
longitudinal package centerlines.  
9
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DCT104803  
DCT104805  
SLVS407 OCTOBER 2001  
MECHANICAL DATA  
NVM (R-PDIP-T22/28)  
PLASTIC DUAL-IN-LINE  
D
1.565 (39,75)  
1.380 (35,05)  
28  
15  
0.580 (14,73)  
0.485 (12,32)  
D
Index  
1
14  
Area  
0.310 (7,87)  
0.300 (7,62)  
E
0.625 (15,88)  
0.070 (1,78)  
0.030 (0,76)  
H
0.350 (8,89)  
MAX  
0.600 (15,24)  
C
Base  
Plane  
C–  
Seating  
PLane  
E
C
0.200 (5,08)  
0.110 (2,79)  
0.600 (15,26)  
0.022 (0,56)  
0.014 (0,36)  
0.005 (0,13)  
MIN 4 PL  
Full Lead  
0.015 (0,38)  
0.008 (0,20)  
D
M
0.010 (0,25)  
C
0.060 (1,52)  
0.000 (0,00)  
F
0.100 (2,54)  
0.010 (0,25)  
MIN  
C
0.700 (17,78)  
MAX  
F
4202651/A 08/01  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. Dimensions are measured with the package seated in JEDEC seating plane gauge GS-3.  
D. Dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010 (0,25).  
E. Dimensions measured with the leads constrained to be perpendicular to Datum C.  
F. Dimensions are measured at the lead tips with the leads unconstrained.  
G. Pointed or rounded lead tips are preferred to ease insertion.  
H. Maximum dimension does not include dambar protrusions. Dambar protrusions shall not exceed 0.005 (0,13).  
I. Lead shoulder dimension for leads 2, 3, 4, 25, 26 less than nominal to maintain specified lead spacing.  
J. A visual index feature must be located within the cross-hatched area.  
K. For automatic insertion, any raised irregularity on the top surface (step, mesa, etc.) shall be symmetrical about the lateral and  
longitudinal package centerlines.  
10  
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