DRV201YFMR [TI]
VOICE COIL MOTOR DRIVER FOR CAMERA AUTO FOCUS; 音圈电机驱动器，用于摄像机自动聚焦
| 型号： | DRV201YFMR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | VOICE COIL MOTOR DRIVER FOR CAMERA AUTO FOCUS |
| 文件： | 总17页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
VOICE COIL MOTOR DRIVER FOR CAMERA AUTO FOCUS
Check for Samples: DRV201
1
FEATURES
•
•
•
•
Operating Temperature Range: -40ºC to 85ºC
6-Ball WCSP Package With 0.4-mm Pitch
Max Die Size: 0.8 mm x 1.48 mm
•
Configurable for Linear or PWM Mode VCM
Current Generation
•
•
•
High Efficiency PWM Current Control for VCM
Advanced Ringing Compensation
Package Height: 0.15 mm
APPLICATIONS
Integrated 10-bit D/A Converter for VCM
Current Control
•
•
•
•
•
•
Cell Phone Auto Focus
Digital Still Camera Auto Focus
Iris/Exposure Control
Security Cameras
•
Protection
–
Open and Short-Circuit Detection on VCM
Pins
–
–
–
Undervoltage Lockout (UVLO)
Thermal Shutdown
Web and PC Cameras
Actuator Controls
Open and Short Circuit Protection on VCM
Output
–
Internal Current Limit for VCM Driver
•
I2C Interface
DESCRIPTION
The DRV201 is an advanced voice coil motor driver for camera auto focus. It has an integrated D/A converter for
setting the VCM current. VCM current is controlled with a fixed frequency PWM controller or a linear mode driver.
Current generation can be selected via I2C register. The DRV201 has an integrated sense resistor for current
regulation and the current can be controlled through I2C.
When changing the current in the VCM, the lens ringing is compensated with an advanced ringing compensation
function. Ringing compensation reduces the needed time for auto focus significantly. The device also has VCM
short and open protection functions.
FUNCTIONAL BLOCK DIAGRAM
Cin
VBAT
OSCILLATOR
REFERENCE
10-bit
DAC
POR
ISOURCE
DIGITAL
VCM
REGISTERS
I2C
RINGING
ISINK
COMPENSATION
SCL
SDA
R
sense
GND
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
DRV201
SLVSB25 –AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
-40°C to 85°C
YFM
DRV201YFMR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
DEVICE INFORMATION
NanoFree PACKAGE
(BOTTOM VIEW)
I
SOURCE
SCL
VBAT
2
1
I
SINK
SDA
GND
A
C
B
TERMINAL FUNCTIONS
TERMINAL
I/O
DESCRIPTION
NAME
VBAT
GND
NO.
2A
1A
2B
1B
2C
1C
Power
Ground
I_SOURCE
I_SINK
SCL
Voice coil positive terminal
Voice coil negative terminal
I2C serial interface clock input
I
SDA
I/O
I2C serial interface data input/output (open drain)
2
Copyright © 2011, Texas Instruments Incorporated
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
V
VBAT, ISOURCE, ISOURCE pin voltage range(2)
Voltage range at SDA, SCL
–0.3 to 5.5
–0.3 to 3.6
V
Continuous total power dissipation
Internally limited
θJA
TJ
Junction-to-ambient thermal resistance(3)
Operating junction temperature
Operating ambient temperature
Storage temperature
130
°C/W
°C
-40 to 125
-40 to 85
-55 to 150
±4000
TA
°C
Tstg
°C
(HBM) Human body model
ESD rating
V
(CDM) Charged device model
±500
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) This thermal data is measured with high-K board (4-layer board).
ELECTRICAL CHARACTERISTICS
Over recommended free-air temperature range and over recommended input voltage range (typical at an ambient
temperature range of 25°C) (unless otherwise noted)
PARAMETER
INPUT VOLTAGE
TEST CONDITIONS
MIN
TYP
MAX UNIT
VBAT
Input supply voltage
2.5
3.7
4.8
2.2
V
V
VBAT rising
VBAT falling
VUVLO
VHYS
Undervoltage lockout threshold
Undervoltage lockout hysteresis
2
50
100
250
mV
INPUT CURRENT
Input supply current shutdown,
ISHUTDOWN
MAX: VBAT = 4.4 V
MAX: VBAT = 4.4 V
0.15
120
1
µA
µA
includes switch leakage currents
Input supply current standby, includes
switch leakage currents
ISTANDBY
200
STARTUP, MODE TRANSITIONS, AND SHUTDOWN
t1
t2
t3
t4
Shutdown to standby
Standby to active
Active to standby
Shutdown time
100
100
100
1
µs
µs
µs
ms
Active or standby to shutdown
0.5
VCM DRIVER STAGE
Resolution
10
bits
IRES
Relative accuracy
-10
-1
10
1
LSB
Differential nonlinearity
Zero code error
Offset error
0
mA
mA
At code 32
3
% of
FSR
Gain error
±3
Gain error drift
0.3
0.3
0.4 %/°C
0.5 %/°C
mA
Offset error drift
IMAX
Maximum output current
Average VCM current limit
102.3
160
(1)
ILIMIT
See
110
240
mA
(1) During short circuit condition driver current limit comparator will trip and short is detected and driver goes into STANDBY and short flag
is set high in the status register.
Copyright © 2011, Texas Instruments Incorporated
3
DRV201
SLVSB25 –AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
Over recommended free-air temperature range and over recommended input voltage range (typical at an ambient
temperature range of 25°C) (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
256
0.5
TYP
MAX UNIT
Minimum VCM code for OPEN and
SHORT detection
(2)
IDETCODE
See
mA
fSW
Switching frequency
Internal dropout
VCM inductance
VCM resistance
Selectable through CONTROL register
4
0.4
150
22
MHz
V
(3)
VDRP
LVCM
RVCM
See
30
11
µH
Ω
LENS MOVEMENT CONTROL
tset1
tset2
Lens settling time
±10% error band
±10% error band
2/fVCM
1/fVCM
ms
ms
Hz
%
Lens settling time
VCM resonance frequency
VCM resonance frequency tolerance
50
150
20
fVCM
-20
LOGIC I/Os (SDA AND SCL)
V = 3.6 V, SCL
V = 3.6 V, SDA
-20
-1
20
1
IIN
Input leakage current
µA
RPullUp
VIH
I2C pull-up resistors
SDA and SCL pins
4.7
kΩ
V
(4)
Input high level
See
1.17
0
3.6
0.63
1
(5)
VIL
Input low level
See
V
tTIMEOUT
RPD
SCL timeout for shutdown detection
Pull down resistor at SCL line
I2C clock frequency
0.5
ms
kΩ
500
fSCL
400 kHz
INTERNAL OSCILLATOR
fOSC
Internal oscillator
20°C ≤ TA ≤ 70°C
-40°C ≤ TA ≤ 85°C
-3
-5
3
5
%
%
Frequency accuracy
THERMAL SHUTDOWN
TTRIP Thermal shutdown trip point
(2) When testing VCM open or short this is the recommended minimum VCM code (in dec) to be used.
140
°C
(3) This is the voltage that is needed for the feedback resistor and high side driver. It should be noted that the maximum VCM resistance is
limited by this voltage and supply voltage. E.g. 3-V supply maximum VCM resistance is: RVCM = (VBAT – VDRP)/IVCM = (3 V - 0.4
V)/102.3 mA = 25.4 Ω.
(4) During shutdown to standby transition VIH low limit is 1.28 V.
(5) During shutdown to standby transition VIL low limit is 0.51 V.
4
Copyright © 2011, Texas Instruments Incorporated
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
FUNCTIONAL DESCRIPTION
The DRV201 is intended for high performance autofocus in camera modules. It is used to control the current in
the voice coil motor (VCM). The current in the VCM generates a magnetic field which forces the lens stack
connected to a spring to move. The VCM current and thus the lens position can be controlled via the I2C
interface and an auto focus function can be implemented.
The device connects to a video processor or image sensor through a standard I2C interface which supports up to
400-kbit/s data rate. The digital interface supports IO levels from 1.8 V to 3.3 V. All pins have 4-kV HBM ESD
rating.
When SCL is low for at least 0.5 ms, the device enters SHUTDOWN mode. If SCL goes from low to high the
driver enters STANDBY mode in less than 100 μs and default register values are set as shown in Figure 1.
ACTIVE mode is entered when ever the VCM_CURRENT register is set to something else than zero.
Vbat
t4
t1
t2
t3
ISC/SCL
=0
STANDBY
0
DAC
=0
ACTIVE
SHUTDOWN
SHUTDOWN
STANDBY
mode
Figure 1. Power Up and Down Sequence
VCM current can be controlled via an I2C interface and VCM_CURRENT registers. Lens stack is connected to a
spring which causes a dampened ringing in the lens position when current is changed. This mechanical ringing is
compensated internally by generating an optimized ramp when ever the current value in the VCM_CURRENT
register is changed. This enables a fast autofocus algorithm and pleasant user experience.
Current in the VCM can be generated with a linear or PWM control. In linear mode the high side PMOS is
configured as a current source and current is set by the VCM_CURRENT control register. In PWM control the
VCM is driven with a half bridge driver. With PWM control the VCM current is increased by connecting the VCM
between VBAT and GND through the high side PMOS and then released to a ‘freewheeling’ mode through the
sense resistor and low side NMOS. PWM mode switching frequency can be selected from 0.5 MHz up to 4 MHz
through a CONTROL register. PWM or linear mode can be selected with the PWM/LIN bit in the MODE register.
Copyright © 2011, Texas Instruments Incorporated
5
DRV201
SLVSB25 –AUGUST 2011
www.ti.com
MODES OF OPERATION
SHUTDOWN
STANDBY
If the driver detects SCL has a DC level below 0.63 V for duration of at least 0.5 ms, the
driver will enter shutdown mode. This is the lowest power mode of operation. The driver will
remain in shutdown for as long as SCL pin remain low.
If SCL goes from low to high the driver enters STANDBY mode and sets the default register
values. In this mode registers can be written to through the I2C interface. Device will be in
STANDBY mode when VCM_CURRENT register is set to zero. From ACTIVE mode the
device will enter STANDBY if the SW_RST bit of the CONTROL register is set. In this case
all registers will be reset to default values.
STANDBY mode is entered from ACTIVE mode if any of the following faults occur: Over
temperature protection fault (OTPF), VCM short (VCMS), or VCM open (VCMO). When
STANDBY mode is entered due to a fault condition current register is cleared.
ACTIVE
The device is in ACTIVE mode whenever the VCM_CURRENT control is set to something
else than zero through the I2C interface. In ACTIVE mode VCM driver output stage is
enabled all the time resulting in higher power consumption. The device remains in active
mode until the SW_RST bit in the CONTROL register is set, SCL is pulled low for duration of
0.5 ms, VCM_CURRENT control is set to zero, or any of the following faults occur: Over
temperature protection fault (OTPF), VCM short (VCMS), or VCM open (VCMO). If active
mode is entered after fault the status register is automatically cleared.
6
Copyright © 2011, Texas Instruments Incorporated
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
VCM DRIVER OUTPUT STAGE OPERATION
Current in the VCM can be controlled with a linear or PWM mode output stage. Output stage is enabled in
ACTIVE mode which can be controlled through VCM_CURRENT control register and the output stage mode is
selected from MODE register bit PWM/LIN.
In linear mode the output PMOS is configured to a high side current source and current can be controlled from a
VCM_CURRENT registers.
In PWM control the VCM is driven with a half bridge driver. With PWM control the VCM current is increased by
connecting the VCM between VBAT and GND through the high side PMOS and then released to a ‘freewheeling’
mode through the sense resistor and low side NMOS. Current in the VCM is sensed with a 1-Ω sense resistor
which is connected into an error amplifier input where the other input is controlled by the 10-bit DAC output.
PWM mode switching frequency can be selected from 0.5 MHz up to 4 MHz through a CONTROL register. PWM
or linear mode can be selected with the PWM/LIN bit in the MODE register.
RINGING COMPENSATION
VCM current can be controlled via an I2C interface and VCM_CURRENT registers. Lens stack is connected to a
spring which causes a dampened ringing in the lens position when current is changed. This mechanical ringing is
compensated internally by generating an optimized ramp when ever the current value in the VCM_CURRENT
register is changed. This enables a fast auto focus algorithm and pleasant user experience.
Ringing compensation is dependent on the VCM resonance frequency and this can be controlled via
VCM_FREQ register from 50 Hz up 152 Hz with 0.4-Hz steps. Ringing compensation is designed in a way that it
can tolerate ±20% frequency variation in the VCM resonance frequency so only statistical data from the VCM is
needed in production.
I2C BUS OPERATION
The DRV201 hosts a slave I2C interface that supports data rates up to 400 kbit/s and auto-increment addressing
and is compliant to I2C standard 3.0.
Slave Address + R/nW
Sub Address
Data
Start
G3
G2 G1 G0
A2
A1
A0 R/nW ACK
S7
S6
S5
S4
S3
S2
S1
S0
ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Stop
Figure 2. Subaddress in I2C Transmission
Start – Start condition
G(3:0) – Group ID: Address fixed at '0001'
A(2:0) – Device Address: Address fixed at '110'
R/nW – Read/not Write select bit
ACK – Acknowledge
S(7:0) – Subaddress: Defined per register map
D(7:0) – Data: Data to be loaded into the device
Stop – Stop condition
The I2C Bus is a communications link between a controller and a series of slave terminals. The link is established
using a two-wire bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock is
sourced from the controller in all cases where the serial data line is bi-directional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pull-up resistor must be placed on the serial data line to pull the drain output high
during data transmission.
Copyright © 2011, Texas Instruments Incorporated
7
DRV201
SLVSB25 –AUGUST 2011
www.ti.com
Data transmission is initiated with a start bit from the controller as shown in Figure 3. The start condition is
recognized when the SDA line transitions from high to low during the high portion of the SCL signal. Upon
reception of a start bit, the device will receive serial data on the SDA input and check for valid address and
control information. If the appropriate slave address bits are set for the device, then the device will issue an
acknowledge pulse and prepare to receive the register address. Depending on the R/nW bit, the next byte
received from the master is written to the addressed register (R/nW = 0) or the device responds with 8-bit data
from the register (R/nW = 1). Data transmission is completed by either the reception of a stop condition or the
reception of the data word sent to the device. A stop condition is recognized as a low to high transition of the
SDA input during the high portion of the SCL signal. All other transitions of the SDA line must occur during the
low portion of the SCL signal. An acknowledge is issued after the reception of valid address, sub-address and
data words. The I2C interfaces will auto-sequence through register addresses, so that multiple data words can be
sent for a given I2C transmission. Reference Figure 4.
. . .
SDA
. . .
SCL
1
2
3
4
5
6
7
8
9
START CONDITION
ACKNOWLEDGE
STOP CONDITION
Figure 3. I2C Start/Stop/Acknowledge Protocol
tLOW
tH(STA)
tr
tf
SCL
tH(STA)
tH(DAT)
tS(STO)
tHIGH
tS(DAT)
tS(STA)
SDA
t(BUF)
P
S
S
P
Figure 4. I2C Data Transmission Protocol
8
Copyright © 2011, Texas Instruments Incorporated
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
DATA TRANSMISSION TIMING
VBAT = 3.6 V ±5%, TA = 25ºC, CL = 100 pF (unless otherwise noted)
PARAMETER
Serial clock frequency
TEST CONDITIONS
MIN
100
TYP
MAX
UNIT
f(SCL)
tBUF
400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
SCL = 100 KHz
SCL = 400 KHz
4.7
1.3
Bus Free Time Between Stop and Start Condition
Tolerable spike width on bus
SCL low time
µs
50
ns
tSP
4.7
1.3
4
tLOW
µs
µs
tHIGH
SCL high time
600
250
100
4.7
600
4
ns
tS(DAT)
tS(STA)
tS(STO)
tH(DAT)
tH(STA)
tr(SCL)
tf(SCL)
tr(SDA)
tf(SDA)
SDA → SCL setup time
Start condition setup time
Stop condition setup time
SDA → SCL hold time
ns
µs
ns
µs
ns
600
0
3.45
µs
0
0.9
4
µs
Start condition hold time
Rise time of SCL Signal
Fall time of SCL Signal
Rise time of SDA Signal
Rise time of SDA Signal
600
ns
1000
ns
300
300
ns
300
1000
ns
300
300
ns
300
Copyright © 2011, Texas Instruments Incorporated
9
DRV201
SLVSB25 –AUGUST 2011
www.ti.com
REGISTER ADDRESS MAP
DEFAULT
VALUE
REGISTER
ADDRESS (HEX)
NAME
DESCRIPTION
1
2
3
4
5
6
7
01
02
03
04
05
06
07
not used
CONTROL
0000 0010
0000 0000
0000 0000
0000 0000
0000 0000
1000 0011
Control register
VCM_CURRENT_MSB
VCM_CURRENT_LSB
STATUS
Voice coil motor MSB current control
Voice coil motor LSB current control
Status register
MODE
Mode register
VCM_FREQ
VCM resonance frequency
CONTROL REGISTER (CONTROL)
Address – 0x02h
DATA BIT
FIELD NAME
READ/WRITE
RESET VALUE
D7
D6
D5
D4
D3
D2
D1
EN_RING
R/W
D0
RESET
R/W
0
not used
not used
not used
not used
not used
not used
R
0
R
0
R
0
R
0
R
0
R
0
1
FIELD NAME
BIT DEFINITION
Forced software reset (reset all registers to default values) and device goes into STANDBY. RESET
bit is automatically cleared when written high.
RESET
0 – inactive
1 – device goes to STANDBY
Enables ringing compensation.
0 – disabled
EN_RING
1 – enabled
VCM MSB CURRENT CONTROL REGISTER (VCM_CURRENT_MSB)
Address – 0x03h
DATA BIT
FIELD NAME
READ/WRITE
RESET VALUE
D7
D6
D5
D4
D3
D2
D1
D0
not used
not used
not used
not used
not used
not used
VCM_CURRENT[9:0]
R/W
R
0
R
0
R
0
R
0
R
0
R
0
0
0
FIELD NAME
BIT DEFINITION
VCM current control
00 0000 0000b – 0 mA
00 0000 0001b – 0.1 mA
00 0000 0010b – 0.2 mA
…
VCM_CURRENT[9:0]
11 1111 1110b – 102.2 mA
11 1111 1111b – 102.3 mA
10
Copyright © 2011, Texas Instruments Incorporated
DRV201
www.ti.com
SLVSB25 –AUGUST 2011
VCM LSB CURRENT CONTROL REGISTER (VCM_CURRENT_LSB)
Address – 0x04h
DATA BIT
FIELD NAME
READ/WRITE
RESET VALUE
D7
D6
D5
D4
D3
D2
D1
D0
VCM_CURRENT[7:0]
R/W
0
0
0
0
0
0
0
0
FIELD NAME
BIT DEFINITION
VCM current control
00 0000 0000b – 0 mA
00 0000 0001b – 0.1 mA
00 0000 0010b – 0.2 mA
…
VCM_CURRENT[7:0]
11 1111 1110b – 102.2 mA
11 1111 1111b – 102.3 mA
STATUS REGISTER (STATUS)(1)
Address – 0x05h
DATA BIT
FIELD NAME
READ/WRITE
RESET VALUE
D7
D6
not used
R/WR
0
D5
D4
D3
D2
VCMO
R
D1
D0
OVC
R
not used
not used
TSD
R
VCMS
UVLO
R
0
R
0
R
0
R
0
0
0
0
(1) Status bits are cleared when device changes it’s state from standby to active. If TSD was tripped the device goes into Standby and will
not allow the transition into Active until the device cools down and TSD is cleared.
FIELD NAME
OVC
BIT DEFINITION
Over current detection
UVLO
Undervoltage Lockout
VCMO
VCMS
TSD
Voice coil motor open detected
Voice coil motor short detected
Thermal shutdown detected
Copyright © 2011, Texas Instruments Incorporated
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DRV201
SLVSB25 –AUGUST 2011
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MODE REGISTER (MODE)
Address – 0x06h
DATA BIT
D7
D6
D5
D4
D3
D2
D1
D0
RING_MOD
E
FIELD NAME
not used
not used
not used
PWM_FREQ[2:0]
PWM/LIN
READ/WRITE
R
0
R
0
R
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
RESET VALUE
FIELD NAME
BIT DEFINITION
Ringing compensation settling time
RING_MODE
0 – 2x(1/fVCM
)
)
1 – 1x(1/fVCM
Driver output stage in linear or PWM mode
0 – PWM mode
PWM/LIN
1 – Linear mode
Output stage PWM switching frequency
000 – 0.5 MHz
001 – 1 MHz
010 – N/A
PWM_FREQ[2:0]
011 – 2 MHz
100 – N/A
101 – N/A
110 – N/A
111 – 4 MHz
VCM RESONANCE FREQUENCY REGISTER (VCM_FREQ)
Address – 0x07h
DATA BIT
FIELD NAME
READ/WRITE
RESET VALUE
D7
D6
D5
D4
D3
D2
D1
D0
VCM_FREQ[7:0]
R/W
1
0
0
0
0
0
1
1
FIELD NAME
BIT DEFINITION
VCM mechanical ringing frequency for the ringing compensation can be selected with the below
formula. The formula gives the VCM_FREQ[7:0] register value in decimal which should be rounded to
the nearest integer.
19200
VCM _ FREQ = 383-
VCM_FREQ[7:0]
Fres
(1)
Default VCM mechanical ringing frequency is 76.4 Hz.
19200
VCM _ FREQ = 383-
=131.69 Þ132 Þ '1000 0011'
76.4
(2)
12
Copyright © 2011, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
9-Sep-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
DRV201YFMR
DRV201YFMT
ACTIVE
ACTIVE
DSLGA
DSLGA
YFM
YFM
6
6
3000
250
Green (RoHS
& no Sb/Br)
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Sep-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV201YFMR
DRV201YFMT
DSLGA
DSLGA
YFM
YFM
6
6
3000
250
180.0
180.0
8.4
8.4
0.85
0.85
1.52
1.52
0.19
0.19
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
8-Sep-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
DRV201YFMR
DRV201YFMT
DSLGA
DSLGA
YFM
YFM
6
6
3000
250
210.0
210.0
185.0
185.0
35.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
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and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Audio
Applications
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
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Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
www.ti.com/industrial
www.ti.com/medical
www.ti.com/security
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Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Medical
Security
Logic
Space, Avionics and Defense www.ti.com/space-avionics-defense
Transportation and Automotive www.ti.com/automotive
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Video and Imaging
www.ti.com/video
OMAP Mobile Processors www.ti.com/omap
Wireless Connectivity www.ti.com/wirelessconnectivity
TI E2E Community Home Page
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated
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