DRV5021A3EDBZRQ1 [TI]
汽车类 2.5-V 至 5.5-V 霍尔效应单极开关
| DBZ | 3 | -40 to 150;
| 型号： | DRV5021A3EDBZRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类 2.5-V 至 5.5-V 霍尔效应单极开关 | DBZ | 3 | -40 to 150 开关 |
| 文件： | 总24页 (文件大小：924K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DRV5021-Q1
ZHCSHJ6 –FEBRUARY 2019
DRV5021-Q1 汽车用、低电压、单极、数字开关霍尔效应传感器
1 特性
3 说明
1
•
适用于汽车电子 应用
DRV5021-Q1 是一款低电压数字开关霍尔效应传感
器，适用于高速汽车 应用。该器件由 2.5V 至 5.5V 的
电源供电，可以检测磁通量密度并根据预定义的磁性阈
值提供数字输出。
•
下列性能符合 AEC-Q100 标准：
–
器件温度等级 0：–40°C 至 150°C 环境工作温
度范围
–
–
器件 HBM ESD 分类等级 3A
器件 CDM ESD 分类等级 C6
该器件会检测垂直于封装面的磁场。当施加的磁通量密
度超过磁运行点 BOP 阈值时，器件的漏极开路输出将
驱动低电压。当磁通量密度降至磁释放点 (BRP) 阈值
时，输出会变为高阻抗。BOP 和 BRP 的分离所产生的
滞后有助于防止输入噪声引起的输出误差。这种配置使
得系统设计能够更加稳健地抵抗噪声干扰。
•
•
•
数字单极开关霍尔传感器
2.5V 至 5.5V 工作 VCC 范围
磁性灵敏度选项 (BOP，BRP)：
–
–
–
DRV5021A1-Q1：2.9mT、1.8mT
DRV5021A2-Q1：9.2mT、7.0mT
DRV5021A3-Q1：17.9mT、14.1mT
该器件可在 –40°C 至 +150°C 的宽环境温度范围内保
持稳定的优异性能。
•
•
•
•
•
30kHz 高速感应带宽
漏极开路输出电流高达 20mA
经过优化的低电压架构
器件信息(1)
器件型号
封装
SOT-23 (3)
封装尺寸（标称值）
具有集成迟滞特性，可增强抗噪能力
标准行业封装：
DRV5021-Q1
2.90mm x 1.30mm
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
–
表面贴装 SOT-23
2 应用
•
•
•
•
•
•
•
汽车变速器、车身外壳
限位开关
一般接近感应
刷式直流电机反馈
门开关检测
阀定位
脉冲计数
典型应用电路原理图
磁响应
OUT
VCC
Bhys
DRV5021-Q1
Controller
GPIO
VCC
OUT
B (mT)
BRP
BOF
BOP
GND
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBAS914
DRV5021-Q1
ZHCSHJ6 –FEBRUARY 2019
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 13
Application and Implementation ........................ 14
8.1 Application Information............................................ 14
8.2 Typical Applications ................................................ 14
Power Supply Recommendations...................... 17
1
2
3
4
5
6
特性.......................................................................... 1
8
9
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 3
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 4
6.6 Magnetic Characteristics........................................... 4
6.7 Typical Characteristics.............................................. 5
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 7
10 Layout................................................................... 17
10.1 Layout Guidelines ................................................. 17
10.2 Layout Example .................................................... 17
11 器件和文档支持 ..................................................... 18
11.1 文档支持................................................................ 18
11.2 接收文档更新通知 ................................................. 18
11.3 社区资源................................................................ 18
11.4 商标....................................................................... 18
11.5 静电放电警告......................................................... 18
11.6 术语表 ................................................................... 18
12 机械、封装和可订购信息....................................... 18
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
日期
修订版本
说明
2019 年 2 月
*
初始发行版。
2
Copyright © 2019, Texas Instruments Incorporated
DRV5021-Q1
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ZHCSHJ6 –FEBRUARY 2019
5 Pin Configuration and Functions
DBZ Package
3-Pin SOT-23
Top View
VCC
OUT
1
2
3
GND
Not to scale
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
GND
OUT
DBZ
3
2
GND
Ground pin
Output
Hall sensor open-drain output. The open drain requires a pullup resistor.
2.5-V to 5.5-V power supply. Bypass this pin to the GND pin with a 0.1-μF (minimum) ceramic
VCC
1
Power
capacitor rated for VCC
.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
MAX
6.0
UNIT
V
Power supply voltage (VCC)
Output voltage (OUT)
6.0
V
Output current (OUT)
30
mA
T
Magnetic flux density, BMAX
Operating junction temperature, TJ
Storage temperature, Tstg
Unlimited
170
–40
–65
°C
°C
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
over operating free-air temperature range (unless otherwise noted)
VALUE
UNIT
Human body model (HBM), per AEC
Q100-002(1)
±6000
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per AEC
Q100-011
±1000
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
2.5
0
MAX
5.5
UNIT
V
VCC
VO
Power supply voltage range
Output pin voltage
5.5
V
IOUT
TA
Output sinking current
0
20
mA
°C
Operating ambient temperature
–40
150
6.4 Thermal Information
DRV5021-Q1
THERMAL METRIC(1)
SOT-23 (DBZ)
UNIT
3 PINS
356
128
94
RθJA
RθJC(top)
RθJB
YJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
11.4
92
YJB
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.5 Electrical Characteristics
at VCC = 2.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
Operating supply current
Power-on time
TEST CONDITION
MIN
TYP
2.3
40
MAX
2.8
UNIT
mA
µs
ICC
tON
70
B = BRP – 10 mT to BOP + 10 mT in
1 µs
td
Propagation delay time(1)
13
25
µs
High-impedance output leakage
current
5.5 V applied to OUT, while OUT is
high-impedance
IOZ
100
0.4
nA
VOL
Low-level output voltage
Output FET resistance
IOUT = 20 mA
0.15
8
V
RDS(on)
IOUT = 5 mA, VCC = 3.3 V
Ω
(1) See the Propagation Delay section for more information.
6.6 Magnetic Characteristics
at VCC = 2.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
DRV5021A1-Q1, DRV5021A2-Q1, DRV5021A3-Q1
fBW
Sensing bandwidth
30
kHz
DRV5021A1-Q1
TA = –40°C to +125°C
TA = –40°C to +150°C
TA = –40°C to +125°C
TA = –40°C to +150°C
TA = –40°C to +125°C
TA = –40°C to +150°C
1.3
1.1
0.2
0.1
0.1
0.1
2.9
2.9
1.8
1.8
1.1
1.1
4.4
4.7
3.0
3.3
2.5
2.8
mT
mT
mT
mT
mT
mT
BOP
Magnetic threshold Operate Point
Magnetic threshold Release Point
BRP
BHYS
Magnetic hysteresis: |BOP – BRP
|
|
BHYS
Magnetic hysteresis: |BOP – BRP
DRV5021A2-Q1
TA = –40°C to +125°C
TA = –40°C to +150°C
TA = –40°C to +125°C
TA = –40°C to +150°C
5.0
4.5
3.2
2.7
9.2
9.2
7.0
7.0
13.0
14.0
10.0
11.0
mT
mT
mT
mT
BOP
Magnetic threshold Operate Point
Magnetic threshold Release Point
BRP
4
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Magnetic Characteristics (continued)
at VCC = 2.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITION
TA = –40°C to +125°C
TA = –40°C to +150°C
MIN
0.9
TYP
2.2
MAX
4.5
UNIT
mT
BHYS
Magnetic hysteresis: |BOP – BRP
|
|
BHYS
Magnetic hysteresis: |BOP – BRP
0.9
2.2
5.0
mT
DRV5021A3-Q1
TA = –40°C to +125°C
TA = –40°C to +150°C
TA = –40°C to +125°C
TA = –40°C to +150°C
TA = –40°C to +125°C
TA = –40°C to +150°C
8.8
7.7
6.2
5.1
1.5
1.3
17.9
17.9
14.1
14.1
3.8
23.4
25.4
18.8
20.8
6.2
mT
mT
mT
mT
mT
mT
BOP
Magnetic threshold Operate Point
Magnetic threshold Release Point
BRP
BHYS
BHYS
Magnetic hysteresis: |BOP – BRP
|
|
Magnetic hysteresis: |BOP – BRP
3.8
6.7
6.7 Typical Characteristics
5
5
4.5
4
BOP
BRP
HYSTERESIS
BOP
BRP
HYSTERESIS
4.5
4
3.5
3
3.5
3
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
0.5
0
-40 -20
0
20
40
60
80 100 120 140
-40 -20
0
20
40
60
80 100 120 140
Temperature (èC)
Temperature (èC)
D001
D002
DRV5021A1-Q1, VCC = 3.3 V
DRV5021A1-Q1, VCC = 5.0 V
图 1. Magnetic Threshold vs Temperature
图 2. Magnetic Threshold vs Temperature
15
14
13
12
11
10
9
15
14
13
12
11
10
9
BOP
BRP
HYSTERESIS
BOP
BRP
HYSTERESIS
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
-40 -20
0
20
40
60
80 100 120 140
-40 -20
0
20
40
60
80 100 120 140
Temperature (èC)
Temperature (èC)
D002
D005
DRV5021A2-Q1, VCC = 3.3 V
图 3. Magnetic Threshold vs Temperature
DRV5021A2-Q1, VCC = 5.0 V
图 4. Magnetic Threshold vs Temperature
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Typical Characteristics (接下页)
30
28
26
24
22
20
18
16
14
12
10
8
30
28
26
24
22
20
18
16
14
12
10
8
BOP
BRP
HYSTERESIS
BOP
BRP
HYSTERESIS
6
6
4
4
2
2
0
0
-40 -20
0
20
40
60
80 100 120 140
-40 -20
0
20
40
60
80 100 120 140
Temperature (èC)
Temperature (èC)
D003
D006
DRV5021A3-Q1, VCC = 3.3 V
图 5. Magnetic Threshold vs Temperature
VCC = 2.5V
DRV5021A3-Q1, VCC = 5.0 V
图 6. Magnetic Threshold vs Temperature
VCC = 2.5V
5
4.5
4
5
4.5
4
VCC = 4.0V
VCC = 5.5V
VCC = 4.0V
VCC = 5.5V
3.5
3
3.5
3
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
0.5
0
-40 -20
0
20
40
60
Temperature (C)
80 100 120 140
-40 -20
0
20
40
60
Temperature (C)
80 100 120 140
D007
D008
DRV5021A1-Q1
DRV5021A2-Q1
图 7. Supply Current vs Temperature
图 8. Supply Current vs Temperature
5
4.5
4
VCC = 2.5V
VCC = 4.0V
VCC = 5.5V
3.5
3
2.5
2
1.5
1
0.5
0
-40 -20
0
20
40
Temperature (C)
60
80 100 120 140
D009
DRV5021A3-Q1
图 9. Supply Current vs Temperature
6
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7 Detailed Description
7.1 Overview
The DRV5021-Q1 device is a spinning-current Hall sensor with a digital output for magnetic-sensing applications.
The DRV5021-Q1 can be powered with a supply voltage between 2.5 V and 5.5 V.
The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic
field. A north pole near the marked side of the package is a negative magnetic field. The output state depends on
the magnetic field perpendicular to the package.
A strong south pole near the marked side of the package causes the output to pull low. A weak south pole, the
absence of a field, or any north pole makes the output high impedance. Hysteresis is included in between the
operate point and the release point to prevent toggling near the magnetic threshold.
An external pullup resistor is required on the OUT pin. The OUT pin can be pulled up to VCC, or to a different
voltage supply. This feature allows for easier interfacing with controller circuits.
7.2 Functional Block Diagram
0.1 ꢀF
(min)
VCC
Voltage
Regulator
Oscillator
OUT
REF
Output
Control
Element Bias
Amp
Offset Cancellation
Temperature
Compensation
GND
7.3 Feature Description
7.3.1 Field Direction Definition
As shown in 图 10, the DRV5021-Q1 is sensitive to the magnetic field component that is perpendicular to the top
of the package.
B
SOT-23
PCB
图 10. Direction of Sensitivity
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Feature Description (接下页)
图 11 shows that a positive magnetic field is defined as a south pole near the marked side of the package.
Positive B
Negative B
N
S
S
N
PCB
PCB
N = North pole, S = South pole
图 11. Field Direction Definition
7.3.2 Device Output
If the device is powered on with a magnetic field strength between BRP and BOP, then the device output is
indeterminate. If the field strength is greater than BOP, then the output is pulled low. If the field strength is less
than BRP, then the output is released.
OUT
Bhys
B (mT)
BRP
BOF
BOP
图 12. Output State
8
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Feature Description (接下页)
7.3.3 Power-On Time
After applying VCC to the DRV5021-Q1, ton must elapse before the OUT pin is valid. In case 1 (图 13) and case 2
(图 14), the output is defined assuming that magnetic field BAPPLIED > BOP, and BAPPLIED < BRP, respectively.
VCC
t (s)
B (mT)
BAPPLIED
BOP
BRP
t (s)
OUT
Valid Output
t (s)
ton
图 13. Case 1: Power On When B > BOP
VCC
t (s)
B (mT)
BOP
BRP
BAPPLIED
t (s)
OUT
Valid Output
t (s)
ton
图 14. Case 2: Power On When B < BRP
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Feature Description (接下页)
If the device is powered on with BRP < BAPPLIED < BOP, then the device output remains in indeterminate state until
the magnetic field changes. After the change in magnetic field results in a condition that meets either BOP
<
BAPPLIED or BRP > BAPPLIED, the output turns to valid state after td time elapses. Case 3 (图 15) and case 4 (图 16)
show examples of this behavior.
VCC
t (s)
B (mT)
BOP
BAPPLIED
BRP
t (s)
OUT
Valid Output
t (s)
td
ton
图 15. Case 3: Power On When BRP < B < BOP, Followed by B > BOP
VCC
t (s)
t (s)
t (s)
B (mT)
BOP
BAPPLIED
BRP
OUT
Valid Output
td
ton
图 16. Case 4: Power On When BRP < B < BOP, Followed by B < BRP
10
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Feature Description (接下页)
7.3.4 Hall Element Location
The sensing element inside the device is in the center of both packages when viewed from the top. 图 17 shows
the tolerances and side-view dimensions.
SOT-23 Top View
133 µm
centered
70 µm
133 µm
SOT-23 Side View
650 µm
80 µm
图 17. Hall Element Location
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Feature Description (接下页)
7.3.5 Propagation Delay
The DRV5021-Q1 samples the Hall element at a nominal sampling period of 16.67 µs to detect the presence of a
magnetic north or south pole. At each sampling point, the device takes the average of the current sampled value
and immediately preceding sampled value of the magnetic field. If this average value crosses the BOP or BRP
threshold, the device output changes according to the transfer function.
图 18 shows the DRV5021-Q1 propagation delay analysis in the proximity of a magnetic south pole. The Hall
element of the DRV5021-Q1 experiences an increasing magnetic field as the magnetic south pole approaches
near the device. At time t2, the average magnetic field is (B2 + B1) / 2, which is less than the BOP threshold of the
device. At time t3, the actual magnetic field has crossed the BOP threshold. However, the average (B3 + B2) / 2 is
still less than the BOP threshold. Thus, the device waits for next sample time, t4, to start the output transition
through the analog signal chain. The propagation delay, td, is measured as the delay from the time the magnetic
field crosses the BOP threshold to the time output transitions.
Magnetic Field
Magnetic
Field Ramp
B6
B5
B4
B3
BOP Threshold
B2
B1
Delay Through
Analog Signal Chain
t5
t6
t1
t2
t3
t4
Time
td
Output
Time
图 18. Propagation Delay
12
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Feature Description (接下页)
7.3.6 Output Stage
The DRV5021-Q1 output stage uses an open-drain NMOS transistor that is rated to sink up to 20 mA of current.
For proper operation, calculate the value of pullup resistor R1 using 公式 1.
V max
V min
ref
ref
Ç R1Ç
20 mA
100 mA
(1)
The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current
is generally better; however, faster transitions and bandwidth require a smaller resistor for faster switching.
In addition, the value of R1 must be > 500 Ω in order to make sure that the output driver can pull the OUT pin
close to GND.
注
Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the
Recommended Operating Conditions.
Vref
R1
OUT
C2
Gate
Drive
GND
ISINK
图 19. Open-Drain Output
Select a value for C2 based on the system bandwidth specifications shown in 公式 2.
1
2 ì ƒBW (Hz) <
2p ì R1ì C2
(2)
Most applications do not require this C2 filtering capacitor.
7.4 Device Functional Modes
The DRV5021-Q1 device is active only when VCC is between 2.5 V and 5.5 V.
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV5021-Q1 device is used in magnetic-field sensing applications.
8.2 Typical Applications
8.2.1 Proximity Sensing Circuit
C2
680 pF
(Optional)
OUT
2
GND
R1
10 kꢀ
3
VCC
VCC
1
C1
0.1 …F
图 20. Proximity Sensing Circuit
8.2.1.1 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 1. Design Parameters
DESIGN PARAMETER
Supply voltage
REFERENCE
VCC
EXAMPLE VALUE
3.2 V to 3.4 V
10 kHz
System bandwidth
ƒBW
8.2.1.2 Detailed Design Procedure
表 2 shows the external components needed to create this design example.
表 2. External Components
COMPONENT
CONNECTED BETWEEN
RECOMMENDED
A 0.1-µF ceramic capacitor rated for VCC
C1
C2
R1
VCC
OUT
OUT
GND
GND
Optional: Place a ceramic capacitor to GND
Requires a pullup resistor
(1)
VCC
(1) Pullup resistor may be connected to a voltage source other than VCC; see the Recommended Operating Conditions for the valid range of
the output pin voltage.
14
版权 © 2019, Texas Instruments Incorporated
DRV5021-Q1
www.ti.com.cn
ZHCSHJ6 –FEBRUARY 2019
8.2.1.2.1 Configuration Example
In a 3.3-V system, 3.2 V ≤ Vref ≤ 3.4 V. Use 公式 3 to calculate the allowable range for R1.
V max
V min
ref
ref
Ç R1Ç
20 mA
100 mA
(3)
For this design example, use 公式 4 to calculate the allowable range of R1.
3.4 V
3.2 V
Ç R1Ç
20 mA
100 mA
(4)
(5)
Therefore:
170 Ω ≤ R1 ≤ 32 kΩ
After finding the allowable range of R1 (公式 5), select a value between 500 Ω and 32 kΩ for R1.
Assuming a system bandwidth of 10 kHz, use 公式 6 to calculate the value of C2.
1
2 ì ƒBW (Hz) <
2p ì R1ì C2
(6)
(7)
For this design example, use 公式 7 to calculate the value of C2.
1
2 ì 10 kHz <
2p ì R1ì C2
An R1 value of 10 kΩ and a C2 value less than 820 pF satisfy the requirement for a 10-kHz system bandwidth.
For R1 = 10 kΩ and C2 = 680 pF, the corner frequency for the low-pass filter is 23.4 kHz.
8.2.1.3 Application Curves
OUT
OUT
R1 = 10-kΩ pullup, C2 = 680 pF
R1 = 10-kΩ pullup resistor, no C2 capacitor
图 22. 10-kHz Switching Magnetic Field
图 21. 10-kHz Switching Magnetic Field
0
-2
-4
-6
-8
-10
-12
-14
100
1000
10000
100000
Frequency (Hz)
D011
R1 = 10-kΩ pullup resistor, C2 = 680 pF
图 23. Low-Pass Filtering
版权 © 2019, Texas Instruments Incorporated
15
DRV5021-Q1
ZHCSHJ6 –FEBRUARY 2019
www.ti.com.cn
8.2.2 Alternative Two-Wire Application
For systems that require a minimal wire count, connect the device output to VCC through a resistor, and sense
the total supplied current near the controller. Use a shunt resistor or other circuitry to sense the current.
R1
+
œ
OUT
VCC
2
1
C1
3
GND
Current
sense
Controller
图 24. 2-Wire Application
表 3. Design Parameters
8.2.2.1 Design Requirements
表 3 lists the related design parameters.
DESIGN PARAMETER
Supply voltage
REFERENCE
VCC
EXAMPLE VALUE
5 V
OUT resistor
R1
1 kΩ
Bypass capacitor
Current when B < BRP
Current when B > BOP
C1
0.1 µF
IRELEASE
IOPERATE
About 2.3 mA
About 7.3 mA
8.2.2.2 Detailed Design Procedure
When the open-drain output of the device is high-impedance, current through the path equals the ICC of the
device (approximately 2.3 mA).
When the output pulls low, a parallel current path is added, equal to VCC / (R1 + rDS(on)). Using 5 V and 1 kΩ, the
parallel current is approximately 5 mA, making the total current approximately 7.3 mA.
Local bypass capacitor C1 must be at least 0.1 µF. Use a larger value capacitor if there is high inductance in the
power line interconnect.
16
版权 © 2019, Texas Instruments Incorporated
DRV5021-Q1
www.ti.com.cn
ZHCSHJ6 –FEBRUARY 2019
9 Power Supply Recommendations
The DRV5021-Q1 device is designed to operate from an input voltage supply (VM) range between 2.5 V and 5.5
V. A 0.1-µF (minimum) ceramic capacitor rated for VCC must be placed as close to the DRV5021-Q1 device as
possible.
10 Layout
10.1 Layout Guidelines
Place the bypass capacitor near the DRV5021-Q1 device for efficient power delivery with minimal inductance.
Place the external pullup resistor near the microcontroller input to provide the most stable voltage at the input.
Alternatively, an integrated pullup resistor within the GPIO of the microcontroller can be used.
Generally, PCB copper planes underneath the DRV5021-Q1 have no effect on magnetic flux, and do not
interfere with device performance because copper is not a ferromagnetic material. However, If nearby system
components contain iron or nickel, they may redirect magnetic flux in unpredictable ways.
10.2 Layout Example
VCC
OUT
GND
图 25. DRV5021-Q1 Layout Example
版权 © 2019, Texas Instruments Incorporated
17
DRV5021-Q1
ZHCSHJ6 –FEBRUARY 2019
www.ti.com.cn
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
请参阅如下相关文档：
•
•
德州仪器 (TI)，《霍尔适配器 EVM 用户指南》
德州仪器 (TI)，《了解和应用霍尔效应传感器数据表应用报告》
11.2 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.6 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
18
版权 © 2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV5021A1EDBZRQ1
DRV5021A2EDBZRQ1
DRV5021A3EDBZRQ1
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
3
3
3
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 150
-40 to 150
-40 to 150
211Z
212Z
213Z
SN
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
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邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
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