DRV5053PAQLPGQ1 [TI]
汽车类、高电压（高达 38V）、线性霍尔效应传感器 | LPG | 3 | -40 to 125;
| 型号： | DRV5053PAQLPGQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车类、高电压（高达 38V）、线性霍尔效应传感器 | LPG | 3 | -40 to 125 传感器 |
| 文件： | 总27页 (文件大小：1012K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DRV5053-Q1
ZHCSDD3 –DECEMBER 2014
DRV5053-Q1 汽车类 模拟双极霍尔效应传感器
1 特性
2 应用
1
•
•
线性输出霍尔传感器
符合汽车应用要求的 AEC-Q100 标准
•
•
•
•
流量计
对接调整
振动校正
减震器控制
–
–
1 级：TA = –40 至 125°C（Q，请见图 17）
0 级：TA = –40 至 150°C（E，请见图 17）
•
•
出色的温度稳定性
温度范围内的灵敏度为 ±10%
高灵敏度选项：
3 说明
–
DRV5053-Q1 器件是一款斩波稳定霍尔 IC，能够在整
个温度范围内提供具有出色灵敏度稳定性和集成保护特
性的磁场感测解决方案。
–
–
–
–
–
–
–11mV/mT（OA，请见图 17）
–23mV/mT (PA)
–45mV/mT (RA)
0V 至 2V 模拟输出可对施加的磁感应强度做出线性响
应，并且能够辨别磁场方向的极性。 反向极性保护高
达 -22V 的宽工作电压范围（2.7V 至 38V）使得此器
件适用于广泛的汽车和消费类应用。
–90mV/mT (VA)
+23mV/mT (CA)
+45mV/mT (EA)
•
支持宽电压范围
针对反向电源情况、负载突降和输出短路或过流提供内
部保护功能。
–
–
2.7V 至 38V
无需外部稳压器
器件信息(1)
•
•
放大的输出级
2.3mA 灌电流，300µA 拉电流
输出电压：0.2V 至 1.8V
B = 0mT，OUT = 1V
器件型号
封装
SOT-23 (3)
SIP (3)
封装尺寸（标称值）
2.92mm × 2.37mm
4.00mm × 3.15mm
–
DRV5053-Q1
–
(1) 要了解所有可用封装，请见数据表末尾的可订购产品附录。
•
•
快速上电：35µs
小型封装尺寸
–
表面贴装 3 引脚小外形尺寸晶体管 (SOT)-23
(DBZ)
–
2.92mm × 2.37mm
插入式 3 引脚系统级封装 (SIP) (LPG)
4.00mm × 3.15mm
保护特性
–
–
•
–
–
–
–
–
反向电源保护（高达 -22V）
支持高达 40V 抛负载
输出短路保护
输出电流限制
电池输出短路保护
4 输出状态
SOT-23
SIP
VOUT (V)
VMAX
VQ
VMIN
B (mT)
BMIN (N)
BMAX (S)
1
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
English Data Sheet: SLIS154
DRV5053-Q1
ZHCSDD3 –DECEMBER 2014
www.ti.com.cn
目录
1
2
3
4
5
6
7
特性.......................................................................... 1
8
9
Detailed Description .............................................. 8
8.1 Overview ................................................................... 8
8.2 Functional Block Diagram ......................................... 8
8.3 Feature Description................................................... 9
8.4 Device Functional Modes........................................ 11
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Applications ................................................ 12
应用.......................................................................... 1
说明.......................................................................... 1
输出状态................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings ............................................................ 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Switching Characteristics.......................................... 5
7.7 Magnetic Characteristics........................................... 5
7.8 Typical Characteristics.............................................. 7
10 Power Supply Recommendations ..................... 14
11 器件和文档支持 ..................................................... 15
11.1 器件支持................................................................ 15
11.2 商标....................................................................... 16
11.3 静电放电警告......................................................... 16
11.4 术语表 ................................................................... 16
12 机械封装和可订购信息 .......................................... 16
5 修订历史记录
日期
修订版本
注释
2014年12月
*
最初发布。
2
Copyright © 2014, Texas Instruments Incorporated
DRV5053-Q1
www.ti.com.cn
ZHCSDD3 –DECEMBER 2014
6 Pin Configuration and Functions
For additional configuration information, see 器件标记 and 机械封装和可订购信息.
3-Pin SOT-23
3-Pin SIP
DBZ Package
(Top View)
LPG Package
(Top View)
OUT
2
1
2
3
3
GND
1
V
CC
VCC
OUT
GND
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DBZ
LPG
GND
3
2
GND
Power
Output
Ground pin
2.7 to 38 V power supply. Bypass this pin to the GND pin with a 0.01-μF (minimum)
ceramic capacitor rated for VCC
Hall sensor analog output. 1 V output corresponds to B = 0 mT
VCC
1
2
1
3
.
OUT
Copyright © 2014, Texas Instruments Incorporated
3
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ZHCSDD3 –DECEMBER 2014
www.ti.com.cn
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VCC
–22(2)
40
V
Power supply voltage
Output pin voltage
Voltage ramp rate (VCC), VCC < 5 V
Voltage ramp rate (VCC), VCC > 5 V
OUT
Unlimited
V/µs
0
2
–0.5
2.5
V
Output pin reverse current during
reverse supply condition
OUT
0
–20
mA
Q, see 图 17
–40
–40
–65
150(3)
175(4)
150
Operating junction temperature, TJ
Tstg
°C
°C
E, see 图 17
Storage temperature range
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Ensured by design. Only tested to –20 V.
(3) Tested in production to TA = 125°C.
(4) Tested in production to TA = 150°C.
7.2 ESD Ratings
VALUE
±2500
±500
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2)
Electrostatic
discharge
V(ESD)
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
38
UNIT
V
VCC
Power supply voltage
2.7
0
VOUT
ISOURCE
ISINK
Output pin voltage (OUT)
Output pin current source (OUT)
Output pin current sink (OUT)
2
V
0
300
2.3
125
150
µA
mA
0
Q, see 图 17
E, see 图 17
–40
–40
Operating ambient
temperature
TA
°C
7.4 Thermal Information
DRV5053-Q1
THERMAL METRIC(1)
DBZ
3 PINS
333.2
99.9
LPG
UNIT
3 PINS
180
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
98.6
66.9
154.9
40
°C/W
Junction-to-top characterization parameter
Junction-to-board characterization parameter
4.9
ψJB
65.2
154.9
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
Copyright © 2014, Texas Instruments Incorporated
DRV5053-Q1
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ZHCSDD3 –DECEMBER 2014
7.5 Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
POWER SUPPLIES (VCC
)
VCC
ICC
ton
VCC operating voltage
2.7
38
V
VCC = 2.7 to 38 V, TA = 25°C
VCC = 2.7 to 38 V, TA = TA, MAX
2.7
3
Operating supply current
Power-on time
mA
µs
(1)
3.6
50
35
PROTECTION CIRCUITS
VCCR
Reverse supply voltage
–22
V
IOCP,SOURCE
IOCP,SINK
Overcurrent protection level
Overcurrent protection level
Sourcing current
Sinking current
300
2.3
µA
mA
(1) TA, MAX is 125°C for Q Grade 1 devices and 150°C for E Grade 0 devices (see 图 17)
7.6 Switching Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
ANALOG OUTPUT (OUT)
td Output delay time
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TA = 25°C
13
25
µs
7.7 Magnetic Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
0.9
TYP
MAX
UNIT(1)
V
VQ
Quiescent output
B = 0 mT
1.02
1.15
ƒBW
Bandwidth(2)
20
kHz
BN
Input-referred noise(3)
Linearity(4)
COUT = 50 pF
–BSAT < B < BSAT
B < –BSAT
0.40
0.58
1%
0.79
0.2
mTpp
Le
VOUT MIN
VOUT MAX
Output saturation voltage (min)
Output saturation voltage (max)
V
V
B > BSAT
1.8
DRV5053OA: –11 mV/mT
S
Sensitivity
VCC = 3.3 V
–17.5
–11
6
–5
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
BSAT
Input saturation field
VCC = 3.3 V
VCC = 3.3 V
73
DRV5053PA: –23 mV/mT
S
Sensitivity
–35
–23
13
–10
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
Input saturation field
BSAT
VCC = 3.3 V
35
(1) 1 mT = 10 Gauss
(2) Bandwidth describes the fastest changing magnetic field that can be detected and translated to the output.
(3) Not tested in production; limits are based on characterization data.
(4) Linearity describes the change in sensitivity across the B-range. The sensitivity near BSAT is typically within 1% of the sensitivity near
B = 0.
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Magnetic Characteristics (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
DRV5053RA: –45 mV/mT
TEST CONDITIONS
MIN
TYP
MAX
UNIT(1)
S
Sensitivity
VCC = 3.3 V
–70
–45
26
–20
–45
35
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
BSAT
Input saturation field
VCC = 3.3 V
VCC = 3.3 V
18
DRV5053VA: –90 mV/mT
S
Sensitivity
–140
–90
52
9
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
BSAT
Input saturation field
VCC = 3.3 V
VCC = 3.3 V
DRV5053CA: 23 mV/mT
S
Sensitivity
10
23
13
35
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
BSAT
Input saturation field
VCC = 3.3 V
VCC = 3.3 V
DRV5053EA: 45 mV/mT
S
Sensitivity
20
45
26
18
70
mV/mT
mVpp
mT
VCC = 3.3 V; ROUT = 10 kΩ;
COUT = 50 pF
VN
Output-referred noise(3)
Input saturation field
BSAT
VCC = 3.3 V
6
Copyright © 2014, Texas Instruments Incorporated
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ZHCSDD3 –DECEMBER 2014
7.8 Typical Characteristics
TA > 125°C data is valid for Grade 0 devices only (E, see 图 17)
3.5
3.5
3
TAꢀ ꢀ±ꢁꢂ&
TA = 25°C
TA = 75°C
TA = 125°C
TA = 150°C
VCC = 3.3 V
VCC = 13.2 V
VCC = 38 V
3
2.5
2
2.5
2
0
10
20
30
40
-50
-25
0
25
50
75
100
125
150
Supply Voltage (V)
Ambient Temperature (°C)
D009
D010
Figure 1. ICC vs VCC
Figure 2. ICC vs Temperature
60
60
DRV5053EA
DRV5053CA
DRV5053EA
40
20
40
20
DRV5053CA
0
DRV5053OA
DRV5053PA
0
DRV5053OA
DRV5053PA
-20
-40
-60
-80
-100
-120
-20
-40
-60
-80
-100
DRV5053RA
DRV5053RA
DRV5053VA
DRV5053VA
0
10
20
30
40
-50
-25
0
25
50
75
100
125
150
Supply Voltage (V)
Ambient Temperature (°C)
D001
D002
TA = 25°C
VCC = 3.3 V
Figure 3. Sensitivity vs VCC
Figure 4. Sensitivity vs Temperature
1.04
1.035
1.03
1.025
1.02
1.015
1.01
1.005
1
1.05
1.045
1.04
TA = 150°C
TA = 125°C
1.035
1.03
TA = 85°C
TA = 25°C
1.025
1.02
1.015
1.01
1.005
1
TAꢀ ꢀ±ꢁꢂ&
0.995
0.995
0
10
20
30
40
-50
-25
0
25
50
75
100
125
150
Supply Voltage (V)
Ambient Temperature (°C)
D003
D004
TA = 25°C
Figure 5. DRV5053-Q1AD, VQ vs VCC
VCC = 3.3 V
Figure 6. DRV5053-Q1AD, BN vs Temperature
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ZHCSDD3 –DECEMBER 2014
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8 Detailed Description
8.1 Overview
The DRV5053-Q1 device is a chopper-stabilized hall sensor with an analog output for magnetic sensing
applications. The DRV5053-Q1 device can be powered with a supply voltage between 2.7 and 38 V, and will
survive –22 V reverse battery conditions continuously. Note that the DRV5053-Q1 device will not be operating
when approximately –22 to 2.4 V is applied to VCC (with respect to GND). In addition, the device can withstand
supply voltages up to 40 V for transient durations.
The output voltage is dependent on the magnetic field perpendicular to the package. The absence of a magnetic
field will result in OUT = 1 V. A magnetic field will cause the output voltage to change linearly with the magnetic
field.
The field polarity is defined as follows: a south pole near the marked side of the package is a positive magnetic
field. A north pole near the marked side of the package is a negative magnetic field.
For devices with a negative sensitivity (that is, DRV5053-Q1RA: –40 mV/mT), a south pole will cause the output
voltage to drop below 1 V, and a north pole will cause the output to rise above 1 V.
For devices with a positive sensitivity (that is, DRV5053-Q1EA: +40 mV/mT), a south pole will cause the output
voltage to rise above 1 V, and a north pole will cause the output to drop below 1 V.
8.2 Functional Block Diagram
2.7 to 38 V
CVCC
VCC
Regulated Supply
Temperature
Compensation
Bias
+
-
OUT
Output
Driver
Hall Element
COUT
(Optional)
ROUT
(Equivalent)
Optional RC Filtering
GND
8
Copyright © 2014, Texas Instruments Incorporated
DRV5053-Q1
www.ti.com.cn
ZHCSDD3 –DECEMBER 2014
8.3 Feature Description
8.3.1 Field Direction Definition
A positive magnetic field is defined as a south pole near the marked side of the package as shown in Figure 7.
SOT-23 (DBZ)
SIP (LPG)
B > 0 mT
B < 0 mT
B > 0 mT
B < 0 mT
N
S
S
N
N
S
S
N
1
2
3
1
2
3
(Bottom view)
N = North pole, S = South pole
Figure 7. Field Direction Definition
8.3.2 Device Output
The DRV5053-Q1 device output is defined below for negative sensitivity (that is, –45 mV/mT, RA) and positive
sensitivity (that is, +45 mV/mT, EA):
V
OUT (V)
VMAX
VQ
VMIN
B (mT)
–BSAT (N)
BSAT (S)
Figure 8. DRV5053-Q1 – Negative Sensitivity
V
OUT (V)
VMAX
VQ
VMIN
B (mT)
–BSAT (N)
BSAT (S)
Figure 9. DRV5053-Q1 – Positive Sensitivity
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ZHCSDD3 –DECEMBER 2014
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Feature Description (continued)
8.3.3 Power-On Time
After applying VCC to the DRV5053-Q1 device, ton must elapse before OUT is valid. Figure 10 shows Case 1 and
Figure 11 shows case 2; the output is defined assuming a negative sensitivity device and a constant magnetic
field –BSAT < B < BSAT
.
Case #1
VCC
t (s)
t (s)
B (mT)
BSAT
-BSAT
OUT
90%
Invalid Output
tON
Valid Output
t (s)
Figure 10. Case 1: Power On When B < 0, North
Case #2
VCC
t (s)
t (s)
B (mT)
BSAT
-BSAT
OUT
Invalid Output
tON
Valid Output
10%
t (s)
Figure 11. Case 2: Power On When B > 0, South
10
Copyright © 2014, Texas Instruments Incorporated
DRV5053-Q1
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ZHCSDD3 –DECEMBER 2014
Feature Description (continued)
8.3.4 Output Stage
The DRV5053-Q1 output stage is capable of up to 300 µA of current source or 2.3 mA sink.
For proper operation, ensure that equivalent output load ROUT > 10 kΩ. In addition, ensure that the load
capacitance COUT < 10 nF.
8.3.5 Protection Circuits
An analog current limit circuit limits the current through the output driver. The driver current will be clamped to
IOCP
8.3.5.1 Overcurrent Protection (OCP)
An analog current-limit circuit limits the current through the FET. The driver current is clamped to IOCP. During
this clamping, the rDS(on) of the output FET is increased from the nominal value.
8.3.5.2 Load Dump Protection
The DRV5053-Q1 device operates at DC VCC conditions up to 38 V nominally, and can additionally withstand
VCC = 40 V. No current-limiting series resistor is required for this protection.
8.3.5.3 Reverse Supply Protection
The DRV5053-Q1 device is protected in the event that the VCC pin and the GND pin are reversed (up to –22 V).
NOTE
In a reverse supply condition, the OUT pin reverse-current must not exceed the ratings
specified in the Absolute Maximum Ratings.
Table 1.
FAULT
CONDITION
ISINK ≥ IOCP
DEVICE
Operating
Operating
Disabled
DESCRIPTION
RECOVERY
FET overload (OCP)
Load Dump
Output current is clamped to IOCP
Device will operate for a transient duration
Device will survive this condition
IO < IOCP
38 V < VCC < 40 V
–22 V < VCC < 0 V
VCC ≤ 38 V
Reverse Supply
VCC ≥ 2.7 V
8.4 Device Functional Modes
The DRV5053-Q1 device is active only when VCC is between 2.7 and 38 V.
When a reverse supply condition exists, the device is inactive.
Copyright © 2014, Texas Instruments Incorporated
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ZHCSDD3 –DECEMBER 2014
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The DRV5053-Q1 device is used in magnetic-field sensing applications.
9.2 Typical Applications
9.2.1 Typical Application With No Filter
OUT
2
3
VCC
VCC
1
C1
0.01 µF
(minimum)
Figure 12. Typical Application Schematic – No Filter
9.2.1.1 Design Requirements
For this design example, use the parameters listed in Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
System bandwidth
ƒBW
15 kHz
9.2.1.2 Detailed Design Procedure
The DRV5053-Q1 has internal filtering that limits the bandwidth to at least 20 kHz. For this application no
external components are required other than the C1 bypass capacitor, which is 0.01 µF minimum. If the analog
output OUT is tied to a microcontroller ADC input, the equivalent load must be R > 10 kΩ and C < 10 nF.
Table 3. External Components
COMPONENT
PIN 1
PIN 2
RECOMMENDED
C1
VCC
GND
A 0.01-µF (minimum) ceramic capacitor rated for VCC
12
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ZHCSDD3 –DECEMBER 2014
9.2.1.3 Application Curve
Figure 13. 10-kHz Switching Magnetic Field
9.2.2 Filtered Typical Application
For lower noise on the analog output OUT, additional RC filtering can be added to further reduce the bandwidth.
C2
1500 pF
OUT
2
R1
10 kΩ
3
VCC
VCC
1
C1
0.01 µF
(minimum)
Figure 14. Filtered Typical Application Schematic
9.2.2.1 Design Requirements
For this design example, use the parameters listed in Table 4 as the input parameters.
Table 4. Design Parameters
DESIGN PARAMETER
REFERENCE
EXAMPLE VALUE
System bandwidth
ƒBW
5 kHz
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9.2.2.2 Detailed Design Procedure
In this example we will add an external RC filter in order to reduce the output bandwidth.
In order to preserve the signal at the frequencies of interest, we will conservatively select a low-pass filter
bandwidth (–3-dB point) at twice the system bandwidth (10 kHz).
1
10 kHz
2p ´ R1 ´ C2
(1)
If we guess R1 = 10 kΩ, then C2 < 1590 pF. So we select C2 = 1500 pF.
9.2.2.3 Application Curves
0
-2
-4
-6
-8
-10
-12
-14
100 200
500 1000 2000 5000 10000
Frequency (Hz)
100000
D011
R1 = 10-kΩ pullup
C2 = 680 pF
Figure 15. 5-kHz Switching Magnetic Field
Figure 16. Low-Pass Filtering
10 Power Supply Recommendations
The DRV5053-Q1 device is designed to operate from an input voltage supply (VM) range between 2.7 and 38 V.
A 0.01-µF (minimum) ceramic capacitor rated for VCC must be placed as close to the DRV5053-Q1 device as
possible.
14
版权 © 2014, Texas Instruments Incorporated
DRV5053-Q1
www.ti.com.cn
ZHCSDD3 –DECEMBER 2014
11 器件和文档支持
11.1 器件支持
11.1.1 器件命名规则
图 17 显示了读取 DRV5053-Q1 器件完整器件名称的图例。
DRV5053
(RA)
(Q)
(DBZ)
(R)
(Q1)
Prefix
AEC-Q100
DRV5053: Analog linear hall sensor
Q1: Automotive qualification
Blank: Non-auto
Sensitivity
Tape and Reel
R: 3000 pcs/reel
T: 250 pcs/reel
M: 1000 pcs/bag (bulk)
Blank: 3000 pcs/box (ammo)
OA: ±11 mV/mT
PA: ±23 mV/mT
RA: ±45 mV/mT
VA: ±90 mV/mT
CA: +23 mV/mT
EA: +45 mV/mT
Package
DBZ: 3-pin SOT (SMT)
LPG: 3-pin SIP (through-hole)
Temperature Range
Q: ±40 to 125°C
E: ±40 to 150°C
图 17. 器件命名规则
11.1.2 器件标记
Marked Side Front
Marked Side
3
1
2
3
1
2
Marked Side
1
2
3
(Bottom view)
图 18. SOT-23 (DBZ) 封装
图 19. SIP (LPG) 封装
表示霍尔效应传感器（未按比例显示）。 霍尔元件置于封装中央位置，容差为 ±100µm。 在 DBZ 封装中，霍尔元件
与封装底部的距离为 0.7mm ± 50µm；在 LPG 封装中，霍尔元件与封装底部的距离为 0.987mm ± 50µm。
版权 © 2014, Texas Instruments Incorporated
15
DRV5053-Q1
ZHCSDD3 –DECEMBER 2014
www.ti.com.cn
11.2 商标
All trademarks are the property of their respective owners.
11.3 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.4 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、首字母缩略词和定义。
12 机械封装和可订购信息
以下页中包括机械封装和可订购信息。 这些信息是针对指定器件可提供的最新数据。 这些数据会在无通知且不对
本文档进行修订的情况下发生改变。 欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
16
版权 © 2014, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV5053CAEDBZRQ1
DRV5053CAEDBZTQ1
DRV5053CAELPGMQ1
DRV5053CAELPGQ1
DRV5053CAQDBZRQ1
DRV5053CAQDBZTQ1
DRV5053CAQLPGMQ1
DRV5053CAQLPGQ1
DRV5053EAEDBZRQ1
DRV5053EAEDBZTQ1
DRV5053EAELPGMQ1
DRV5053EAELPGQ1
DRV5053EAQDBZRQ1
DRV5053EAQDBZTQ1
DRV5053EAQLPGMQ1
DRV5053EAQLPGQ1
DRV5053OAEDBZRQ1
DRV5053OAEDBZTQ1
DRV5053OAELPGMQ1
DRV5053OAELPGQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
TO-92
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3000 RoHS & Green
250 RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 125
-40 to 150
-40 to 150
-40 to 150
-40 to 150
+AJCA
NIPDAUAG
SN
+AJCA
+AJCA
+AJCA
+AKCA
+AKCA
+AKCA
+AKCA
+AJEA
+AJEA
+AJEA
+AJEA
+AKEA
+AKEA
+AKEA
+AKEA
+AJOA
+AJOA
+AJOA
+AJOA
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
TO-92
SN
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV5053OAQDBZRQ1
DRV5053OAQDBZTQ1
DRV5053OAQLPGMQ1
DRV5053OAQLPGQ1
DRV5053PAEDBZRQ1
DRV5053PAEDBZTQ1
DRV5053PAELPGMQ1
DRV5053PAELPGQ1
DRV5053PAQDBZRQ1
DRV5053PAQDBZTQ1
DRV5053PAQLPGMQ1
DRV5053PAQLPGQ1
DRV5053RAEDBZRQ1
DRV5053RAEDBZTQ1
DRV5053RAELPGMQ1
DRV5053RAELPGQ1
DRV5053RAQDBZRQ1
DRV5053RAQDBZTQ1
DRV5053RAQLPGMQ1
DRV5053RAQLPGQ1
DRV5053VAEDBZRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
TO-92
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
DBZ
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3000 RoHS & Green
250 RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 150
-40 to 150
-40 to 150
-40 to 150
-40 to 125
-40 to 125
-40 to 125
+AKOA
NIPDAUAG
SN
+AKOA
+AKOA
+AKOA
+AJPA
+AJPA
+AJPA
+AJPA
+AKPA
+AKPA
+AKPA
+AKPA
+AJRA
+AJRA
+AJRA
+AJRA
+AKRA
+AKRA
+AKRA
+AKRA
+AJVA
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
TO-92
SN
SOT-23
NIPDAUAG
-40 to 150
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV5053VAEDBZTQ1
DRV5053VAELPGMQ1
DRV5053VAELPGQ1
DRV5053VAQDBZRQ1
DRV5053VAQDBZTQ1
DRV5053VAQLPGMQ1
DRV5053VAQLPGQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
TO-92
DBZ
LPG
LPG
DBZ
DBZ
LPG
LPG
3
3
3
3
3
3
3
250
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
-40 to 150
-40 to 150
-40 to 150
-40 to 125
-40 to 125
-40 to 125
-40 to 125
+AJVA
3000 RoHS & Green
1000 RoHS & Green
3000 RoHS & Green
SN
SN
+AJVA
+AJVA
+AKVA
+AKVA
+AKVA
+AKVA
TO-92
SOT-23
SOT-23
TO-92
NIPDAUAG
NIPDAUAG
SN
250
RoHS & Green
3000 RoHS & Green
1000 RoHS & Green
TO-92
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
LPG0003A
TO-92 - 5.05 mm max height
S
C
A
L
E
1
.
3
0
0
TRANSISTOR OUTLINE
4.1
3.9
3.25
3.05
0.55
0.40
3X
5.05
MAX
3
1
3X (0.8)
3X
15.5
15.1
0.48
0.35
0.51
0.36
3X
3X
2X 1.27 0.05
2.64
2.44
2.68
2.28
1.62
1.42
2X (45 )
1
3
2
0.86
0.66
(0.5425)
4221343/C 01/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
LPG0003A
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE
FULL R
TYP
0.05 MAX
ALL AROUND
TYP
(1.07)
METAL
TYP
3X ( 0.75) VIA
2X
METAL
(1.7)
2X (1.7)
2X
SOLDER MASK
OPENING
2
3
1
2X (1.07)
(R0.05) TYP
(1.27)
SOLDER MASK
OPENING
(2.54)
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE:20X
4221343/C 01/2018
www.ti.com
TAPE SPECIFICATIONS
LPG0003A
TO-92 - 5.05 mm max height
TRANSISTOR OUTLINE
0
1
13.0
12.4
0
1
1 MAX
21
18
2.5 MIN
6.5
5.5
9.5
8.5
0.25
0.15
19.0
17.5
3.8-4.2 TYP
0.45
0.35
6.55
6.15
12.9
12.5
4221343/C 01/2018
www.ti.com
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TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
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TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
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