DRV5056Z1QDBZT [TI]

具有模拟输出的比例式单极线性霍尔效应传感器 | DBZ | 3 | -40 to 125;
DRV5056Z1QDBZT
型号: DRV5056Z1QDBZT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有模拟输出的比例式单极线性霍尔效应传感器 | DBZ | 3 | -40 to 125

传感器
文件: 总34页 (文件大小:1077K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
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DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
DRV5056单极比例式线性霍尔效应传感器  
1 特性  
3 说明  
1
单极线性霍尔效应传感器  
DRV5056 器件是一款线性霍尔效应传感器,可按比例  
响应南磁极磁通量密度。该器件可用于进行精确的位置  
检测,应用范围 广泛。  
3.3V 5V 电源供电  
具有 0.6V 静态失调电压的模拟输出:  
可最大限度地提高电压摆幅以实现高精度  
此模拟输出配备特色的单极磁响应,无磁场时可驱动  
0.6V 的电压,存在南磁极时电压会升高。对于感应一  
个磁极 的应用, 此响应可以最大限度提高输出动态范  
围。4 种灵敏度选项可以基于所需的感应范围进一步最  
大限度提高输出摆幅。  
磁性灵敏度选项(VCC = 5V 时):  
A1200mV/mT20mT 范围  
A2100mV/mT39mT 范围  
A350mV/mT79mT 范围  
A425mV/mT158mT 范围  
A6100mV/mT39mT 范围  
该器件由 3.3V 5V 电源供电。它可检测垂直于封装  
顶部的磁通量,两个封装选项提供不同的检测方向。  
20kHz 快速检测带宽  
低噪声输出,具有 ±1mA 的驱动能力  
磁体温度漂移补偿  
该器件使用比例式架构,当外部模数转换器 (ADC) 使  
用相同的 VCC 进行参考时,可以最大限度减小 VCC 容  
差产生的误差。此外,该器件 还具有 磁体温度补偿功  
能,可以抵消磁体漂移,在 的宽温度范围内实现线性  
性能。  
行业标准封装:  
表面贴装 SOT-23  
穿孔 TO-92  
A1 A4 选项支持 –40°C +125°C 的温度范围。A6  
版本支持 0°C 85°C 的温度范围。  
2 应用  
精确位置检测  
器件信息(1)  
工业自动化和机器人  
家用电器  
器件型号  
DRV5056  
封装  
SOT-23 (3)  
TO-92 (3)  
封装尺寸(标称值)  
2.92mm × 1.30mm  
4.00mm × 3.15mm  
游戏手柄、踏板、键盘、触发器  
高度找平、倾斜和重量测量  
流体流速测量  
(1) 如需了解所有可用封装,请参阅数据表末尾的封装选项附录。  
医疗设备  
电流检测  
典型电路原理图  
磁响应  
OUT  
VCC  
Controller  
ADC  
VCC  
VL (MAX)  
DRV5056  
VCC  
OUT  
GND  
0.6 V  
B
0 mT  
south  
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确  
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。  
English Data Sheet: SBAS644  
 
 
 
 
DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
www.ti.com.cn  
目录  
7.4 Device Functional Modes........................................ 13  
Application and Implementation ........................ 14  
8.1 Application Information............................................ 14  
8.2 Typical Application .................................................. 15  
8.3 What to Do and What Not to Do ............................. 17  
Power Supply Recommendations...................... 19  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 3  
6.1 Absolute Maximum Ratings ...................................... 3  
6.2 ESD Ratings.............................................................. 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Electrical Characteristics........................................... 4  
6.6 Magnetic Characteristics........................................... 5  
6.7 Typical Characteristics.............................................. 6  
Detailed Description .............................................. 9  
7.1 Overview ................................................................... 9  
7.2 Functional Block Diagram ......................................... 9  
7.3 Feature Description................................................... 9  
8
9
10 Layout................................................................... 19  
10.1 Layout Guidelines ................................................. 19  
10.2 Layout Examples................................................... 19  
11 器件和文档支持 ..................................................... 20  
11.1 文档支持 ............................................................... 20  
11.2 接收文档更新通知 ................................................. 20  
11.3 社区资源................................................................ 20  
11.4 ....................................................................... 20  
11.5 静电放电警告......................................................... 20  
11.6 术语表 ................................................................... 20  
12 机械、封装和可订购信息....................................... 20  
7
4 修订历史记录  
注:之前版本的页码可能与当前版本有所不同。  
Changes from Original (April 2018) to Revision A  
Page  
已添加 在数据表中添加了新的 A6 磁性灵敏度选项 ................................................................................................................ 1  
2
Copyright © 2018–2019, Texas Instruments Incorporated  
 
DRV5056  
www.ti.com.cn  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
5 Pin Configuration and Functions  
DBZ Package  
3-Pin SOT-23  
Top View  
LPG Package  
3-Pin TO-92  
Top View  
VCC  
1
2
3
GND  
OUT  
1
2
3
VCC GND OUT  
Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
GND  
OUT  
SOT-23  
TO-92  
3
2
2
3
O
Ground reference  
Analog output  
Power supply. TI recommends connecting this pin to a ceramic capacitor to ground  
with a value of at least 0.1 µF.  
VCC  
1
1
6 Specifications  
6.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
MAX  
7
UNIT  
V
Power supply voltage  
VCC  
–0.3  
Output voltage  
OUT  
–0.3  
VCC + 0.3  
V
Magnetic flux density, BMAX  
Operating junction temperature, TJ  
Storage temperature, Tstg  
Unlimited  
–40  
T
150  
150  
°C  
°C  
–65  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
Copyright © 2018–2019, Texas Instruments Incorporated  
3
DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
www.ti.com.cn  
6.2 ESD Ratings  
VALUE  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-  
001(1)  
±2500  
V(ESD)  
Electrostatic discharge  
V
Charged-device model (CDM), per JEDEC specification  
JESD22-C101(2)  
±750  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
MAX  
UNIT  
3
3.6  
5.5  
1
VCC  
Power supply voltage(1)  
V
4.5  
–1  
IO  
Output continuous current  
mA  
°C  
TA  
TA  
A1-A4 versions operating ambient temperature(2)  
A6 version operating ambient temperature(2)  
–40  
0
125  
85  
°C  
(1) There are two isolated operating VCC ranges. For more information see the Operating VCC Ranges section.  
(2) Power dissipation and thermal limits must be observed.  
6.4 Thermal Information  
DRV5056  
SOT-23 (DBZ) TO-92 (LPG)  
THERMAL METRIC(1)  
UNIT  
3 PINS  
170  
66  
3 PINS  
121  
67  
RθJA  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top) Junction-to-case (top) thermal resistance  
RθJB  
YJT  
Junction-to-board thermal resistance  
49  
97  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
1.7  
7.6  
YJB  
48  
97  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
6.5 Electrical Characteristics  
for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS(1)  
MIN  
TYP  
6
MAX  
10  
UNIT  
mA  
µs  
ICC  
tON  
fBW  
td  
Operating supply current  
Power-on time (see 19)  
Sensing bandwidth  
B = 0 mT, no load on OUT  
150  
20  
300  
kHz  
µs  
Propagation delay time  
From change in B to change in OUT  
VCC = 5 V  
10  
130  
215  
0.12  
0.2  
24  
BND  
Input-referred RMS noise density  
Input-referred noise  
nT/Hz  
VCC = 3.3 V  
VCC = 5 V  
BND × 6.6 × 20 kHz  
VCC = 3.3 V  
BN  
mTPP  
DRV5056A1  
DRV5056A2,  
DRV5056A6  
BN × S  
12  
VN  
Output-referred noise(2)  
mVPP  
DRV5056A3  
DRV5056A4  
6
3
(1) B is the applied magnetic flux density.  
(2) VN describes voltage noise on the device output. If the full device bandwidth is not needed, noise can be reduced with an RC filter.  
4
Copyright © 2018–2019, Texas Instruments Incorporated  
 
DRV5056  
www.ti.com.cn  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
6.6 Magnetic Characteristics  
for VCC = 3 V to 3.63 V and 4.5 V to 5.5 V, over operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS(1)  
MIN  
TYP  
MAX  
UNIT  
DRV5056A1  
0.535  
0.6  
0.665  
DRV5056A2,  
B = 0 mT, TA = 25°C DRV5056A6  
0.54  
0.55  
0.6  
0.6  
0.66  
0.65  
VQ  
Quiescent voltage  
V
DRV5056A3,  
DRV5056A4  
B = 0 mT,  
TA = –40°C to 125°C  
versus 25°C  
VCC = 5 V  
0.08  
0.04  
VQΔT  
Quiescent voltage temperature drift  
Quiescent voltage lifetime drift  
V
VCC = 3.3 V  
High-temperature operating stress for  
1000 hours  
VQΔL  
< 0.5%  
200  
DRV5056A1  
190  
95  
210  
105  
DRV5056A2,  
DRV5056A6  
100  
VCC = 5 V,  
TA = 25°C  
DRV5056A3  
47.5  
23.8  
114  
50  
25  
52.5  
26.2  
126  
DRV5056A4  
DRV5056A1  
DRV5056A2,  
S
Sensitivity  
mV/mT  
120  
57  
60  
63  
VCC = 3.3 V,  
DRV5056A6  
TA = 25°C  
DRV5056A3  
28.5  
14.3  
20  
30  
15  
31.5  
15.8  
DRV5056A4  
DRV5056A1  
DRV5056A2,  
39  
VCC = 5 V,  
TA = 25°C  
DRV5056A6  
DRV5056A3  
79  
158  
19  
DRV5056A4  
DRV5056A1  
DRV5056A2,  
BL  
Linear magnetic sensing range(2)  
mT  
39  
VCC = 3.3 V,  
DRV5056A6  
TA = 25°C  
DRV5056A3  
78  
155  
VQ  
DRV5056A4  
VL  
Linear range of output voltage(3)  
VCC – 0.2  
0.19  
V
Sensitivity temperature  
STC  
DRV5056A6  
0.05  
0.12  
%/°C  
compensation for magnets(4)  
Sensitivity temperature  
DRV5056A1, DRV5056A2, DRV5056A3,  
DRV5056A4  
STC  
SLE  
SRE  
0.12  
±1%  
%/°C  
compensation for magnets(4)  
Sensitivity linearity error(3)  
VOUT is within VL  
TA = 25°C,  
with respect to VCC = 3.3 V or 5 V  
Sensitivity ratiometry error(5)  
-2.5%  
2.5%  
High-temperature operating stress for  
1000 hours  
SΔL  
Sensitivity lifetime drift  
< 0.5%  
(1) B is the applied magnetic flux density.  
(2) BL describes the minimum linear sensing range at 25°C taking into account the maximum VQ and Sensitivity tolerances.  
(3) See the Sensitivity Linearity section.  
(4) STC describes the rate the device increases Sensitivity with temperature. For more information, see the Sensitivity Temperature  
Compensation For Magnets section.  
(5) See the Ratiometric Architecture section.  
版权 © 2018–2019, Texas Instruments Incorporated  
5
DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
www.ti.com.cn  
6.7 Typical Characteristics  
at TA = 25°C (unless otherwise noted)  
655  
650  
645  
640  
635  
630  
625  
620  
615  
610  
640  
638  
636  
634  
632  
630  
628  
626  
624  
622  
620  
618  
616  
VCC = 3.3 V  
VCC = 5 V  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
3
3.25 3.5 3.75  
4
4.25 4.5 4.75  
5
5.25 5.5  
Temperature (èC)  
Supply Voltage (V)  
D002  
D003  
1. Quiescent Voltage vs Temperature  
2. Quiescent Voltage vs Supply Voltage  
140  
130  
120  
110  
100  
90  
250  
200  
150  
100  
50  
A1  
A2  
A3  
A4  
A1  
A2  
A3  
A4  
80  
70  
60  
50  
40  
30  
20  
10  
0
3
3.1  
3.2  
3.3  
3.4  
3.5  
3.6  
4.5 4.6 4.7 4.8 4.9  
5
5.1 5.2 5.3 5.4 5.5  
Supply Voltage (V)  
D006  
D007  
VCC = 3.3 V  
VCC = 5 V  
4. Sensitivity vs Supply Voltage  
3. Sensitivity vs Supply Voltage  
7
150  
145  
140  
135  
130  
125  
120  
115  
110  
105  
100  
6.75  
6.5  
6.25  
6
5.75  
5.5  
5.25  
5
+3STD  
AVG  
-3STD  
VCC = 3.3 V  
VCC = 5 V  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
Temperature (èC)  
Temperature (èC)  
D001  
D008  
DRV5056A1, VCC = 3.3 V  
5. Supply Current vs Temperature  
6. Sensitivity vs Temperature  
6
版权 © 2018–2019, Texas Instruments Incorporated  
DRV5056  
www.ti.com.cn  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
Typical Characteristics (接下页)  
at TA = 25°C (unless otherwise noted)  
260  
80  
75  
70  
65  
60  
55  
50  
240  
220  
200  
180  
160  
+3STD  
AVG  
-3STD  
+3STD  
AVG  
-3STD  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
Temperature (èC)  
Temperature (èC)  
D009  
D010  
DRV5056A1, VCC = 5.0 V  
DRV5056A2, VCC = 3.3 V  
8. Sensitivity vs Temperature  
7. Sensitivity vs Temperature  
120  
39  
37  
35  
33  
31  
29  
27  
25  
115  
110  
105  
100  
95  
90  
+3STD  
AVG  
-3STD  
+3STD  
AVG  
-3STD  
85  
80  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
Temperature (èC)  
Temperature (èC)  
D011  
D012  
DRV5056A2, VCC = 5.0 V  
DRV5056A3, VCC = 3.3 V  
10. Sensitivity vs Temperature  
9. Sensitivity vs Temperature  
60  
55  
50  
45  
40  
19  
18  
17  
16  
15  
14  
13  
12  
+3STD  
AVG  
-3STD  
+3STD  
AVG  
-3STD  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
Temperature (èC)  
Temperature (èC)  
D013  
D014  
DRV5056A3, VCC = 5.0 V  
11. Sensitivity vs Temperature  
DRV5056A4, VCC = 3.3 V  
12. Sensitivity vs Temperature  
版权 © 2018–2019, Texas Instruments Incorporated  
7
DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
www.ti.com.cn  
Typical Characteristics (接下页)  
at TA = 25°C (unless otherwise noted)  
30  
80  
75  
70  
65  
60  
55  
50  
28  
26  
24  
22  
20  
+3STD  
AVG  
-3STD  
-3STD  
AVG  
+3STD  
-40 -20  
0
20  
40  
60  
80 100 120 140 160  
0
10  
20  
30  
40  
50  
60  
70  
80 85  
Temperature (èC)  
Temperature (C)  
D015  
D016  
DRV5056A4, VCC = 5.0 V  
DRV5056A6, VCC = 3.3 V  
13. Sensitivity vs Temperature  
14. Sensitivity vs Temperature  
120  
115  
110  
105  
100  
95  
90  
-3STD  
AVG  
85  
+3STD  
80  
0
10  
20  
30  
40  
50  
60  
70  
80 85  
Temperature (C)  
D017  
DRV5056A6, VCC = 5.0 V  
15. Sensitivity vs Temperature  
8
版权 © 2018–2019, Texas Instruments Incorporated  
DRV5056  
www.ti.com.cn  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
7 Detailed Description  
7.1 Overview  
The DRV5056 is a 3-pin linear Hall effect sensor with fully integrated signal conditioning, temperature  
compensation circuits, mechanical stress cancellation, and amplifiers. The device operates from 3.3-V and 5-V  
(±10%) power supplies, measures magnetic flux density, and outputs a proportional analog voltage that is  
referenced to VCC  
.
7.2 Functional Block Diagram  
VCC  
Element Bias  
Band-Gap  
Reference  
Offset  
Cancellation  
0.1 F  
Trim  
Registers  
GND  
Temperature  
Compensation  
VCC  
Optional Filter  
OUT  
Precision  
Amplifier  
Output  
Driver  
7.3 Feature Description  
7.3.1 Magnetic Flux Direction  
As shown in 16, the DRV5056 is sensitive to the magnetic field component that is perpendicular to the die  
inside the package.  
TO-92  
B
B
SOT-23  
PCB  
16. Direction of Sensitivity  
版权 © 2018–2019, Texas Instruments Incorporated  
9
 
 
DRV5056  
ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
www.ti.com.cn  
Feature Description (接下页)  
Magnetic flux that travels from the bottom to the top of the package is considered positive. This condition exists  
when a south magnetic pole is near the top (marked-side) of the package. Magnetic flux that travels from the top  
to the bottom of the package results in negative millitesla values.  
N
S
S
N
PCB  
PCB  
17. The Flux Direction for Positive B  
7.3.2 Magnetic Response  
The DRV5056 outputs an analog voltage according to 公式 1 when in the presence of a magnetic field:  
VOUT = VQ + B × Sensitivity(25°C) × (1 + STC × (TA œ 25°C))  
(
)
where  
VQ is typically 600 mV  
B is the applied magnetic flux density  
Sensitivity(25°C) depends on the device option and VCC  
STC is typically 0.12%/°C  
TA is the ambient temperature  
VOUT is within the VL range  
(1)  
As an example, consider the DRV5056A3 with VCC = 3.3 V, a temperature of 50°C, and 67 mT applied.  
Excluding tolerances, VOUT = 600 mV + 67 mT × (30 mV/mT × [1 + 0.0012/°C × (50°C – 25°C)]) = 2.67 V.  
The DRV5056 only responds to the flux density of a magnetic south pole.  
10  
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DRV5056  
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ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
Feature Description (接下页)  
7.3.3 Sensitivity Linearity  
The device produces a linear response when the output voltage is within the specified VL range. Outside this  
range, sensitivity is reduced and nonlinear. 18 graphs the magnetic response.  
OUT  
VCC  
VL (MAX)  
0.6 V  
B
0 mT  
south  
18. Magnetic Response  
公式 2 calculates parameter BL, the minimum linear sensing range at 25°C taking into account the maximum  
quiescent voltage and sensitivity tolerances.  
VL(MAX) œ VQ(MAX)  
BL(MIN)  
=
S(MAX)  
(2)  
The parameter SLE defines linearity error as the difference in sensitivity between any two positive B values when  
the output is within the VL range.  
7.3.4 Ratiometric Architecture  
The DRV5056 has a ratiometric analog architecture that scales the sensitivity linearly with the power-supply  
voltage. For example, the sensitivity is 5% higher when VCC = 5.25 V compared to VCC = 5 V. This behavior  
enables external ADCs to digitize a more consistent value regardless of the power-supply voltage tolerance,  
when the ADC uses VCC as its reference.  
公式 3 calculates sensitivity ratiometry error:  
S(VCC) / S(5V)  
S(VCC) / S(3.3V)  
VCC / 3.3V  
SRE = 1 t  
for VCC = 4.5 V to 5.5 V,  
SRE = 1 t  
for VCC = 3 V to 3.6 V  
VCC / 5V  
where  
S(VCC) is the sensitivity at the current VCC voltage  
S(5V) or S(3.3V) is the sensitivity when VCC = 5 V or 3.3 V  
VCC is the current VCC voltage  
(3)  
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Feature Description (接下页)  
7.3.5 Operating VCC Ranges  
The DRV5056 has two recommended operating VCC ranges: 3 V to 3.6 V and 4.5 V to 5.5 V. When VCC is in the  
middle region between 3.6 V to 4.5 V, the device continues to function, but sensitivity is less known because  
there is a crossover threshold near 4 V that adjusts device characteristics.  
7.3.6 Sensitivity Temperature Compensation For Magnets  
Magnets generally produce weaker fields as temperature increases. The DRV5056 compensates by increasing  
sensitivity with temperature, as defined by the parameter STC. The sensitivity at TA = 125°C is typically 12%  
higher than at TA = 25°C.  
7.3.7 Power-On Time  
After the VCC voltage is applied, the DRV5056 requires a short initialization time before the output is set. The  
parameter tON describes the time from when VCC crosses 3 V until OUT is within 5% of VQ, with 0 mT applied  
and no load attached to OUT. 19 shows this timing diagram.  
VCC  
3 V  
tON  
time  
Output  
95% × VQ  
Invalid  
time  
19. tON Definition  
12  
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Feature Description (接下页)  
7.3.8 Hall Element Location  
20 shows the location of the sensing element inside each package option.  
SOT-23  
Top View  
SOT-23  
Side View  
centered  
±50 µm  
650 µm  
±80 µm  
TO-92  
Top View  
2 mm  
2 mm  
TO-92  
Side View  
1.54 mm  
1.61 mm  
±50 µm  
1030 µm  
±115 µm  
20. Hall Element Location  
7.4 Device Functional Modes  
The DRV5056 has one mode of operation that applies when the Recommended Operating Conditions are met.  
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8 Application and Implementation  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
8.1.1 Selecting the Sensitivity Option  
Select the highest DRV5056 sensitivity option that can measure the required range of magnetic flux density, so  
that the output voltage swing is maximized.  
Larger magnets and greater sensing distances can generally enable better positional accuracy than very small  
magnets at close distances, because magnetic flux density increases exponentially with the proximity to a  
magnet.  
8.1.2 Temperature Compensation for Magnets  
The DRV5056 temperature compensation is designed to directly compensate the average drift of neodymium  
(NdFeB) magnets and partially compensate ferrite magnets. The residual flux density (Br) of a magnet typically  
reduces by 0.12%/°C for NdFeB, and 0.20%/°C for ferrite. When the operating temperature range of a system is  
reduced, temperature drift errors are also reduced.  
8.1.3 Adding a Low-Pass Filter  
As illustrated in the Functional Block Diagram, an RC low-pass filter can be added to the device output for the  
purpose of minimizing voltage noise when the full 20-kHz bandwidth is not needed. This filter can improve the  
signal-to-noise ratio (SNR) and overall accuracy. Do not connect a capacitor directly to the device output without  
a resistor in between because doing so can make the output unstable.  
8.1.4 Designing for Wire Break Detection  
Some systems must detect if interconnect wires become open or shorted. The DRV5056 can support this  
function.  
First, select a sensitivity option that causes the output voltage to stay within the VL range during normal  
operation. Second, add a pullup resistor between OUT and VCC. TI recommends a value between 20 kΩ to  
100 kΩ, and the current through OUT must not exceed the IO specification, including current going into an  
external ADC. Then, if the output voltage is ever measured to be within 150 mV of VCC or GND, a fault condition  
exists. 21 shows the circuit, and 1 describes fault scenarios.  
PCB  
DRV5056  
VCC  
VCC  
OUT  
Cable  
VOUT  
GND  
21. Wire Fault Detection Circuit  
14  
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ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
1. Fault Scenarios and the Resulting VOUT  
FAULT SCENARIO  
VCC disconnects  
VOUT  
Close to GND  
Close to VCC  
Close to VCC  
Close to GND  
GND disconnects  
VCC shorts to OUT  
GND shorts to OUT  
8.2 Typical Application  
Mechanical Component  
S
PCB  
22. Unipolar Sensing Application  
8.2.1 Design Requirements  
Use the parameters listed in 2 for this design example.  
2. Design Parameters  
DESIGN PARAMETER  
EXAMPLE VALUE  
VCC  
3.3 V  
10-mm diameter × 6-mm long cylinder,  
ferrite  
Magnet  
Distance from magnet to sensor  
Maximum B at the sensor at 25°C  
Device option  
From 20 mm to 3 mm  
72 mT at 3 mm  
DRV5056A3-Q1  
8.2.2 Detailed Design Procedure  
This design example consists of a mechanical component that moves back and forth, an embedded magnet with  
the south pole facing the printed-circuit board, and a DRV5056. The DRV5056 outputs an analog voltage that  
describes the precise position of the component. The component must not contain ferromagnetic materials such  
as iron, nickel, and cobalt because these materials change the magnetic flux density at the sensor.  
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When designing a linear magnetic sensing system, always consider these three variables: the magnet, sensing  
distance, and range of the sensor. Select the DRV5056 with the highest sensitivity that has a BL (linear magnetic  
sensing range) that is larger than the maximum magnetic flux density in the application.  
Magnets are made from various ferromagnetic materials that have tradeoffs in cost, drift with temperature,  
absolute maximum temperature ratings, remanence or residual induction (Br), and coercivity (Hc). The Br and the  
dimensions of a magnet determine the magnetic flux density (B) produced in 3-dimensional space. For simple  
magnet shapes, such as rectangular blocks and cylinders, there are simple equations that solve B at a given  
distance centered with the magnet. 23 shows diagrams for 公式 4 and 公式 5.  
Thickness  
Thickness  
Width  
Distance  
Distance  
Diameter  
S
N
Length  
S
N
B
B
23. Rectangular Block and Cylinder Magnets  
Use 公式 4 for the rectangular block shown in 23:  
Br  
WL  
WL  
2(D + T) 4(D + T)2 + W2 + L2  
B =  
arctan  
œ arctan  
Œ ( (  
) (  
))  
2D 4D2 + W2 + L2  
(4)  
Use 公式 5 for the cylinder shown in 23:  
Br  
2
D + T  
(0.5C)2 + (D + T)2  
D
B =  
œ
(
)
(0.5C)2 + D2  
where  
W is width  
L is length  
T is thickness (the direction of magnetization)  
D is distance  
C is diameter  
(5)  
16  
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8.2.3 Application Curve  
24 shows the magnetic flux density versus distance for a 10-mm × 6-mm cylinder ferrite magnet.  
80  
70  
60  
50  
40  
30  
20  
10  
0
3
6
9
12  
15  
18  
21  
Distance (mm)  
D001  
24. Magnetic Profile of a 10-mm × 6-mm Cylindrical Ferrite Magnet  
8.3 What to Do and What Not to Do  
Because the Hall element is sensitive to magnetic fields that are perpendicular to the top of the package, a  
correct magnet approach must be used for the sensor to detect the field. 25 illustrates correct and incorrect  
approaches.  
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What to Do and What Not to Do (接下页)  
CORRECT  
N
S
S
N
N
S
INCORRECT  
N
S
25. Correct and Incorrect Magnet Approaches  
18  
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DRV5056  
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ZHCSI41A APRIL 2018REVISED FEBRUARY 2019  
9 Power Supply Recommendations  
A decoupling capacitor close to the device must be used to provide local energy with minimal inductance. TI  
recommends using a ceramic capacitor with a value of at least 0.01 µF.  
10 Layout  
10.1 Layout Guidelines  
Magnetic fields pass through most nonferromagnetic materials with no significant disturbance. Embedding Hall  
effect sensors within plastic or aluminum enclosures and sensing magnets on the outside is common practice.  
Magnetic fields also easily pass through most printed-circuit boards, which makes placing the magnet on the  
opposite side possible.  
10.2 Layout Examples  
VCC  
GND  
VCC  
GND  
OUT  
OUT  
26. Layout Examples  
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11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档  
请参阅如下相关文档:  
德州仪器 (TI)《增量旋转编码器设计注意事项》应用手册  
德州仪器 (TI)《利用线性霍尔效应传感器测量角度》应用手册  
德州仪器 (TI)《使用线性霍尔效应传感器的角度测量》  
11.2 接收文档更新通知  
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产  
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。  
11.3 社区资源  
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商按照原样提供。这些内容并不构成 TI 技术规范,  
并且不一定反映 TI 的观点;请参阅 TI 《使用条款》。  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.4 商标  
E2E is a trademark of Texas Instruments.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可  
能会损坏集成电路。  
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可  
能会导致器件与其发布的规格不相符。  
11.6 术语表  
SLYZ022 TI 术语表。  
这份术语表列出并解释术语、缩写和定义。  
12 机械、封装和可订购信息  
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且  
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。  
20  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
DRV5056A1QDBZR  
DRV5056A1QDBZT  
DRV5056A1QLPG  
DRV5056A1QLPGM  
DRV5056A2QDBZR  
DRV5056A2QDBZT  
DRV5056A2QLPG  
DRV5056A2QLPGM  
DRV5056A3QDBZR  
DRV5056A3QDBZT  
DRV5056A3QLPG  
DRV5056A3QLPGM  
DRV5056A4QDBZR  
DRV5056A4QDBZT  
DRV5056A4QLPG  
DRV5056A4QLPGM  
DRV5056A6QDBZR  
DRV5056A6QDBZT  
DRV5056Z1QDBZR  
DRV5056Z1QDBZT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
TO-92  
DBZ  
DBZ  
LPG  
LPG  
DBZ  
DBZ  
LPG  
LPG  
DBZ  
DBZ  
LPG  
LPG  
DBZ  
DBZ  
LPG  
LPG  
DBZ  
DBZ  
DBZ  
DBZ  
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3000 RoHS & Green  
250 RoHS & Green  
SN  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
N / A for Pkg Type  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
56A1  
56A1  
56A1  
56A1  
56A2  
56A2  
56A2  
56A2  
56A3  
56A3  
56A3  
56A3  
56A4  
56A4  
56A4  
56A4  
56A6  
56A6  
56Z1  
56Z1  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
SN  
1000 RoHS & Green  
3000 RoHS & Green  
3000 RoHS & Green  
TO-92  
N / A for Pkg Type  
SOT-23  
SOT-23  
TO-92  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
N / A for Pkg Type  
250  
RoHS & Green  
1000 RoHS & Green  
3000 RoHS & Green  
3000 RoHS & Green  
TO-92  
N / A for Pkg Type  
SOT-23  
SOT-23  
TO-92  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
N / A for Pkg Type  
250  
RoHS & Green  
1000 RoHS & Green  
3000 RoHS & Green  
3000 RoHS & Green  
TO-92  
N / A for Pkg Type  
SOT-23  
SOT-23  
TO-92  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
N / A for Pkg Type  
250  
RoHS & Green  
1000 RoHS & Green  
3000 RoHS & Green  
3000 RoHS & Green  
TO-92  
N / A for Pkg Type  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
250  
RoHS & Green  
3000 RoHS & Green  
250  
RoHS & Green  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
DRV5056Z2QDBZR  
DRV5056Z2QDBZT  
DRV5056Z3QDBZR  
DRV5056Z3QDBZT  
DRV5056Z4QDBZR  
DRV5056Z4QDBZT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
3
3
3
3
3
3
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
SN  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
56Z2  
56Z2  
56Z3  
56Z3  
56Z4  
56Z4  
SN  
SN  
SN  
SN  
SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
25-Sep-2022  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
K0  
P1  
W
B0  
Reel  
Diameter  
Cavity  
A0  
A0 Dimension designed to accommodate the component width  
B0 Dimension designed to accommodate the component length  
K0 Dimension designed to accommodate the component thickness  
Overall width of the carrier tape  
W
P1 Pitch between successive cavity centers  
Reel Width (W1)  
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE  
Sprocket Holes  
Q1 Q2  
Q3 Q4  
Q1 Q2  
Q3 Q4  
User Direction of Feed  
Pocket Quadrants  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
DRV5056A1QDBZR  
DRV5056A1QDBZT  
DRV5056A2QDBZR  
DRV5056A2QDBZT  
DRV5056A3QDBZR  
DRV5056A3QDBZT  
DRV5056A4QDBZR  
DRV5056A4QDBZT  
DRV5056A6QDBZR  
DRV5056A6QDBZR  
DRV5056A6QDBZT  
DRV5056Z1QDBZR  
DRV5056Z1QDBZT  
DRV5056Z2QDBZR  
DRV5056Z2QDBZT  
DRV5056Z3QDBZR  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3000  
250  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
178.0  
180.0  
180.0  
180.0  
180.0  
180.0  
180.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
9.0  
8.4  
8.4  
8.4  
8.4  
8.4  
8.4  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
3.15  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
2.77  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
1.22  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
3000  
250  
3000  
250  
3000  
250  
3000  
3000  
250  
3000  
250  
3000  
250  
3000  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
25-Sep-2022  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
DRV5056Z3QDBZT  
DRV5056Z4QDBZR  
DRV5056Z4QDBZT  
SOT-23  
SOT-23  
SOT-23  
DBZ  
DBZ  
DBZ  
3
3
3
250  
3000  
250  
180.0  
180.0  
180.0  
8.4  
8.4  
8.4  
3.15  
3.15  
3.15  
2.77  
2.77  
2.77  
1.22  
1.22  
1.22  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
25-Sep-2022  
TAPE AND REEL BOX DIMENSIONS  
Width (mm)  
H
W
L
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
DRV5056A1QDBZR  
DRV5056A1QDBZT  
DRV5056A2QDBZR  
DRV5056A2QDBZT  
DRV5056A3QDBZR  
DRV5056A3QDBZT  
DRV5056A4QDBZR  
DRV5056A4QDBZT  
DRV5056A6QDBZR  
DRV5056A6QDBZR  
DRV5056A6QDBZT  
DRV5056Z1QDBZR  
DRV5056Z1QDBZT  
DRV5056Z2QDBZR  
DRV5056Z2QDBZT  
DRV5056Z3QDBZR  
DRV5056Z3QDBZT  
DRV5056Z4QDBZR  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
DBZ  
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3000  
250  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
180.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
213.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
180.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
191.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
18.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
35.0  
3000  
250  
3000  
250  
3000  
250  
3000  
3000  
250  
3000  
250  
3000  
250  
3000  
250  
3000  
Pack Materials-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
25-Sep-2022  
Device  
DRV5056Z4QDBZT  
Package Type Package Drawing Pins  
SOT-23 DBZ  
SPQ  
Length (mm) Width (mm) Height (mm)  
213.0 191.0 35.0  
3
250  
Pack Materials-Page 4  
PACKAGE OUTLINE  
LPG0003A  
TO-92 - 5.05 mm max height  
S
C
A
L
E
1
.
3
0
0
TRANSISTOR OUTLINE  
4.1  
3.9  
3.25  
3.05  
0.55  
0.40  
3X  
5.05  
MAX  
3
1
3X (0.8)  
3X  
15.5  
15.1  
0.48  
0.35  
0.51  
0.36  
3X  
3X  
2X 1.27 0.05  
2.64  
2.44  
2.68  
2.28  
1.62  
1.42  
2X (45 )  
1
3
2
0.86  
0.66  
(0.5425)  
4221343/C 01/2018  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
LPG0003A  
TO-92 - 5.05 mm max height  
TRANSISTOR OUTLINE  
FULL R  
TYP  
0.05 MAX  
ALL AROUND  
TYP  
(1.07)  
METAL  
TYP  
3X ( 0.75) VIA  
2X  
METAL  
(1.7)  
2X (1.7)  
2X  
SOLDER MASK  
OPENING  
2
3
1
2X (1.07)  
(R0.05) TYP  
(1.27)  
SOLDER MASK  
OPENING  
(2.54)  
LAND PATTERN EXAMPLE  
NON-SOLDER MASK DEFINED  
SCALE:20X  
4221343/C 01/2018  
www.ti.com  
TAPE SPECIFICATIONS  
LPG0003A  
TO-92 - 5.05 mm max height  
TRANSISTOR OUTLINE  
0
1
13.0  
12.4  
0
1
1 MAX  
21  
18  
2.5 MIN  
6.5  
5.5  
9.5  
8.5  
0.25  
0.15  
19.0  
17.5  
3.8-4.2 TYP  
0.45  
0.35  
6.55  
6.15  
12.9  
12.5  
4221343/C 01/2018  
www.ti.com  
PACKAGE OUTLINE  
DBZ0003A  
SOT-23 - 1.12 mm max height  
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR  
C
2.64  
2.10  
1.12 MAX  
1.4  
1.2  
B
A
0.1 C  
PIN 1  
INDEX AREA  
1
0.95  
(0.125)  
3.04  
2.80  
1.9  
3
(0.15)  
NOTE 4  
2
0.5  
0.3  
3X  
0.10  
0.01  
(0.95)  
TYP  
0.2  
C A B  
0.25  
GAGE PLANE  
0.20  
0.08  
TYP  
0.6  
0.2  
TYP  
SEATING PLANE  
0 -8 TYP  
4214838/D 03/2023  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. Reference JEDEC registration TO-236, except minimum foot length.  
4. Support pin may differ or may not be present.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DBZ0003A  
SOT-23 - 1.12 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
3X (1.3)  
1
3X (0.6)  
SYMM  
3
2X (0.95)  
2
(R0.05) TYP  
(2.1)  
LAND PATTERN EXAMPLE  
SCALE:15X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
0.07 MIN  
ALL AROUND  
0.07 MAX  
ALL AROUND  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4214838/D 03/2023  
NOTES: (continued)  
4. Publication IPC-7351 may have alternate designs.  
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DBZ0003A  
SOT-23 - 1.12 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
3X (1.3)  
1
3X (0.6)  
SYMM  
3
2X(0.95)  
2
(R0.05) TYP  
(2.1)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 THICK STENCIL  
SCALE:15X  
4214838/D 03/2023  
NOTES: (continued)  
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
7. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
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这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
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