DRV8871DDAR [TI]
具有集成电流检测功能的 50V、3.6A H 桥电机驱动器 | DDA | 8 | -40 to 125;
| 型号： | DRV8871DDAR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有集成电流检测功能的 50V、3.6A H 桥电机驱动器 | DDA | 8 | -40 to 125 电动机控制 电机 驱动 光电二极管 驱动器 |
| 文件： | 总27页 (文件大小：2144K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
具有内部电流感测功能的 DRV8871 3.6A 刷式直流电机驱动器（PWM 控
制）
1 特性
3 说明
1
•
H 桥电机驱动器
DRV8871 器件是一款刷式直流电机驱动器，适用于打
印机、电器、工业设备以及其他小型机器。两个逻辑输
入控制 H 桥驱动器，该驱动器由四个 N 沟道金属氧化
物半导体场效应晶体管 (MOSFET) 组成，能够以高达
3.6A 的峰值电流双向控制电机。利用电流衰减模式，
可通过对输入进行脉宽调制 (PWM) 来控制电机转速。
如果将两个输入均置为低电平，则电机驱动器将进入低
功耗休眠模式。
–
驱动一个直流电机、一个步进电机的绕组或其他
负载
•
•
•
•
•
•
•
6.5V 至 45V 宽工作电压范围
565mΩ（典型值）RDS(on) (HS + LS)
3.6A 峰值电流驱动能力
PWM 控制接口
无需感测电阻即可实现电流调节
低功耗休眠模式
DRV8871 器件具有高级电流调节电路，该电路不使用
模拟电压基准或外部感应电阻器。这种新型解决方案采
用标准的低成本、低功耗电阻来设置电流阈值。该器件
能够将电流限制在某一已知水平，这可显著降低系统功
耗要求，并且无需大容量电容来维持稳定电压，尤其是
在电机启动和停转时。
小型封装尺寸
–
–
8 引脚 HSOP 封装，带有 PowerPAD™
4.9mm × 6mm
•
集成保护 特性
–
–
–
–
VM 欠压闭锁 (UVLO)
过流保护 (OCP)
热关断 (TSD)
该器件针对故障和短路问题提供了全面保护，包括欠压
锁定 (UVLO)、过流保护 (OCP) 和过热保护 (TSD)。
故障排除后，器件会自动恢复正常工作。
自动故障恢复
2 应用
器件信息 (1)
•
•
•
•
打印机
部件号
DRV8871
封装
HSOP (8)
封装尺寸（标称值）
电器
4.90mm × 6.00mm
工业设备
其他机电 应用
(1) 要了解所有可用封装，请参见数据表末尾的可订购产品附录。
峰值电流调节
简化电路原理图
6.5 to 45 V
5wë8871
IN1
IN2
3.6 A
/ontroller
.rushed 5/
aotor 5river
BDC
Current
Sense and
Regulation
ILIM
Fault
Protection
Copyright © 2017, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
English Data Sheet: SLVSCY9
DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 3
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
7.3 Feature Description................................................... 8
7.4 Device Functional Modes........................................ 10
8
9
Application and Implementation ........................ 11
8.1 Application Information............................................ 11
8.2 Typical Application ................................................. 11
Power Supply Recommendations...................... 14
9.1 Bulk Capacitance .................................................... 14
10 Layout................................................................... 15
10.1 Layout Guidelines ................................................. 15
10.2 Layout Example .................................................... 15
10.3 Thermal Considerations........................................ 15
10.4 Power Dissipation ................................................. 15
11 器件和文档支持 ..................................................... 17
11.1 文档支持................................................................ 17
11.2 接收文档更新通知 ................................................. 17
11.3 社区资源................................................................ 17
11.4 商标....................................................................... 17
11.5 静电放电警告......................................................... 17
11.6 Glossary................................................................ 17
12 机械、封装和可订购信息....................................... 17
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (January 2016) to Revision B
Page
•
•
•
Deleted the power supply voltage ramp rate (VM) parameter from the Absolute Maximum Ratings table .......................... 3
Added the output current parameter to the Absolute Maximum Ratings table ...................................................................... 3
已添加 接收文档更新通知 部分............................................................................................................................................. 17
Changes from Original (August 2015) to Revision A
Page
•
•
•
Updated the ƒPWM max value and added a note .................................................................................................................... 4
Removed the redundant TA condition and added ƒPWM = 24 kHz .......................................................................................... 5
Added more information to clarify how the max RMS current varies for different applications ........................................... 12
2
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
www.ti.com.cn
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
5 Pin Configuration and Functions
DDA Package
8-Pin HSOP
Top View
GND
IN2
1
2
3
4
8
7
6
5
OUT2
PGND
OUT1
VM
Thermal
Pad
IN1
ILIM
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
GND
NO.
1
PWR
I
Logic ground
Connect to board ground
ILIM
4
Current limit control
Connect a resistor to ground to set the current chopping threshold
IN1
3
I
Logic inputs
Controls the H-bridge output. Has internal pulldowns (see Table 1).
Connect directly to the motor or other inductive load.
IN2
2
OUT1
OUT2
PGND
6
O
H-bridge output
8
7
PWR
PWR
High-current ground path Connect to board ground.
6.5-V to 45-V power
supply
Connect a 0.1-µF bypass capacitor to ground, as well as sufficient
bulk capacitance, rated for the VM voltage.
VM
5
Connect to board ground. For good thermal dissipation, use large
ground planes on multiple layers, and multiple nearby vias
connecting those planes.
PAD
—
—
Thermal pad
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.7
0
MAX
50
UNIT
V
Power supply voltage (VM)
Logic input voltage (IN1, IN2)
7
V
Continuous phase node pin voltage (OUT1, OUT2)
Output current (100% duty cycle)
Operating junction temperature, TJ
Storage temperature, Tstg
VM + 0.7
3.5
V
A
–40
–65
150
°C
°C
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 ESD Ratings
VALUE
±6000
±750
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Copyright © 2015–2016, Texas Instruments Incorporated
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DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
6.5
0
MAX
45
UNIT
V
VM
VI
Power supply voltage
Logic input voltage (IN1, IN2)
Logic input PWM frequency (IN1, IN2)
Peak output current(2)
5.5
200(1)
V
fPWM
Ipeak
TA
0
kHz
A
0
3.6
Operating ambient temperature(2)
–40
125
°C
(1) The voltages applied to the inputs should have at least 800 ns of pulse width to ensure detection. Typical devices require at least
400 ns. If the PWM frequency is 200 kHz, the usable duty cycle range is 16% to 84%.
(2) Power dissipation and thermal limits must be observed
6.4 Thermal Information
DRV8871
THERMAL METRIC(1)
DDA (HSOP)
8 PINS
41.1
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
53.1
23.1
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
8.2
ψJB
23
RθJC(bot)
2.7
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
4
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
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ZHCSE26B –AUGUST 2015–REVISED JULY 2016
6.5 Electrical Characteristics
TA = 25°C, over recommended operating conditions (unless otherwise noted)
PARAMETER
POWER SUPPLY (VM)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VM
VM operating voltage
6.5
45
10
V
VM operating supply
current
IVM
VM = 12 V
3
mA
IVMSLEEP
VM sleep current
Turn-on time
VM = 12 V
10
50
µA
µs
(1)
tON
VM > VUVLO with IN1 or IN2 high
40
LOGIC-LEVEL INPUTS (IN1, IN2)
VIL
Input logic low voltage
Input logic high voltage
Input logic hysteresis
Input logic low current
Input logic high current
Pulldown resistance
Propagation delay
0.5
V
V
VIH
VHYS
IIL
1.5
–1
0.5
V
VIN = 0 V
1
μA
μA
kΩ
μs
ms
IIH
VIN = 3.3 V
33
100
0.7
1
100
RPD
tPD
To GND
INx to OUTx change (see Figure 6)
Inputs low to sleep
1
tsleep
Time to sleep
1.5
MOTOR DRIVER OUTPUTS (OUT1, OUT2)
High-side FET on
resistance
RDS(ON)
VM = 24 V, I = 1 A, fPWM = 25 kHz
VM = 24 V, I = 1 A, fPWM = 25 kHz
307
360
320
mΩ
Low-side FET on
resistance
RDS(ON)
tDEAD
Vd
258
220
0.8
mΩ
ns
V
Output dead time
Body diode forward
voltage
IOUT = 1 A
1
CURRENT REGULATION
Constant for calculating
VILIM
current regulation (see
Equation 1)
IOUT = 1 A
59
64
69
kV
tOFF
PWM off-time
25
2
µs
µs
tBLANK
PWM blanking time
PROTECTION CIRCUITS
VM falls until UVLO triggers
6.1
6.3
6.4
6.5
VUVLO
VM undervoltage lockout
V
VM rises until operation recovers
VM undervoltage
hysteresis
VUV,HYS
IOCP
Rising to falling threshold
100
3.7
180
4.5
mV
A
Overcurrent protection trip
level
6.4
tOCP
Overcurrent deglitch time
Overcurrent retry time
1.5
3
μs
tRETRY
ms
Thermal shutdown
temperature
TSD
150
175
40
°C
°C
Thermal shutdown
hysteresis
THYS
(1) tON applies when the device initially powers up, and when it exits sleep mode.
Copyright © 2015–2016, Texas Instruments Incorporated
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DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
6.6 Typical Characteristics
1.6
1.5
1.4
1.3
1.2
1.1
1
65
64
63
62
0.9
0.8
0.7
-40
-20
0
20
40
60
80
100
120
140
-40
-20
0
20
40
60
80
100 120 140
Ambient Temperature (èC)
Temperature (°C)
D001
D003
Figure 1. RDS(on) vs Temperature
Figure 2. VILIM vs Temperature
10
8
6
4
2
0
0
5
10
15
20
25
30
35
40
45
VM (V)
D004
Figure 3. IVMSLEEP vs VM at 25°C
6
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
www.ti.com.cn
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
7 Detailed Description
7.1 Overview
The DRV8871 device is an optimized 8-pin device for driving brushed DC motors with 6.5 to 45 V and up to 3.6-
A peak current. The integrated current regulation restricts motor current to a predefined maximum. Two logic
inputs control the H-bridge driver, which consists of four N-channel MOSFETs that have a typical Rds(on) of 565
mΩ (including one high-side and one low-side FET). A single power input, VM, serves as both device power and
the motor winding bias voltage. The integrated charge pump of the device boosts VM internally and fully
enhances the high-side FETs. Motor speed can be controlled with pulse-width modulation, at frequencies
between 0 to 100 kHz. The device has an integrated sleep mode that is entered by bringing both inputs low. An
assortment of protection features prevent the device from being damaged if a system fault occurs.
7.2 Functional Block Diagram
Power
VCP
VM
VCP
VM
VM
Charge
Pump
OUT1
Gate
Driver
bulk
0.1 µF
OCP
GND
BDC
PPAD
VCP
VM
OUT2
Gate
Driver
IN1
IN2
Core
Logic
OCP
PGND
ILIM
Internal Current Sense
RILIM
Protection Features
Overcurrent
Monitoring
Temperature
Sensor
Voltage
Monitoring
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2015–2016, Texas Instruments Incorporated
7
DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
7.3 Feature Description
7.3.1 Bridge Control
The DRV8871 output consists of four N-channel MOSFETs that are designed to drive high current. They are
controlled by the two logic inputs IN1 and IN2, according to Table 1.
Table 1. H-Bridge Control
IN1
0
IN2
0
OUT1
OUT2
DESCRIPTION
Coast; H-bridge disabled to High-Z (sleep entered after 1 ms)
Reverse (Current OUT2 → OUT1)
High-Z
High-Z
0
1
L
H
L
H
L
L
1
0
Forward (Current OUT1 → OUT2)
1
1
Brake; low-side slow decay
The inputs can be set to static voltages for 100% duty cycle drive, or they can be pulse-width modulated (PWM)
for variable motor speed. When using PWM, it typically works best to switch between driving and braking. For
example, to drive a motor forward with 50% of its max RPM, IN1 = 1 and IN2 = 0 during the driving period, and
IN1 = 1 and IN2 = 1 during the other period. Alternatively, the coast mode (IN1 = 0, IN2 = 0) for fast current
decay is also available. The input pins can be powered before VM is applied.
VM
VM
1
2
3
1
2
3
Reverse drive
Forward drive
Slow decay (brake)
High-Z (coast)
Slow decay (brake)
High-Z (coast)
1
1
OUT1
OUT2
OUT1
OUT2
2
3
2
3
FORWARD
REVERSE
Figure 4. H-Bridge Current Paths
7.3.2 Sleep Mode
When IN1 and IN2 are both low for time tSLEEP (typically 1 ms), the DRV8871 device enters a low-power sleep
mode, where the outputs remain High-Z and the device uses IVMSLEEP (microamps) of current. If the device is
powered up while both inputs are low, sleep mode is immediately entered. After IN1 or IN2 are high for at least 5
µs, the device will be operational 50 µs (tON) later.
7.3.3 Current Regulation
The DRV8871 device limits the output current based on a standard resistor attached to pin ILIM, according to
this equation:
8
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
www.ti.com.cn
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
V
(kV)
64 (kV)
ILIM
ITRIP (A) =
=
RILIM (kW) RILIM (kW)
(1)
For example, if RILIM = 32 kΩ, the DRV8871 device limits motor current to 2 A no matter how much load torque is
applied. The minimum allowed RILIM is 15 kΩ. System designers should always understand the min and max
ITRIP, based on the RILIM resistor component tolerance and the DRV8871 specified VILIM range.
When ITRIP has been reached, the device enforces slow current decay by enabling both low-side FETs, and it
does this for time tOFF (typically 25 µs).
ITRIP
tBLANK
tDRIVE
tOFF
Figure 5. Current Regulation Time Periods
After tOFF has elapsed, the output is re-enabled according to the two inputs INx. The drive time (tDRIVE) until
reaching another ITRIP event heavily depends on the VM voltage, the motor’s back-EMF, and the motor’s
inductance.
7.3.4 Dead Time
When an output changes from driving high to driving low, or driving low to driving high, dead time is automatically
inserted to prevent shoot-through. tDEAD is the time in the middle when the output is High-Z. If the output pin is
measured during tDEAD, the voltage will depend on the direction of current. If current is leaving the pin, the
voltage will be a diode drop below ground. If current is entering the pin, the voltage will be a diode drop above
VM. This diode is the body diode of the high-side or low-side FET.
IN1
IN2
OUT1
tPD
tR
tDEAD
tPD
tF
tDEAD
OUT2
tPD
tF
tDEAD
tPD
tR
tDEAD
Figure 6. Propagation Delay Time
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DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
7.3.5 Protection Circuits
The DRV8871 device is fully protected against VM undervoltage, overcurrent, and overtemperature events.
7.3.5.1 VM Undervoltage Lockout (UVLO)
If at any time the voltage on the VM pin falls below the undervoltage lockout threshold voltage, all FETs in the H-
bridge will be disabled. Operation will resume when VM rises above the UVLO threshold.
7.3.5.2 Overcurrent Protection (OCP)
If the output current exceeds the OCP threshold IOCP for longer than tOCP, all FETs in the H-bridge are disabled
for a duration of tRETRY. After that, the H-bridge will be re-enabled according to the state of the INx pins. If the
overcurrent fault is still present, the cycle repeats; otherwise normal device operation resumes.
7.3.5.3 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled. After the die temperature has
fallen to a safe level, operation automatically resumes.
Table 2. Protection Functionality
FAULT
VM undervoltage lockout (UVLO)
Overcurrent (OCP)
CONDITION
VM < VUVLO
H-BRIDGE STATUS
Disabled
RECOVERY
VM > VUVLO
tRETRY
IOUT > IOCP
TJ > 150°C
Disabled
Disabled
Thermal Shutdown (TSD)
TJ < TSD – T HYS
7.4 Device Functional Modes
The DRV8871 device can be used in multiple ways to drive a brushed DC motor.
7.4.1 PWM With Current Regulation
This scheme uses all of the device capabilities. ITRIP is set above the normal operating current, and high enough
to achieve an adequate spin-up time, but low enough to constrain current to a desired level. Motor speed is
controlled by the duty cycle of one of the inputs, while the other input is static. Brake/slow decay is typically used
during the off-time.
7.4.2 PWM Without Current Regulation
If current regulation is not needed, a 15-kΩ to 18-kΩ resistor should be used on pin ILIM. This mode provides the
highest possible peak current: up to 3.6 A for a few hundred milliseconds (depending on PCB characteristics and
the ambient temperature). If current exceeds 3.6 A, the device might reach overcurrent protection (OCP) or
overtemperature shutdown (TSD). If that happens, the device disables and protects itself for about 3 ms (tRETRY
)
and then resumes normal operation.
7.4.3 Static Inputs With Current Regulation
IN1 and IN2 can be set high and low for 100% duty cycle drive, and ITRIP can be used to control the current,
speed, and torque capability of the motor.
7.4.4 VM Control
In some systems it is desirable to vary VM as a means of changing motor speed. See Motor Voltage for more
information.
10
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
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ZHCSE26B –AUGUST 2015–REVISED JULY 2016
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The DRV8871 device is typically used to drive one brushed DC motor.
8.2 Typical Application
GND
OUT2
3.3 V
BDC
IN2
IN1
ILIM
PGND
OUT1
VM
Controller
DRV8871
PPAD
+
6.5 to 45 V
30 kΩ
0.1 µF
47 µF
Power Supply
œ
Copyright © 2017, Texas Instruments Incorporated
Figure 7. Typical Connections
Table 3. Design Parameters
8.2.1 Design Requirements
Table 3 lists the design parameters.
DESIGN PARAMETER
REFERENCE
VM
EXAMPLE VALUE
Motor voltage
24 V
0.8 A
2 A
Motor RMS current
Motor startup current
Motor current trip point
ILIM resistance
IRMS
ISTART
ITRIP
2.1 A
30 kΩ
5 kHz
RILIM
PWM frequency
fPWM
8.2.2 Detailed Design Procedure
8.2.2.1 Motor Voltage
The motor voltage to use will depend on the ratings of the motor selected and the desired RPM. A higher voltage
spins a brushed DC motor faster with the same PWM duty cycle applied to the power FETs. A higher voltage
also increases the rate of current change through the inductive motor windings.
8.2.2.2 Drive Current
The current path is through the high-side sourcing DMOS power driver, motor winding, and low-side sinking
DMOS power driver. Power dissipation losses in one source and sink DMOS power driver are shown in the
following equation.
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PD = I2
R
+ RDS(on)Sink
DS(on)Source
(2)
The DRV8871 device has been measured to be capable of 2-A RMS current at 25°C on standard FR-4 PCBs.
The max RMS current varies based on the PCB design, ambient temperature, and PWM frequency. Typically,
switching the inputs at 200 kHz compared to 20 kHz causes 20% more power loss in heat.
8.2.3 Application Curves
Figure 8. Current Ramp With a 2-Ω, 1 mH,
Figure 9. Current Ramp With a 2-Ω, 1 mH,
RL Load and VM = 12 V
RL Load and VM = 24 V
Figure 10. Current Ramp With a 2-Ω, 1 mH,
Figure 11. tPD
RL Load and VM = 45 V
12
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DRV8871
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ZHCSE26B –AUGUST 2015–REVISED JULY 2016
Figure 12. Current Regulation With RILIM = 50.5 kΩ
Figure 13. OCP With 45 V and the Outputs Shorted
Together
Copyright © 2015–2016, Texas Instruments Incorporated
13
DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
9 Power Supply Recommendations
9.1 Bulk Capacitance
Having appropriate local bulk capacitance is an important factor in motor drive system design. In general, having
have more bulk capacitance is beneficial, while the disadvantages are increased cost and physical size.
The amount of local capacitance needed depends on a variety of factors, including:
•
•
•
•
•
•
The highest current required by the motor system
The power supply’s capacitance and ability to source current
The amount of parasitic inductance between the power supply and motor system
The acceptable voltage ripple
The type of motor used (brushed DC, brushless DC, stepper)
The motor braking method
The inductance between the power supply and motor drive system will limit the rate current can change from the
power supply. If the local bulk capacitance is too small, the system reponds to excessive current demands or
dumps from the motor with a change in voltage. When adequate bulk capacitance is used, the motor voltage
remains stable and high current can be quickly supplied.
The data sheet generally provides a recommended value, but system-level testing is required to determine the
appropriate sized bulk capacitor.
Parasitic Wire
Inductance
Motor Drive System
Power Supply
VBB
+
Motor
Driver
+
œ
GND
Local
IC Bypass
Bulk Capacitor
Capacitor
Figure 14. Example Setup of Motor Drive System With External Power Supply
The voltage rating for bulk capacitors should be higher than the operating voltage, to provide margin for cases
when the motor transfers energy to the supply.
14
Copyright © 2015–2016, Texas Instruments Incorporated
DRV8871
www.ti.com.cn
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
10 Layout
10.1 Layout Guidelines
The bulk capacitor should be placed to minimize the distance of the high-current path through the motor driver
device. The connecting metal trace widths should be as wide as possible, and numerous vias should be used
when connecting PCB layers. These practices minimize inductance and allow the bulk capacitor to deliver high
current.
Small-value capacitors should be ceramic, and placed closely to device pins.
The high-current device outputs should use wide metal traces.
The device thermal pad should be soldered to the PCB top-layer ground plane. Multiple vias should be used to
connect to a large bottom-layer ground plane. The use of large metal planes and multiple vias help dissipate the
I2 × RDS(on) heat that is generated in the device.
10.2 Layout Example
Recommended layout and component placement is shown in Figure 15
GND
IN2
OUT2
PGND
OUT1
VM
IN1
ILIM
+
Figure 15. Layout Recommendation
10.3 Thermal Considerations
The DRV8871 device has thermal shutdown (TSD) as described in the Thermal Shutdown (TSD) section. If the
die temperature exceeds approximately 175°C, the device is disabled until the temperature drops below the
temperature hysteresis level.
Any tendency of the device to enter TSD is an indication of either excessive power dissipation, insufficient
heatsinking, or too high of an ambient temperature.
10.4 Power Dissipation
Power dissipation in the DRV8871 device is dominated by the power dissipated in the output FET resistance,
RDS(on). Use the equation in the Drive Current section to calculate the estimated average power dissipation when
driving a load.
Note that at startup, the current is much higher than normal running current; this peak current and its duration
must be also be considered.
Copyright © 2015–2016, Texas Instruments Incorporated
15
DRV8871
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
www.ti.com.cn
Power Dissipation (continued)
The maximum amount of power that can be dissipated in the device is dependent on ambient temperature and
heatsinking.
NOTE
RDS(on) increases with temperature, so as the device heats, the power dissipation
increases. This fact must be taken into consideration when sizing the heatsink.
The power dissipation of the DRV8871 device is a function of RMS motor current and the FET resistance
(RDS(ON)) of each output.
2
Power ö IRMS ì High-side RDS(ON) + Low-side RDS(ON)
(3)
For this example, the ambient temperature is 58°C, and the junction temperature reaches 80°C. At 58°C, the
sum of RDS(ON) is about 0.72 Ω. With an example motor current of 0.8 A, the dissipated power in the form of heat
will be 0.8 A2 × 0.72 Ω = 0.46 W.
The temperature that the DRV8871 device reaches depends on the thermal resistance to the air and PCB. It is
important to solder the device PowerPAD to the PCB ground plane, with vias to the top and bottom board layers,
in order dissipate heat into the PCB and reduce the device temperature. In the example used here, the DRV8871
device had an effective thermal resistance RθJA of 48°C/W, and:
TJ = TA + (PD ì RqJA ) = 58èC + (0.46 W ì 48èC/W) = 80èC
(4)
10.4.1 Heatsinking
The PowerPAD package uses an exposed pad to remove heat from the device. For proper operation, this pad
must be thermally connected to copper on the PCB to dissipate heat. On a multi-layer PCB with a ground plane,
this connection can be accomplished by adding a number of vias to connect the thermal pad to the ground plane.
On PCBs without internal planes, a copper area can be added on either side of the PCB to dissipate heat. If the
copper area is on the opposite side of the PCB from the device, thermal vias are used to transfer the heat
between top and bottom layers.
For details about how to design the PCB, refer to PowerPAD™ Thermally Enhanced Package (SLMA002) and
PowerPAD Made Easy™ (SLMA004), available at www.ti.com. In general, the more copper area that can be
provided, the more power can be dissipated.
16
版权 © 2015–2016, Texas Instruments Incorporated
DRV8871
www.ti.com.cn
ZHCSE26B –AUGUST 2015–REVISED JULY 2016
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
相关文档如下：
•
•
•
•
•
•
电流再循环和衰减模式
《计算电机驱动器功耗》
《DRV8871 评估模块》
《PowerPAD™ 散热增强型封装》
《PowerPAD™ 速成》
了解电机驱动器电流额定值
11.2 接收文档更新通知
如需接收文档更新通知，请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册
后，即可每周定期收到已更改的产品信息。有关更改的详细信息，请查阅已修订文档中包含的修订历史记录。
11.3 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.4 商标
PowerPAD, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
这些装置包含有限的内置 ESD 保护。 存储或装卸时，应将导线一起截短或将装置放置于导电泡棉中，以防止 MOS 门极遭受静电损
伤。
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本，请查阅左侧的导航栏。
版权 © 2015–2016, Texas Instruments Incorporated
17
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DRV8871DDA
ACTIVE SO PowerPAD
ACTIVE SO PowerPAD
DDA
DDA
8
8
75
RoHS & Green
NIPDAUAG
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
8871
8871
DRV8871DDAR
2500 RoHS & Green
NIPDAUAG
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DRV8871DDAR
SO
Power
PAD
DDA
8
2500
330.0
12.8
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SO PowerPAD DDA
SPQ
Length (mm) Width (mm) Height (mm)
366.0 364.0 50.0
DRV8871DDAR
8
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2022
TUBE
*All dimensions are nominal
Device
Package Name Package Type
DDA HSOIC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
DRV8871DDA
8
75
517
7.87
635
4.25
Pack Materials-Page 3
GENERIC PACKAGE VIEW
DDA 8
PowerPADTM SOIC - 1.7 mm max height
PLASTIC SMALL OUTLINE
Images above are just a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4202561/G
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