DS30BA101SQE/NOPB [TI]
3.125Gbps 差动缓冲器 | RUM | 16 | -40 to 85;型号: | DS30BA101SQE/NOPB |
厂家: | TEXAS INSTRUMENTS |
描述: | 3.125Gbps 差动缓冲器 | RUM | 16 | -40 to 85 |
文件: | 总9页 (文件大小:691K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
February 9, 2012
DS30BA101
3.125 Gbps Differential Buffer
General Description
The DS30BA101 is a high-speed differential buffer for cable
driving, signal buffering, and signal repeating applications. Its
fully differential signal path ensures exceptional signal integri-
ty and noise immunity. The DS30BA101 drives both differen-
tial and single-ended transmission lines at data rates up to
3.125 Gbps.
Data rates from DC to 3.125 Gbps
Applications
The output voltage amplitude is adjustable via a single exter-
nal resistor for cable driving applications into 75Ω single-
ended and 100Ω differential mode impedances.
The DS30BA101 is powered from a single 3.3V supply and
consumes 165 mW (typical). It operates over the full industrial
temperature range of -40°C to +85°C and is available in a
4 x 4 mm 16-pin LLP package.
Cable extension
■
■
Signal buffering and repeating
Security and surveillance
■
Typical Application
30152002
© 2012 Texas Instruments Incorporated
301520 SNLS403
www.ti.com
Connection Diagram
30152005
The exposed die attach pad is a negative electrical terminal for this device. It should be connected to the negative power supply voltage.
16-Pin LLP
Order Number DS30BA101SQ
Package Number SQB16A
Ordering Information
Part Number
DS30BA101SQ
DS30BA101SQE
DS30BA101SQX
Package
Quantity
Reel of 1000
Reel of 250
Reel of 4500
16-Pin LLP, 4.0 x 4.0 x 0.8 mm, 0.65 mm pitch
16-Pin LLP, 4.0 x 4.0 x 0.8 mm, 0.65 mm pitch
16-Pin LLP, 4.0 x 4.0 x 0.8 mm, 0.65 mm pitch
www.ti.com
2
Pin Descriptions
Pin
1
Name
I/O, Type
I, CML
Description
IN+
IN-
Non-inverting input.
2
I, CML
Inverting input.
3
VEE
RVO
Ground
I, Analog
Negative power supply (ground).
4
Output voltage level control. Connect a resistor between this pin and VCC to set the
output voltage.
5
6
NC
VCC
NC
NC
VCC
VEE
N/A
No connect. Not bonded internally.
Power
N/A
Positive power supply (+3.3V).
7
No connect. Not bonded internally.
No connect. Not bonded internally.
Positive power supply (+3.3V).
Negative power supply (ground).
Inverting output.
8
N/A
9
Power
Ground
O, Data
O, Data
N/A
10
11
12
13
14
15
16
DAP
OUT-
OUT+
NC
Non-inverting output.
No connect. Not bonded internally.
No connect. Not bonded internally.
No connect. Not bonded internally.
No connect. Not bonded internally.
Connect exposed DAP to negative power supply (ground).
NC
N/A
NC
N/A
NC
N/A
VEE
Ground
3
www.ti.com
ESD Rating (HBM)
ESD Rating (MM)
ESD Rating (CDM)
≥±4.5 kV
≥±250V
≥±2 kV
Absolute Maximum Ratings (Note 1)
Supply Voltage:
3.6V
Input Voltage (all inputs)
−0.3V to VCC+0.3V
28 mA
Output Current
Recommended Operating
Conditions
Storage Temperature Range
Junction Temperature
Package Thermal Resistance
ꢀθJA 16-pin LLP
−65°C to +150°C
+125°C
Supply Voltage (VCC):
3.3V ±5%
+58°C/W
+21°C/W
Operating Free Air Temperature (TA)
-40°C to +85°C
ꢀθJC 16-pin LLP
DC Electrical Characteristics
Over recommended supply voltage and operating temperature ranges, unless otherwise specified. (Note 2, Note 3)
Symbol
Parameter
Conditions
Reference
Min
Typ
Max
Units
V
VICM
Input Common Mode Voltage
IN+, IN-
VCC –
1.1 +
VID/2
VID/2
VID
Input Voltage Swing
Differential
mVP−P
V
100
2200
VOCM
Output Common Mode Voltage
OUT+, OUT-
VCC –
VOUT
VOUT
Output Voltage
Supply Current
Single-ended, 75Ω load,
RVO = 750Ω
mVP-P
800
Single-ended, 50Ω load,
RVO = 953Ω
mVP-P
mA
400
50
ICC
59
AC Electrical Characteristics
Over recommended supply voltage and operating temperature ranges, unless otherwise specified. (Note 2, Note 3)
Symbol
DRIN
tTLH
Parameter
Input Data Rate
Conditions
Reference
IN+, IN-
Min
Typ
Max
3125
130
Units
Mbps
ps
Transition Time Low to High
Transition Time High to Low
20% - 80% (Note 4)
OU++, OUT-
90
90
tTHL
130
ps
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device my occur, including inoperability and degradation of device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions.
Note 2: The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3: Typical values represent most likely parametric norms at VCC = +3.3V, TA = +25°C, and at the Recommended Operating Conditions at the time of product
characterization and are not guaranteed.
Note 4: Specification is guaranteed by characterization and is not tested in production.
www.ti.com
4
Figure 1 and Figure 2 show the typical configurations for dif-
ferential output and single-ended output, respectively. For
single-ended output, the unused output must be properly ter-
minated as shown.
Device Operation
INPUT INTERFACING
The DS30BA101 accepts either differential or single-ended
input. DC-coupled inputs must be kept within the specified
common-mode range.
Application Information
CABLE EXTENDER APPLICATION
OUTPUT INTERFACING
The DS30BA101 together with the DS30EA101 form a cable
extender chipset optimized for extending serial data streams
from serializer/deseralizer (SerDes) pairs and FPGAs over
100Ω differential cables and 75Ω coaxial cables. Setting the
correct DS30BA101 output amplitude and proper cable ter-
mination are essential for optimal operation. Figure 1 shows
the recommended chipset configuration for 100Ω differential
cable and Figure 2 shows the recommended chipset config-
uration for 75Ω coaxial cable.
The DS30BA101 uses current mode outputs. Single-ended
output levels are 800 mVP-P into 75Ω AC-coupled coaxial ca-
ble with an RVO resistor of 750Ω, or 400 mVP-P (800 mVP-P
differential) into 100Ω differential cable with an RVO resistor
of 953Ω. The output voltage level is controlled by the value of
the RVO resistor connected between the RVO pin and VCC
.
The RVO resistor should be placed as close as possible to the
RVO pin. In addition, the copper in the plane layers below the
RVO network should be removed to minimize parasitic capac-
itance.
30152031
FIGURE 1. Cable Extender Chipset Application Circuit for 100Ω Differential Cable
30152032
FIGURE 2. Cable Extender Chipset Application Circuit for 75Ω Coaxial Cable
5
www.ti.com
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin LLP
Order Number DS30BA101SQ
Package Number SQB16A
www.ti.com
6
Notes
7
www.ti.com
Notes
www.ti.com
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