DS34LV87T [TI]

增强型 CMOS 四路差分线路驱动器;
DS34LV87T
型号: DS34LV87T
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

增强型 CMOS 四路差分线路驱动器

驱动 驱动器
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DS34LV87T  
www.ti.com  
SNLS116D JULY 2006REVISED APRIL 2013  
DS34LV87T Enhanced CMOS Quad Differential Line Driver  
Check for Samples: DS34LV87T  
1
FEATURES  
DESCRIPTION  
The DS34LV87T is a high speed quad differential  
CMOS driver that meets the requirements of both  
TIA/EIA-422-B and ITU-T V.11. The CMOS  
DS34LV87T features low static ICC of 100 μA max  
which makes it ideal for battery powered and power  
conscious applications. The TRI-STATE enable, EN,  
allows the device to be disabled when the device is  
not in use to minimize power. The dual enable  
scheme allows for flexibility in turning devices on or  
off.  
Meets TIA/EIA-422-B (RS-422) and ITU-T V.11  
Recommendation  
Interoperable With Existing 5V RS-422  
Networks  
Ensured VOD of 2V Min Over Operating  
Conditions  
Balanced Output Crossover for Low EMI  
(Typical Within 40 mV of 50% Voltage Level)  
Low Power Design (330 μW @ 3.3V Static)  
ESD 7 kV on Cable I/O Pins (HBM)  
Industrial Temperature Range  
Protection diodes protect all the driver inputs against  
electrostatic discharge. The driver and enable inputs  
(DI and EN) are compatible with LVTTL and  
LVCMOS devices. Differential outputs have the same  
VOD (2V) ensure as the 5V version. The outputs  
have enhanced ESD Protection providing greater  
than 7 kV tolerance.  
Ensured AC Parameter:  
Maximum Driver Skew: 2 ns  
Maximum Transition Time: 10 ns  
Pin Compatible With DS26C31  
Available in SOIC Packaging  
TRUTH TABLE(1)  
Connection Diagram  
Enables  
Input  
DI  
X
Outputs  
EN  
L
DO+  
Z
DO  
Z
H
H
H
L
H
L
L
H
(1) L = Low logic state  
X = Irrelevant  
Figure 1. Dual-In-Line Package (Top View)  
See Package Number D0016A  
H = High logic state  
Z = TRI-STATE  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006–2013, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
DS34LV87T  
SNLS116D JULY 2006REVISED APRIL 2013  
www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
ABSOLUTE MAXIMUM RATINGS(1)(2)  
Supply Voltage (VCC  
)
0.5V to +7V  
0.5V to VCC + 0.5V  
0.5V to VCC + 0.5V  
±20 mA  
Enable Input Voltage (EN)  
Driver Input Voltage (DI)  
Clamp Diode Current  
DC Output Current, per pin  
Driver Output Voltage  
±150 mA  
(Power Off: DO+, DO)  
0.5V to +7V  
Maximum Package Power Dissipation  
@+25°C  
D Package  
1226 mW  
9.8 mW/°C above +25°C  
65°C to +150°C  
+260°C  
Derate D Package  
Storage Temperature Range  
Lead Temperature Range (Soldering, 4 sec.)  
ESD Ratings (HBM, 1.5k, 100 pF)  
Driver Outputs  
Other Pins  
7 kV  
2.5 kV  
(1) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and  
specifications.  
(2) Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that  
the device should be operated at these limits. The table of Electrical Characteristics specifies conditions of device operation.  
RECOMMENDED OPERATING CONDITIONS  
Min  
3.0  
Typ  
3.3  
25  
Max  
3.6  
Units  
V
Supply Voltage (VCC  
)
Operating Free Air  
Temperature Range (TA)  
DS34LV87T  
40  
+85  
°C  
Input Rise and Fall Time  
500  
ns  
2
Submit Documentation Feedback  
Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: DS34LV87T  
DS34LV87T  
www.ti.com  
SNLS116D JULY 2006REVISED APRIL 2013  
ELECTRICAL CHARACTERISTICS(1)(2)  
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified  
Symbol  
VOD1  
Parameter  
Conditions  
RL= , (No Load)  
Pin  
Min  
Typ  
3.3  
2.6  
7
Max  
Units  
V
Output Differential Voltage  
Output Differential Voltage  
DO+,  
DO−  
4.0  
VOD2  
RL = 100Ω See Figure 2  
2
V
ΔVOD2  
Change in Magnitude of  
Output Differential Voltage  
400  
400  
3.5  
mV  
VOD3  
Output Differential Voltage  
RL = 3900Ω (V.11), See  
3.2  
V
Figure 2(3)  
VOC  
Common Mode Voltage  
RL = 100Ω See Figure 2  
1.5  
6
2
V
ΔVOC  
Change in Magnitude of  
Common Mode Voltage  
400  
40  
400  
mV  
IOZ  
TRI-STATE Leakage Current  
Output Short Circuit Current  
Output Leakage Current  
VOUT = VCC or GND  
Drivers Disabled  
±0.5  
±20  
μA  
ISC  
VOUT = 0V  
70  
150  
mA  
VIN = VCC or GND(4)  
IOFF  
VCC= 0V, VOUT = 3V  
0.03  
100  
100  
VCC  
0.8  
μA  
μA  
V
VCC = 0V, VOUT = 0.25V  
0.08  
VIH  
VIL  
IIH  
High Level Input Voltage  
Low Level Input Voltage  
High Level Input Current  
Low Level Input Current  
Input Clamp Voltage  
DI,  
EN  
2.0  
GND  
V
VIN= VCC  
10  
μA  
μA  
V
IIL  
VIN = GND  
10  
VCL  
ICC  
IIN = 18 mA  
1.5  
Power Supply Current  
No Load, VIN (all) = VCC or GND  
VCC  
100  
μA  
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground  
except differential voltages VOD1, VOD2, VOD3  
.
(2) All typical values are given for VCC= 3.3V and TA = +25°C.  
(3) This specification limit is for compliance with TIA/EIA-422-B and ITU-T V.11.  
(4) Only one output shorted at a time. The output (true or complement) is configured High.  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
3
Product Folder Links: DS34LV87T  
DS34LV87T  
SNLS116D JULY 2006REVISED APRIL 2013  
www.ti.com  
SWITCHING CHARACTERISTICS(1)(2)  
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified  
Symbol  
Parameter  
Conditions  
Min Typ Max Units  
tPHLD  
Differential Propagation Delay  
High to Low  
RL = 100Ω, CL = 50 pF  
See Figure 3 and Figure 4  
6
6
10.5  
11  
16  
16  
ns  
ns  
ns  
tPLHD  
tSKD  
Differential Propagation Delay  
Low to High  
Differential Skew  
0.5  
2.0  
|tPHLD–tPLHD  
|
tSK1  
tSK2  
tTLH  
Skew, Pin to Pin (same device)  
Skew, Part to Part(3)  
1.0  
3.0  
2.0  
5.0  
ns  
ns  
Differential Transition Time  
Low to High (20% to 80%)  
4.2  
4.7  
10  
10  
ns  
ns  
tTHL  
Differential Transition Time  
High to Low (80% to 20%)  
tPHZ  
tPLZ  
tPZH  
tPZL  
fMAX  
Disable Time High to Z  
Disable Time Low to Z  
See Figure 5 and Figure 6  
12  
9
20  
20  
32  
32  
ns  
ns  
Enable Time Z to High  
Enable Time Z to Low  
Maximum Operating Frequency(4)  
22  
22  
32  
ns  
ns  
MHz  
(1) f = 1 MHz, tr and tf 6 ns (10% to 90%).  
(2) See TIA/EIA-422-B specifications for exact test conditions.  
(3) Devices are at the same VCC and within 5°C within the operating temperature range.  
(4) All channels switching, output duty cycle criteria is 40%/60% measured at 50%. This parameter is ensured by design and  
characterization.  
4
Submit Documentation Feedback  
Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: DS34LV87T  
DS34LV87T  
www.ti.com  
SNLS116D JULY 2006REVISED APRIL 2013  
PARAMETER MEASUREMENT INFORMATION  
Figure 2. Differential Driver DC Test Circuit  
Figure 3. Differential Driver Propagation Delay and Transition Time Test Circuit  
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Duty Cycle = 50%, Zo = 50Ω, tr 10 ns, tf ≤  
10 ns.  
CL includes probe and fixture capacitance.  
Figure 4. Differential Driver Propagation Delay and Transition Time Waveforms  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
5
Product Folder Links: DS34LV87T  
DS34LV87T  
SNLS116D JULY 2006REVISED APRIL 2013  
www.ti.com  
PARAMETER MEASUREMENT INFORMATION (continued)  
Figure 5. Driver Single-Ended Tri-state Test Circuit  
Figure 6. Driver Single-Ended Tri-state Waveforms  
6
Submit Documentation Feedback  
Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: DS34LV87T  
DS34LV87T  
www.ti.com  
SNLS116D JULY 2006REVISED APRIL 2013  
TYPICAL APPLICATION INFORMATION  
General application guidelines and hints for differential drivers and receivers may be found in the following  
application notes:  
Transmission Line Drivers and Receivers for TIA/EIA Standards RS-422 and RS-423(SNLA137)  
A Comparison of Differential Termination Techniques(SNLA304)  
Power Decoupling Recommendations:  
Bypass caps must be used on power pins. High frequency ceramic (surface mount is recommended) 0.1 μF in  
parallel with 0.01 μF at the power supply pin. A 10 μF or greater tantalum or electrolytic should be connected at  
the power entry point on the printed circuit board.  
RT is optional although highly recommended to reduce reflection  
Figure 7. Typical Driver Connection  
Figure 8. Typical Driver Output Waveforms  
Copyright © 2006–2013, Texas Instruments Incorporated  
Submit Documentation Feedback  
7
Product Folder Links: DS34LV87T  
 
DS34LV87T  
SNLS116D JULY 2006REVISED APRIL 2013  
www.ti.com  
REVISION HISTORY  
Changes from Revision C (April 2013) to Revision D  
Page  
Changed layout of National Data Sheet to TI format ............................................................................................................ 7  
8
Submit Documentation Feedback  
Copyright © 2006–2013, Texas Instruments Incorporated  
Product Folder Links: DS34LV87T  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
DS34LV87TM/NOPB  
DS34LV87TMX/NOPB  
ACTIVE  
SOIC  
SOIC  
D
D
16  
16  
48  
RoHS & Green  
SN  
Level-1-260C-UNLIM  
Level-1-260C-UNLIM  
-40 to 85  
-40 to 85  
DS34LV87  
TM  
ACTIVE  
2500 RoHS & Green  
SN  
DS34LV87  
TM  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Apr-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
DS34LV87TMX/NOPB  
SOIC  
D
16  
2500  
330.0  
16.4  
6.5  
10.3  
2.3  
8.0  
16.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Apr-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC 16  
SPQ  
Length (mm) Width (mm) Height (mm)  
356.0 356.0 35.0  
DS34LV87TMX/NOPB  
D
2500  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
9-Apr-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
SOIC  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
DS34LV87TM/NOPB  
D
16  
48  
495  
8
4064  
3.05  
Pack Materials-Page 3  
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AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
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standards, and any other safety, security, regulatory or other requirements.  
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