DS89C21TMX/NOPB [TI]
差动 CMOS 线路驱动器和接收器对 | D | 8 | -40 to 85;
| 型号： | DS89C21TMX/NOPB |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 差动 CMOS 线路驱动器和接收器对 | D | 8 | -40 to 85 驱动 光电二极管 接口集成电路 驱动器 |
| 文件： | 总16页 (文件大小：488K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS89C21
www.ti.com
SNLS091C –JUNE 1998–REVISED APRIL 2013
DS89C21 Differential CMOS Line Driver and Receiver Pair
Check for Samples: DS89C21
1
FEATURES
DESCRIPTION
The DS89C21 is a differential CMOS line driver and
receiver pair, designed to meet the requirements of
TIA/EIA-422-A (RS-422) electrical characteristics
interface standard. The DS89C21 provides one driver
and one receiver in a minimum footprint. The device
is offered in an 8-pin SOIC package.
2
•
Meets TIA/EIA-422-A (RS-422) and CCITT V.11
Recommendation
•
•
LOW POWER Design—15 mW Typical
Guaranteed AC Parameters:
–
–
Maximum Driver Skew 2.0 ns
Maximum Receiver Skew 4.0 ns
The CMOS design minimizes the supply current to 6
mA, making the device ideal for use in battery
powered or power conscious applications.
•
Extended Temperature Range: −40°C to
+85°C
The driver features a fast transition time specified at
2.2 ns, and a maximum differential skew of 2 ns
making the driver ideal for use in high speed
applications operating above 10 MHz.
•
•
•
Available in SOIC Packaging
Operates over 20 Mbps
Receiver OPEN Input Failsafe Feature
The receiver can detect signals as low as 200 mV,
and also incorporates hysteresis for noise rejection.
Skew is specified at 4 ns maximum.
The DS89C21 is compatible with TTL and CMOS
levels (DI and RO).
Connection Diagram
See Package Number D (R-PDSO-G8)
Truth Table Driver
Input
DI
Outputs
DO
H
DO*
L
H
L
L
H
Truth Table Receiver
Inputs
RI–RI*
Output
RO
H
V
DIFF ≥ +200 mV
DIFF ≤ −200 mV
OPEN(1)
V
L
H
(1) Non-terminated
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated
DS89C21
SNLS091C –JUNE 1998–REVISED APRIL 2013
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
(1)(2)(3)
Absolute Maximum Ratings
Supply Voltage (VCC
)
7V
−1.5V to VCC + 1.5V
−0.5V to +7V
Driver Input Voltage (DI)
Driver Output Voltage (DO, DO *)
Receiver Input Voltage—V CM
(RI, RI*)
±14V
±14V
Differential Receiver Input
Voltage—VDIFF (RI, RI*)
Receiver Output Voltage (RO)
Receiver Output Current (RO)
Storage Temperature Range
−0.5V to VCC +0.5V
±25 mA
(TSTG
)
−65°C to +150°C
Lead Temperature (TL)
(Soldering 4 sec.)
+260°C
Maximum Junction Temperature
Maximum Package Power Dissipation @+25°C
D Package
150°C
714 mW
Derate D Package
5.7 mW/°C above +25°C
(1) Absolute Maximum Ratings are those values beyond which the safety of the device cannot be ensured. They are not meant to imply that
the devices should be operated at these limits. The tables of Electrical Characteristics specify conditions for device operation.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3) ESD Rating: HBM (1.5 kΩ, 100 pF) all pins ≥ 2000V.EIAJ (0Ω, 200 pF) ≥ 250V
Recommended Operating Conditions
Min
4.50
−40
Max
5.50
+85
500
Units
V
Supply Voltage (VCC
)
Operating Temperature (TA)
Input Rise or Fall Time (DI)
°C
ns
2
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS89C21
DS89C21
www.ti.com
SNLS091C –JUNE 1998–REVISED APRIL 2013
(1)(2)
Electrical Characteristics
Over recommended supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Pin
Min
Typ
Max
Units
DRIVER CHARACTERISTICS
VIH
Input Voltage HIGH
2.0
VCC
0.8
V
V
VIL
Input Voltage LOW
DI
GND
IIH, IIL
VCL
Input Current
V IN = VCC, GND, 2.0V, 0.8V
I IN = −18 mA
0.05
±10
−1.5
6.0
μA
V
Input Clamp Voltage
VOD1
VOD2
ΔVOD2
Unloaded Output Voltage
Differential Output Voltage
Change in Magnitude of V OD2
for Complementary Output States
Differential Output Voltage
Differential Output Voltage
Common Mode Voltage
Change in Magnitude of V OC
for Complementary Output States
Output Short Circuit Current
Output Leakage Current
No Load
DO,
DO*
4.2
3.0
5.0
V
R L = 100Ω
2.0
2.1
V
400
mV
VOD3
VOD4
VOC
R L = 150Ω
R L = 3.9 kΩ
R L = 100Ω
3.1
4.0
2.0
2.0
V
V
6.0
3.0
400
V
ΔVOC
mV
IOSD
IOFF
V OUT = 0V
−30
−115
−150
mA
μA
μA
VCC = 0V
VOUT = +6V
VOUT = −0.25V
0.03
+100
−0.08 −100
RECEIVER CHARACTERISTICS
VTL, VTH
VHYS
RIN
Differential Thresholds
Hysteresis
V IN = +7V, 0V, −7V
RI, −200
±25
50
+200
+1.5
mV
mV
kΩ
mA
mA
mA
mA
mA
V
RI*
V CM = 0V
20
Input Impedance
Input Current
V IN = −7V, +7V, Other = 0V
5.0
0
9.5
IIN
Other Input = 0V,
VCC = 5.5V and
VCC = 0V
VIN = +10V
+1.0
+0.22
−0.04
−0.41
−1.25
4.9
VIN = +3.0V
VIN = +0.5V
VIN = −3V
0
VIN = −10V
VDIFF = +1V
VDIFF = OPEN
−2.5
VOH
Output HIGH Voltage
IOH = −6 mA
RO
3.8
3.8
4.9
V
VOL
Output LOW Voltage
I OL = +6 mA, VDIFF = −1V
0.08
−85
0.3
V
IOSR
Output Short Circuit Current
V OUT = 0V
−25
−150
mA
DRIVER AND RECEIVER CHARACTERISTICS
ICC Supply Current
No Load
DI = VCC or GND
DI = 2.4V or 0.5V
VCC
3.0
3.8
6
mA
mA
12
(1) Current into device pins is defined as positive. Current out of device pins is defined as negative. All voltages are referenced to ground
unless otherwise specified.
(2) All typicals are given for VCC = 5.0V and T A = 25°C.
Copyright © 1998–2013, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Links: DS89C21
DS89C21
SNLS091C –JUNE 1998–REVISED APRIL 2013
www.ti.com
Units
(1)(2)
Switching Characteristics
Over recommended supply voltage and operating temperature ranges, unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
DIFFERENTIAL DRIVER CHARACTERISTICS
tPLHD
tPHLD
tSKD
tTLH
Propagation Delay LOW to HIGH
Propagation Delay HIGH to LOW
RL = 100Ω
(Figure 2 Figure 3)
2
2
4.9
4.5
0.4
2.2
2.1
10
10
2.0
9
ns
ns
ns
ns
ns
CL = 50 pF
Skew, |tPLHD–t PHLD
|
Transition Time LOW to HIGH
Transition Time HIGH to LOW
(Figure 2 Figure 4)
(Figure 5 Figure 6)
(Figure 7)
tTHL
9
RECEIVER CHARACTERISTICS
tPLH
tPHL
tSK
tr
Propagation Delay LOW to HIGH
Propagation Delay HIGH to LOW
CL = 50 pF
VDIFF = 2.5V
VCM = 0V
6
6
18
17.5
0.5
2.5
2.1
30
30
4.0
9
ns
ns
ns
ns
ns
Skew, |tPLH–t PHL
|
Rise Time
tf
Fall Time
9
(1) All typicals are given for VCC = 5.0V and T A = 25°C.
(2) f = 1 MHz, tr and tf ≤ 6 ns.
Parameter Measurement Information
Figure 1. VOD and VOC Test Circuit
f = 1 MHz, tr and tf ≤ 6 ns.
Figure 2. Driver Propagation Delay Test Circuit
4
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Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS89C21
DS89C21
www.ti.com
SNLS091C –JUNE 1998–REVISED APRIL 2013
Figure 3. Driver Differential Propagation Delay Timing
Figure 4. Driver Differential Transition Timing
f = 1 MHz, tr and tf ≤ 6 ns.
Figure 5. Receiver Propagation Delay Test Circuit
Figure 6. Receiver Propagation Delay Timing
Copyright © 1998–2013, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Links: DS89C21
DS89C21
SNLS091C –JUNE 1998–REVISED APRIL 2013
www.ti.com
Figure 7. Receiver Rise and Fall Times
6
Submit Documentation Feedback
Copyright © 1998–2013, Texas Instruments Incorporated
Product Folder Links: DS89C21
DS89C21
www.ti.com
SNLS091C –JUNE 1998–REVISED APRIL 2013
REVISION HISTORY
Changes from Revision B (April 2013) to Revision C
Page
•
Changed layout of National Data Sheet to TI format ............................................................................................................ 6
Copyright © 1998–2013, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Links: DS89C21
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
DS89C21TM/NOPB
DS89C21TMX/NOPB
ACTIVE
SOIC
SOIC
D
D
8
8
95
RoHS & Green
SN
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
DS89C
21TM
ACTIVE
2500 RoHS & Green
SN
DS89C
21TM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
DS89C21TMX/NOPB
SOIC
D
8
2500
330.0
12.4
6.5
5.4
2.0
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 35.0
DS89C21TMX/NOPB
D
8
2500
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
9-Aug-2022
TUBE
T - Tube
height
L - Tube length
W - Tube
width
B - Alignment groove width
*All dimensions are nominal
Device
Package Name Package Type
SOIC
Pins
SPQ
L (mm)
W (mm)
T (µm)
B (mm)
DS89C21TM/NOPB
D
8
95
495
8
4064
3.05
Pack Materials-Page 3
PACKAGE OUTLINE
D0008A
SOIC - 1.75 mm max height
SCALE 2.800
SMALL OUTLINE INTEGRATED CIRCUIT
C
SEATING PLANE
.228-.244 TYP
[5.80-6.19]
.004 [0.1] C
A
PIN 1 ID AREA
6X .050
[1.27]
8
1
2X
.189-.197
[4.81-5.00]
NOTE 3
.150
[3.81]
4X (0 -15 )
4
5
8X .012-.020
[0.31-0.51]
B
.150-.157
[3.81-3.98]
NOTE 4
.069 MAX
[1.75]
.010 [0.25]
C A B
.005-.010 TYP
[0.13-0.25]
4X (0 -15 )
SEE DETAIL A
.010
[0.25]
.004-.010
[0.11-0.25]
0 - 8
.016-.050
[0.41-1.27]
DETAIL A
TYPICAL
(.041)
[1.04]
4214825/C 02/2019
NOTES:
1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.
Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed .006 [0.15] per side.
4. This dimension does not include interlead flash.
5. Reference JEDEC registration MS-012, variation AA.
www.ti.com
EXAMPLE BOARD LAYOUT
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
SEE
DETAILS
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:8X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED
METAL
EXPOSED
METAL
.0028 MAX
[0.07]
.0028 MIN
[0.07]
ALL AROUND
ALL AROUND
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4214825/C 02/2019
NOTES: (continued)
6. Publication IPC-7351 may have alternate designs.
7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
D0008A
SOIC - 1.75 mm max height
SMALL OUTLINE INTEGRATED CIRCUIT
8X (.061 )
[1.55]
SYMM
1
8
8X (.024)
[0.6]
SYMM
(R.002 ) TYP
[0.05]
5
4
6X (.050 )
[1.27]
(.213)
[5.4]
SOLDER PASTE EXAMPLE
BASED ON .005 INCH [0.125 MM] THICK STENCIL
SCALE:8X
4214825/C 02/2019
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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