ESD2CAN24-Q1 [TI]
适用于 CAN 和车辆网络的汽车双路 3pF、±24V、±30kV ESD 保护二极管;型号: | ESD2CAN24-Q1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 适用于 CAN 和车辆网络的汽车双路 3pF、±24V、±30kV ESD 保护二极管 二极管 |
文件: | 总27页 (文件大小:2325K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
ESD2CANxx24-Q1 适用于车载网络的
汽车类24V、2 通道ESD 保护二极管
1 特性
3 说明
• IEC 61000-4-2 4 级ESD 保护:
ESD2CANxx24-Q1 是一款用于控制器局域网 (CAN)
接口保护的双向 ESD 保护二极管。ESD2CANxx24-
Q1 的额定消散接触 ESD 冲击能力超过了 ISO 10605
汽车标准所规定的最高水平(±30 kV 接触放电,±30
kV 气隙放电)。低动态电阻和低钳位电压支持针对瞬
态事件提供系统级保护。这种保护很关键,因为汽车系
统对安全应用的稳健性和可靠性要求很高。
– ±30kV、±25kV 或±20kV 接触放电
– ±30kV、±25kV 或±20kV 气隙放电
• ISO 10605(330pF,330Ω)ESD 保护:
– ±30kV、±25kV 或±20kV 接触放电
– ±30kV、±25kV 或±20kV 气隙放电
• 经测试符合IEC 61000-4-5
• 24V 工作电压
• 双向ESD 保护
• 2 通道器件通过单个组件实现完整的ESD 保护
• 低钳位电压可保护下游组件
• 符合AEC-Q101 标准
• I/O 电容= 3pF、2.5pF 或1.7pF(典型值)
• SOT-23 (DBZ) 小型、标准、通用封装
• SOT-323、SC-70 (DCK) 超小、标准、节省空间、
通用封装
该器件具有每通道低 IO 电容和引脚排列,以便适合两
条汽车 CAN 总线(CANH 和 CANL),防止因静电放
电
(ESD) 和 其 他 瞬 变 造 成 损 坏 。 此 外 ,
ESD2CANxx24-Q1 的 3pF(典型值)或更小线路电容
适合 CAN、CANFD、CAN SiC 和支持高达 10Mbps
数据速率的CAN-XL 应用。
ESD2CANxx24-Q1 采用两种引线式封装,以便轻松实
现直通式路由。
封装信息(1)
• 引线式封装,用于自动光学检测(AOI)
封装尺寸(标称值)
器件型号
封装
2 应用
DBZ(SOT-23,3) 2.92mm × 1.30mm
DCK(SC-70,3) 2.00mm × 1.25mm
DBZ(SOT-23,3) 2.92mm × 1.30mm
DBZ(SOT-23,3) 2.92mm × 1.30mm
ESD2CAN24-Q1
• 汽车车载网络:
– 控制器局域网(CAN)
– 控制器局域网灵活数据速率(CAN-FD)
– 低速容错CAN
ESD2CANFD24-Q1
ESD2CANXL24-Q1
(1) 如需了解所有可用封装,请参阅产品说明书末尾的可订购产品
附录。
– 高速CAN
• 工业控制网络:
– DeviceNet IEC 62026-3
– CANopen –CiA 301/302-2 和EN 50325-4
CANH
TXD
RT/2
Application
CAN
CAN
Bus
(for example,
TRANSCEIVER
MCU I/O)
RT/2
RXD
CANL
1
2
C
G
ESD2CANxx24-Q1
3
ESD2CANxx24-Q1 典型应用
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLVSFW5
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
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Table of Contents
7.3 Feature Description...................................................11
7.4 Device Functional Modes..........................................12
8 Application and Implementation..................................13
8.1 Application Information............................................. 13
8.2 Typical Application.................................................... 13
9 Power Supply Recommendations................................14
10 Layout...........................................................................15
10.1 Layout Guidelines................................................... 15
10.2 Layout Example...................................................... 15
11 Device and Documentation Support..........................16
11.1 Documentation Support.......................................... 16
11.2 接收文档更新通知................................................... 16
11.3 支持资源..................................................................16
11.4 Trademarks............................................................. 16
11.5 Electrostatic Discharge Caution..............................16
11.6 术语表..................................................................... 16
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings—AEC Specification...............................4
6.3 ESD Ratings—IEC Specification................................ 4
6.4 ESD Ratings - ISO Specification.................................5
6.5 Recommended Operating Conditions.........................5
6.6 Thermal Information....................................................5
6.7 Electrical Characteristics.............................................5
6.8 Typical Characteristics –ESD2CAN24-Q1............... 7
6.9 Typical Characteristics –ESD2CANFD24-Q1...........9
7 Detailed Description......................................................11
7.1 Overview................................................................... 11
7.2 Functional Block Diagram......................................... 11
Information.................................................................... 16
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
Changes from Revision B (September 2022) to Revision C (November 2022)
Page
• 将ESD2CANFD24-Q1 和ESD2CANXL24-Q1 器件状态从预发布更改为正在供货......................................... 1
• Added the Application Curves section..............................................................................................................14
Changes from Revision A (June 2022) to Revision B (September 2022)
Page
• 将数据表状态从预告信息更改为量产数据.........................................................................................................1
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ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
5 Pin Configuration and Functions
IO
IO
1
2
3
GND
Not to scale
图5-1. DCK or DBZ Package, 3-Pin SC-70 or SOT-23 (Top View)
表5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
IO
NO.
1, 2
3
I/O
G
ESD protected IO
Connect to ground.
GND
(1) I = Input, O = Output, I/O = Input or Output, G = Ground, P = Power
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ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
Parameter
DEVICE
MIN
MAX
UNIT
ESD2CAN24-Q1
210
133
90
PPP
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
W
IEC 61000-4-5 Power (tp –8/20 µs) at 25°C
IEC 61000-4-5 current (tp –8/20 µs) at 25°C
5.7
3.5
2.5
150
150
155
IPP
ESD2CANFD24-Q1
ESD2CANXL24-Q1
A
TA
Operating free-air temperature
Junction temperature
-55
-55
-65
TJ
°C
Tstg
Storage temperature
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
6.2 ESD Ratings—AEC Specification
Parameter
Test Conditions
VALUE
± 2500
± 1000
UNIT
Human body model (HBM), per AEC Q101-001 (1)
Charged device model (CDM), per AEC Q101-005 (2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufactuuring with a standard ESD control proccess.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufactuuring with a standard ESD control proccess.
6.3 ESD Ratings—IEC Specification
over TA = 25°C (unless otherwise noted)
Parameter
Test Conditions
DEVICE
VALUE
±30000
±25000
±20000
±30000
±25000
±20000
UNIT
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
IEC 61000-4-2 Contact Discharge, all pins
V(ESD)
Electrostatic discharge
V
IEC 61000-4-2 Air-gap Discharge, all pins
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6.4 ESD Ratings - ISO Specification
over TA = 25°C (unless otherwise noted)
Parameter
Test Conditions
DEVICE
VALUE
±30000
±25000
±20000
±30000
±25000
±20000
±30000
±25000
±20000
±30000
±25000
±20000
UNIT
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ISO 10605, 150-pF, 330-Ω, IO
Contact discharge
ISO 10605, 330-pF, 330-Ω, IO
ISO 10605, 150-pF, 330-Ω, IO
ISO 10605, 330-pF, 330-Ω, IO
V(ESD)
Electrostatic discharge
V
Air-gap discharge
6.5 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
Parameter
MIN
-24
-55
NOM
MAX
24
UNIT
VIN
TA
Input voltage
V
Operating free-air temperature
150
°C
6.6 Thermal Information
ESD2CAN24-Q1
ESD2CANFD24-Q1 ESD2CANXL24-Q1
THERMAL METRIC(1)
DBZ (SOT-23) DCK (SOT-323 / SC-70)
DBZ (SOT-23)
3 PINS
DBZ (SOT-23)
3 PINS
UNIT
3 PINS
3 PINS
Junction-to-ambient thermal
resistance
RθJA
291.5
283.0
316.3
170.7
156.2
45.9
325.3
178.8
165.5
52.4
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Rθ
Junction-to-case (top) thermal
resistance
147.1
131.1
32.0
164.1
105.1
67.1
JC(top)
Junction-to-board thermal
resistance
RθJB
ΨJT
Junction-to-top characterization
parameter
Junction-to-board characterization
parameter
130.2
N/A
104.4
N/A
155.1
N/A
164.4
N/A
ΨJB
Rθ
Junction-to-case (bottom) thermal
resistance
JC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.7 Electrical Characteristics
over TA = 25°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
DEVICE
MIN
–24
TYP
MAX UNIT
VRWM
VBRF
VBRR
Reverse stand-off voltage
Breakdown voltage(2)
Breakdown voltage(2)
24
35.5
V
V
V
IIO = 10 mA, IO to GND
IIO = –10 mA, IO to GND
25.5
–35.5
–25.5
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ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
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over TA = 25°C (unless otherwise noted)(1)
PARAMETER
TEST CONDITIONS
IPP = 5.7 A, tp = 8/20 µs, IO to GND
IPP = 3.5 A, tp = 8/20 µs, IO to GND
IPP = 2.5 A, tp = 8/20 µs, IO to GND
DEVICE
MIN
TYP
37
MAX UNIT
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
ESD2CANFD24-Q1
ESD2CANXL24-Q1
VCLAMP Clamping voltage(3)
37
V
36
35
VCLAMP Clamping voltage(4)
IPP = 16 A, TLP, IO to GND or GND to IO
36
V
V
38
30
Holding voltage after
snapback
VHold
TLP
30
30
ILEAK
Leakage current
VIO = ±24 V, IO to GND
IO to GND and GND to IO
-50
5
50
nA
Ω
Ω
Ω
ESD2CAN24-Q1
0.35
0.45
0.57
3
RDYN
Dynamic resistance(4)
ESD2CANFD24-Q1
ESD2CANXL24-Q1
ESD2CAN24-Q1
5
4.2
2.8
CL
Line capacitance(5)
VIO = 0 V, f = 1 MHz, Vpp = 30 mV
ESD2CANFD24-Q1
ESD2CANXL24-Q1
2.5
1.7
pF
(1) Measurements made on each IO channel
(2) VBRF and VBRR are defined as the voltage when ±10 mA is applied in the positive and negative going direction respectively, before the
device latches into the snapback state
(3) Device stressed with 8/20 μs exponential decay waveform according to IEC 61000-4-5
(4) Non-repetitive current pulse, Transmission Line Pulse (TLP); square pulse; ANSI / ESD STM5.5.1-2008
(5) Measured from IO to GND on each channel
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6.8 Typical Characteristics –ESD2CAN24-Q1
28
26
24
22
20
18
16
14
12
10
8
28
26
24
22
20
18
16
14
12
10
8
6
6
4
4
2
2
0
0
5
10
15
20 25
Vclamp (V)
30
35
40
5
10
15
20 25
Vclamp (V)
30
35
40
tp = 100 ns, Transmission Line Pulse (TLP)
tp = 100 ns, Transmission Line Pulse (TLP)
图6-1. Positive TLP Curve
图6-2. Negative TLP Curve
150
25
0
125
100
75
-25
Vclamp_ESD at 30ns = -32.9V
-50
-75
50
Vclamp_ESD at 30ns = 28V
-100
-125
-150
-175
25
0
-25
-100
0
100
200
300
400
500
600
700
-100
0
100
200
300
400
500
600
700
Time(ns)
Time(ns)
图6-3. +8-kV Clamped IEC Waveform
图6-4. −8-kV Clamped IEC Waveform
10
8
3.2
3.1
3
6
4
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2
0
-2
-4
-6
-8
-10
-25 -20 -15 -10
-5
0
VR (V)
5
10
15
20
25
Frequency = 1MHz, Vpp = 30 mV
TA = 150 ꢀC
ILEAK is less than 1 nA at -55 ꢀC and 25 ꢀC.
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
VR (V)
图6-5. Capacitance vs. Bias Voltage
图6-6. Leakage Current vs. Bias Voltage Across Temperature
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6.8 Typical Characteristics –ESD2CAN24-Q1 (continued)
6
5.5
5
60
55
50
45
40
35
30
25
20
15
10
5
Current
Voltage
4.5
4
3.5
3
2.5
2
1.5
1
0.5
0
0
-5
0
5
10
15
20
25
30
35
40
Time (ꢀs)
图6-7. 8/20 μs Surge Response at 5.7 A
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6.9 Typical Characteristics –ESD2CANFD24-Q1
30
27
24
21
18
15
12
9
30
27
24
21
18
15
12
9
6
6
3
3
0
0
-3
-3
0
5
10
15
20 25
Vclamp (V)
30
35
40
45
0
5
10
15
20 25
Vclamp (V)
30
35
40
45
tp = 100 ns, Transmission Line Pulse (TLP)
tp = 100 ns, Transmission Line Pulse (TLP)
图6-9. Negative TLP Curve
图6-8. Positive TLP Curve
175
150
125
100
75
Vclamp_ESD at 30ns = 27.3V
50
25
0
-25
-100
0
100
200
300
400
500
600
700
Time(ns)
图6-10. +8-kV Clamped IEC Waveform
图6-11. −8-kV Clamped IEC Waveform
10
2.3
2.28
2.26
2.24
2.22
2.2
8
6
4
2
2.18
2.16
2.14
2.12
2.1
2.08
2.06
2.04
2.02
2
0
-2
-4
-6
-8
-10
-25 -20 -15 -10
-5
0
VR (V)
5
10
15
20
25
TA = 150 ꢀC
ILEAK is less than 1 nA at -55 ꢀC and 25 ꢀC.
-25 -20 -15 -10
-5
0
5
10
15
20
25
VR (V)
图6-12. Capacitance vs. Bias Voltage
图6-13. Leakage Current vs. Bias Voltage Across Temperature
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6.9 Typical Characteristics –ESD2CANFD24-Q1 (continued)
40
4
Voltage (V)
Current (A)
36
32
28
24
20
16
12
8
3.6
3.2
2.8
2.4
2
1.6
1.2
0.8
0.4
0
4
0
-5
0
5
10
15
20
25
30
35
40
45
Time (ꢀs)
图6-14. 8/20 μs Surge Response at 5.7 A
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7 Detailed Description
7.1 Overview
The ESD2CANxx24-Q1 is a dual-channel ESD TVS diode in SOT-23 and SC-70 leaded packages which are
convenient for automatic optical inspection. This product offers ISO 10605 ±30-kV or ±25-kV or ±20-kV air-gap,
±30-kV or ±25-kV or ±20-kV contact ESD protection, and has a clamp circuit with a back-to-back TVS diode for
bidirectional signal support. The 3 pF (typical) or less line capacitance of this ESD protection diode is suitable for
CAN, CANFD, CAN SiC, and CAN-XL applications that can support data rates up to 10 Mbps.
A typical application for this product is ESD circuit protection for CAN transceivers used in automotive
applications. The ESD2CANxx24-Q1 is a good fit for the ESD protection inside automotive electronic control
units (ECUs) for head lights, door modules, climate control, roof control, wipers, cluster, audio, and many other
automotive applications.
7.2 Functional Block Diagram
1
2
3
7.3 Feature Description
The ESD2CANxx24-Q1 is a bidirectional TVS with a high ESD protection level. This device protects the circuit
from ESD strikes up to ±30-kV or ±25-kV or ±20-kV contact and ±30-kV or ±25-kV or ±20-kV air-gap specified in
the ISO 10605 automotive standard. The device can also handle up to 5.7 A surge current (IEC 61000-4-5
8/20 µs). The I/O capacitance of 3-pF (typical) supports a data rate up to 10 Mbps. This clamping device has a
small dynamic resistance, which makes the clamping voltage low when the device is actively protecting other
circuits. For example, the clamping voltage is only 37 V when the device is taking 5.7 A transient surge current.
The breakdown is bidirectional so this protection device is a good fit for CAN which is a differential signal. Low
leakage allows the diode to conserve power when working below the VRWM. The temperature range of −55°C to
+150°C makes this ESD device work at extensive temperatures in most environments. The leaded SOT-23 and
SC-70 packages are good for applications requiring automatic optical inspection (AOI).
7.3.1 AEC-Q101 Qualified and Temperature Range
This device is qualified to AEC-Q101 standards and is qualified to operate from –55°C to +150°C.
7.3.2 ISO 10605 ESD Protection
The I/O pins can withstand ESD events of at least ±30-kV contact and ±30-kV air-gap in the leaded SOT-23 and
SC-70 packages according to the ISO 10605 (330 pF and 330 Ω loading condition) standard. An ESD-surge
clamp diverts the current to ground.
7.3.3 IEC 61000-4-5 Surge Protection
The IO pins can withstand surge events up to 5.7 A (8/20 µs waveform). An ESD-surge clamp diverts this
current to ground.
7.3.4 IO Capacitance
The capacitance between the I/O pins is 3 pF (typical) or less. This capacitance supports data rates for CAN,
CANFD, CAN SiC, and CAN-XL up to 10 Mbps.
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Product Folder Links: ESD2CAN24-Q1 ESD2CANFD24-Q1 ESD2CANXL24-Q1
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
www.ti.com.cn
7.3.5 Dynamic Resistance
The IO pins feature an ESD clamp that has a low RDYN of 0.57 Ω (Pin 1 or Pin 2 to Pin 3) and 0.57 Ω (Pin 3 to
Pin 1 or Pin 2) or less which prevents system damage during ESD events.
7.3.6 DC Breakdown Voltage
The DC breakdown voltage between the IO pins is a minimum of ± 25.5 V. This protects sensitive equipment
from surges above the reverse standoff voltage of ± 24 V.
7.3.7 Ultra Low Leakage Current
The IO pins feature an ultra-low leakage current of ± 50 nA (maximum) with a bias of ± 24 V.
7.3.8 Clamping Voltage
The IO pins feature an ESD clamp that is capable of clamping the voltage to 37 V (IPP = 5.7 A) and 35 V (IPP
=
16 A for TLP) for ESD2CAN24-Q1, and 38 V (IPP = 3.5 A) and 34 V (IPP = 16 A for TLP) for ESD2CANFD24-Q1,
and 36 V (IPP = 1.5 A) and 38 V (IPP = 16 A for TLP) for ESD2CANXL24-Q1.
7.3.9 Industry Standard Leaded Packages
This device features industry standard SOT-23 (DBZ) and SC-70 (DCK) leaded packages for automatic optical
inspection (AOI).
7.4 Device Functional Modes
The ESD2CANxx24-Q1 is a dual channel passive clamp that has low leakage during normal operation when the
voltage between pin 1 or pin 2 and pin 3 is below VRWM, and activates when the voltage between pin 1 or pin 2
and pin 3 goes above VBR. During ISO 10605 ESD events, transient voltages as high as ±30 kV can be clamped
on either channel. When the voltages on the protected lines fall below the VHOLD, the device reverts back to the
low leakage passive state.
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Product Folder Links: ESD2CAN24-Q1 ESD2CANFD24-Q1 ESD2CANXL24-Q1
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
www.ti.com.cn
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
8.1 Application Information
The ESD2CANxx24-Q1 is a dual channel TVS diode which is used to provide a path to ground for dissipating
ESD events on differential CAN signal lines. The CAN signal lines are typically routed throughout the automobile
to connect between the different ECUs. As the current from ESD passes through the TVS, only a small voltage
drop is present across the diode. This is the voltage presented to the protected IC. The low RDYN of the triggered
TVS holds this voltage, VCLAMP, to a safe level for the protected IC.
8.2 Typical Application
CANH
TXD
RT/2
Application
(for example,
MCU I/O)
CAN
Bus
CAN
TRANSCEIVER
RT/2
RXD
CANL
1
2
C
G
ESD2CANxx24-Q1
3
图8-1. ESD2CANxx24-Q1 Typical Application
8.2.1 Design Requirements
For this design example, the ESD2CANxx24-Q1 is used to provide ESD protection for a CAN transceiver. 表 8-1
lists the known design parameters for this application.
表8-1. Design Parameters for the ESD2CAN24-Q1 Typical Application
Design Parameter
Diode configuration
VIO differential signal range
VRWM
Value
Bidirectional
> ±1.5 V
±24 V
Jumpstart short to battery event on VIO
Data rate
±24 V
Up to 10 Mbps
60 Ω
RT/2
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Product Folder Links: ESD2CAN24-Q1 ESD2CANFD24-Q1 ESD2CANXL24-Q1
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
www.ti.com.cn
8.2.2 Detailed Design Procedure
The ESD2CANxx24-Q1 has a VRWM of ±24 V to protect the diode from being damaged during a short to battery
event that can occur by reversing the terminal connections during jumpstart. The bidirectional characteristic
enables the signal integrity of the differential CAN lines to not be impacted by the diode. The low capacitance of
3 pF (typical) or less enables data rates up to 10 Mbps, which allows the designer to meet the requirements for
CAN, CANFD, CAN SiC, and CAN-XL. The 60 Ω split termination improves the electromagnetic emissions
behavior of the network by filtering higher-frequency common-mode noise that may be present on the differential
signal lines.
8.2.3 Application Curves
150
125
100
75
25
0
-25
Vclamp_ESD at 30ns = -32.9V
-50
-75
50
Vclamp_ESD at 30ns = 28V
-100
-125
-150
-175
25
0
-25
-100
0
100
200
300
400
500
600
700
-100
0
100
200
300
400
500
600
700
Time(ns)
Time(ns)
图8-2. +8-kV Clamped IEC Waveform
图8-3. −8-kV Clamped IEC Waveform
6
5.5
5
60
Current
55
Voltage
50
4.5
4
45
40
35
30
25
20
15
10
5
3.5
3
2.5
2
1.5
1
0.5
0
0
-5
0
5
10
15
20
25
30
35
40
Time (ꢀs)
图8-4. 8/20 µs Surge Response at 5.7 A
9 Power Supply Recommendations
This device is a passive TVS diode-based ESD protection device, therefore there is no requirement to power it.
Ensure that the maximum voltage specifications for each pin are not violated.
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www.ti.com.cn
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
10 Layout
10.1 Layout Guidelines
• The optimum placement of the device is as close to the connector as possible.
– EMI during an ESD event can couple from the trace being struck to other nearby unprotected traces,
resulting in early system failures.
– The PCB designer must minimize the possibility of EMI coupling by keeping any unprotected traces away
from the protected traces which are between the TVS and the connector.
• Route the protected traces as straight as possible.
• Eliminate any sharp corners on the protected traces between the TVS and the connector by using rounded
corners with the largest radii possible.
– Electric fields tend to build up on corners, increasing EMI coupling.
• If pin 3 is connected to ground, use a thick and short trace for this return path.
10.2 Layout Example
This example is typical of a dual channel differential data pair application, such as CAN.
IO1
GND
IO2
= VIA to GND
图10-1. Routing with DBZ and DCK Package
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Product Folder Links: ESD2CAN24-Q1 ESD2CANFD24-Q1 ESD2CANXL24-Q1
ESD2CAN24-Q1, ESD2CANFD24-Q1, ESD2CANXL24-Q1
ZHCSM68C –APRIL 2022 –REVISED NOVEMBER 2022
www.ti.com.cn
11 Device and Documentation Support
TI offers an extensive line of development tools. Tools and software to evaluate the performance of the device,
generate code, and develop solutions are listed below.
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation, see the following:
• Texas Instruments, ESD Layout Guide user's guide
• Texas Instruments, ESD Protection Diodes EVM user's guide
• Texas Instruments, Generic ESD Evaluation Module user's guide
• Texas Instruments, Reading and Understanding an ESD Protection data sheet
11.2 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2022 Texas Instruments Incorporated
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Product Folder Links: ESD2CAN24-Q1 ESD2CANFD24-Q1 ESD2CANXL24-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
2-Dec-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
ESD2CAN24DBZRQ1
ESD2CAN24DCKRQ1
ESD2CANFD24DBZRQ1
ESD2CANXL24DBZRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SC70
DBZ
DCK
DBZ
DBZ
3
3
3
3
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-3-260C-168 HR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-55 to 150
-55 to 150
-50 to 150
-50 to 150
1L3
Samples
Samples
Samples
Samples
NIPDAU
NIPDAU
NIPDAU
1L6
SOT-23
SOT-23
2QP8
2RI8
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
2-Dec-2022
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF ESD2CANFD24-Q1 :
Catalog : ESD2CANFD24
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Dec-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
ESD2CAN24DBZRQ1
ESD2CAN24DCKRQ1
SOT-23
SC70
DBZ
DCK
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
180.0
178.0
180.0
180.0
8.4
9.0
8.4
8.4
2.9
2.4
2.9
2.9
3.35
2.5
1.35
1.2
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
ESD2CANFD24DBZRQ1 SOT-23
ESD2CANXL24DBZRQ1 SOT-23
3.35
3.35
1.35
1.35
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Dec-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
ESD2CAN24DBZRQ1
ESD2CAN24DCKRQ1
ESD2CANFD24DBZRQ1
ESD2CANXL24DBZRQ1
SOT-23
SC70
DBZ
DCK
DBZ
DBZ
3
3
3
3
3000
3000
3000
3000
210.0
190.0
210.0
210.0
185.0
190.0
185.0
185.0
35.0
30.0
35.0
35.0
SOT-23
SOT-23
Pack Materials-Page 2
PACKAGE OUTLINE
DCK0003A
SOT-SC70 - 1.1 max height
S
C
A
L
E
5
.
6
0
0
SMALL OUTLINE TRANSISTOR SC70
C
2.4
1.8
0.1 C
1.4
1.1
B
1.1 MAX
A
PIN 1
INDEX AREA
1
2
0.65
1.3
2.15
1.85
3
0.30
3X
0.15
C A B
0.1
0.0
0.1
(0.9)
TYP
0.15
0.22
0.08
GAGE PLANE
TYP
0.46
0.26
8
TYP
TYP
0
SEATING PLANE
4220745/C 06/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
www.ti.com
EXAMPLE BOARD LAYOUT
DCK0003A
SOT-SC70 - 1.1 max height
SMALL OUTLINE TRANSISTOR SC70
PKG
3X (0.95)
3X (0.4)
1
SYMM
3
(1.3)
(0.65)
2
(R0.05) TYP
(2.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:18X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
EXPOSED METAL
EXPOSED METAL
0.07 MIN
ARROUND
0.07 MAX
ARROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4220745/C 06/2021
NOTES: (continued)
3. Publication IPC-7351 may have alternate designs.
4. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DCK0003A
SOT-SC70 - 1.1 max height
SMALL OUTLINE TRANSISTOR SC70
PKG
3X (0.95)
3X (0.4)
1
SYMM
3
(1.3)
(0.65)
2
(R0.05) TYP
(2.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:18X
4220745/C 06/2021
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
6. Board assembly site may have different recommendations for stencil design.
www.ti.com
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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SI9137DB
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