INA105KP-BI [TI]

OP-AMP, 500uV OFFSET-MAX, PDIP8, PLASTIC, DIP-8;
INA105KP-BI
型号: INA105KP-BI
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OP-AMP, 500uV OFFSET-MAX, PDIP8, PLASTIC, DIP-8

放大器 光电二极管
文件: 总17页 (文件大小:709K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
®
INA105  
Precision Unity Gain  
DIFFERENTIAL AMPLIFIER  
FEATURES  
APPLICATIONS  
CMR 86dB min OVER TEMPERATURE  
DIFFERENTIAL AMPLIFIER  
GAIN ERROR: 0.01% max  
INSTRUMENTATION AMPLIFIER  
BUILDING BLOCK  
NONLINEARITY: 0.001% max  
UNITY-GAIN INVERTING AMPLIFIER  
GAIN-OF-1/2 AMPLIFIER  
NO EXTERNAL ADJUSTMENTS  
REQUIRED  
EASY TO USE  
NONINVERTING GAIN-OF-2 AMPLIFIER  
AVERAGE VALUE AMPLIFIER  
ABSOLUTE VALUE AMPLIFIER  
SUMMING AMPLIFIER  
COMPLETE SOLUTION  
HIGHLY VERSATILE  
LOW COST  
PLASTIC DIP, TO-99 HERMETIC METAL,  
SYNCHRONOUS DEMODULATOR  
AND SO-8 SOIC PACKAGES  
CURRENT RECEIVER WITH COMPLIANCE  
TO RAILS  
4mA TO 20mA TRANSMITTER  
VOLTAGE-CONTROLLED CURRENT  
SOURCE  
ALL-PASS FILTERS  
DESCRIPTION  
The INA105 is a monolithic Gain = 1 differential  
amplifier consisting of a precision op amp and on-chip  
metal film resistors. The resistors are laser trimmed  
for accurate gain and high common-mode rejection.  
Excellent TCR tracking of the resistors maintains  
gain accuracy and common-mode rejection over  
temperature.  
25kΩ  
25kΩ  
2
5
7
6
4
1
–In  
Sense  
V+  
Output  
V–  
25kΩ  
25kΩ  
The differential amplifier is the foundation of many  
commonly used circuits. The INA105 provides this  
precision circuit function without using an expensive  
precision resistor network. The INA105 is available in  
8-pin plastic DIP, SO-8 surface-mount and TO-99  
metal packages.  
3
+In  
Ref  
International Airport Industrial Park  
Mailing Address: PO Box 11400, Tucson, AZ 85734  
FAXLine: (800) 548-6133 (US/Canada Only)  
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706  
Tel: (520) 746-1111 • Twx: 910-952-1111  
Internet: http://www.burr-brown.com/  
Cable: BBRCORP  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
©1985 Burr-Brown Corporation  
PDS-617G  
Printed in U.S.A. August, 1993  
SBOS145  
SPECIFICATIONS  
ELECTRICAL  
At +25°C, VCC = ±15V, unless otherwise noted.  
INA105AM  
TYP  
INA105BM  
TYP  
INA105KP, KU  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
GAIN  
Initial(1)  
Error  
vs Temperature  
Nonlinearity(2)  
1
0.005  
1
0.01  
V/V  
%
ppm/°C  
%
0.01  
5
0.001  
0.025  
0.0002  
OUTPUT  
Rated Voltage  
Rated Current  
Impedance  
Current Limit  
Capacitive Load  
IO = +20mA, –5mA  
O = 10V  
10  
+20, –5  
12  
V
mA  
mA  
pF  
V
0.01  
+40/–10  
1000  
To Common  
Stable Operation  
INPUT  
Impedance(3)  
Differential  
Common-Mode  
Differential  
Common-Mode  
TA = TMIN to TMAX  
50  
50  
kΩ  
kΩ  
V
V
dB  
Voltage Range(4)  
±10  
±20  
80  
86  
72  
Common-Mode Rejection(5)  
90  
100  
OFFSET VOLTAGE  
Initial  
vs Temperature  
vs Supply  
RTO(6), (7)  
50  
5
1
250  
20  
25  
5
10  
15  
500  
µV  
µV/°C  
µV/V  
±VS = 6V to 18V  
vs Time  
20  
µV/mo  
OUTPUT NOISE VOLTAGE  
RTO(6), (8)  
fB = 0.01Hz to 10Hz  
2.4  
60  
µVp-p  
nV/Hz  
f
O = 10kHz  
DYNAMIC RESPONSE  
Small Signal Bandwidth  
Full Power Bandwidth  
Slew Rate  
Settling Time: 0.1%  
0.01%  
–3dB  
O = 20Vp-p  
1
50  
3
4
5
MHz  
kHz  
V/µs  
µs  
µs  
µs  
V
30  
2
V
V
O = 10V Step  
O = 10V Step  
CM = 10V Step, VDIFF = 0V  
0.01%  
V
1.5  
POWER SUPPLY  
Rated  
Voltage Range  
Quiescent Current  
±15  
V
V
mA  
Derated Performance  
±5  
±18  
±2  
VO = 0V  
±1.5  
TEMPERATURE RANGE  
Specification  
Operation  
–40  
–55  
–65  
+85  
+125  
+150  
–40  
–40  
+85  
+125  
°C  
°C  
°C  
Storage  
Specification same as for INA105AM.  
NOTES: (1) Connected as difference amplifier (see Figure 4). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale peak-  
to-peak output. (3) 25kresistors are ratio matched but have ±20% absolute value. (4) Maximum input voltage without protection is 10V more than either ±15V supply  
(±25V). Limit IIN to 1mA. (5) With zero source impedance (see “Maintaining CMR” section). (6) Referred to output in unity-gain difference configuration. Note that this  
circuit has a gain of 2 for the operational amplifier’s offset voltage and noise voltage. (7) Includes effects of amplifier’s input bias and offset currents. (8) Includes effects  
of amplifier’s input current noise and thermal noise contribution of resistor network.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
INA105  
PIN CONFIGURATIONS  
Top View  
TO-99  
Top View  
DIP/SOIC  
Tab  
8
No Internal  
Connection  
Ref  
1
V+  
7
1
2
3
4
No Internal Connection  
Ref  
–In  
+In  
V–  
8
7
6
5
(1)  
V+  
–In  
2
6
Output  
Output  
Sense  
3
5
Sense  
+In  
4
INA105AM  
INA105BM  
V–  
NOTE: (1) Performance grade identifier box for small outline surface mount.  
Blank indicates K grade. Part is marked INA105U.  
Case internally connected to V–. Make no connection.  
ABSOLUTE MAXIMUM RATINGS  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
This integrated circuit can be damaged by ESD. Burr-Brown  
recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
Supply ................................................................................................ ±18V  
Input Voltage Range ............................................................................ ±VS  
Operating Temperature Range: M .................................. –55°C to +125°C  
P, U ................................ –40°C to +85°C  
Storage Temperature Range: M ..................................... –65°C to +150°C  
P, U ................................. –40°C to +125°C  
Lead Temperature (soldering, 10s) M, P ....................................... +300°C  
Wave Soldering (3s, max) U .......................................................... +260°C  
Output Short Circuit to Common .............................................. Continuous  
ESD damage can range from subtle performance degradation  
to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric  
changes could cause the device not to meet its published  
specifications.  
PACKAGE/ORDERING INFORMATION  
PACKAGE  
DRAWING TEMPERATURE  
PRODUCT  
PACKAGE  
NUMBER(1)  
RANGE  
INA105AM  
INA105BM  
INA105KP  
INA105KU  
TO-99 Metal  
TO-99 Metal  
8-Pin Plastic DIP  
8-Pin SOIC  
001  
001  
006  
182  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
NOTE: (1) For detailed drawing and dimension table, please see end of data  
sheet, or Appendix C of Burr-Brown IC Data Book.  
®
3
INA105  
TYPICAL PERFORMANCE CURVES  
At TA = 25°C, VS = ±15V, unless otherwise noted.  
SMALL SIGNAL RESPONSE  
(No Load)  
STEP RESPONSE  
+50  
0
–50  
0
5
10  
0
4
8
12  
16  
Time (µs)  
Time (µs)  
MAXIMUM VOUT vs IOUT  
(Negative Swing)  
SMALL SIGNAL RESPONSE  
(RLOAD =, CLOAD = 1000pF)  
–17.5  
–15  
–12.5  
–10  
–7.5  
–5  
VS = ±18V  
+50  
0
VS = ±15V  
VS = ±12V  
–50  
VS = ±5V  
–4  
–2.5  
0
0
5
10  
0
–2  
–6  
–IOUT (mA)  
–8  
–10  
–12  
Time (µs)  
MAXIMUM VOUT vs IOUT  
(Positive Swing)  
CMR vs FREQUENCY  
110  
100  
90  
17.5  
15  
VS = ±18V  
VS = ±15V  
BM  
12.5  
10  
AM, KP, U  
VS = ±12V  
7.5  
5
80  
VS = ±5V  
70  
2.5  
0
60  
10  
100  
1k  
10k  
100k  
0
6
12  
18  
24  
30  
36  
Frequency (Hz)  
I
OUT (mA)  
®
4
INA105  
TYPICAL PERFORMANCE CURVES (CONT)  
At TA = 25°C, VS = ±15V, unless otherwise noted.  
POWER SUPPLY REJECTION  
vs FREQUENCY  
COMMON-MODE INPUT RANGE vs SUPPLY  
(Difference Amplifier Connected, VOUT = 0)  
140  
120  
100  
80  
36  
30  
24  
18  
12  
6
Negative CMV  
Positive CMV  
V–  
60  
V+  
40  
0
1
10  
100  
1k  
10k  
100k  
±3  
±6  
±9  
±12  
±15  
±18  
±21  
Frequency (Hz)  
Supply Voltage (V)  
APPLICATION INFORMATION  
V–  
V+  
Figure 1 shows the basic connections required for operation  
of the INA105. Power supply bypass capacitors should be  
connected close to the device pins.  
1µF  
1µF  
4
7
INA105  
The differential input signal is connected to pins 2 and 3 as  
shown. The source impedances connected to the inputs must  
be nearly equal to assure good common-mode rejection. A  
5mismatch in source impedance will degrade the com-  
mon-mode rejection of a typical device to approximately  
80dB. If the source has a known mismatch in source imped-  
ance, an additional resistor in series with one input can be  
used to preserve good common-mode rejection.  
R1  
R2  
2
5
6
V2  
25k  
25k  
R3  
3
V3  
VOUT = V3 – V2  
25k  
The output is referred to the output reference terminal (pin  
1) which is normally grounded. A voltage applied to the Ref  
terminal will be summed with the output signal. This can be  
used to null offset voltage as shown in Figure 2. The source  
impedance of a signal applied to the Ref terminal should be  
less than 10to maintain good common-mode rejection.  
R4  
25k  
1
Do not interchange pins 1 and 3 or pins 2 and 5, even though  
nominal resistor values are equal. These resistors are laser  
trimmed for precise resistor ratios to achieve accurate gain  
and highest CMR. Interchanging these pins would not pro-  
vide specified performance.  
FIGURE 1. Basic Power Supply and Signal Connections.  
®
5
INA105  
V1  
INA105  
INA105  
–In  
A1  
R1  
R2  
2
5
6
V2  
2
5
6
1
R2  
VO  
R1  
V0  
0utput  
R2  
10  
R3  
3
V3  
3
R4  
A2  
+15V  
V1  
+In  
1
VO = V3 – V3  
Offset Adjustment  
Range = ±300µV  
499k  
VO = (1 + 2R2/R1) (V2 –V1)  
100k  
For low source impedance applications, an input stage using OPA27 op  
amps will give the best low noise, offset, and temperature drift performance.  
At source impedances above about 10k, the bias current noise of the  
OPA27 reacting with the input impedance begins to dominate the noise  
performance. For these applications, using the OPA111 or dual OPA2111  
FET input op amp will provide lower noise performance. For lower cost use  
the OPA121 plastic. To construct an electrometer use the OPA128.  
10  
–15V  
FIGURE 2. Offset Adjustment.  
R1  
R2  
GAIN CMRR MAX NOISE AT 1kHz  
INA105BM  
R2  
A1, A2  
()  
() (V/V)  
(dB)  
IB  
(nV/HZ)  
OPA27A  
OPA111B  
OPA128LM 202  
50.5 2.5k 100  
202  
128  
110  
118  
40nA  
1pA  
75fA  
4
10  
38  
R1  
25k  
–In  
V2  
10k  
10k  
100  
100  
2
5
6
1
25k  
FIGURE 4. Precision Instrumentation Amplifier.  
V0  
R3  
25k  
R4  
+In  
V3  
3
INA105  
25k  
2
5
6
1
V
0 = V3 – V2  
100  
1%  
Gain Error = 0.005%  
CMR = 100dB  
Nonlinearity = 0.0002%  
V–  
V0  
0 to 2V  
100  
1%  
3
FIGURE 3. Precision Difference Amplifier.  
IIN  
0 to 20mA  
FIGURE 5. Current Receiver with Compliance to Rails.  
®
6
INA105  
INA105  
INA105  
2
5
2
5
6
V2  
V0  
6
V0  
1
3
V1  
V
0 = V1  
Gain Error = 0.001% maximum  
1
3
V0 = – V2  
FIGURE 9. Precision Unity-Gain Buffer.  
Gain Error = 0.01% maximum  
Nonlinearity = 0.001% maximum  
Gain Drift = 2ppm/°C  
V+  
V+  
3
FIGURE 6. Precision Unity-Gain Inverting Amplifier.  
INA105  
2
+15V  
2
5
7
6
+10V Out  
6
REF10  
INA105  
(V+)/2  
–10V Out  
2
5
6
4
1
3
1
4
Common  
Common  
FIGURE 10. Pseudoground Generator.  
FIGURE 7. ±10V Precision Voltage Reference.  
INA105  
2
5
V+  
2
6
REF10  
6
+5V Out  
–5V Out  
V0  
2
1
V1  
INA105  
4
V3  
3
5
V
0 = (V1 + V3)/2, ±0.01% maximum  
6
FIGURE 11. Precision Average Value Amplifier.  
1
3
FIGURE 8. ±5V Precision Voltage Reference.  
®
7
INA105  
INA105  
INA105  
0 to +10V Output  
±2ppm/°C  
2
5
2
5
6
V0  
Output  
6
1
3
(1)  
1
V1  
–10V  
to  
+10V  
Input  
3
Device  
VFC320 0-10kHz  
VFC100 0-FCLOCK/2  
DAC80 0-FS (12 bits)  
DAC703 0-FS (16 bits)  
XTR110 4-20mA  
Output  
V0 = 2 • V1  
Gain Error = 0.01% maximum  
Gain Drift = 2ppm/°C  
2
FIGURE 12. Precision (G = 2) Amplifier.  
6
REF10  
10V  
INA105  
4
NOTE: (1) Unipolar Input Device.  
2
5
FIGURE 15. Precision Bipolar Offsetting.  
6
V0  
1
V1  
V3  
3
R1  
R2  
2
5
INA105  
V0 = V1 + V3, ±0.01% maximum  
FIGURE 13. Precision Summing Amplifier.  
6
V0  
1
3
V1  
V3  
INA105  
For G=10,  
See INA106.  
2
)( V + V  
)
R2  
R1  
1
3
V0  
=
(
1 +  
2
5
6
FIGURE 16. Precision Summing Amplifier with Gain.  
V0  
= 1/2 V3  
3
V3  
±20V  
1
V0 = V3/2, ±0.01%  
FIGURE 14. Precision Gain = 1/2 Amplifier.  
®
8
INA105  
Offset  
Adjust  
6
7
8
Noise (60Hz hum)  
INA101AG  
3
4
A1  
Transducer or  
Analog Signal  
10kΩ  
5
20kΩ  
20kΩ  
10kΩ  
10kΩ  
A3  
RG  
Output  
1
10  
11  
12  
A2  
10kΩ  
Noise (60Hz hum)  
100k  
Shield  
2
13  
9
14 Common  
+VCC –VCC  
3
INA105  
2
5
6
1
FIGURE 17. Instrumentation Amplifier Guard Drive Generator.  
INA105  
2
5
6
INA105  
2
5
6
3
1
V1  
V2  
V0  
3
1
V3  
V4  
V
0 = V3 + V4 – V1 – V2  
FIGURE 18. Precision Summing Instrumentation Amplifier.  
®
9
INA105  
INA105  
INA105  
2
5
6
1
V2  
R
R
2
5
6
1
V1  
V01  
3
V1  
3
IO = (V1 – V2) (1/25k + 1/R)  
For R 200, Figure 24 will  
provide superior performance.  
Load  
IO  
V2  
FIGURE 19. Precision Voltage-to-Current Converter with  
Differential Inputs.  
INA105  
2
5
6
1
INA105  
V02  
2
5
6
V2  
3
R
V01 – V02 = 2 (V2 – V1)  
3
V3  
1
FIGURE 22. Differential Output Difference Amplifier.  
IO = (V3 – V2)/R  
IO  
Load  
INA105  
2
5
6
1
V2  
FIGURE20. DifferentialInputVoltage-to-CurrentConverter  
for Low IOUT  
.
R 200Ω  
R
3
V3  
Gate can be  
+VCC –5V  
INA105  
2
5
6
1
V2  
IO = (V3 – V2)/R  
R
R
Load  
IO  
R < 200Ω  
Gate can be  
+VS –5V  
3
FIGURE 23. Isolating Current Source with Buffering Ampli-  
fier for Greater Accuracy.  
V3  
IO = (V3 – V2) (1/25k + 1/R)  
Load  
IO  
FIGURE 21. Isolating Current Source.  
®
10  
INA105  
Window Center–Window Span  
2
5
6
Window Span  
0 to +5V  
1
3
5
3
2
10  
9
INA105  
Lower Limit  
VIN  
HI  
4115  
Window  
Comparator  
2
GO  
LO  
7
Upper Limit  
5
Window  
Center  
±10V  
8
6
3
1
INA105  
Window Center + Window Span  
FIGURE 24. Window Comparator with Window Span and Window Center Inputs.  
–In  
V1  
(1)  
INA105  
V+  
R2  
2
3
5
R
R
R1  
6
1
R2  
1kΩ  
(1)  
+In  
V2  
Load IO  
I
O = (E2 – E1) (1 +2R2/R1) (1/25k + 1/R)  
NOTE: (1) See Figure 5 for op amp recommendation.  
FIGURE 25. Precision Voltage-Controlled Current Source with Buffered Differential Inputs and Gain.  
INA105  
2
5
6
V1  
VO  
DG188  
3
1
Logic In  
VO  
–V1  
+V1  
1
0
1
Logic  
In  
FIGURE 26. Digitally Controlled Gain of ±1 Amplifier.  
®
11  
INA105  
INA105  
R2  
R2  
2
5
V1  
A
1
R1  
49.5Ω  
6
V0 = 200 (V2 – V1)  
1
3
A3  
R1  
R1  
49.5Ω  
R2  
R2  
A2  
V2  
Conventional  
INA105  
A = 2  
Instrumentation  
Amplifier (e.g., INA101 or INA102)  
A = 100  
FIGURE 27. Boosting Instrumentation Amplifier Common-Mode Range From ±5 to ±7.5V with 10V Full-Scale Output.  
INA105  
R1  
R2  
2
5
6
10pF  
D1  
R3  
R4  
V0 = |V1|  
3
1
D2  
OPA111  
V1  
Input  
R5  
2kΩ  
FIGURE 28. Precision Absolute Value Buffer.  
12.5k  
1k  
0 to 10V  
In  
50k  
INA105  
2
5
6
1
OPA27  
+15V  
2
50.1  
6
10V  
REF10  
50.1  
3
4
RLOAD  
4 to 20mA  
Out  
FIGURE 29. Precision 4-20mA Current Transmitter.  
®
12  
INA105  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
PACKAGING INFORMATION  
Orderable Device  
INA105AM  
Status Package Type Package Pins Package  
Eco Plan Lead/Ball Finish  
MSL Peak Temp  
Op Temp (°C)  
Top-Side Markings  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4)  
NRND  
TO-99  
TO-99  
PDIP  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
LMC  
8
8
8
8
8
8
8
8
20  
Green (RoHS  
& no Sb/Br)  
AU  
N / A for Pkg Type  
INA105AM  
INA105BM  
NRND  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
LMC  
P
1
50  
Green (RoHS  
& no Sb/Br)  
AU  
N / A for Pkg Type  
INA105BM  
INA105KP  
INA105KP  
INA105KP  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
CU NIPDAU  
N / A for Pkg Type  
INA105KPG4  
INA105KU  
P
50  
Green (RoHS  
& no Sb/Br)  
N / A for Pkg Type  
D
75  
Green (RoHS  
& no Sb/Br)  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-40 to 85  
-40 to 85  
-40 to 85  
-40 to 85  
INA  
105U  
INA105KU/2K5  
INA105KU/2K5E4  
INA105KUE4  
D
2500  
2500  
75  
Green (RoHS  
& no Sb/Br)  
INA  
105U  
D
Green (RoHS  
& no Sb/Br)  
INA  
105U  
D
Green (RoHS  
& no Sb/Br)  
INA  
105U  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
11-Apr-2013  
(4)  
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a  
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
24-Jul-2013  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA105KU/2K5  
SOIC  
D
8
2500  
330.0  
12.4  
6.4  
5.2  
2.1  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
24-Jul-2013  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 35.0  
INA105KU/2K5  
D
8
2500  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale  
supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or  
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the  
third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration  
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered  
documentation. Information of third parties may be subject to additional restrictions.  
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.  
TI is not responsible or liable for any such statements.  
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements  
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support  
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which  
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause  
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use  
of any TI components in safety-critical applications.  
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to  
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and  
requirements. Nonetheless, such components are subject to these terms.  
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties  
have executed a special agreement specifically governing such use.  
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in  
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components  
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and  
regulatory requirements in connection with such use.  
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of  
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.  
Products  
Applications  
Audio  
www.ti.com/audio  
amplifier.ti.com  
dataconverter.ti.com  
www.dlp.com  
Automotive and Transportation www.ti.com/automotive  
Communications and Telecom www.ti.com/communications  
Amplifiers  
Data Converters  
DLP® Products  
DSP  
Computers and Peripherals  
Consumer Electronics  
Energy and Lighting  
Industrial  
www.ti.com/computers  
www.ti.com/consumer-apps  
www.ti.com/energy  
dsp.ti.com  
Clocks and Timers  
Interface  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
www.ti.com/industrial  
www.ti.com/medical  
Medical  
Logic  
Security  
www.ti.com/security  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Space, Avionics and Defense  
Video and Imaging  
www.ti.com/space-avionics-defense  
www.ti.com/video  
microcontroller.ti.com  
www.ti-rfid.com  
www.ti.com/omap  
OMAP Applications Processors  
Wireless Connectivity  
TI E2E Community  
e2e.ti.com  
www.ti.com/wirelessconnectivity  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2013, Texas Instruments Incorporated  

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