INA117BM-3 [TI]
High Common-Mode Voltage DIFFERENCE AMPLIFIER; 高共模电压差动放大器型号: | INA117BM-3 |
厂家: | TEXAS INSTRUMENTS |
描述: | High Common-Mode Voltage DIFFERENCE AMPLIFIER |
文件: | 总17页 (文件大小:312K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
INA117
IN
A
11
7
INA117
www.ti.com
High Common-Mode Voltage
DIFFERENCE AMPLIFIER
FEATURES
APPLICATIONS
ꢀ COMMON-MODE INPUT RANGE:
ꢀ CURRENT MONITOR
±200V (VS = ±15V)
ꢀ BATTERY CELL-VOLTAGE MONITOR
ꢀ GROUND BREAKER
ꢀ PROTECTED INPUTS:
±500V Common-Mode
±500V Differential
ꢀ INPUT PROTECTION
ꢀ SIGNAL ACQUISITION IN NOISY
ꢀ UNITY GAIN: 0.02% Gain Error max
ꢀ NONLINEARITY: 0.001% max
ꢀ CMRR: 86dB min
ENVIRONMENTS
ꢀ FACTORY AUTOMATION
DESCRIPTION
The INA117 is a precision unity-gain difference
amplifier with very high common-mode input voltage
range. It is a single monolithic IC consisting of a
precision op amp and integrated thin-film resistor
network. It can accurately measure small differential
voltages in the presence of common-mode signals up
to ±200V. The INA117 inputs are protected from
momentary common-mode or differential overloads
up to ±500V.
21.11kΩ
RefB
–In
+In
V–
Comp
V+
1
2
3
4
8
7
6
5
380kΩ
380kΩ
380kΩ
20kΩ
In many applications, where galvanic isolation is not
essential, the INA117 can replace isolation amplifiers.
This can eliminate costly isolated input-side power
supplies and their associated ripple, noise and quies-
cent current. The INA117’s 0.001% nonlinearity and
200kHz bandwidth are superior to those of conven-
tional isolation amplifiers.
VO
RefA
The INA117 is available in 8-pin plastic mini-DIP and
SO-8 surface-mount packages, specified for the –40°C
to +85°C temperature range. The metal TO-99 models
are available specified for the –40°C to +85°C and
–55°C to +125°C temperature range.
Copyright © 2000, Texas Instruments Incorporated
SBOS154A
Printed in U.S.A. December, 2000
SPECIFICATIONS
At TA = +25°C, VS = ±15V, unless otherwise noted.
INA117AM, SM
INA117BM
TYP
INA117P, KU
TYP
PARAMETER
GAIN
Initial
Error
CONDITIONS
MIN
TYP
MAX
MIN
MAX
MIN
MAX
UNITS
(1)
1
0.01
2
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V/V
%
ppm/°C
%
0.05
10
0.02
ꢀ
ꢀ
ꢀ
ꢀ
vs Temperature
(2)
Nonlinearity
0.0002 0.001
ꢀ
ꢀ
OUTPUT
Rated Voltage
Rated Current
Impedance
Current Limit
Capacitive Load
IO = +20mA, –5mA
10
+20, –5
12
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
V
mA
Ω
mA
pF
VO = 10V
0.01
+49, –13
1000
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
To Common
Stable Operation
INPUT
Impedance
Differential
Common-Mode
Differential
800
400
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
kΩ
kΩ
V
Voltage Range
±10
Common-Mode, Continuous
±200
ꢀ
ꢀ
V
(3)
Common-Mode Rejection
DC
70
66
80
80
86
66
94
94
ꢀ
ꢀ
ꢀ
ꢀ
dB
dB
AC, 60Hz
VCM = 400Vp-p
vs Temperature, DC
AM, BM, P, KU
SM
TA = TMIN to TMAX
66
60
75
75
80
90
ꢀ
dB
dB
(4)
OFFSET VOLTAGE
RTO
Initial
120
1000
40
ꢀ
1000
ꢀ
600
ꢀ
ꢀ
ꢀ
ꢀ
2000
µV
µV
µV/°C
dB
KU Grade (SO-8 Package)
vs Temperature
vs Supply
TA = TMIN to TMAX
VS = ±5V to ±18V
8.5
90
200
ꢀ
ꢀ
ꢀ
40
ꢀ
74
80
ꢀ
vs Time
µV/mo
(5)
OUTPUT NOISE VOLTAGE
fB = 0.01Hz to 10Hz
fB = 10kHz
RTO
25
550
ꢀ
ꢀ
ꢀ
ꢀ
µVp-p
nV/√Hz
DYNAMIC RESPONSE
Gain Bandwidth, –3dB
Full Power Bandwidth
Slew Rate
Settling Time: 0.1%
0.01%
200
ꢀ
ꢀ
kHz
kHz
V/µs
µs
µs
µs
VO = 20Vp-p
30
2
ꢀ
ꢀ
ꢀ
ꢀ
2.6
6.5
10
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
VO = 10V Step
VO = 10V Step
VCM = 10V Step, VDIFF = 0V
0.01%
4.5
POWER SUPPLY
Rated
Voltage Range
Quiescent Current
±15
ꢀ
ꢀ
ꢀ
ꢀ
V
V
mA
Derated Performance
VO = 0V
±5
±18
2
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
1.5
TEMPERATURE RANGE
Specification: AM, BM, P, KU
SM
Operation
Storage
–25
–55
–55
–65
+85
ꢀ
–40
+85
°C
°C
°C
°C
+125
+125
+150
ꢀ
ꢀ
ꢀ
ꢀ
–40
–55
+85
+125
ꢀSpecification same as for INA117AM.
NOTES: (1) Connected as difference amplifier (see Figure 1). (2) Nonlinearity is the maximum peak deviation from the best-fit straight line as a percent of full-scale
peak-to-peak output. (3) With zero source impedance (see discussion of common-mode rejection in Application Information section). (4) Includes effects of amplifier’s
input bias and offset currents. (5) Includes effects of amplifier’s input current noise and thermal noise contribution of resistor network.
INA117
2
SBOS154A
PIN CONFIGURATION
Top View
TO-99
Top View
DIP/SO
INA117AM, BM, SM
INA117P, KU
Tab
8
Comp
Ref B
1
V+
7
8
7
6
5
1
2
3
4
Comp
RefB
V+
–In
+In
V–
–In
2
6
Output
Output
RefA
3
5
Ref A
+In
4
V–
Case internally connected to V–. Make no connection.
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Supply Voltage .................................................................................. ±22V
Input Voltage Range, Continuous ................................................... ±200V
Common-Mode and Differential, 10s ........................................... ±500V
Operating Temperature
M Metal TO-99 ................................................................–55 to +125°C
P Plastic DIP and U SO-8 ................................................–40 to +85°C
Storage Temperature
M Package.......................................................................–65 to +150°C
P Plastic DIP and U SO-8 .............................................. –55 to +125°C
Lead Temperature (soldering, 10s)............................................... +300°C
Output Short Circuit to Common............................................. Continuous
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(1)
TRANSPORT
MEDIA
PRODUCT
PACKAGE
INA117P
INA117KU
"
DIP-8
006
182
"
–40°C to +85°C
INA117P
INA117KU
"
INA117P
INA117KU
Rails
Rails
SO-8 Surface-Mount
"
"
"
INA117KU/2K5
INA117AM
INA117BM
INA117SM
Tape and Reel
Rails
INA117AM
INA117BM
INA117SM
TO-99 Metal
001
"
–25°C to +85°C
"
INA117AM
INA117BM
INA117SM
"
"
Rails
"
–55°C to +125°C
Rails
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 2500
pieces of “INA117KU/2K5” will get a single 2500-piece Tape and Reel.
INA117
SBOS154A
3
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
COMMON-MODE REJECTION vs FREQUENCY
POWER-SUPPLY REJECTION vs FREQUENCY
100
100
90
80
70
60
50
40
INA117BM
90
V–
80
V+
INA117AM, SM, P, KU
70
60
50
40
20
100
1k
10k
100k
2M
1
10
100
1k
10k
Frequency (Hz)
Frequency (Hz)
POSITIVE COMMON-MODE VOLTAGE RANGE
vs POSITIVE POWER-SUPPLY VOLTAGE
NEGATIVE COMMON-MODE VOLTAGE RANGE
vs NEGATIVE POWER-SUPPLY VOLTAGE
400
350
300
250
200
150
100
50
–400
–350
–300
–250
–200
–150
–100
–50
TA = –55°C
TA = +25°C
TA = +25°C
Max Rating = 200V
Max Rating = –200V
TA = +125°C
TA = –55°C to +125°C
–VS = –5V to –20V
+VS = +5V to +20V
5
10
15
20
–5
–10
–15
–20
Positive Power-Supply Voltage (V)
Negative Power-Supply Voltage (V)
INA117
4
SBOS154A
TYPICAL PERFORMANCE CURVES (Cont.)
At TA = +25°C, VS = ±15V, unless otherwise noted.
SMALL SIGNAL STEP RESPONSE
CL = 0
SMALL SIGNAL STEP RESPONSE
CL = 1000pF
LARGE SIGNAL STEP RESPONSE
INA117
SBOS154A
5
APPLICATION INFORMATION
Figure 1 shows the basic connections required for operation.
V–
V+
Applications with noisy or high-impedance power-supply lines
may require decoupling capacitors close to the device pins.
4
7
380kΩ
380kΩ
380kΩ
The output voltage is equal to the differential input volt-
age between pins 2 and 3. The common mode input
voltage is rejected.
2
3
V2
6
Internal circuitry connected to the compensation pin 8 can-
cels the parasitic distributed capacitance between the feed-
back resistor, R2, and the IC substrate. For specified dy-
namic performance, pin 8 should be grounded or connected
through a 0.1µF capacitor to an AC ground such as V+.
VO = V3 – V2
V3
21.1kΩ
20kΩ
+15V
8
1
5
100kΩ
–15V
+15V
50kΩ
±1.5mV
Range
–15V
(a)
10Ω
1µF
Tantalum
1µF
Tantalum
4
R1
7
R2
380kΩ
V–
V+
380kΩ
2
3
4
7
–In = V2
380kΩ
380kΩ
R3
2
3
6
380kΩ
V2
VO = V3 – V2
+In = V3
6
380kΩ
R5
R4
20kΩ
V
= V – V
O
3
2
21.1kΩ
V3
8
1
5
V+
21.1kΩ
20kΩ
100µA
1/2 REF200
8
1
5
FIGURE 1. Basic Power and Signal Connections.
100Ω
100Ω
COMMON-MODE REJECTION
±10mV
OPA27
(b)
Common-mode rejection (CMR) of the INA117 is depend-
ent on the input resistor network, which is laser-trimmed for
accurate ratio matching. To maintain high CMR, it is impor-
tant to have low source impedances driving the two inputs.
A 75Ω resistance in series with pin 2 or 3 will decrease CMR
from 86dB to 72dB.
10kΩ
Offset adjustment is regulated—
insensitive to power supply variations.
100µA
1/2 REF200
Resistance in series with the reference pins will also degrade
CMR. A 4Ω resistance in series with pin 1 or 5 will decrease
CMRR from 86dB to 72dB.
V–
Most applications do not require trimming. Figures 2 and 3
show optional circuits that may be used for trimming offset
voltage and common-mode rejection.
FIGURE 2. Offset Voltage Trim Circuits.
Some applications, however, apply voltages to the reference
terminals (pins 1 and 5). A more complete transfer function
is:
TRANSFER FUNCTION
Most applications use the INA117 as a simple unity-gain
difference amplifier. The transfer function is:
VO = V3 – V2 + 19 • V5 – 18 • V1
V5 and V1 are the voltages at pins 5 and 1.
VO = V3 – V2
V3 and V2 are the voltages at pins 3 and 2.
INA117
6
SBOS154A
MEASURING CURRENT
V–
V+
The INA117 can be used to measure a current by sensing the
voltage drop across a series resistor, RS. Figure 4 shows the
INA117 used to measure the supply currents of a device
under test. The circuit in Figure 5 measures the output
current of a power supply. If the power supply has a sense
connection, it can be connected to the output side of RS to
eliminate the voltage-drop error. Another common applica-
tion is current-to-voltage conversion, as shown in Figure 6.
(+200V max)
+VS
4
7
380kΩ
380kΩ
380kΩ
2
3
C
RS
6
RC*
VO = RS IDUT+
IDUT+
21.1kΩ
20kΩ
V–
V+
8
1
5
4
7
Device
Under
Test
380kΩ
380kΩ
380kΩ
2
3
V2
V+
V–
4
7
6
IDUT–
VO = V3 – V2
V3
380kΩ
380kΩ
2
3
RC*
21.1kΩ
20kΩ
RS
6
380kΩ
8
1
5
VO = RS IDUT–
200Ω
CMR
21.1kΩ
20kΩ
Adjust
10Ω
10Ω
8
1
5
–VS
(–200V max)
If offset adjust is also required,
connect to offset circuit, Figure 2.
*Not needed if RS is less than 20Ω —see text.
FIGURE 3. CMR Trim Circuit.
FIGURE 4. Measuring Supply Currents of Device Under
Test.
V–
V+
4
7
Power Supply
Out
Sense
380kΩ
380kΩ
380kΩ
±200V max
RS
2
3
6
RC*
VO = IL RS
Optional Load
IL
Sense Connection
(see text)
21.1kΩ
20kΩ
Load
8
1
5
*RC = RS not needed if RS is less than 20Ω—see text.
FIGURE 5. Measuring Power Supply Output Current.
INA117
SBOS154A
7
VS
(±200V max)
380kΩ
380kΩ
380kΩ
2
3
RS
250Ω
6
V
O = 1V to 5V
250Ω
4 to 20mA
RC*
21.1kΩ
20kΩ
8
1
5
VS
(±200V max)
(a)
*Not needed if RS is less than 20Ω—see text.
380kΩ
380kΩ
380kΩ
2
3
250Ω
RC*
RS
250Ω
6
V
O = –1V to –5V
4 to 20mA
21.1kΩ
20kΩ
8
1
5
(b)
4 to 20mA
380kΩ
380kΩ
380kΩ
*Not needed if RS is less than 20Ω—see text.
2
3
250Ω
RC*
RS
250Ω
6
VO = 1V to 5V
21.1kΩ
20kΩ
8
1
5
VS
(±200V max)
4 to 20mA
(c)
*Not needed if RS is less than 20Ω—see text.
380kΩ
380kΩ
380kΩ
2
3
RS
250Ω
6
VO = –1V to –5V
250Ω
RC*
21.1kΩ
20kΩ
VS
8
1
5
(±200V max)
(d)
*Not needed if RS is less than 20Ω—see text.
FIGURE 6. Current to Voltage Converter.
8
INA117
SBOS154A
Example: For a 1V/mA transfer function, the nominal,
uncorrected value for RS would be 1kΩ. A slightly larger
value, RS' = 1002.6Ω, compensates for the gain error due to
loading.
In all cases, the sense resistor imbalances the input resistor
matching of the INA117, degrading its CMR. Also, the input
impedance of the INA117 loads RS, causing gain error in the
voltage-to-current conversion. Both of these errors can be
easily corrected.
The 380kΩ term in the equation for RS' has a tolerance of
±25%, so sense resistors above approximately 400Ω may
require trimming to achieve gain accuracy better than 0.02%.
The CMR error can be corrected with the addition of a
compensation resistor, RC, equal in value to RS as shown in
Figures 4, 5, and 6. If RS is less than 20Ω, the degradation
in CMR is negligible and RC can be omitted. If RS is larger
than approximately 2kΩ, trimming RC may be required to
achieve greater than 86dB CMR. This is because the actual
INA117 input impedances have 1% typical mismatch.
Of course, if a buffer amplifier is added as shown in Figure
7, both inputs see a low source impedance, and the sense
resistor is not loaded. As a result, there is no gain error or
CMR degradation. The buffer amplifier can operate as a
unity gain buffer or as an amplifier with non-inverting gain.
Gain added ahead of the INA117 improves both CMR and
signal-to-noise. Added gain also allows a lower voltage drop
across the sense resistor. The OPA1013 is a good choice for
the buffer amplifier since both its input and output can swing
close to its negative power supply.
If RS is more than approximately 100Ω, the gain error will
be greater than the 0.02% specification of the INA117. This
gain error can be corrected by slightly increasing the value
of RS. The corrected value, RS', can be calculated by:
RS • 380kΩ
RS' =
380kΩ – RS
–15V
+15V
7
V1
4
I
380kΩ
380kΩ
2
3
VX
V1
–21V to +10V
–5V to –36V
–20V to –51V
+15V
Ground
–15V
R2*
RS
6
380kΩ
R2
R1
VO = I • RS • (1 +
)
1/2
OPA1013
21.1kΩ
20kΩ
R1 *
8
1
5
*Or connect as buffer (R2 = 0, omit R1).
–VX
Regulated power for op amp allows –VX
power to vary over wide range.
Op amp power can be derived with voltage-
dropping zener diode if –VX power is relatively
constant.
180k Ω
V
X = –30V to –200V
VZ
MPS-A42
|VX| = (5V to 36V) + VZ
e.g., If VZ is 50V then VX = –55V to –86V.
0.01µF
IN4702
or
–VX
V–
V+
7
4
380kΩ
380kΩ
2
3
I
RS
6
380kΩ
V
O = I • RS
1/2
OPA1013
21.1kΩ
20kΩ
0.1µF
8
1
5
–VX
FIGURE 7. Current Sensing with Input Buffer.
INA117
SBOS154A
9
Figure 8 shows very high input impedance buffer used to
measure low leakage currents. Here, the buffer op amp is
powered with an isolated, split-voltage power supply. Using
an isolated power supply allows full ±200V common-mode
input range.
these resistors produces approximately 550nV/√Hz noise.
The internal op amp contributes virtually no excess noise at
frequencies above 100Hz.
Many applications may be satisfied with less than the full
200kHz bandwidth of the INA117. In these cases, the noise
can be reduced with a low-pass filter on the output. The two-
pole filter shown in Figure 9 limits bandwidth to 1kHz and
reduces noise by more than 15:1. Since the INA117 has a
1/f noise corner frequency of approximately 100Hz, a cutoff
frequency below 100Hz will not further reduce noise.
NOISE PERFORMANCE
The noise performance of the INA117 is dominated by the
internal resistor network. The thermal or Johnson noise of
±200V max
+15V
Isolated DC/DC Converter
1kΩ
9kΩ
+15V
Com
–15V
PWS725
100MΩ
D1,2
*
OPA111
IL
100kΩ
Device
Under
Test
380kΩ
380kΩ
2
3
6
*D1 and D2 are each a 2N3904 transistor
base-collector junction (emitter open).
380kΩ
e
O = IL x 109
(1V/nA)
21.1kΩ
20kΩ
INA117
8
1
5
FIGURE 8. Leakage Current Measurement Circuit.
V+
V–
4
7
C2
0.02µF
380kΩ
380kΩ
380kΩ
2
3
V2
R1
11.0kΩ
R2
11.3kΩ
V
O = V2 – V3
OPA27
6
2-Pole Butterworth
Low-Pass Filter
V3
C1
0.01µF
21.1kΩ
20kΩ
BUTTERWORTH
LOW-PASS
f–3dB
OUTPUT NOISE
8
1
5
(mVp-p)
R1
R2
C1
C2
200kHz
100kHz
10kHz
1kHz
≤100Hz(1)
1.8
1.1
0.35
0.11
0.05
No Filter
11kΩ
11kΩ
11kΩ
11kΩ
11.3kΩ
11.3kΩ
11.3kΩ
11.3kΩ
100pF
1nF
10nF
0.1µF
200pF
2nF
20nF
0.2µF
See Application Bulletin AB-017 for other filters.
NOTE: (1) Since the INA117 has a 1/f noise corner frequency of approximately 100Hz,
bandwidth reduction below this frequency will not significantly reduce noise.
FIGURE 9. Output Filter for Noise Reduction.
10
INA117
SBOS154A
380kΩ
380kΩ
380kΩ
2
3
V–
V+
V2
4
7
V3 – V2
6
VO
=
380kΩ
380kΩ
380kΩ
19 R7
V3
2
3
1 +
V2
R6
21.1kΩ
20kΩ
6
INA117
R6
VO = V3 – V2 + VX
V3
8
1
5
R7
21.1kΩ
20kΩ
Refer to Application
Bulletin AB-001 for
details.
INA117
OPA27
8
1
5
OPA27
GAIN
(V/V)
R7
(kΩ)
R6
(kΩ)
VX
1/2
1/4
1/5
1.05
3.16
4.22
20
20
20
FIGURE 11. Summing VX in Output.
FIGURE 10. Reducing Differential Gain.
(a)
R1
R2
380kΩ
380kΩ
2
3
V2
Refer to Application Bulletin AB-010 for details.
R3
380kΩ
6
V
OUT = V3 – V2
V3
R5
R4
21.1kΩ
20kΩ
R1
380kΩ
R2
380kΩ
INA117
2
3
8
1
5
V2
100pF
R6
5kΩ
R7
10kΩ
R3
380kΩ
6
V3
V
OUT = V3 – V2
A1
OPA27
–V3 /20
R5
21.1kΩ
R4
20kΩ
R9
400kΩ
100pF
INA117
8
1
5
R10
10kΩ
100pF
R6
R7
R8
5kΩ
10kΩ
10kΩ
A2
OPA27
VCM /20
(b)
A1
OPA27
FIGURE 12. Common-Mode Voltage Monitoring.
INA117
SBOS154A
11
+9V
7
380kΩ
380kΩ
380kΩ
2
3
V2
VCM Range =
+50V to +200V
(VS ±9V)
7
25kΩ
25kΩ
6
2
5
6
V3
VO = V3 – V2
21.1kΩ
20kΩ
(a)
INA117
–3V > VO > –6V swap A2 pins
2 and 3 for +4V > VO > 3V.
INA105
8
1
5
4
25kΩ
25kΩ
3
1
4
–9V
+9V
7
380kΩ
380kΩ
380kΩ
2
3
V2
7
VCM Range =
–12V to +200V
(VS = ±9V)
25kΩ
25kΩ
6
2
5
6
V3
VO = V3 – V2
21.1kΩ
20kΩ
(b)
0V > VO > –6V swap A2 pins
2 and 3 for +4V > VO > 0V.
INA117
INA105
10kΩ
8
1
5
4
25kΩ
25kΩ
3
1
1N4684
3.3V
4
(V–) +3.3V
–9V
380kΩ
380kΩ
2
3
V2
VCM Range = ±200V
(VS = ±9V)
25kΩ
25kΩ
6
2
5
6
380kΩ
V3
VO = V3 – V2
21.1kΩ
20kΩ
INA117
INA105
8
1
5
(c)
25kΩ
25kΩ
3
1
13.7kΩ
R7
(VS = ±9V)
1MΩ
Refer to Application Bulletin AB-015 for details.
R8
OPA602
1MΩ
FIGURE 13. Offsetting or Boosting Common-Mode Voltage Range for Reduced Power-Supply Voltage Operation.
INA117
12
SBOS154A
+200V max
V–
V+
4
7
380kΩ
380kΩ
2
3
+
6
6
6
6
380kΩ
–
21.1kΩ
20kΩ
INA117
8
1
1
1
1
5
5
5
5
V–
4
V+
7
380kΩ
380kΩ
2
3
+
380kΩ
–
21.1kΩ
20kΩ
INA117
eO = Cell Voltage
Repeat
for each
cell
8
MUX
V–
4
V+
7
380kΩ
380kΩ
2
3
+
380kΩ
–
21.1kΩ
20kΩ
INA117
8
Cell Select
V–
4
V+
7
380kΩ
380kΩ
2
3
+
380kΩ
–
21.1kΩ
20kΩ
INA117
8
–200V max
FIGURE 14. Battery Cell Voltage Monitor.
INA117
SBOS154A
13
–15V
+15V
7
VS (200V max)
4
380kΩ
380kΩ
2
R1
0.1Ω
6
–0.1 (I1)
380kΩ
3
I1
21.1kΩ
20kΩ
INA117
8
1
5
A1
Load
VIN
ILOAD = I1 – I2
+15V –15V
+15V –15V
7
4
7
4
I2
100kΩ
380kΩ
380kΩ
5
6
2
10kΩ
10kΩ
2
3
R2
0.1Ω
VO
6
VO = I1 – I2
= ILOAD
380kΩ
–0.1 (I2)
3
100kΩ
INA106
21.1kΩ
20kΩ
1
INA117
8
1
5
VS (–200V max)
FIGURE 15. Measuring Amplifier Load Current.
R1
R2
380kΩ
380kΩ
2
V2
R3
380kΩ
6
3
V3
VOUT = V3 – V2
R5
R4
21.1kΩ
20kΩ
INA117
8
1
5
R1
C1
1MΩ
0.47µF
Refer to Application
Bulletin AB-008 for
details.
OPA602
FIGURE 16. AC-Coupled INA117.
14
INA117
SBOS154A
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
INA117AM
NRND
TO-99
LMC
8
20
Green (RoHS
& no Sb/Br)
AU
N / A for Pkg Type
INA117AM
INA117AM4
INA117BM
OBSOLETE
NRND
TO-100
TO-99
LME
LMC
10
8
TBD
Call TI
AU
Call TI
20
Green (RoHS
& no Sb/Br)
N / A for Pkg Type
INA117BM
INA117BM-22
INA117BM-3
INA117BM-33
INA117BM1
INA117KU
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
TO-100
ZZ (BB)
TO-100
TO-100
SOIC
LME
ZZ001
LME
LME
D
10
8
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
10
10
8
Call TI
Call TI
Call TI
Call TI
75
2500
2500
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
-40 to 85
INA
117KU
2
INA117KU/2K5
INA117KU/2K5G4
INA117KUG4
INA117P
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
D
D
D
P
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-3-260C-168 HR
Level-3-260C-168 HR
Level-3-260C-168 HR
N / A for Pkg Type
INA
117KU
2
Green (RoHS
& no Sb/Br)
INA
117KU
2
Green (RoHS
& no Sb/Br)
-40 to 85
INA
117KU
2
50
Green (RoHS
& no Sb/Br)
INA117P
INA117P-BI
INA117PG4
OBSOLETE
ACTIVE
PDIP
PDIP
P
P
8
8
TBD
Call TI
Call TI
50
20
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
N / A for Pkg Type
INA117P
INA117SM
NRND
NRND
TO-99
TO-99
LMC
LMC
8
8
Green (RoHS
& no Sb/Br)
AU
AU
N / A for Pkg Type
N / A for Pkg Type
INA117SM
INA117SMQ
INA117SMQ
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Apr-2013
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
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