INA125UA [TI]

具有精密电压参考的仪表放大器 | D | 16;


型号：	INA125UA
厂家：	TEXAS INSTRUMENTS
描述：	具有精密电压参考的仪表放大器 \| D \| 16 放大器仪表光电二极管仪表放大器
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INA125

INSTRUMENTATION AMPLIFIER

With Precision Voltage Reference

FEATURES

APPLICATIONS

● LOW QUIESCENT CURRENT: 460µA

● PRESSURE AND TEMPERATURE BRIDGE

AMPLIFIERS

● PRECISION VOLTAGE REFERENCE:

1.24V, 2.5V, 5V or 10V

● INDUSTRIAL PROCESS CONTROL

● FACTORY AUTOMATION

● SLEEP MODE

● LOW OFFSET VOLTAGE: 250µV max

● LOW OFFSET DRIFT: 2µV/°C max

● LOW INPUT BIAS CURRENT: 20nA max

● HIGH CMR: 100dB min

● MULTI-CHANNEL DATA ACQUISITION

● BATTERY OPERATED SYSTEMS

● GENERAL PURPOSE INSTRUMENTATION

SLEEP

V+

● LOW NOISE: 38nV/√Hz at f = 1kHz

● INPUT PROTECTION TO ±40V

INA125

_REFCOM

● WIDE SUPPLY RANGE

Single Supply: 2.7V to 36V

Dual Supply: ±1.35V to ±18V

_REFBG

● 16-PIN DIP AND SO-16 SOIC PACKAGES

V_REF2.5

DESCRIPTION

V_REF

The INA125 is a low power, high accuracy instrumen-

tation amplifier with a precision voltage reference. It

provides complete bridge excitation and precision dif-

ferential-input amplification on a single integrated

circuit.

V_REF10 16

Ref

Amp

Bandgap

V_REF

V_REFOut

10V

A single external resistor sets any gain from 4 to

10,000. The INA125 is laser-trimmed for low offset

voltage (250µV), low offset drift (2µV/°C), and high

common-mode rejection (100dB at G = 100). It oper-

ates on single (+2.7V to +36V) or dual (±1.35V to

±18V) supplies.

V_IN

A₁

V_O

30kΩ

Sense

10kΩ

R_G

The voltage reference is externally adjustable with pin-

selectable voltages of 2.5V, 5V, or 10V, allowing use

with a variety of transducers. The reference voltage is

accurate to ±0.5% (max) with ±35ppm/°C drift (max).

Sleep mode allows shutdown and duty cycle operation

to save power.

10kΩ

–

V_O= (V_IN– V_IN) G

G = 4 + 60kΩ

R_G

A₂

–

V_IN

30kΩ

IA_REF

The INA125 is available in 16-pin plastic DIP and

SO-16 surface-mount packages and is specified for

the –40°C to +85°C industrial temperature range.

V–

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

FAXLine: (800) 548-6133 (US/Canada Only)

•

Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706

•

Tel: (520) 746-1111

•

Twx: 910-952-1111

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132

PDS-1361B

Printed in U.S.A., February, 1998

SBOS060

SPECIFICATIONS: V_S= ±15V

At T_A= +25°C, V_S= ±15V, IA common = 0V, V_REFcommon = 0V, and R_L= 10kΩ, unless otherwise noted.

INA125P, U

INA125PA, UA

TYP

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

MAX

UNITS

INPUT

Offset Voltage, RTI

Initial

vs Temperature

vs Power Supply

Long-Term Stability

Impedance, Differential

±50

±0.25

±3

±0.2

10¹¹|| 2

10¹¹|| 9

±250

±2

±20

✻

±500

±5

±50

µV

µV/°C

µV/V

µV/mo

Ω || pF

V_S= ±1.35V to ±18V, G = 4

Common-Mode

Safe Input Voltage

±40

✻

Input Voltage Range

Common-Mode Rejection

See Text

✻

V_CM= –10.7V to +10.2V

G = 4

100

114

✻

G = 10

G = 100

G = 500

BIAS CURRENT

vs Temperature

Offset Current

V_CM= 0V

✻

pA/°C

±60

±0.5

±2.5

±5

vs Temperature

pA/°C

NOISE, RTI

R_S= 0Ω

Voltage Noise, f = 10Hz

f = 100Hz

f = 1kHz

f = 0.1Hz to 10Hz

Current Noise, f = 10Hz

f = 1kHz

0.8

170

✻

nV/√Hz

µVp-p

fA/√Hz

pAp-p

f = 0.1Hz to 10Hz

GAIN

Gain Equation

Range of Gain

Gain Error

4 + 60kΩ/R_G

✻

V/V

10,000

✻

V_O= –14V to +13.3V

G = 4

±0.01

±0.03

±0.05

±0.1

±0.075

±0.3

±0.5

✻

±0.1

±0.5

±1

G = 10

G = 100

G = 500

Gain vs Temperature

Nonlinearity

G = 4

G > 4⁽¹⁾

V_O= –14V to +13.3V

G = 4

±1

±25

±15

±100

✻

ppm/°C

±0.0004

±0.001

±0.002

±0.01

✻

±0.004

✻

% of FS

G = 10

G = 100

G = 500

OUTPUT

Voltage: Positive

Negative

Load Capacitance Stability

Short-Circuit Current

(V+)–1.7 (V+)–0.9

✻

(V–)+1

(V–)+0.4

1000

–9/+12

VOLTAGE REFERENCE

Accuracy

vs Temperature

vs Power Supply, V+

vs Load

Dropout Voltage, (V+) – V_REF

Bandgap Voltage Reference

Accuracy

V_REF= +2.5V, +5V, +10V

I_L= 0

±0.15

±18

±20

±0.5

±35

±50

✻

±1

±100

✻

ppm/°C

ppm/V

ppm/mA

ppm/°C

I_L= 0

V+ = (V_REF+ 1.25V) to +36V

I_L= 0 to 5mA

(2)

Ref Load = 2kΩ

1.25

✻

1.24

±0.5

±18

I_L= 0

vs Temperature

The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes

no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change

without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant

any BURR-BROWN product for use in life support devices and/or systems.

INA125

SPECIFICATIONS: V_S= ±15V (CONT)

At T_A= +25°C, V_S= ±15V, IA common = 0V, V_REFcommon = 0V, and R_L= 10kΩ, unless otherwise noted.

INA125P, U

INA125PA, UA

TYP

PARAMETER CONDITIONS

MIN

TYP

MAX

MIN

MAX

UNITS

FREQUENCY RESPONSE

Bandwidth, –3dB

G = 4

G = 10

G = 100

G = 500

150

4.5

0.9

0.2

✻

kHz

V/µs

µs

Slew Rate

Settling Time, 0.01%

G = 4, 10V Step

G = 10, 10V Step

G = 100, 10V Step

G = 500, 10V Step

50% Overdrive

375

1700

Overload Recovery

POWER SUPPLY

Specified Operating Voltage

Specified Voltage Range

Quiescent Current, Positive

Negative

Reference Ground Current⁽³⁾

Sleep Current (V_SLEEP≤ 100mV)

±15

✻

µA

±1.35

±18

525

–325

✻

I_O= I_REF= 0mA

460

–280

180

±1

✻

R_L= 10kΩ, Ref Load = 2kΩ

±25

✻

SLEEP MODE PIN⁽⁴⁾

V_IH(Logic high input voltage)

V_IL(Logic low input voltage)

+2.7

V+

+0.1

✻

_IH(Logic high input current)

150

✻

µA

µs

I_IL(Logic low input current)

Wake-up Time⁽⁵⁾

TEMPERATURE RANGE

Specification Range

Operation Range

–40

–55

+85

+125

✻

°C

Storage Range

Thermal Resistance, θ_JA

16-Pin DIP

SO-16 Surface-Mount

100

✻

°C/W

✻ Specification same as INA125P, U.

NOTES: (1) Temperature coefficient of the "Internal Resistor" in the gain equation. Does not include TCR of gain-setting resistor, R_G. (2) Dropout voltage is the

positive supply voltage minus the reference voltage that produces a 1% decrease in reference voltage. (3) V_REFCOM pin. (4) Voltage measured with respect to

Reference Common. Logic low input selects Sleep mode. (5) IA and Reference, see Typical Performance Curves.

SPECIFICATIONS: V_S= +5V

At T_A= +25°C, V_S= +5V, IA common at V_S/2, V_REFcommon = V_S/2, V_CM= V_S/2, and R_L= 10kΩ to V_S/2, unless otherwise noted.

INA125P, U

TYP

INA125PA, UA

TYP

PARAMETER

CONDITIONS

MIN

MAX

MIN

MAX

UNITS

INPUT

Offset Voltage, RTI

Initial

vs Temperature

vs Power Supply

Input Voltage Range

Common-Mode Rejection

±75

±0.25

±500

✻

±750

µV

µV/°C

µV/V

V_S= +2.7V to +36V

See Text

_CM= +1.1V to +3.6V

G = 4

100

114

✻

G = 10

G = 100

G = 500

GAIN

Gain Error

V_O= +0.3V to +3.8V

G = 4

±0.01

✻

OUTPUT

Voltage, Positive

Negative

(V+)–1.2 (V+)–0.8

(V–)+0.3 (V–)+0.15

✻

POWER SUPPLY

Specified Operating Voltage

Operating Voltage Range

Quiescent Current

✻

µA

+2.7

460

±1

+36

525

±25

✻

I_O= I_REF= 0mA

R_L= 10kΩ, Ref Load = 2kΩ

✻

Sleep Current (V_SLEEP≤ 100mV)

✻ Specification same as INA125P, U.

INA125

PIN CONFIGURATION

ABSOLUTE MAXIMUM RATINGS⁽¹⁾

Top View

16-Pin DIP, SO-16

Power Supply Voltage, V+ to V– ........................................................ 36V

Input Signal Voltage .......................................................................... ±40V

Output Short Circuit ................................................................. Continuous

Operating Temperature ................................................. –55°C to +125°C

Storage Temperature..................................................... –55°C to +125°C

Lead Temperature (soldering, 10s) ............................................... +300°C

V+

SLEEP

V–

16 V_REF10

15 V_REF

NOTE: Stresses above these ratings may cause permanent damage.

14 V_REF2.5

13 V_REFBG

V_REFOUT

IA_REF

PACKAGE INFORMATION

V_REFCOM

Sense

V_O

PACKAGE DRAWING

V_IN

PRODUCT

PACKAGE

NUMBER⁽¹⁾

–

V_IN

INA125PA

INA125P

16-Pin Plastic DIP

180

R_G

INA125UA

INA125U

SO-16 Surface-Mount

265

NOTES: (1) For detailed drawing and dimension table, please see end of data

sheet, or Appendix C of Burr-Brown IC Data Book.

ELECTROSTATIC

DISCHARGE SENSITIVITY

This integrated circuit can be damaged by ESD. Burr-Brown

recommends that all integrated circuits be handled with ap-

propriate precautions. Failure to observe proper handling and

installation procedures can cause damage.

ESD damage can range from subtle performance degradation

to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric

changes could cause the device not to meet its published

specifications.

INA125

TYPICAL PERFORMANCE CURVES

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

GAIN vs FREQUENCY

COMMON-MODE REJECTION vs FREQUENCY

G = 100, 500

120

100

G = 500

G = 100

G = 10

G = 500

G = 4

G = 10

G = 100

G = 4

100

10k

100k

100

10k

100k

Frequency (Hz)

POSITIVE POWER SUPPLY REJECTION

vs FREQUENCY

NEGATIVE POWER SUPPLY REJECTION

vs FREQUENCY

140

120

100

120

100

G = 500

G = 100

G = 500

G = 4

G = 10

G = 4

100

Frequency (Hz)

10k

100k

100

Frequency (Hz)

10k

100k

INPUT COMMON-MODE VOLTAGE

vs OUTPUT VOLTAGE, V_S= ±15V

INPUT COMMON-MODE VOLTAGE

vs OUTPUT VOLTAGE, V_S= ±5V

IA_REF= 0V

V_S= +5V

+15V

V_D/2

–

V_O

–

V_D/2

IA_REF

–1

–2

–3

–4

–5

V_CM

–5

–10

–15

–15V

V_S= ±5V

–15

–10

–5

–4 –3

–2

–1

Output Voltage (V)

INA125

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

INPUT-REFERRED VOLTAGE AND CURRENT NOISE

vs FREQUENCY

SETTLING TIME vs GAIN

10k

100

Current Noise

0.01%

0.1%

Voltage Noise

100

10k

100k

Gain (V/V)

Frequency (Hz)

INPUT-REFERRED OFFSET VOLTAGE

vs SLEEP TURN-ON TIME

QUIESCENT CURRENT AND SLEEP CURRENT

vs TEMPERATURE

100

550

500

450

400

350

300

250

200

150

100

G = 100

+I_Q

±I_SLEEP

–I_Q

–20

–40

–60

–80

–100

V_SLEEP= 100mV

+I_SLEEP

_SLEEP= 0V

–I_SLEEP

100 125

–50

100

150

200

250

–75

–50

–25

Time From Turn-On (µs)

Temperature (°C)

INPUT BIAS AND OFFSET CURRENT

vs TEMPERATURE

SLEW RATE vs TEMPERATURE

0.30

0.25

0.20

0.15

0.10

0.05

I_B

I_OS

–75

–50

–25

100

125

–75

–50

–25

100

125

Temperature (°C)

INA125

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

LARGE-SIGNAL RESPONSE

SMALL-SIGNAL RESPONSE

G = 4

G = 100

100µs/div

INPUT BIAS CURRENT

INPUT-REFERRED NOISE, 0.1Hz to 10Hz

vs INPUT OVERLOAD VOLTAGE

200

160

120

All Gains

–40

–80

–120

–160

–200

–40

1µs/div

Overload Voltage (V)

OUTPUT VOLTAGE SWING

vs OUTPUT CURRENT

DELTA V_OSvs REFERENCE CURRENT

V+

(V+)–1

(V+)–2

(V+)–3

(V+)–4

(V+)–5

+75°C

+25°C

+125°C

Sinking

–55°C

(V–)+5

(V–)+4

(V–)+3

(V–)+2

(V–)+1

V–

+75°C

Sourcing

–55°C

+125°C

+25°C

–5

±2

±4

±6

±8

±10

–8

–6

–4

–2

Output Current (mA)

Reference Current (mA)

INA125

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

INPUT-REFERRED OFFSET VOLTAGE

PRODUCTION DISTRIBUTION, V_S= ±15V

INPUT-REFERRED OFFSET VOLTAGE

PRODUCTION DISTRIBUTION, V_S= +5V

Typical production

distribution of

packaged units.

Typical production

distribution of

packaged units.

0.1%

0.02%

0.1%

0.05%

0.02%

Input-Referred Offset Voltage (µV)

VOLTAGE REFERENCE DRIFT

PRODUCTION DISTRIBUTION

INPUT-REFERRED OFFSET VOLTAGE DRIFT

PRODUCTION DISTRIBUTION

100

Typical production

distribution of packaged units.

Typical production

distribution of packaged units.

V_S= ±15V or +5V

0.3%

0.2%

0.05%

Voltage Reference Drift (ppm/°C)

Input-Referred Offset Voltage Drift (µV/°C)

REFERENCE TURN-ON SETTLING TIME

REFERENCE VOLTAGE DEVIATION

vs TEMPERATURE

V_REF= V_BG, 2.5V, 5V, or 10V

–50

–3

–6

–9

–100

–150

–200

V_REF= 10V

V_REF= 5V

–12

–15

V_REF= 2.5V

–75

–50

–25

100

125

Time From Power Supply Turn-On (µs)

Temperature (°C)

INA125

TYPICAL PERFORMANCE CURVES (CONT)

At T_A= +25°C and V_S= ±15V, unless otherwise noted.

0.1Hz to 10Hz REFERENCE NOISE

V_REF= 2.5V, C_L= 100pF

REFERENCE TRANSIENT RESPONSE

V_REF= 2.5V, C_L= 100pF

+1mA

0mA

–1mA

1µs/div

10µs/div

NEGATIVE REFERENCE AC LINE REJECTION

vs FREQUENCY

POSITIVE REFERENCE AC LINE REJECTION

vs FREQUENCY

120

100

120

100

V_REF= 2.5V

V_REF= 5V

V_REF= 10V

C = 0.01µF

C = 0.1µF

Capacitor connected between

V_REFOUT and V_REFCOM.

100

Frequency (Hz)

10k

100k

100

10k

100k

Frequency (Hz)

INA125

For example, in Figure 1 V_REFOUT is connected to V_REF10

thus supplying 10V to the bridge. It is recommended that

V_REFOUT be connected to one of the reference voltage pins

even when the reference is not being utilized to avoid

saturating the reference amplifier. Driving the SLEEP pin

LOW puts the INA125 in a shutdown mode.

APPLICATION INFORMATION

Figure 1 shows the basic connections required for operation

of the INA125. Applications with noisy or high impedance

power supplies may require decoupling capacitors close to

the device pins as shown.

The output is referred to the instrumentation amplifier refer-

ence (IA_REF) terminal which is normally grounded. This

must be a low impedance connection to assure good com-

mon-mode rejection. A resistance of 12Ω in series with the

IA_REFpin will cause a typical device to degrade to approxi-

mately 80dB CMR (G = 4).

SETTING THE GAIN

Gain of the INA125 is set by connecting a single external

resistor, R_G, between pins 8 and 9:

(1)

60kΩ

G = 4 +

R_G

Connecting V_REFOUT (pin 4) to one of the four available

reference voltage pins (V_REFBG, V_REF2.5, V_REF5, or V_REF10)

provides an accurate voltage source for bridge applications.

Commonly used gains and R_Gresistor values are shown in

Figure 1.

V+

SLEEP⁽¹⁾

0.1µF

INA125

_REFCOM

DESIRED GAIN

(V/V)

R_G

(Ω)

NEAREST 1%

R_GVALUE (Ω)

R⁽²⁾

100

200

500

1000

2000

10000

60k

10k

3750

1304

625

306

121

60.4k

10k

3740

1300

619

309

121

60.4

30.1

6.04

_REFBG

V_REF2.5

_REF5

V_REF10

NC: No Connection.

Ref

Amp

Bandgap

V_REF

–

_REFOut

V_O= (V_IN– V_IN) G

10V

G = 4 + 60kΩ

R_G

V_IN

A₁

30kΩ

Sense

10kΩ

R_G

10kΩ

Load

V_O

A₂

–

V_IN

30kΩ

IA_REF

–

NOTE: (1) SLEEP pin should be connected

to V+ if shutdown function is not being used.

(2) Nominal value of R is 21kΩ, ±25%.

0.1µF

V–

FIGURE 1. Basic Connections.

INA125

The 60kΩ term in equation 1 comes from the internal metal

film resistors which are laser trimmed to accurate absolute

values. The accuracy and temperature coefficient of these

resistors are included in the gain accuracy and drift specifi-

cations of the INA125.

INPUT COMMON-MODE RANGE

The input common-mode range of the INA125 is shown in

the typical performance curves. The common-mode range is

limited on the negative side by the output voltage swing of

A₂, an internal circuit node that cannot be measured on an

external pin. The output voltage of A2 can be expressed as:

The stability and temperature drift of the external gain

setting resistor, R_G, also affects gain. R_G’s contribution to

gain accuracy and drift can be directly inferred from the gain

equation (1). Low resistor values required for high gain can

make wiring resistance important. Sockets add to the wiring

resistance, which will contribute additional gain error (pos-

sibly an unstable gain error) in gains of approximately 100

or greater.

–

V₀₂= 1.3V_IN– (V_IN– V_IN) (10kΩ/R_G)

(voltages referred to IA_REFterminal, pin 5)

The internal op amp A₂is identical to A₁. Its output swing

is limited to approximately 0.8V from the positive supply

and 0.25V from the negative supply. When the input com-

mon-mode range is exceeded (A₂’s output is saturated), A₁

can still be in linear operation, responding to changes in the

non-inverting input voltage. The output voltage, however,

will be invalid.

OFFSET TRIMMING

The INA125 is laser trimmed for low offset voltage and

offset voltage drift. Most applications require no external

offset adjustment. Figure 2 shows an optional circuit for

trimming the output offset voltage. The voltage applied to

the IA_REFterminal is added to the output signal. The op amp

buffer is used to provide low impedance at the IA_REF

terminal to preserve good common-mode rejection.

PRECISION VOLTAGE REFERENCE

The on-board precision voltage reference provides an accu-

rate voltage source for bridge and other transducer applica-

tions or ratiometric conversion with analog-to-digital con-

verters. A reference output of 2.5V, 5V or 10V is available

by connecting V_REFOUT (pin 4) to one of the V_REFpins

(V_REF2.5, V_REF5, or V_REF10). Reference voltages are laser-

trimmed for low inital error and low temperature drift.

Connecting V_REFOUT to V_REFBG (pin 13) produces the

bandgap reference voltage (1.24V ±0.5%) at the reference

output.

–

V_IN

V+

V_O

R_G

INA125

100µA

IA_REF

1/2 REF200

V_IN

Positive supply voltage must be 1.25V above the desired

reference voltage. For example, with V+ = 2.7V, only the

1.24V reference (V_REFBG) can be used. If using dual sup-

plies V_REFCOM can be connected to V–, increasing the

100Ω

10kΩ

OPA237

±10mV

Adjustment Range

100µA

Microphone,

1/2 REF200

Hydrophone

etc.

INA125

V–

FIGURE 2. Optional Trimming of Output Offset Voltage.

47kΩ

INPUT BIAS CURRENT RETURN

The input impedance of the INA125 is extremely high—

approximately 10¹¹Ω. However, a path must be provided for

the input bias current of both inputs. This input bias current

flows out of the device and is approximately 10nA. High

input impedance means that this input bias current changes

very little with varying input voltage.

Thermocouple

INA125

10kΩ

Input circuitry must provide a path for this input bias current

for proper operation. Figure 3 shows various provisions for

an input bias current path. Without a bias current path, the

inputs will float to a potential which exceeds the common-

mode range, and the input amplifiers will saturate.

INA125

If the differential source resistance is low, the bias current

return path can be connected to one input (see the thermo-

couple example in Figure 3). With higher source impedance,

using two equal resistors provides a balanced input with

possible advantages of lower input offset voltage due to bias

current and better high frequency common-mode rejection.

Center-tap provides

bias current return.

FIGURE 3. Providing an Input Common-Mode Current Path.

INA125

amount of supply voltage headroom available to the refer-

ence. Approximately 180µA flows out of the V_REFCOM

terminal, therefore, it is recommended that it be connected

through a low impedance path to sensor common to avoid

possible ground loop problems.

A transition region exists when V_SLEEPis between 400mV

and 2.7V (with respect to V_REFCOM) where the output is

unpredictable. Operation in this region is not recommended.

The INA125 achieves high accuracy quickly following wake-

up (V_SLEEP≥ 2.7V). See the typical performance curve

“Input-Referred Offset Voltage vs Sleep Turn-on Time.” If

shutdown is not being used, connect the SLEEP pin to V+.

Reference noise is proportional to the reference voltage

selected. With V_REF= 2.5V, 0.1Hz to 10Hz peak-to-peak

noise is approximately 9µVp-p. Noise increases to 36µVp-p

for the 10V reference. Output drive capability of the voltage

reference is improved by connecting a transistor as shown in

Figure 4. The external transistor also serves to remove power

from the INA125.

LOW VOLTAGE OPERATION

The INA125 can be operated on power supplies as low as

±1.35V. Performance remains excellent with power sup-

plies ranging from ±1.35V to ±18V. Most parameters vary

only slightly throughout this supply voltage range—see

typical performance curves. Operation at very low supply

voltage requires careful attention to ensure that the com-

mon-mode voltage remains within its linear range. See

“Input Common-Mode Voltage Range.” As previously men-

tioned, when using the on-board reference with low supply

voltages, it may be necessary to connect V_REFCOM to V– to

ensure V_S– V_REF≥ 1.25V.

Internal resistors that set the voltage reference output are

ratio-trimmed for accurate output voltages (±0.5% max). The

absolute resistance values, however, may vary ±25%. Adjust-

ment of the reference output voltage with an external resistor

is not recommended because the required resistor value is

uncertain.

INA125

_REFCOM

SINGLE SUPPLY OPERATION

The INA125 can be used on single power supplies of +2.7V

to +36V. Figure 5 shows a basic single supply circuit. The

IA_REF, V_REFCOM, and V– terminals are connected to ground.

Zero differential input voltage will demand an output volt-

age of 0V (ground). When the load is referred to ground as

shown, actual output voltage swing is limited to approxi-

mately 150mV above ground. The typical performance curve

“Output Voltage Swing vs Output Current” shows how the

output swing varies with output current.

_REFBG

V_REF2.5

V_REF

With single supply operation, careful attention should be

paid to input common-mode range, output voltage swing of

both op amps, and the voltage applied to the IA_REFterminal.

V_IN+and V_IN–must both be 1V above ground for linear

operation. You cannot, for instance, connect the inverting

input to ground and measure a voltage connected to the non-

inverting input.

V_REF10

V+

Ref

Amp

TIP29C

Bandgap

V_REF

V_REFOut

10V

to load

(transducer)

+3V

FIGURE 4. Reference Current Boost.

1.5V – ∆V

SHUTDOWN

V_O

R_G

INA125

1000Ω

The INA125 has a shutdown option. When the SLEEP pin

is LOW (100mV or less), the supply current drops to

approximately 1µA and output impedance becomes approxi-

mately 80kΩ. Best performance is achieved with CMOS

logic. To maintain low sleep current at high temperatures,

R_L

1.5V + ∆V

_SLEEPshould be as close to 0V as possible. This should not

be a problem if using CMOS logic unless the CMOS gate is

driving other currents. Refer to the typical performance

curve, “Sleep Current vs Temperature.”

FIGURE 5. Single Supply Bridge Amplifier.

INA125

INPUT PROTECTION

The inputs of the INA125 are individually protected for

voltage up to ±40V. For example, a condition of –40V on

one input and +40V on the other input will not cause

damage. Internal circuitry on each input provides low series

impedance under normal signal conditions. To provide

equivalent protection, series input resistors would contribute

excessive noise. If the input is overloaded, the protection

circuitry limits the input current to a safe value of approxi-

mately 120µA to 190µA. The typical performance curve

“Input Bias Current vs Input Overload Voltage” shows this

input current limit behavior. The inputs are protected even if

the power supplies are disconnected or turned off.

+5V

SLEEP

INA125

_REFCOM

_REFBG

_REF2.5

_REF5

V_REF10

Ref

Amp

Bandgap

V_REF

2.5V

V_IN

A₁

30kΩ

Sense

10kΩ

R_G

10kΩ

60kΩ

Load

V_O= +2.5V +

[

(

V_I⁺_N– V_I^–_N) (4 +

)]

R_G

A₂

–

V_IN

30kΩ

IA_REF

–

2.5V⁽¹⁾

(Psuedoground)

NOTE: (1) “Psuedoground” is at +2.5V above actual ground.

This provides a precision reference voltage for succeeding

single-supply op amp stages.

FIGURE 6. Psuedoground Bridge Measurement, 5V Single Supply.

INA125

PACKAGE OPTION ADDENDUM

www.ti.com

7-Oct-2021

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

INA125P

ACTIVE

PDIP

RoHS & Green

Call TI

N / A for Pkg Type

-40 to 85

INA125P

INA125PA

Call TI

INA125P

INA125PAG4

INA125U

ACTIVE

PDIP

SOIC

RoHS & Green

N / A for Pkg Type

Level-3-260C-168 HR

INA125P

INA125U

INA125U/2K5

INA125UA

2500 RoHS & Green

40 RoHS & Green

2500 RoHS & Green

INA125U

INA125UA/2K5

INA125U

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

7-Oct-2021

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

3-Jun-2022

TAPE AND REEL INFORMATION

REEL DIMENSIONS

TAPE DIMENSIONS

Reel

Diameter

Cavity

A0 Dimension designed to accommodate the component width

B0 Dimension designed to accommodate the component length

K0 Dimension designed to accommodate the component thickness

Overall width of the carrier tape

P1 Pitch between successive cavity centers

Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE

Sprocket Holes

Q1 Q2

Q3 Q4

Q1 Q2

Q3 Q4

User Direction of Feed

Pocket Quadrants

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

INA125U/2K5

SOIC

2500

330.0

16.4

6.5

10.3

2.1

8.0

16.0

INA125UA/2K5

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

3-Jun-2022

TAPE AND REEL BOX DIMENSIONS

Width (mm)

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

INA125U/2K5

SOIC

2500

356.0

35.0

INA125UA/2K5

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

3-Jun-2022

TUBE

T - Tube

height

L - Tube length

W - Tube

width

B - Alignment groove width

*All dimensions are nominal

Device

Package Name Package Type

Pins

SPQ

L (mm)

W (mm)

T (µm)

B (mm)

INA125P

INA125PA

INA125PAG4

INA125U

PDIP

SOIC

506

13.97

11230

3940

4.32

506

506.6

INA125UA

3940

Pack Materials-Page 3

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TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, regulatory or other requirements.

These resources are subject to change without notice. TI grants you permission to use these resources only for development of an

application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license

is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you

will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these

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TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with

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TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

INA125UA [TI]

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