INA146UA [TI]

高电压可编程增益差分放大器 | D | 8 | -40 to 85;
INA146UA
型号: INA146UA
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

高电压可编程增益差分放大器 | D | 8 | -40 to 85

放大器 光电二极管
文件: 总17页 (文件大小:806K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
®
INA146  
INA146  
For most current data sheet and other product  
information, visit www.burr-brown.com  
High-Voltage, Programmable Gain  
DIFFERENCE AMPLIFIER  
FEATURES  
DESCRIPTION  
HIGH COMMON-MODE VOLTAGE:  
The INA146 is a precision difference amplifier that  
can be used to accurately attenuate high differential  
voltages and reject high common-mode voltages for  
compatibility with common signal processing voltage  
levels. High-voltage capability also affords inherent  
input protection. The input common-mode range ex-  
tends beyond both supply rails, making the INA146  
well-suited for both single and dual supply applica-  
tions.  
+40V at VS = +5V  
±100V at VS = ±15V  
DIFFERENTIAL GAIN = 0.1V/V TO 100V/V:  
Set with External Resistors  
LOW QUIESCENT CURRENT: 570µA  
WIDE SUPPLY RANGE:  
Single Supply: 4.5V to 36V  
Dual Supplies: ±2.25V to ±18V  
On-chip precision resistors are laser-trimmed to achieve  
accurate gain and high common-mode rejection. Ex-  
cellent TCR tracking of these resistors assures contin-  
ued high precision over temperature.  
LOW GAIN ERROR: 0.025%  
HIGH CMR: 80dB  
SO-8 PACKAGE  
A 10:1 difference amplifier provides 0.1V/V gain  
when the output amplifier is used as a unity-gain  
buffer. In this configuration, input voltages up to  
±100V can be measured. Gains greater than 0.1V/V  
can be set with an external resistor pair without affect-  
ing the common-mode input range.  
APPLICATIONS  
CURRENT SHUNT MEASUREMENTS  
SENSOR AMPLIFIER  
SYNCHRONOUS DEMODULATOR  
The INA146 is available in the SO-8 surface-mount  
package specified for the extended industrial tempera-  
ture range, –40°C to +85°C.  
CURRENT AND DIFFERENTIAL LINE  
RECEIVER  
VOLTAGE-CONTROLLED CURRENT  
SOURCE  
BATTERY POWERED SYSTEMS  
LOW COST AUTOMOTIVE  
RG1  
RG2  
V+  
INSTRUMENTATION  
7
5
R1  
R2  
100kΩ  
10kΩ  
2
VIN–  
R5  
10kΩ  
A2  
(1%)  
VO  
6
G = 0.1  
A1  
VO = (VI+N – VIN) 0.1 (1 + RG2/RG1  
)
R3  
R4  
100kΩ  
10kΩ  
3
VIN+  
INA146  
4
1
8
V–  
Ref  
V01  
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111  
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132  
©1999 Burr-Brown Corporation  
PDS-1491A  
Printed in U.S.A. September, 1999  
SBOS109  
SPECIFICATIONS: VS = ±2.25V to ±18V Dual Supplies  
At TA = +25°C, G = 0.1, RL = 10kconnected to ground and ref pin connected to ground unless otherwise noted.  
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C.  
INA146UA  
PARAMETER  
CONDITION  
MIN  
TYP  
MAX  
UNITS  
OFFSET VOLTAGE, VO  
Input Offset Voltage  
vs Temperature  
vs Power Supply  
vs Time  
RTI(1, 2)  
VS = ±15, VCM = VO = 0V  
VOS  
VOS /T  
PSRR  
±1  
±5  
mV  
See Typical Curve  
VS = ±1.35V to ±18V  
±100  
±3  
±1  
±600  
µV/V  
µV/mo  
mV  
Offset Voltage, V01  
RTI(1, 2)  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection  
Over Temperature  
VCM  
CMRR  
(VIN+) – (VIN–) = 0V, VO = 0V  
VCM = 11 (V–) to 11 (V+) = 11, RS = 0Ω  
±100(3)  
V
dB  
dB  
70  
64  
80  
74  
INPUT BIAS CURRENT(2)  
Bias Current  
Offset Current  
VCM = VS/2  
IB  
IOS  
±50  
±5  
nA  
nA  
INPUT IMPEDANCE  
Differential (non-inverting input)  
Differential (inverting input)  
Common-Mode  
110  
91.7  
55  
kΩ  
kΩ  
kΩ  
NOISE  
RTI(1, 4)  
Voltage Noise, f = 0.1Hz to 10Hz  
Voltage Noise Density, f = 1kHz  
10  
550  
µVp-p  
nV/Hz  
en  
GAIN  
G = 0.1 to 100  
Gain Equation  
Initial(1)  
Gain Error  
vs Temperature  
G = 0.1 • (1 + RG2/RG1  
)
V/V  
V/V  
%
ppm/°C  
%
ppm/°C  
% of FS  
0.1  
±0.025  
±1  
±0.025  
±1  
RL = 100k, VO = (V–)+0.15 to (V+)–1, G = 1  
RL = 100k, VO = (V–)+0.25 to (V+)–1, G = 1  
RL = 10k, VO = (V–)+0.3 to (V+)–1.25, G = 1  
RL = 10k, VO = (V–)+0.5 to (V+)–1.25, G = 1  
VO = (V–)+0.3 to (V+)–1.25, G = 1  
±0.1  
±10  
±0.1  
±10  
±0.01  
vs Temperature  
Nonlinearity  
±0.001  
FREQUENCY RESPONSE  
Small Signal Bandwidth  
G = 0.1  
G = 1  
550  
50  
0.45  
40  
kHz  
kHz  
V/µs  
µs  
Slew Rate  
Settling Time, 0.1%  
0.01%  
G = 1, 10V Step  
G = 1, 10V Step  
80  
µs  
Overload Recovery  
50% Input Overload  
40  
µs  
OUTPUT, VO  
Voltage Output  
Over Temperature  
RL = 100k, G = 1  
RL = 100k, G = 1  
RL = 10k, G = 1  
RL = 10k, G = 1  
Continuous to Common  
Stable Operation  
(V–) + 0.15  
(V–) + 0.25  
(V–) + 0.3  
(V–) + 0.5  
(V+) – 1  
(V+) – 1  
(V+) – 1.25  
(V+) – 1.25  
V
V
V
V
mA  
pF  
Over Temperature  
Short-Circuit Current  
Capacitive Load  
±15  
1000  
POWER SUPPLY  
Specified Voltage Range, Dual Supplies  
Operating Voltage Range  
Quiescent Current  
±2.25  
±1.35  
±18  
±18  
±700  
±750  
V
V
µA  
µA  
VIN = 0, IO = 0  
±570  
Over Temperature  
TEMPERATURE RANGE  
Specified Range  
Operating Range  
Storage Range  
–40  
–55  
–55  
+85  
+125  
+125  
°C  
°C  
°C  
Thermal Resistance  
θJA  
150  
°C/W  
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN+ and VIN–), gain = 0.1V/V. Specified with 10kin feedback of A2. (2) Input offset  
voltage specification includes effects of amplifier’s input bias and offset currents. (3) Common-mode voltage range is 11 (V–) to 11 [(V+) – 1] with a maximum of ±100V.  
(4) Includes effects of input current noise and thermal noise contribution of resistor network.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes  
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change  
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant  
any BURR-BROWN product for use in life support devices and/or systems.  
®
2
INA146  
SPECIFICATIONS: VS = +5V Single Supply  
At TA = +25°C, G = 1, RL = 10kconnected to VS /2 and Ref pin connected to VS /2 unless otherwise noted.  
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C.  
INA146UA  
TYP  
PARAMETER  
CONDITION  
MIN  
MAX  
UNITS  
OFFSET VOLTAGE, VO  
Input Offset Voltage  
vs Temperature  
vs Power Supply Rejection Ratio  
vs Time  
RTI(1, 2)  
VCM = VO = 0V  
VOS  
VOS /T  
PSRR  
±3  
±10  
mV  
See Typical Curve  
VS = ±1.35V to ±18V  
±100  
±3  
±600  
µV/°C  
µV/mo  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
Over Temperature  
VCM  
CMRR  
VIN+ – VIN– = 0V, VO = 0V  
VCM = –25V to +19V, RS = 0Ω  
–25  
70  
64  
19  
V
dB  
dB  
80  
74  
INPUT BIAS CURRENT(2)  
Bias Current  
Offset Current  
IB  
IOS  
±50  
±5  
nA  
nA  
INPUT IMPEDANCE  
Differential (non-inverting input)  
Differential (inverting input)  
Common-Mode  
110  
91.7  
55  
kΩ  
kΩ  
kΩ  
NOISE  
RTI(1, 3, 4)  
Voltage Noise, f = 0.1Hz to 10Hz  
Voltage Noise Density, f = 1kHz  
10  
550  
µVp-p  
nV/Hz  
en  
GAIN  
Gain Equation  
Initial(1)  
Gain Error  
vs Temperature  
G = 0.1 to 100  
G = 0.1 • (1 + RG2 /RG1)  
V/V  
V/V  
V/V  
0.1  
±0.025  
±1  
±0.025  
±1  
RL = 100k, VO = 0.15V to 4V, G = 1  
RL = 100k, VO = 0.25V to 4V, G = 1  
RL = 10k, VO = 0.3V to 3.75V, G = 1  
RL = 10k, VO = 0.5V to 3.75V, G = 1  
VO = +0.3 to +3.75, G = 1  
±0.1  
±10  
±0.1  
±10  
±0.01  
%
ppm/°C  
%
ppm/°C  
% of FS  
vs Temperature  
Nonlinearity  
±0.001  
FREQUENCY RESPONSE  
Small Signal Bandwidth  
G = 0.1  
G = 1  
550  
50  
0.45  
40  
kHz  
kHz  
V/µs  
µs  
Slew Rate  
Settling Time, 0.1%  
0.01%  
G = 1, 10V Step  
G = 1, 10V Step  
80  
µs  
Overload Recovery  
50% Input Overload  
40  
µs  
OUTPUT, VO  
Voltage Output  
Over Temperature  
RL = 100k, G = 1  
RL = 100k, G = 1  
RL = 10k, G = 1  
RL = 10k, G = 1  
Continuous to Common  
Stable Operation  
0.15  
0.25  
0.3  
4
4
3.75  
3.75  
V
V
V
V
mA  
pF  
Over Temperature  
Short-Circuit Current  
Capacitive Load  
0.5  
±15  
1000  
POWER SUPPLY  
Voltage Range, Dual Supplies  
Voltage Range, Single Supply  
Quiescent Current  
±2.25  
±4.5  
±18  
±36  
±700  
±750  
V
V
µA  
µA  
VIN = 0, IO = 0  
±570  
Over Temperature  
TEMPERATURE RANGE  
Specified Range  
Operating Range  
Storage Range  
–40  
–55  
–55  
+85  
+125  
+125  
°C  
°C  
°C  
Thermal Resistance  
θJA  
150  
°C/W  
NOTES: (1) Overall difference amplifier configuration. Referred to input pins (VIN+ and VIN–), gain = 0.1V/V. Specified with 10kin feedback of A2. (2) Input offset  
voltage specification includes effects of amplifier’s input bias and offset currents. (3) Includes effects of input current noise and thermal noise contribution of resistor  
network. (4) Common-mode voltage range is 11 (V–) to 11 [(V+) – 1] with a maximum of ±100V.  
®
3
INA146  
AMPLIFIER A1, A2 PERFORMANCE  
At TA = +25°C, G = 0.1, RL = 10kconnected to ground and Ref pin, unless otherwise noted.  
Boldface limits apply over the specified temperature range, TA = –40°C to +85°C.  
INA146UA  
TYP  
PARAMETER  
CONDITION  
MIN  
MAX  
UNITS  
OFFSET VOLTAGE, VO  
Input Offset Voltage  
vs Temperature  
RTI(1, 2)  
VS = ±15V, VCM = VO = 0V  
TA = –40°C to +85°C  
VOS  
VOS /T  
±0.5  
±1  
mV  
µV/°C  
INPUT VOLTAGE RANGE  
Common-Mode Voltage Range  
Common-Mode Rejection Ratio  
VCM  
CMRR  
VIN+ – VIN– = 0V, VO = 0V  
(V–) to (V+) –1  
90  
V
dB  
V
CM = (V–) to (V+) –1  
OPEN-LOOP GAIN  
Open Loop Gain  
AOL  
110  
dB  
INPUT BIAS CURRENT(2)  
Bias Current  
Offset Current  
IB  
IOS  
±50  
±5  
nA  
nA  
RESISTOR AT A1 OUTPUT, VO1  
Initial  
Error  
10  
±1  
kΩ  
%
Temperature Drift Coefficient  
±100  
ppm/°C  
PIN CONFIGURATION  
ELECTROSTATIC  
DISCHARGE SENSITIVITY  
Top View  
SO-8  
This integrated circuit can be damaged by ESD. Burr-Brown  
recommends that all integrated circuits be handled with  
appropriate precautions. Failure to observe proper handling  
and installation procedures can cause damage.  
Ref  
VIN  
VI+N  
V–  
1
2
3
4
8
7
6
5
VO1  
V+  
VO  
RG  
ESD damage can range from subtle performance degradation  
to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric  
changes could cause the device not to meet its published  
specifications.  
ABSOLUTE MAXIMUM RATINGS(1)  
Supply Voltage, V+ to V.................................................................... 36V  
Signal Input Terminals, Voltage ...................................................... ±100V  
Current ....................................................... ±1mA  
Output Short Circuit (to ground).............................................. Continuous  
Operating Temperature ..................................................55°C to +125°C  
Storage Temperature .....................................................55°C to +150°C  
Junction Temperature .................................................................... +150°C  
Lead Temperature (soldering, 10s) ............................................... +240°C  
NOTE: (1) Stresses above these ratings may cause permanent damage.  
Exposure to absolute maximum conditions for extended periods may degrade  
device reliability.  
PACKAGE/ORDERING INFORMATION  
PACKAGE  
SPECIFIED  
DRAWING  
NUMBER(1)  
TEMPERATURE  
RANGE  
PACKAGE  
MARKING  
ORDERING  
NUMBER(2)  
TRANSPORT  
MEDIA  
PRODUCT  
PACKAGE  
INA146UA  
"
SO-8  
"
182  
"
–40°C to +85°C  
INA146UA  
"
INA146UA  
INA146UA/2K5  
Rails  
Tape and Reel  
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book, or visit the Burr-Brown web site  
at www.burr-brown.com. (2) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel).  
Ordering 2500 pieces of “INA146UA/2K5” will get a single 2500-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of  
Burr-Brown IC Data Book.  
®
4
INA146  
TYPICAL PERFORMANCE CURVES  
At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kconnected to ground and Ref pin connected to ground, unless otherwise noted.  
GAIN vs FREQUENCY  
GAIN vs FREQUENCY  
G = 10  
40  
20  
40  
20  
VS = ±15V  
VS = ±15V  
CL = 1000pF  
CL = 200pF 10kΩ  
G = 10  
G = 1  
0
0
G = 1  
–20  
–40  
–20  
–40  
G = 0.1  
G = 0.1  
100  
1K  
10K  
100K  
1M  
10M  
100  
1K  
10K  
100K  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
POWER SUPPLY REJECTION vs FREQUENCY  
COMMON-MODE REJECTION vs FREQUENCY  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
PSR+  
(VS = ±15V)  
PSR+  
(VS = +5V)  
PSR–  
(VS = ±15V)  
1
10  
100  
1k  
10k  
100k  
10  
100  
1k  
10k  
100k  
1M  
10M  
Frequency (Hz)  
Frequency (Hz)  
0.1Hz to 10Hz VOLTAGE NOISE (RTI)  
INPUT VOLTAGE NOISE DENSITY  
10k  
G = 0.1  
1k  
G = 10  
G = 1  
100  
0.1  
1
10  
100  
1k  
10k  
100k  
500ms/div  
Frequency (Hz)  
®
5
INA146  
TYPICAL PERFORMANCE CURVES (Cont.)  
At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kconnected to ground and Ref pin connected to ground, unless otherwise noted.  
QUIESCENT CURRENT AND  
SHORT-CIRCUIT CURRENT vs TEMPERATURE  
SLEW RATE vs TEMPERATURE  
670  
650  
630  
610  
590  
570  
550  
530  
510  
490  
470  
20  
18  
16  
14  
12  
10  
8
0.6  
0.55  
0.5  
G = 1  
G = 1  
ISC  
0.45  
0.4  
IQ  
0.35  
0.3  
6
4
0.25  
0.2  
2
0
–60 –40 –20  
0
20  
40  
60 80 100  
140  
120  
–60 –40 –20  
0
20  
40  
60 80 100  
140  
120  
Temperature (°C)  
Temperature (°C)  
GAIN AND PHASE vs FREQUENCY  
Op Amp A1 and A2  
SETTLING TIME vs LOAD CAPACITANCE  
120  
100  
80  
60  
40  
20  
0
110  
100  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
TS vs CLOAD  
VS = ±15V  
0.01%, G = 1  
G
RL = 10k|| 200pF  
Φ
–90  
RL = 10k|| 1nF  
0.1%, G = 0.1  
–135  
–180  
0.1%, G = 1  
–10  
1
3
10  
30  
100  
1
10  
100  
1k  
Frequency (Hz)  
10k  
100k  
1M  
Load Capacitance (nF)  
MAXIMUM OUTPUT VOLTAGE SWING  
vs OUTPUT CURRENT  
OFFSET VOLTAGE  
PRODUCTION DISTRIBUTION  
Typical production  
S = ±2.25V  
15  
10  
5
25  
20  
15  
10  
5
+85°C  
V
distribution of  
–25°C  
+25°C  
packaged units.  
+125°C  
+85°C  
0
–55°C  
+125°C  
–5  
–10  
–15  
+25°C  
–25°C  
+85°C  
0
0
2
4
6
8
10  
12  
14  
16  
Output Current (mA)  
Offset Voltage, RTI (mV)  
®
6
INA146  
TYPICAL PERFORMANCE CURVES (Cont.)  
At TA = +25°C, VS = ±15V, G = 0.1, RL = 10kconnected to ground and Ref pin connected to ground, unless otherwise noted.  
OFFSET VOLTAGE  
OFFSET VOLTAGE DRIFT  
PRODUCTION DISTRIBUTION  
PRODUCTION DISTRIBUTION  
40  
35  
30  
25  
20  
15  
10  
5
30  
25  
20  
15  
10  
5
Typical production  
distribution of  
packaged units.  
Typical production  
distribution of  
packaged units.  
V
S = ±15V  
VS = ±15V  
0
0
Offset Voltage Drift, RTI (µV/°C)  
Offset Voltage, RTI (mV)  
SMALL-SIGNAL STEP RESPONSE  
(G = 0.1, CL = 1000pF)  
SMALL-SIGNAL STEP RESPONSE  
(G = 0.1, RL = 10k, CL = 200pF)  
5µs/div  
5µs/div  
LARGE-SIGNAL STEP RESPONSE  
SMALL-SIGNAL STEP RESPONSE  
(G = 1, CL = 1000pF)  
(G = 1, RL = 10k, CL = 200pF)  
50µs/div  
5µs/div  
®
7
INA146  
SETTING THE GAIN  
APPLICATION INFORMATION  
The gain of the INA146 is set by using two external  
resistors, RG1 and RG2, according to the equation:  
The INA146 is a programmable gain difference amplifier  
consisting of a gain of 0.1 difference amplifier and a pro-  
grammable-gain output buffer stage. Basic circuit connec-  
tions are shown in Figure 1. Power supply bypass capacitors  
should be connected close to pins 4 and 7 as shown. The  
amplifier is programmable in the range of G = 0.1 to G = 50  
with two external resistors.  
G = 0.1 • (1 + RG2/RG1)  
For a total gain of 0.1, A2 is connected as a buffer amplifier  
with no RG1. A feedback resistor, RG2 = 10k, should be  
used in the buffer connection. This provides bias current  
cancellation (in combination with internal R5) to assure  
specified offset voltage performance. Commonly used val-  
ues are shown in the table of Figure 1. Resistor values for  
other gains should be chosen to provide a 10kparallel  
resistance.  
The output of A1 is connected to the noninverting input of  
A2 through a 10kresistor which is trimmed to ±1%  
absolute accuracy. The A2 input is available for applications  
such as a filter or a precision current source. See application  
figures for examples.  
COMMON-MODE RANGE  
OPERATING VOLTAGE  
The 10:1 input resistor ratio of the INA146 provides an input  
common-mode range that can extend well beyond the power  
supply rails. Exact range depends on the power supply  
voltage and the voltage applied to the Ref terminal (pin 1).  
To assure proper operation, the voltage at the non-inverting  
input of A1 (an internal node) must be within its linear  
operating range. Its voltage is determined by the simple 10:1  
voltage divider between pin 3 and pin 1. This voltage must  
be between V– and (V+) – 1V.  
The INA146 is fully specified for supply voltages from  
±2.25V to ±18V with key parameters guaranteed over the  
temperature range –40°C to +85°C. The INA146 can be  
operated with single or dual supplies with excellent perfor-  
mance. Parameters that vary significantly with operating  
voltage, load conditions or temperature are shown in the  
typical performance curves.  
+VS  
RG1  
RG2  
0.1µF  
RB  
7
5
R1  
R2  
100kΩ  
10kΩ  
VIN–  
VO = (VI+N – VIN) 0.1 (1 + RG2/RG1  
)
2
R5  
10kΩ  
A2  
VO  
6
A1  
STANDARD 1% RESISTORS  
R3  
100kΩ  
R4  
10kΩ  
TOTAL GAIN A2 GAIN  
RG1  
()  
RG2  
()  
RB  
()  
(V/V)  
(V/V)  
VI+N  
0.1  
0.2  
0.5  
1
2
5
10  
20  
50  
100  
1
2
5
10  
20  
(None)  
20k  
10k  
20k  
9.53k  
10k  
10k  
3
INA146  
4
1
8
12.4k  
11.0k  
10.5k  
10.2k  
10.2k  
499  
49.9k  
100k  
200k  
499k  
1M  
100k  
49.9k  
100k  
0.1µF  
V01  
50  
–VS  
100  
200  
500  
1000  
100  
100  
FIGURE 1. Basic Circuit Connections.  
®
8
INA146  
OFFSET TRIM  
INPUT IMPEDANCE  
The INA146 is laser-trimmed for low offset voltage and  
drift. Most applications require no external offset adjust-  
ment. Figure 2 shows an optional circuit for trimming the  
offset voltage. A voltage applied to the Ref terminal will  
be summed with the output signal. This can be used to null  
offset voltage. To maintain good common-mode rejection,  
the source impedance of a signal applied to the Ref  
terminal should be less than 10and a resistor added to  
the positive input terminal should be 10 times that, or  
100. Alternatively, the trim voltage can be buffered with  
an op amp such as the OPA277.  
The input impedance of the INA146 is determined by the  
input resistor network and is approximately 100k. The  
source impedance at the two input terminals must be nearly  
equal to maintain good common-mode rejection. A 12Ω  
mismatch in impedance between the two inputs will cause  
the typical common-mode rejection to be degraded to ap-  
proximately 72dB. Figure 7 shows a common application  
measuring power supply current through a shunt resistor.  
The source impedance of the shunt resistor, RS, is balanced  
by an equal compensation resistor, RC.  
Source impedances greater than 800are not recommended,  
even if they are perfectly matched. Internal resistors are laser  
trimmed for accurate ratios, not to absolute values. Adding  
equal resistors greater than 800can cause a mismatch in  
the total resistor ratios, degrading CMR.  
10kΩ  
5
R1  
R2  
VIN–  
R5  
A2  
VO  
6
R3  
A1  
100Ω  
VIN+  
R4  
1
+15V  
Offset Adjustment Range = ±15mV, RTI  
(±1.5mV at pin 1)  
VO1  
RT  
100kΩ  
100kΩ  
10Ω  
NOTE: Increasing the trim resistor  
T will decrease the trim range  
–15V  
R
FIGURE 2. Optional Offset Trim Circuit.  
RG2  
10kΩ  
V+  
+5V  
RX  
5
7
2
Output scaled to low  
voltage A/D converter.  
10.8V  
+
10kΩ  
V
O = 1.08V nominal  
VIN  
Load  
6
3
RX  
INA146  
V+  
Max VIN  
+5V  
+7V  
40V  
60V  
4
1
8
Differential measurement at  
battery rejects voltage drop  
in connection resistance, RX.  
+10V  
95V  
11V 100V  
FIGURE 3. Measuring Voltages Greater than Supply Voltage.  
®
9
INA146  
Pole at  
106Hz  
G = 1  
1500pF  
RG2  
10kΩ  
RG2  
1MΩ  
RG1  
10kΩ  
5
VIN  
2
3
5
2
VIN  
10kΩ  
VO  
6
10kΩ  
VO  
VI+N  
6
INA146  
1
8
1N4684 (3.3V)  
1N914  
VI+N  
3
Output clamps at  
approximately ±4V.  
INA146  
1
8
22nF  
Pole at  
720Hz  
FIGURE 5. Output Clamp.  
FIGURE 4. Noise Filtering.  
RG2  
10kΩ  
5
R1  
R2  
VIN  
2
0V VO 5V  
10kΩ  
VO  
6
R3  
R4  
3
VI+N  
INA146  
8
1
1N914  
(1)  
5.0V  
Voltage  
Reference  
or analog-to-digital VS  
1N914  
(1)  
NOTE: (1) 1/2 OPA2342 with VS connected to +5V and GND.  
FIGURE 6. Precision Clamp.  
®
10  
INA146  
RG2  
RG1  
100kΩ  
11kΩ  
Power  
Supply  
5
For sense resistors (RS)  
greater than 10, use  
series compensation  
resistor (RC) for good  
common-mode rejection.  
Sense resistors greater  
than 500are not  
2
RC  
100Ω  
VO  
6
recommended.  
RS  
100Ω  
3
INA146  
1
8
Load  
VO1  
FIGURE 7. Current Monitor, G = 1.  
+5V  
24V  
8.4kΩ  
Feedback  
7
5
2
8kΩ  
1V  
VO  
10kΩ  
2kΩ  
6
SHUNT  
R-I Lamp/10  
e.g., 0.1for 1A  
1V – 50mV  
3
INA146  
10MΩ  
4
1
8
Ref  
Lamp  
FIGURE 8. Comparator Output with Optional Hysteresis Application to Sense Lamp Burn-Out.  
RG2  
RG1  
100kΩ  
11kΩ  
RG2  
10kΩ  
5
VIN  
5
2
2
VIN  
VO  
10kΩ  
VO  
6
R1  
1MΩ  
3
VI+N  
INA146  
1
3
VI+N  
C1  
0.1µF  
INA146  
1
8
VO1  
Pole at  
1
IOUT – (VI+N – VIN)/10kΩ  
f =  
= 1.6Hz  
OPA277  
2πR1RC  
FIGURE 9. AC Coupling (DC Restoration).  
FIGURE 10. Precision Current Source.  
®
11  
INA146  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jun-2023  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
INA146UA  
INA146UA/2K5  
INA146UAE4  
ACTIVE  
SOIC  
SOIC  
SOIC  
D
D
D
8
8
8
75  
RoHS & Green  
NIPDAU  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
Level-3-260C-168 HR  
-40 to 85  
-40 to 85  
-40 to 85  
INA  
146UA  
Samples  
Samples  
ACTIVE  
2500 RoHS & Green  
75 RoHS & Green  
NIPDAU  
NIPDAU  
INA  
146UA  
LIFEBUY  
INA  
146UA  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jun-2023  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA146UA/2K5  
SOIC  
D
8
2500  
330.0  
12.4  
6.4  
5.2  
2.1  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SOIC  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 35.0  
INA146UA/2K5  
D
8
2500  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
INA146UA  
D
D
SOIC  
SOIC  
8
8
75  
75  
506.6  
506.6  
8
8
3940  
3940  
4.32  
4.32  
INA146UAE4  
Pack Materials-Page 3  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, regulatory or other requirements.  
These resources are subject to change without notice. TI grants you permission to use these resources only for development of an  
application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license  
is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you  
will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these  
resources.  
TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with  
such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for  
TI products.  
TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2023, Texas Instruments Incorporated  

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