INA159_12 [TI]
Precision, Gain of 0.2 Level Translation;
| 型号： | INA159_12 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Precision, Gain of 0.2 Level Translation |
| 文件： | 总14页 (文件大小：245K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
Precision, Gain of 0.2 Level Translation
DIFFERENCE AMPLIFIER
FD EATURES
DESCRIPTION
GAIN OF 0.2 TO INTERFACE 10V SIGNALS
TO SINGLE-SUPPLY ADCs
The INA159 is a high slew rate, G = 1/5 difference amplifier
consisting of a precision op amp with a precision resistor
network. The gain of 1/5 makes the INA159 useful to
couple 10V signals to single-supply analog-to-digital
converters (ADCs), particularly those operating on a single
+5V supply. The on-chip resistors are laser-trimmed for
accurate gain and high common-mode rejection. Excellent
temperature coefficient of resistance (TCR) tracking of the
resistors maintains gain accuracy and common-mode
rejection over temperature. The input common-mode
voltage range extends beyond the positive and negative
supply rails. It operates on a total of +1.8V to +5.5V single
or split supplies. The INA159 reference input uses two
resistors for easy mid-supply or reference biasing.
D
D
D
D
D
D
GAIN ACCURACY: 0.024% (max)
WIDE BANDWIDTH: 1.5MHz
HIGH SLEW RATE: 15V/µs
LOW OFFSET VOLTAGE: 100µV
LOW OFFSET DRIFT: 1.5µV/°C
SINGLE-SUPPLY OPERATION DOWN TO 1.8V
AD PPLICATIONS
INDUSTRIAL PROCESS CONTROLS
D
INSTRUMENTATION
The difference amplifier is the foundation of many
commonly-used circuits. The INA159 provides this circuit
function without using an expensive external precision
resistor network. The INA159 is available in an MSOP-8
surface-mount package and is specified for operation over
the extended industrial temperature range, −40°C to
+125°C.
D
DIFFERENTIAL TO SINGLE-ENDED
CONVERSION
D
AUDIO LINE RECEIVERS
VREF
5V
V+
Ω
Ω
20k
100k
−
SENSE
IN
REF V+
R1
DOUT
Ω
100
+IN
ADS8325
ADC
DCLOCK
CS
C1
1000pF
−
IN
Ω
Ω
Ω
100k
40k
+IN
REF 2
REF 1
GND
VIN
40k
INA159
Figure 1. Typical Application
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
ꢀꢁ ꢂ ꢃꢄ ꢅ ꢆꢇ ꢂꢈ ꢃ ꢉꢆꢉ ꢊꢋ ꢌꢍ ꢎ ꢏꢐ ꢑꢊꢍꢋ ꢊꢒ ꢓꢔ ꢎ ꢎ ꢕꢋꢑ ꢐꢒ ꢍꢌ ꢖꢔꢗ ꢘꢊꢓ ꢐꢑꢊ ꢍꢋ ꢙꢐ ꢑꢕꢚ ꢀꢎ ꢍꢙꢔ ꢓꢑꢒ
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ꢀꢎ ꢍ ꢙꢔꢓ ꢑ ꢊꢍ ꢋ ꢖꢎ ꢍ ꢓ ꢕ ꢒ ꢒ ꢊꢋ ꢟ ꢙꢍ ꢕ ꢒ ꢋꢍꢑ ꢋꢕ ꢓꢕ ꢒꢒ ꢐꢎ ꢊꢘ ꢞ ꢊꢋꢓ ꢘꢔꢙ ꢕ ꢑꢕ ꢒꢑꢊ ꢋꢟ ꢍꢌ ꢐꢘ ꢘ ꢖꢐ ꢎ ꢐꢏ ꢕꢑꢕ ꢎ ꢒꢚ
Copyright 2005, Texas Instruments Incorporated
www.ti.com
ꢇ
ꢈ
ꢉ
ꢠ
ꢡ
ꢢ
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
(1)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.5V
Signal Input Terminals (−IN and +IN), Voltage . . . . . . . . . . . . . 30V
Reference (REF 1 and REF2) and Sense Pins
handledwith appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
Voltage . . . . . . . . . . . . . . . . . . . . . . . . (V−) − 0.5V to (V+) + 0.5V
Output Short Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Operating Temperature . . . . . . . . . . . . . . . . . . . . . −40°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
ESD Rating
ORDERING INFORMATION(1)
PACKAGE
DESIGNATOR
PACKAGE
MARKING
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4000V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000V
PRODUCT PACKAGE-LEAD
INA159 MSOP-8
(1)
DGK
CJB
(1)
Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see
the TI web site at www.ti.com.
PIN CONFIGURATIONS
TOP VIEW
MSOP
INA159
1
2
3
4
REF 2
V+
REF 1
8
7
6
5
−
IN
OUT
+IN
SENSE
−
V
2
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
ELECTRICAL CHARACTERISTICS: V = +5V
S
Boldface limits apply over the specified temperature range, T = −40°C to +125°C.
A
At T = +25°C, R = 10kΩ connected to V /2, REF pin 1 connected to ground, and REF pin 2 connected to V
= 5V, unless otherwise noted.
A
L
S
REF
INA159
TYP
PARAMETER
(1)
CONDITIONS
MIN
MAX
UNIT
OFFSET VOLTAGE
RTO
(1)
Initial
V
V
=
2.5V, Reference and Input Pins Grounded
100
1.5
20
0.002
0.002
500
µV
µV/°C
µV/V
%
OS
S
vs Temperature
vs Power Supply
Reference Divider Accuracy
over Temperature
PSRR
V
=
0.9V to 2.75V
100
0.024
S
(2)
%
(3)
INPUT IMPEDANCE
Differential
Common-Mode
240
60
kΩ
kΩ
INPUT VOLTAGE RANGE
Common-Mode Voltage
Range
RTI
V
CM
Positive
Negative
17.5
−12.5
V
V
Common-Mode Rejection
Ratio
CMRR
V
= −10V to +10V, R = 0Ω
80
96
dB
CM
S
over Temperature
94
dB
(4)
OUTPUT VOLTAGE NOISE
RTO
f = 0.1Hz to 10Hz
f = 10kHz
10
30
µV
PP
nV/√Hz
GAIN
V
= 4.096V, R Connected to GND,
REF2 L
(V ) − (V ) = −10V to +10V, V = 0V
CM
IN+
IN−
Initial
Error
vs Temperature
Nonlinearity
G
0.2
0.005
1
V/V
%
ppm/°C
% of FS
0.024
0.0002
OUTPUT
Voltage, Positive
Voltage, Negative
Current Limit, Continuous to Common
Capacitive Load
V
V
= 4.096V, R Connected to GND
(V+) − 0.1
(V−) + 0.048 (V−) + 0.01
60
(V+) − 0.02
V
V
mA
pF
Ω
REF2
REF2
L
= 4.096V, R Connected to GND
L
See Typical Characteristic
110
Open-Loop Output Impedance
R
f = 1MHz, I = 0
O
O
FREQUENCY RESPONSE
Small-Signal Bandwidth
Slew Rate
Settling Time, 0.01%
Overload Recovery Time
−3dB
1.5
15
1
MHz
V/µs
µs
SR
t
4V Output Step, C = 100pF
L
S
50% Overdrive
250
ns
POWER SUPPLY
Specified Voltage Range
Operating Voltage Range
V
+5
V
V
S
+1.8
+5.5
1.5
I
= 0mA, V
=
2.5V,
O
S
Quiescent Current
I
1.1
mA
Q
Reference and Input Pins Grounded
TEMPERATURE RANGE
Specified Range
Operating Range
Storage Range
−40
−40
−65
+125
+150
+150
°C
°C
°C
Thermal Resistance
MSOP-8
q
JA
Surface-Mount
150
°C/W
(1)
(2)
(3)
(4)
Includes effects of amplifier input bias and offset currents.
Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 2.
Internal resistors are ratio matched but have 20% absolute value.
Includes effects of amplifier input current noise and thermal noise contribution of resistor network.
3
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
+5V
V+
7
Ω
Ω
Ω
100k
100k
20k
2
3
5
6
The test is performed by
measuring the output
with the reference
applied to alternate
OUT
reference resistors, and
calculating a result such
that the amplifier offset is
cancelled in the final
measurement.
Ω
Ω
40k
40k
1
8
INA159
4
−
V
Figure 2. Test Circuit for Reference Divider Accuracy
TYPICAL CHARACTERISTICS
At T = +25°C, R = 10kΩ connected to V /2, REF pin 1 connected to ground, and REF pin 2 connected to V = 5V, unless otherwise noted.
REF
A
L
S
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
µ
_
Offset Voltage Drift ( V/ C)
µ
Offset Voltage ( V)
GAIN vs FREQUENCY
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
0
10
20
30
40
50
130
120
110
100
90
80
70
60
50
40
30
20
10
−
−
−
−
−
0
−
10
10
100
1k
10k
100k
1M
10M
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
4
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, R = 10kΩ connected to V /2, REF pin 1 connected to ground, and REF pin 2 connected to V = 5V, unless otherwise noted.
REF
A
L
S
COMMON−MODE REJECTION RATIO vs FREQUENCY
QUIESCENT CURRENT vs TEMPERATURE
VS = 5.5V
120
110
100
90
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
VS = 5V
80
70
60
VS = 1.8V
50
40
30
20
−
10
100
1k
10k
100k
1M
10M
50
−
25
0
25
50
75
100
125
Frequency (Hz)
_
Temperature ( C)
SHORT−CIRCUIT CURRENT vs TEMPERATURE
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
3.0
2.5
2.0
1.5
1.0
0.5
0
120
100
80
60
40
20
0
VS
=
2.75V
−
_
TA
=
40
C
VS
= 2.5V
_
TA = +25
C
−
_
TA
=
40
C
TA
=
+125_C
_
TA = +125
C
VS
= 0.9V
−
−
−
−
−
−
0.5
1.0
1.5
2.0
2.5
3.0
−
−
−
−
20
40
60
80
VS
= 2.5V
VS
VS
=
0.9V
2.5V
=
VS
25
=
2.75V
−
100
−
0
50
−
10
20
30
40
50
60
70
80
90
25
0
50
75
100
125
_
Output Current (mA)
Temperature ( C)
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
OUTPUT VOLTAGE NOISE SPECTRAL DENSITY
vs FREQUENCY
1000
100
10
0.01
0.25VPP
Ω
Ω
2k
4VPP
600
0.001
1
10
10
100
1k
10k
100k
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
5
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, R = 10kΩ connected to V /2, REF pin 1 connected to ground, and REF pin 2 connected to V
= 5V, unless otherwise noted.
A
L
S
REF
0.1Hz TO 10Hz NOISE
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
60
50
40
30
20
10
0
VS = 5V
100
1000
Load Capacitance (pF)
3000
Time (1s/div)
SMALL−SIGNAL STEP RESPONSE
LARGE−SIGNAL STEP RESPONSE
Time (500ns/div)
Time (500ns/div)
SETTLING TIME
VOUT = 4V Step
CL = 100pF
Time (250ns/div)
6
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
Where one REF pin is connected to the reference, and the
other pin grounded (1/2 reference connection):
APPLICATION INFORMATION
The internal op amp of the INA159 has a rail-to-rail
common-mode voltage capability at its inputs. A rail-to-rail
op amp allows the use of 10V inputs into a circuit biased
to 1/2 of a 5V reference (2.5V quiescent output). The inputs
to the op amp will swing from approximately 400mV to
3.75V in this application.
(
)
[(
)
(
)]
)]
VCM) + V) ) 5 V) * 0.5VREF
(3)
(4)
(
)
[(
)
(
VCM* + V* * 5 0.5VREF * V*
Some typical values are shown in Table 1.
The unique input topology of the INA159 eliminates the
input offset transition region typical of most rail-to-rail
complementary stage operational amplifiers. This allows
the INA159 to provide superior glitch- and transition-free
performance over the entire common-mode range.
Table 1. Common-Mode Range For Various
Supply and Reference Voltages
REF 1 and REF 2 Connected Together
V+
5
V−
0
V
V
V
CM−
REF
CM+
3
15
−15
Good layout practice includes the use of a 0.1µF bypass
capacitor placed closely across the supply pins.
5
0
2.5
17.5
−12.5
−6.25
5
0
1.25
23.75
1/2 Reference Connection
COMMON-MODE RANGE
V+
5
V−
0
V
V
V
REF
CM+
CM−
5
17.5
19.76
23.75
11.55
13.55
16.675
−12.5
−10.24
−6.25
−8.25
−6.25
−3.125
The common-mode range of the INA159 is a function of
supply voltage and reference. Where both pins, REF1 and
REF2, are connected together:
5
0
4.096
2.5
5
0
3.3
3.3
3.3
0
3.3
(
)
[( ]
)
VCM) + V) ) 5 V) * VREF
(1)
(2)
0
2.5
0
1.25
(
)
[
(
)]
VCM* + V* * 5 VREF * V*
7
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
Table 2. Input and Output Relationships for Various Reference and Connection Combinations
V
V
for V = 0 LINEAR V RANGE USEFUL V
SWING
REF
OUT
IN
IN
OUT
(V)
(V)
(V)
(V)
REF CONNECTION
+10
0
−10
4.5
( 2V swing)
0.5
5V
5
2.5
V+
100kΩ
20kΩ
SENSE
−IN
+10
0
−10
4.048
( 2V swing)
0.048
4.096
3.3
2.048
1.65
1.25
0.9
+10
0
−7.885
3.65
(−1.577V, +2V swing)
0.048
OUT
VREF
Ω
Ω
40k
100k
+IN
REF 2
REF 1
VIN
+10 (also +5)
0
−6 (also −5)
3.25
(−1.2V, +2V swing)
0.048
2.5
40kΩ
INA159
+10
0
−4.26
2.9
(−0.852V, +2V swing)
0.048
1.8
5V
V+
+10
0
−10
4.5
( 2V swing)
0.5
2.5
1.8
2.5
1.8
Ω
Ω
Ω
100k
20k
−
IN
SENSE
OUT
VREF
+10
0
−8.76
3.8
(−1.752V, +2V swing)
0.048
Ω
Ω
100k
40k
40k
+IN
REF 2
REF 1
VIN
+10
0
−5.76
3.2
(−1.15V, +2V swing)
0.048
INA159
1.2
1.2
8
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
VREF
5V
V+
Ω
Ω
Ω
100k
20k
−
SENSE
IN
REF V+
R1
DOUT
Ω
100
+IN
ADS8325
DCLOCK
ADC
C1
1000pF
−
IN
CS
Ω
Ω
100k
40k
40k
+IN
REF 2
REF 1
GND
VIN
INA159
Figure 3. Typical Application Circuit Interfacing to Medium-Speed, Single-Supply ADCs
VREF
5V
V+
Ω
100k
Ω
20k
−
SENSE
IN
REF V+
R1
DOUT
Ω
100
ADS8361 or
ADS7861
ADC
+IN
DCLOCK
CS
C1
1000pF
−
IN
Ω
100k
Ω
Ω
40k
40k
+IN
REF 2
REF 1
GND
VIN
INA159
Figure 4. Typical Application Circuit Interfacing to Medium-Speed, Single-Supply ADCs with
Pseudo-Differential Inputs (such as the ADS7861 and ADS8361)
9
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
VREF
5V
V+
Ω
Ω
Ω
100k
100k
20k
−
IN
SENSE
REF V+
ADC
R1
Ω
100
+IN
−
IN
C1
1000pF
Ω
Ω
40k
40k
+IN
REF 2
REF 1
VIN
GND
INA159
a) Unipolar, Noninverting, G = 0.2
VREF
5V
V+
Ω
Ω
Ω
100k
20k
−
IN
SENSE
REF V+
ADC
R1
Ω
100
+IN
−
IN
C1
1000pF
Ω
Ω
100k
40k
40k
+IN
REF 2
REF 1
VIN
GND
INA159
b) Bipolar, Noninverting, G = 0.2
VREF
5V
V+
Ω
Ω
Ω
100k
20k
−
SENSE
IN
REF V+
ADC
R1
Ω
100
+IN
−
IN
C1
1000pF
Ω
Ω
100k
40k
40k
+IN
REF 2
REF 1
GND
INA159
VIN
c) Unipolar, Unity Gain
Figure 5. Basic INA159 Configurations
10
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SBOS333B − JULY 2005 − REVISED OCTOBER 2005
5V
V+
Ω
Ω
Ω
100k
20k
−
SENSE A
OUT A
IN A
VIN−
Ω
100
1000pF
Ω
Ω
100k
40k
40k
+IN A
REF 2A
REF 1A
VIN+
INA159
VREF
V+
Ω
Ω
Ω
100k
20k
REF V+
+IN
−
IN B
SENSE B
OUT B
5V
ADC
Ω
100
−
IN
1000pF
GND
Ω
Ω
100k
40k
40k
+IN B
REF 2B
REF 1B
INA159
Figure 6. Differential ADC Drive
11
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2005
PACKAGING INFORMATION
Orderable Device
INA159AIDGKR
INA159AIDGKT
INA159AIDGKTG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
MSOP
DGK
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP
MSOP
DGK
DGK
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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