INA1651-Q1 [TI]
车用 SoundPlus™ 高共模抑制、低失真差分线路接收器;型号: | INA1651-Q1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 车用 SoundPlus™ 高共模抑制、低失真差分线路接收器 |
文件: | 总41页 (文件大小:2577K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
INA165x-Q1 SoundPlus™ 高共模抑制线路接收器
1 特性
3 说明
1
•
符合面向汽车应用的 AEC-Q100 标准
温度等级 1:–40°C 至 +125°C,TA
INA1650-Q1 双通道和 INA1651-Q1 单通道 (INA165x-
Q1) SoundPlus™音频线路接收器可实现 91dB 的极高
共模抑制比 (CMRR),与此同时,对于 20dBu 信号电
平,可在 1kHz 时保持 -119dB 的超低 THD+N。不同
于其他线路接收器产品,INA165x-Q1 CMRR 在额定
温度范围内能保持特性不变,经生产测试,可在各种应
用中提供稳定的 性能。
–
•
•
•
•
高共模抑制:91dB(典型值)
高输入阻抗:1MΩ 差分
超低噪声:-104.7dBu,未加权
超低总谐波失真 + 噪声:
-119dB THD+N(20dBu,22kHz 带宽)
•
•
•
•
短路保护
INA165x-Q1 器件支持 ±2.25V 至 ±12V 的极宽电源电
压范围。除线路接收器通道以外,INA165x-Q1 还包含
一个缓冲 1/2 Vs 基准输出,因此可配置为用于双电源
或单电源 应用。1/2 Vs 输出可用作信号链中的另一个
模拟电路的偏置电压。
集成电磁干扰 (EMI) 滤波器
宽电源电压范围:±2.25V 至 ±12V
采用小型 14 引脚 TSSOP 封装
2 应用
INA1650-Q1 具有 独特的内部布局,即使在过驱或过
载条件下也可在通道间实现最低串扰和零交互。
•
•
•
•
•
车厢麦克风前置放大器
信息娱乐系统
音频输入电路
线路驱动器
器件信息(1)
器件型号
INA1650-Q1
INA1651-Q1
封装
封装尺寸(标称值)
外部音频功率放大器
TSSOP (14)
5.00mm × 4.40mm
简化内部原理图
(1) 如需了解所有可用封装,请参阅数据表末尾的封装选项附录。
VCC
VEE
IN+ A
COM A
INœ A
+
CMRR 直方图(5746 通道)
OUT A
REF A
œ
25
20
15
10
5
VCC
œ
+
VMID(IN)
VEE
INA1650-Q1 ONLY
0
REF B
OUT B
INœ B
COM B
IN+ B
CMRR (ꢀV/V)
C001
œ
+
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SBOS772
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 5
6.1 Absolute Maximum Ratings ...................................... 5
6.2 ESD Ratings.............................................................. 5
6.3 Recommended Operating Conditions....................... 5
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics: ......................................... 6
6.6 Typical Characteristics.............................................. 8
Detailed Description ............................................ 15
7.1 Overview ................................................................. 15
7.2 Functional Block Diagram ....................................... 15
7.3 Feature Description................................................. 16
7.4 Device Functional Modes........................................ 19
8
9
Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Applications ................................................ 25
Power Supply Recommendations...................... 30
10 Layout................................................................... 30
10.1 Layout Guidelines ................................................. 30
10.2 Layout Example .................................................... 31
11 器件和文档支持 ..................................................... 33
11.1 器件支持................................................................ 33
11.2 文档支持................................................................ 33
11.3 接收文档更新通知 ................................................. 33
11.4 社区资源................................................................ 33
11.5 商标....................................................................... 33
11.6 静电放电警告......................................................... 34
11.7 Glossary................................................................ 34
12 机械、封装和可订购信息....................................... 34
7
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Revision B (April 2019) to Revision C
Page
•
Changed ESD Ratings table to show individual device ratings ............................................................................................. 5
Changes from Revision A (October 2017) to Revision B
Page
•
已添加 向数据表中添加了 INA1651-Q1 器件和相关内容........................................................................................................ 1
Changes from Original (August 2017) to Revision A
Page
•
INA1650-Q1 的建议电源电压范围从 36V 降到了 24V。文本、图表和电路图中提及的所有 36V 工作电压都已删除或
修改,以反映 24V 的最大电源电压。..................................................................................................................................... 1
2
Copyright © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
5 Pin Configuration and Functions
INA1650-Q1 PW Package
14-Pin TSSOP
Top View
VCC
IN+ A
1
2
3
4
5
6
7
14
13
12
11
10
9
VEE
OUT A
COM A
INœ A
REF A
VMID(IN)
VMID(OUT)
REF B
INœ B
COM B
IN+ B
8
OUT B
Not to scale
Pin Functions: INA1650-Q1
PIN
I/O
DESCRIPTION
NAME
COM A
COM B
IN+ A
IN– A
IN+ B
IN– B
OUT A
OUT B
REF A
REF B
VCC
NO.
3
I
I
Input common, channel A
Input common, channel B
Noninverting input, channel A
Inverting input, channel A
Noninverting input, channel B
Inverting input, channel B
Output, channel A
6
2
I
4
I
7
I
5
I
13
8
O
O
I
Output, channel B
12
9
Reference input, channel A. This pin must be driven from a low impedance.
Reference input, channel B. This pin must be driven from a low impedance.
Positive (highest) power supply
I
1
—
—
VEE
14
Negative (lowest) power supply
Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the
supply divider circuit.
VMID(IN)
11
10
I
VMID(OUT)
O
Buffered output of internal supply divider.
Copyright © 2017–2019, Texas Instruments Incorporated
3
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
INA1651-Q1 PW Package
14-Pin TSSOP
Top View
VCC
IN+ A
COM A
INœ A
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
VEE
OUT A
REF A
VMID(IN)
VMID(OUT)
NC
NC
NC
8
NC
Not to scale
Pin Functions: INA1651-Q1
PIN
I/O
DESCRIPTION
NAME
COM A
IN+ A
IN– A
NC
NO.
3
I
Input common, channel A
Noninverting input, channel A
Inverting input, channel A
No internal connection
No internal connection
No internal connection
No internal connection
No internal connection
Output, channel A
2
I
4
I
5
—
—
—
—
—
O
I
NC
6
NC
7
NC
8
NC
9
OUT A
REF A
VCC
VEE
13
12
1
Reference input, channel A. This pin must be driven from a low impedance.
Positive (highest) power supply
—
—
14
Negative (lowest) power supply
Input node of internal supply divider. Connect a capacitor to this pin to reduce noise from the
supply divider circuit.
VMID(IN)
11
10
I
VMID(OUT)
O
Buffered output of internal supply divider.
4
Copyright © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
V
Supply voltage, VS = (V+) – (V–)
40
Voltage
Input voltage (signal inputs, enable, ground)
Input differential voltage
Input current (all pins except power-supply pins)
Output short-circuit(2)
(V–) – 0.5
(V+) + 0.5
(V+) – (V–)
±10
mA
Current
Continuous
Operating, TA
–55
125
150
150
Temperature
Junction, TJ
°C
Storage, Tstg
–65
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Short-circuit to VS / 2 (ground in symmetrical dual supply setups), one amplifier per package.
6.2 ESD Ratings
VALUE
UNIT
INA1650-Q1
Human-body model (HBM), per AEC Q100-002(1)
HBM ESD Classification Level 3A
±4000
±1000
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per AEC Q100-011
CDM ESD Classification Level C6
INA1651-Q1
Human-body model (HBM), per AEC Q100-002(1)
HBM ESD Classification Level 2
±2500
±500
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per AEC Q100-011
CDM ESD Classification Level C4A
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
4.5 (±2.25)
–40
NOM
MAX
24 (±12)
125
UNIT
Supply voltage (V+ – V–)
Specified temperature
V
°C
6.4 Thermal Information
INA1650-Q1
INA1651-Q1
THERMAL METRIC(1)
PW (TSSOP) PW (TSSOP)
UNIT
14 PINS
97.0
22.6
40.4
0.9
14 PINS
99.4
29.9
42.6
1.5
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
ψJB
39.6
N/A
42.0
N/A
RθJC(bot)
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2017–2019, Texas Instruments Incorporated
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6.5 Electrical Characteristics:
at TA = 25°C, VS = ±2.25 V to ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AUDIO PERFORMANCE
0.00039%
–108.1
VO = 3 VRMS, f = 1kHz, 90-kHz measurement bandwidth,
VS = ±12 V
dB
dB
dB
dB
Total harmonic distortion +
noise
THD+N
IMD
0.000224%
–113.0
VIN = 20 dBu (7.746 VRMS) , FIN = 1 kHz, VS = ±12 V,
90-kHz measurement bandwidth
0.0005%
–106.1
SMPTE and DIN two-tone, 4:1 (60 Hz and 7 kHz)
VO = 3 VRMS, 90-kHz measurement bandwidth
Intermodulation distortion
0.00066%
–103.6
CCIF twin-tone (19 kHz and 20 kHz),
VO = 3 VRMS, 90-kHz measurement bandwidth
AC PERFORMANCE
BW
SR
Small-signal bandwidth
2.7
10
MHz
V/μs
MHz
degrees
degrees
μs
Slew rate
Full-power bandwidth(1)
VO = 1 VP
1.59
71
CL = 20 pF
PM
ts
Phase margin
CL = 200 pF
54
Settling time
To 0.01%, Vs = ±12 V, 10-V step
2.2
330
140
130
80
Overload recovery time
ns
f = 1 kHz, REF and COM pins connected to ground
f = 1 kHz, REF and COM pins connected to VMID(OUT)
dB
Channel separation
dB
EMI/RFI filter corner frequency
MHz
NOISE
4.5
–104.7
47
μVRMS
Output voltage noise
f = 20 Hz to 20 kHz, no weighting
dBu
f = 100 Hz
f = 1 kHz
en
Output voltage noise density(2)
nV/√Hz
31
OFFSET VOLTAGE
±1
±3
±4
7
VOS
Output offset voltage
mV
TA = –40°C to 125°C(2)
TA = –40°C to 125°C
dVOS/dT Output offset voltage drift(2)
2
2
μV/°C
μV/V
PSRR
Power-supply rejection ratio
GAIN
Gain
1
0.04%
0.05%
1
V/V
0.05%
0.06%
5
Gain error
Gain nonlinearity
TA = –40°C to 125°C(2)
(2)
VS = ±12 V, –10 V < VO < 10 V
ppm
V
INPUT VOLTAGE
VCM
Common-mode voltage
(V–) + 0.25
(V+) – 2
(V–) + 0.25 V ≤ VCM ≤ (V+) – 2 V, REF and COM pins
connected to ground, VS = ±12 V
TA = –40°C to 125°C(2)
85
82
82
76
91
89
86
84
84
CMRR
Common-mode rejection ratio
dB
dB
(V–) + 0.25 V ≤ VCM ≤ (V+) – 2 V, REF and COM pins
connected to VMID(OUT), VS = ±12 V
TA = –40°C to 125°C(2)
(V–) + 0.25 V ≤ VCM ≤ (V+) – 2 V, REF and COM pins
connected to ground, VS = ±12 V, RS mismatch = 20 Ω
CMRR
Common-mode rejection ratio
(1) Full-power bandwidth = SR / (2π × VP), where SR = slew rate.
(2) Specified by design and characterization.
6
Copyright © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
Electrical Characteristics: (continued)
at TA = 25°C, VS = ±2.25 V to ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT IMPEDANCE
Differential
850
1000
250
1150
287.5
0.25%
kΩ
kΩ
Common-mode
212.5
Input resistance mismatch
0.01%
SUPPLY DIVIDER CIRCUIT
Nominal output voltage
Output voltage offset
Input impedance
[(V+) + (V–)] / 2
V
mV
kΩ
VMID(IN) = ((V+) + (V–) / 2
2
250
0.35
1.56
150
4
VMID(IN) pin, f = 1 kHz
VMID(OUT) pin
Output resistance
Ω
Output voltage noise
Output capacitive load limit
20 Hz to 20 kHz, CMID = 1 µF
Phase Margin > 45°, RISO = 0 Ω
µVRMS
pF
OUTPUT
RL = 2 kΩ
350
1100
Positive rail
Negative rail
RL = 600 Ω
RL = 2 kΩ
RL = 600 Ω
VO
Voltage output swing from rail
mV
430
1300
ZOUT
ISC
Output impedance
Short-circuit current
Capacitive load drive
f ≤ 100 kHz, IOUT = 0 A
< 1
Ω
VS = ±12 V
±75
mA
pF
CLOAD
See 图 19
POWER SUPPLY
4.6
8
6
6.9
8
IOUT = 0 A, INA1651-Q1
IOUT = 0 A, INA1650-Q1
TA = –40°C to 125°C(2)
TA = –40°C to 125°C(2)
IQ
Quiescent current
mA
10.5
12
14
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INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
6.6 Typical Characteristics
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
25
20
15
10
5
25
20
15
10
5
0
0
CMRR (ꢀV/V)
CMRR (ꢀV/V)
C001
C001
5746 channels
5746 channels
VREF pins connected to ground
VREF pins connected to VMID(OUT)
图 1. Common-Mode Rejection Ratio Distribution
图 2. Common-Mode Rejection Ratio Distribution
35
30
25
20
15
10
5
35
30
25
20
15
10
5
0
0
Input Resistance Mismatch (%)
Gain Error (%)
C001
C001
5746 channels
5746 channels
图 3. Distribution of Mismatch in 500-kΩ Input Resistors
图 4. Gain Error Distribution
25
20
15
10
5
30
25
20
15
10
5
0
0
Output Offset Voltage (ꢀV)
Offset Voltage Drift (µV/°C)
C001
C001
5746 channels
52 channels
图 5. Offset Voltage Distribution
图 6. Offset Voltage Drift Distribution
8
版权 © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
16
14
12
10
8
10
VS = ±12 V
VS = ±5 V
5
0
-5
6
-10
-15
-20
4
2
0
100
1k
10k
100k
1M
10M
10k
100k
Frequency (Hz)
1M
10M
Frequency (Hz)
C004
C001
图 7. Frequency Response
图 8. Maximum Output Voltage vs Frequency
100
90
80
70
60
50
40
120
100
80
60
40
20
0
+PSRR
REF / COM Pins Connected to VMID(OUT)
REF / COM Pins Connected to Ground
œPSRR
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
C004
C004
图 9. Common-Mode Rejection Ratio vs Frequency
图 10. Power Supply Rejection Ratio vs Frequency
0.01
-80
1000
100
10
600-ꢀ Load
2-kꢀ Load
0.001
0.0001
-100
-120
-140
0.00001
1
10
100
1k
10k
100k
10
100
1k
Frequency (Hz)
10k
Frequency (Hz)
C002
C001
3 VRMS, 90-kHz measurement bandwidth
图 11. Voltage Noise Spectral Density
图 12. THD+N vs Frequency
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Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
0.1
-60
0.1
-60
600-ꢀ Load
2-kꢀ Load
-70
0.01
-80
0.01
-80
-90
0.001
-100
-110
-120
-130
0.001
0.0001
-100
-120
0.0001
0.00001
600-ꢀ Load
2-kꢀ Load
-140
10
10
100
1k
Frequency (Hz)
10k
100k
0.01
0.1
1
Output Voltage (VRMS
)
C001
C003
3 VRMS, 500-kHz measurement bandwidth
1 kHz, 90-kHz measurement bandwidth
图 13. THD+N vs Frequency
图 14. THD+N vs Output Amplitude
0.1
0.01
-60
0.1
0.01
-60
-70
-70
-80
-80
-90
-90
0.001
-100
-110
-120
-130
-140
0.001
-100
-110
-120
-130
-140
0.0001
0.00001
0.0001
0.00001
600-ꢀ Load
2-kꢀ Load
600-ꢀ Load
2-kꢀ Load
0.01
0.1
1
10
0.01
0.1
1
10
Output Voltage (VRMS
)
Output Voltage (VRMS
)
C003
C003
SMPTE 4:1 60 Hz and 7 kHz, 90-kHz measurement bandwidth
CCIF 19 kHz and 20 kHz, 90-kHz measurement bandwidth
图 15. SMPTE Intermodulation Distortion vs Output
图 16. CCIF Intermodulation Distortion vs Output Amplitude
Amplitude
100
10
100
10
1
1
0.1
0.1
0.01
0.01
0.001
0.0001
0.001
0.0001
0.00001
1
10
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
C007
C007
CF = 1 µF
图 17. Signal Path Output Impedance vs Frequency
图 18. Supply Divider Output Impedance vs Frequency
10
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ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
-40
70
60
50
40
30
20
10
0
REF / COM Pins Grounded
REF / COM Pins Connected to VMID(OUT)
Positive Overshoot
Negative Overshoot
-60
-80
-100
-120
-140
-160
-180
1
10
100
1000
10k
100k
Frequency (Hz)
1M
10M
Capacitive Load (pF)
C004
C007
100-mV input step
图 19. Overshoot vs Capacitive Load
图 20. Channel Separation vs Frequency
Time (2.5 µs/div)
Time (2.5 µs/div)
C017
C017
10-mV input step
10-V input step
图 21. Small-Signal Step Response
图 22. Large-Signal Step Response
Time (500 ns/div)
Time (500 ns/div)
C017
C017
10-V input step, 0.01% settling = ±1 mV
10-V input step, 0.01% settling = ±1 mV
图 23. Rising-Edge Settling Time
图 24. Falling-Edge Settling Time
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Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
115
Unit 1
Unit 3
Unit 5
Unit 2
Unit 4
110
105
100
95
90
Input Signal
Output Signal
85
Time (0.25 ms/div)
-50
-25
0
25
50
75
100
125
Temperature (°C)
C001
C017
5 typical units
图 26. CMRR vs Temperature
图 25. No Phase Reversal
1500
1000
500
110
100
90
80
0
70
-500
-1000
-1500
60
Unit 1
Unit 3
Unit 5
Unit 2
Unit 4
50
Isc Sourcing
Isc Sinking
40
-10 -8
-6
-4
-2
0
2
4
6
8
10
-50
-25
0
25
50
75
100
125
VCM (V)
Temperature (°C)
C003
C001
5 typical units
图 27. Output Offset Voltage vs Common-Mode Voltage
图 28. Short-Circuit Current vs Temperature
13
12
11
10
9
-4
-5
-40 C
25 C
-6
85 C
125 C
-7
-8
8
-9
7
-10
-11
-12
-13
-40 C
6
5
4
25 C
85 C
125 C
0
10
20
30
40
50
60
70
80
90 100
0
10
20
30
40
50
60
70
80
90 100
IO (mA)
IO (mA)
C001
C001
图 29. Positive Output Voltage vs Output Current
图 30. Negative Output Voltage vs Output Current
12
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Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
13
12
11
10
9
14
12
10
8
Minimum Supply = 4.5 V
6
4
VS = +/- 12 V
2
VS = +/- 2.25 V
0
8
0
5
10
15
20
0
25
50
75
100
125
œ50
œ25
Supply Voltage (V)
Temperature (°C)
C001
C001
图 31. Quiescent Current vs Power Supply Voltage
图 32. Quiescent Current vs Temperature
5
4
15
VS = +/- 5 V
VS = +/- 12 V
VS = +/- 2.25 V
10
5
3
2
1
0
0
œ1
œ2
œ3
œ4
œ5
œ5
œ10
œ15
1
3
5
œ5
œ3
œ1
0
5
10
15
œ15
œ10
œ5
Output Voltage (V)
Output Voltage (V)
C006
C006
REF A/B connected to 0 V
REF A/B connected to 0 V
图 34. Input Common-Mode Voltage vs Output Voltage
图 33. Input Common-Mode Voltage vs Output Voltage
20
8
VS = +18 V
18
7
6
5
4
3
2
VS = +12 V
16
14
12
10
8
6
4
1
0
VS = +9 V
2
VS = +4.5 V
0
0
5
10
15
20
0
2
4
6
8
10
Output Voltage (V)
Output Voltage (V)
C006
C006
REF A/B connected to VMID(OUT)
图 35. Input Common-Mode Voltage vs Output Voltage
REF A/B connected to VMID(OUT)
图 36. Input Common-Mode Voltage vs Output Voltage
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Typical Characteristics (接下页)
at TA = 25°C, VS = ±12 V, VCM = VOUT = midsupply, and RL = 2 kΩ (unless otherwise noted)
20
18
16
14
12
10
8
8
7
6
5
4
3
2
1
0
6
4
VS = +18 V
VS = +12 V
VS = +9 V
2
VS = +4.5 V
0
0
5
10
15
20
0
2
4
6
8
Output Voltage (V)
Output Voltage (V)
C006
C006
REF A/B connected to 0 V
图 37. Input Common-Mode Voltage vs Output Voltage
REF A/B connected to 0 V
图 38. Input Common-Mode Voltage vs Output Voltage
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7 Detailed Description
7.1 Overview
The INA165x-Q1 family combines high-performance audio operational amplifier cores with high-precision resistor
networks to provide exceptional audio performance and rejection of noise that may be externally coupled into the
audio signal path. The two line-receiver channels of the INA1650-Q1, and the single line receiver channel of the
INA1651-Q1, use an instrumentation amplifier topology with a fixed unity gain to provide high input impedance
and a high common-mode rejection ratio (CMRR). Unlike other line receiver products that use a simple four-
resistor difference amplifier topology, the INA165x-Q1 topology provides excellent CMRR even with mismatched
source impedances.
7.2 Functional Block Diagram
VCC
VEE
IN+ A
COM A
INœ A
+
OUT A
REF A
œ
VCC
œ
+
VMID(IN)
VEE
INA1650-Q1 ONLY
REF B
OUT B
INœ B
COM B
IN+ B
œ
+
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7.3 Feature Description
7.3.1 Audio Signal Path
图 39 highlights the basic elements present in the audio signal pathway of the INA165x-Q1 line receivers. The
primary elements are input biasing resistors, electromagnetic interference (EMI) filtering, input buffers, and a
difference amplifier. The primary role of an audio line receiver is to convert a differential input signal into a single-
ended output signal while rejecting noise that is common to both inputs (common-mode noise). The difference
amplifier (which consists of an op amp and four matched 10-kΩ resistors) accomplishes this task. The basic
transfer function of the circuit is shown in 公式 1:
VOUT = V - VIN- + V
IN+
REF
(1)
10 kꢀ
10 kꢀ
IN+
REF
OUT
500
kꢀ
+
COM
IN-
œ
500
kꢀ
10 kꢀ
10 kꢀ
Input
Biasing
EMI
Filtering
Input
Buffers
Difference
Amplifier
Resistors
Copyright © 2016, Texas Instruments Incorporated
图 39. INA165x-Q1 Audio Signal Path (Single Channel Shown)
The input buffers prevent external resistances (such as those from the PCB, connectors, or cables) from ruining
the precise matching of the internal 10-kΩ resistors that degrade the high common-mode rejection of the
difference amplifier. As is typical of many amplifiers, a small bias current flows into or out of the buffer amplifier
inputs. This current must flow to a common potential for the buffer to function properly. The input biasing
resistors provide an internal pathway for this current to the COM pin. The COM pin connects to ground in a dual-
supply system, or to the output of the internal supply divider, VMID(OUT), in single-supply applications. Finally,
EMI filtering is added to the input buffers to prevent high-frequency interference signals from propagating through
the audio signal pathway.
16
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Feature Description (接下页)
7.3.2 Supply Divider
The INA165x-Q1 have an integrated supply-divider circuit that biases the input common-mode voltage and output
reference voltage to the halfway point between the applied power supply voltages. The nominal output voltage of
the supply divider circuit is shown in 公式 2:
VCC + VEE
VMID(OUT)
=
2
(2)
图 40 illustrates the internal topology of the supply-divider circuit. The supply divider consists of two 500-kΩ
resistors connected between the VCC and VEE pins of the INA165x-Q1. The noninverting input of a buffer
amplifier is connected to the midpoint of the voltage divider that is formed by the 500-kΩ resistors. The buffer
amplifier provides a low-impedance output that is required to bias the REF pins without degrading the CMRR.
For dual-supply applications where the supply divider circuit is not used, no connection is required for the
VMID(IN) or VMID(OUT) pins.
VCC
500
kꢀ
œ
VMID(IN)
+
500
kꢀ
VEE
VMID(OUT)
Copyright © 2016, Texas Instruments Incorporated
图 40. Internal Supply Divider Circuit
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Feature Description (接下页)
7.3.3 EMI Rejection
The INA165x-Q1 use integrated electromagnetic interference (EMI) filtering to reduce the effects of EMI from
sources (such as wireless communications) and densely-populated boards with a mix of analog signal-chain and
digital components. The INA165x-Q1 devices are specifically designed to minimize susceptibility to EMI by
incorporating an internal low-pass filter. Depending on the end-system requirements, additional EMI filters may
be required near the signal inputs of the system; as well as incorporating known good practices, such as using
short traces, low-pass filters, and damping resistors combined with parallel and shielded signal routing. Texas
Instruments developed a method to accurately measure the immunity of an amplifier over a broad frequency
spectrum, extending from 10 MHz to 6 GHz. This method uses an EMI rejection ratio (EMIRR) to quantify the
ability of the INA165x-Q1 to reject EMI. 图 41 and 图 42 show the INA165x-Q1 EMIRR graph for both differential
and common-mode EMI rejection across this frequency range. 表 1 shows the EMIRR values for the INA165x-Q1
at frequencies commonly encountered in real-world applications. Applications listed in 表 1 can be centered on or
operated near the particular frequency shown.
170
150
130
110
90
170
150
130
110
90
70
70
50
50
30
30
10
10
10M
100M
Frequency (Hz)
1G
10G
10M
100M
Frequency (Hz)
1G
10G
C001
C001
图 42. Differential Mode EMIRR Testing
图 41. Common-Mode EMIRR Testing
表 1. EMIRR for Frequencies of Interest
DIFFERENTIAL COMMON-MODE
FREQUENCY
APPLICATION OR ALLOCATION
EMIRR
EMIRR
Mobile radio, mobile satellite, space operation, weather, radar, ultrahigh-
frequency (UHF) applications
400 MHz
73 dB
111 dB
Global system for mobile communications (GSM) applications, radio
communication, navigation, GPS (up to 1.6 GHz), GSM, aeronautical mobile,
UHF applications
900 MHz
1.8 GHz
2.4 GHz
86 dB
106 dB
112 dB
123 dB
121 dB
119 dB
GSM applications, mobile personal communications, broadband, satellite,
L-band (1 GHz to 2 GHz)
802.11b, 802.11g, 802.11n, Bluetooth®, mobile personal communications,
industrial, scientific and medical (ISM) radio band, amateur radio and satellite,
S-band (2 GHz to 4 GHz)
3.6 GHz
5.0 GHz
Radiolocation, aero communication and navigation, satellite, mobile, S-band
117 dB
116 dB
121 dB
108 dB
802.11a, 802.11n, aero communication and navigation, mobile communication,
space and satellite operation, C-band (4 GHz to 8 GHz)
18
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7.3.4 Electrical Overstress
Designers often ask questions about the capability of an amplifier to withstand electrical overstress. These
questions typically focus on the device inputs, but can involve the supply voltage pins or the output pin. Each of
these different pin functions have electrical stress limits determined by the voltage breakdown characteristics of
the particular semiconductor fabrication process and specific circuits connected to the pin. Additionally, internal
electrostatic discharge (ESD) protection is built into these circuits to protect them from accidental ESD events,
both before and during product assembly. A good understanding of basic ESD circuitry and the relevance of
circuitry to an electrical overstress event is helpful. 图 43 illustrates the ESD circuits contained in the INA165x-
Q1. The ESD protection circuitry involves several current-steering diodes that are connected from the input and
output pins, and routed back to the internal power-supply lines. This protection circuitry is intended to remain
inactive during normal circuit operation. The input pins of the INA165x-Q1 are protected with internal diodes that
are connected to the power-supply rails. These diodes clamp the applied signal to prevent the input circuitry from
damage. If the input signal voltage exceeds the power supplies by more than 0.3 V, limit the input signal current
to less than 10 mA to protect the internal clamp diodes. A series input resistor can typically limit the current.
Some signal sources are inherently current-limited and do not require limiting resistors.
VCC
VEE
Power Supply
ESD Cell
VCC
+
IN+
COM
IN-
10 kꢀ
10 kꢀ
VEE
REF
OUT
œ
VCC
VEE
VCC
+
œ
VEE
VCC
VEE
VCC
œ
+
10 kꢀ
10 kꢀ
VCC
VEE
500
kꢀ
œ
+
VMID(IN)
500
kꢀ
VEE
VCC
VEE
VMID(OUT)
Copyright © 2016, Texas Instruments Incorporated
图 43. INA165x-Q1 Internal ESD Protection Circuitry
(Single Channel and Supply-Divider Shown for Simplicity)
7.3.5 Thermal Shutdown
If the junction temperature of the INA165x-Q1 exceed approximately 170°C, a thermal shutdown circuit disables
the amplifier to protect the device from damage. The amplifier is automatically re-enabled after the junction
temperature falls to less than the shutdown threshold temperature. If the condition that caused excessive power
dissipation is not removed, the amplifier oscillates between the shutdown and enabled state until the output fault
is corrected.
7.4 Device Functional Modes
7.4.1 Single-Supply Operation
The INA165x-Q1 can be used on single power supplies ranging from 4.5 V to 24 V. Use the COM and REF pins
to level shift the internal voltages into a linear operating condition. Ideally, connecting the REF and COM pins to
a midsupply potential, such as the VMID(OUT) pin, avoids saturating the output of the internal amplifiers.
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Input Common-Mode Range
The linear input voltage range of the INA165x-Q1 input circuitry extends from 350 mV inside the negative supply
voltage to 2 V below the positive supply, and maintains 85-dB (minimum) common-mode rejection throughout
this range. The INA165x-Q1 operates over a wide range of power supplies and VREF configurations; providing a
comprehensive guide to common-mode range limits for all possible conditions is impractical. The common-mode
range for most operating conditions is best calculated using the INA common-mode range calculating tool.
8.1.2 Common-Mode Input Impedance
The high CMRR of many line receivers can degrade by impedance mismatches in the system. 图 44 shows a
common-mode noise source (VCM) connected to both inputs of a single channel of the INA165x-Q1. An external
parasitic resistance (REXT) represents the mismatch in impedances between the common-mode noise source and
the inputs of the INA165x-Q1. This mismatched impedance may be due to PCB layout, connectors, cabling,
passive component tolerances, or the circuit topology. The presence of REXT in series with the IN+ input
degrades the overall CMRR of the system because the voltage at IN+ is no longer equal to the voltage at IN–.
Therefore, a portion of the common-mode noise converts to a differential signal and passes to the output.
REXT
10 kꢀ
10 kꢀ
REF
OUT
IN+
RIN+
RCOM
+
œ
COM
VCM
RIN-
IN-
10 kꢀ
10 kꢀ
Copyright © 2016, Texas Instruments Incorporated
图 44. A Single Channel of the INA165x-Q1 Shown With Source Impedance Mismatch (REXT) and Optional
Resistor (RCOM
)
While the INA165x-Q1 is significantly more resistant to these effects than typical line receivers, connecting a
resistor (RCOM) from the COM pin to the system ground further improves CMRR performance. 图 45 shows the
CMRR of the INA165x-Q1 (typical CMRR of 92 dB) for increasing source impedance mismatches. If the COM pin
is connected directly to ground (RCOM equal to 0 Ω), a 20-Ω source impedance mismatch degrades the CMRR
from 92 dB to 83.7 dB. However, if RCOM has a value of 1 MΩ, the CMRR only degrades to 89.6 dB, which is an
improvement of approximately 6 dB.
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Application Information (接下页)
100
95
90
85
80
75
70
65
0 ꢀ
250 kꢀ
500 kꢀ
1 Mꢀ
60
0
20
40
60
80
100
Source Impedance Mismatch (O)
C006
图 45. CMRR vs Source Impedance Mismatch for Different RCOM Values
RCOM does not need to be a high-precision resistor with a very tight tolerance. Low-cost 5% or 1% resistors can
be used with no degradation in overall performance. The addition of RCOM does not increase the noise of the
audio signal path.
In single-supply systems where AC coupling is used at the inputs of the INA165x-Q1, adding RCOM lengthens the
start-up time of the circuit. The input AC-coupling capacitors are charged to the midsupply voltage through the
RCOM resistor, which may take a substantial amount of time if RCOM has a large value (such as 1 MΩ). Do not
use RCOM in these systems if start-up time is a concern. In dual-supply systems with input AC-coupling
capacitors, the capacitor voltage does not need to be charged to a midsupply point, because the capacitor
voltage settles to ground by default. Therefore, RCOM does not increase start-up time in dual-supply systems.
8.1.3 Start-Up Time in Single-Supply Applications
The internal supply divider of the INA165x-Q1 is constructed using two 500-kΩ resistors connected in series
between the VCC and VEE pins. These resistors are matched on-chip to provide a reference voltage that is
exactly one half of the power supply voltage. Noise from the power supplies and thermal noise from the resistors
degrades the overall audio performance of the INA165x-Q1 if allowed to enter the signal path. Therefore, TI
recommends a filter capacitor (CF) is connected to the VMID(IN) pin, as shown in 图 46 The CF capacitor forms a
low-pass filter with the internal 500-kΩ resistors. Noise above the corner frequency of this filter is passed to
ground and is removed from the audio signal path. The corner frequency of the filter is shown in 公式 3:
1
f-3dB
=
2∂ p∂ 250 kW ∂CF
(3)
VCC
VCC
VCC
500
kꢀ
500
kꢀ
ZD1
CF
œ
œ
VMID(IN)
VMID(IN)
+
+
500
kꢀ
500
kꢀ
CF
VEE
VEE
VMID(OUT)
VMID(OUT)
Copyright © 2016, Texas Instruments Incorporated
Copyright © 2016, Texas Instruments Incorporated
图 46. Connect a Capacitor (CF) to the VMID(IN) Pin
图 47. A Zener Diode (ZD1) Connected to the
Positive Supply Can Decrease Start-Up Time
to Reduce Noise from the Voltage Divider
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Application Information (接下页)
When power is applied to the INA165x-Q1, the filter capacitor (CF) charges through the internal 500-kΩ resistors.
If the CF capacitor has a large value, the time required for VMID(OUT) to reach the final midsupply voltage may be
extensive. Adding a zener diode from the VMID(IN) pin to the positive power supply (as shown in 图 47) reduces
this time. The zener voltage must be slightly greater than one half of the power supply voltage.
Using large AC-coupling capacitors increases the start-up time of the line receiver circuit in single-supply
applications. When power is applied, the AC-coupling capacitors begin to charge to the midsupply voltage
applied to the COM pin through a current flowing through the input resistors as shown in 图 48. The INA165x-Q1
functions properly when the input common-mode voltage (and the capacitor voltage) is within the specified
range. The time required for the input common-mode voltage to reach 98% of the final value is shown in 公式 4:
t98% = 4∂R∂CIN = 4∂500 kW∂CIN
(4)
CIN
IN+
500
kꢀ
VMID(OUT)
COM
VS
500
kꢀ
IN-
CIN
Copyright © 2016, Texas Instruments Incorporated
图 48. AC-Coupling Capacitors Charge to the Mid-Supply Voltage Through the Input Resistors
8.1.4 Input AC Coupling
The signal path in most audio systems is typically AC-coupled to avoid the propagation of DC voltages, which
can potentially damage loudspeakers or saturate power amplifiers. The capacitor values must be selected to
pass the desired bandwidth of audio signals. The high-pass corner frequency is calculated with 公式 5:
1
1
fC
=
=
CIN
2∂ p∂RIN ∂CIN
2∂ p∂(2∂RIN)∂
2
(5)
CIN
IN+
500
kꢀ
COM
VS
500
kꢀ
IN-
CIN
Copyright © 2016, Texas Instruments Incorporated
图 49. AC-Coupling Capacitors Form a High-Pass Filter With INA165x-Q1 Input Resistors
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Application Information (接下页)
Although the input resistors of the INA165x-Q1 are matched typically within 0.01%, large capacitors are usually
mismatched. The mismatch in the values of the AC-coupling capacitors causes the corner frequencies at the two
signal inputs (IN+ and IN–) to be different, which can degrade CMRR at low frequency. For this reason, TI
recommends placing the high-pass corner frequency well below the audio bandwidth and to use a resistor in
series with the COM pin (RCOM), as shown in 图 44 if possible. See the Common-Mode Input Impedance section
for more information on placing a resistor in series with the COM pin. 图 50 shows the effect of a 5% mismatch in
the values of the input AC-coupling capacitors with and without an RCOM resistor. Comparing CMRR at 100 Hz:
1-µF AC-coupling capacitors with a 5% mismatch degrade the CMRR to 75 dB, while 10-µF capacitors and a 1-
MΩ RCOM resistor shows 92 dB of CMRR.
95
90
85
80
75
70
65
1 ꢀF
1 ꢀF / 1 Mꢁ
60
55
50
10 ꢀF
10 ꢀF / 1 Mꢁ
10
100
1k
10k
Frequency (Hz)
C007
图 50. CMRR Degradation Due to a 5% Mismatch in AC-Coupling Capacitors
8.1.5 Supply Divider Capacitive Loading
The VMID(OUT) pin of the INA165x-Q1 is stable with capacitive loads up to 150 pF. An isolation resistor (RISO in
图 51), must be used if capacitive loads larger than 150 pF are connected to the VMID(OUT) pin. 图 51 shows
the recommended configuration of an isolation resistor in series with the capacitive load. The REF pins of the
INA165x-Q1 must connect directly to the VMID(OUT) pin before the isolation resistor. Any resistance placed
between the VMID(OUT) pin and the reference pins degrades the CMRR of the device. 图 52 shows the
recommended value for the isolation resistor for increasing capacitive loads.
VCC
500
kꢀ
œ
VMID(IN)
+
500
kꢀ
CF
REF A
RISO
VEE
VMID(OUT)
CLOAD
REF B
Copyright © 2016, Texas Instruments Incorporated
图 51. Place an Isolation Resistor Between the VMID(OUT) Pin and Large Capacitive Loads
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Application Information (接下页)
1000
60°Phase Margin
45°Phase Margin
100
10
1
0.01
0.1
1
10
CLOAD (nF)
100
1000
C041
图 52. Recommended Isolation Resistor Value vs Capacitive Load
24
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8.2 Typical Applications
The low noise and distortion of the INA165x-Q1 make the devices an excellent choice for a variety of
applications in professional and consumer audio products. However, these same performance metrics make the
INA165x-Q1 useful for industrial, test and measurement, and data-acquisition applications. The examples shown
here are possible applications where the INA165x-Q1 provides exceptional performance.
8.2.1 Line Receiver for Differential Audio Signals in a Split-Supply System
The INA165x-Q1 are designed to require a minimum number of external components to achieve data sheet-level
performance in audio line-receiver applications. 图 53 shows the INA165x-Q1 used as a differential audio line
receiver in split-supply systems that are common in many audio applications. The line receiver recovers a
differential audio signal that may have been affected by significant common-mode noise.
12 V
-12 V
C5 1 ꢀF
C7 1 ꢀF
Input Differential
Audio Signals
C6 0.1 ꢀF
C8 0.1 ꢀF
C1 10 ꢀF
R3 1 Mꢁ
R1
100 kꢁ
VCC
1
2
3
4
5
6
7
VEE 14
13
2
IN+ A
COM A
IN- A
OUT A
1
R2
3
100 kꢁ
REF A
12
11
10
9
XLR Connector
VMID(IN)
C2 10 ꢀF
C3 10 ꢀF
Output Single-Ended
Audio Signals
IN- B
VMID(OUT)
REF B
R4
100 kꢁ
COM B
IN+ B
3
R6 1 Mꢁ
8
OUT B
1
R5
100 kꢁ
2
INA1650-Q1
XLR Connector
C4 10 ꢀF
图 53. INA1650-Q1 Device Used as a Line Receiver for Differential Audio Signals in a Split-Supply
System
版权 © 2017–2019, Texas Instruments Incorporated
25
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
Typical Applications (接下页)
8.2.1.1 Design Requirements
•
•
•
•
Power supply voltage: ±12 V
Frequency response: < 0.1 dB deviation from 20 Hz to 20 kHz
Common-mode rejection ratio: > 80 dB at 1 kHz
THD+N: < –100 dB (4-dBu input signal, 1-kHz fundamental, 90-kHz measurement bandwidth)
8.2.1.2 Detailed Design Procedure
The passive components shown in 图 53 are selected using the information given in the Application Information
and Layout Guidelines sections. All 10-µF input ac-coupling capacitors (C1, C2, C3, and C4) maximize the
CMRR performance at low frequency, as shown in 图 50. The high-pass corner frequency for input signals meets
the design requirement for frequency response, as 公式 6 shows:
1
1
fC
=
=
= 0.032 Hz
2∂ p∂RIN ∂CIN 2∂ p∂(500 kW)∂(10 mF)
(6)
The 1-MΩ RCOM resistors (R3 and R4) further improve CMRR performance at low frequency. Resistors R1, R2,
R4, and R5 provide a discharge pathway for the ac-coupling capacitors in the event that audio equipment with a
dc offset voltage is connected to the inputs of the circuit. These resistors are optional and may degrade the
CMRR performance with mismatches in source impedance. Finally, capacitors C5, C6, C7, and C8 provide a
low-impedance pathway for power supply noise to pass to ground rather than interfering with the audio signal. No
connection is necessary on the VMID(IN) and VMID(OUT) pins because the supply-divider circuit is not used in
this particular application.
8.2.1.3 Application Curves
图 54 through 图 59 illustrate the measured performance of the line receiver circuit. 图 54 shows the measured
frequency response. The gain of the circuit is 0 dB as expected with 0.1-dB magnitude variation at 10 Hz. The
measured CMRR of the circuit (图 55) at 1 kHz equals 94 dB without any source impedance mismatch. Adding a
10-Ω source impedance mismatch degrades the CMRR at 1 kHz to 92 dB. The high-frequency degradation of
CMRR shown in 图 55 for the 10-Ω source impedance mismatch cases is due to the capacitance of the cables
used for the measurement. The total harmonic distortion plus noise (THD+N) is plotted over frequency in 图 56.
For a 4-dBu (1.23 VRMS) input signal level, the THD+N remains flat at –101.6 dB (0.0008%) over the measured
frequency range. Increasing the signal level to 20 dBu further decreases the THD+N to –113.2 dB (0.00022%) at
1 kHz, but the THD+N rises to greater than 7 kHz. Measuring the THD+N vs output amplitude (图 57) at 1 kHz
shows a constant downward slope until the noise floor of the audio analyzer is reached at 5 VRMS. The constant
downward slope indicates that noise from the device dominates THD+N at this frequency instead of distortion
harmonics. 图 58 and 图 59 confirm this conclusion. For a 4–dBu signal level, the second harmonic is barely
visible above the noise floor at –140 dBu. Increasing the signal level to 20 dBu produces distortion harmonics
above
the
noise
floor.
The
largest
harmonic
in
this
case
is
the
second
at
–111.2 dBu, or –131.2 dB relative to the fundamental.
26
版权 © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
Typical Applications (接下页)
1
0.8
0.6
0.4
0.2
0
œ40
œ50
œ60
œ70
œ80
œ90
œ100
No Mismatch
10-ꢀ Mismatch, XLR Pin 2
10-ꢀ Mismatch, XLR Pin 3
-0.2
-0.4
-0.6
-0.8
-1
10
100
1k
10k
100k
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
C001
C001
1-VRMS Common-Mode Signal
图 55. Common-Mode Rejection Ratio vs Frequency
图 54. Frequency Response
0.01
0.001
-80
0.1
-60
20 dBu (7.746 VRMS)
4 dBu (1.23 VRMS)
0.01
-80
-100
-120
-140
0.001
-100
-120
-140
0.0001
0.00001
0.0001
0.00001
0.01
0.1
1
10
10
100
1k
10k
Output Voltage (VRMS
)
Frequency (Hz)
C014
C001
22-kHz Measurement Bandwidth
90-kHz Measurement Bandwidth
图 57. THD+N vs Amplitude
图 56. THD+N vs Frequency
20
0
40
20
0
œ20
œ20
œ40
œ60
œ80
œ100
œ120
œ140
œ160
œ40
œ60
œ80
HD2: -111.2 dBu (-131.2 dBc)
HD3: -120.1 dBu (-140.1 dBc)
HD4: -130.7 dBu (-150.7 dBc)
œ100
œ120
œ140
œ160
0
5k
10k
15k
20k
0
5k
10k
15k
20k
Frequency (Hz)
Frequency (Hz)
C004
C004
4–dBu Output Amplitude
20–dBu Output Amplitude
图 58. Output Spectrum
图 59. Output Spectrum
版权 © 2017–2019, Texas Instruments Incorporated
27
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
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Typical Applications (接下页)
8.2.2 Two-Channel Microphone Input for Automotive Infotainment Systems
The high CMRR, low-noise, and ease-of-use in single supply applications make the INA165x-Q1 an excellent
choice for applications in automotive infotainment systems. 图 60 illustrates a high-CMRR input circuit for in-
cabin microphones used for hands-free phone systems. The microphones are connected with matched bias
resistors, RBIAS, to preserve the high-CMRR performance of the INA165x-Q1. The exact value of the microphone
bias voltage, VBIAS, and the RBIAS resistors depends on the particular microphones used. Bandwidth-limiting the
audio signal to the range of frequencies for speech is common in hands-free systems. As shown in 图 60, all
filtering components are placed at the output of the INA165x-Q1 rather than the input to preserve high CMRR.
The values shown in 图 60 limit the signal bandwidth to approximately 100 Hz to 10 kHz.
12 V
C7 1 ꢀF
VBIAS
C6 0.1 ꢀF
RBIAS
RBIAS
RBIAS
RBIAS
C1
10 ꢀF
C8
150 nF
R1
100 ꢁ
VCC
1
2
3
4
5
6
7
VEE 14
13
Microphone
IN+ A
COM A
IN- A
OUT A
REF A 12
C9
150 nF
C2
10 ꢀF
R2
10 kꢁ
C5 1 ꢀF
VMID(IN)
11
10
9
Speech-Filtered,
Single-Ended Audio
Signals
IN- B
VMID(OUT)
REF B
C3
10 ꢀF
C4
C10
150 nF
R3
100 ꢁ
COM B
IN+ B
8
OUT B
Microphone
10 ꢀF
C11
150 nF
INA1650-Q1
R4
10 kꢁ
VBIAS
图 60. Two-channel Microphone Input for Automotive Infotainment Systems
28
版权 © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
Typical Applications (接下页)
8.2.3 TRS Audio Interface in Single-Supply Applications
The INA165x-Q1 can be used for auxiliary audio inputs that may use a tip-ring-sleeve (TRS) connector where
both audio channels share a common ground connection. 图 61 shows the INA1650-Q1 configured as a line
receiver for a TRS interface to remove common-mode noise on the sleeve connection.
12 V
C7 1 ꢀF
C6 0.1 ꢀF
TRS Jack
VCC
1
2
3
4
5
6
7
VEE 14
13
C1
10 ꢀF
Ring
Tip
Right
Output
IN+ A
COM A
IN- A
OUT A
REF A 12
R1
100 kꢁ
C2
10 ꢀF
C5 1 ꢀF
VMID(IN)
11
10
9
Sleeve
IN- B
VMID(OUT)
REF B
C3
10 ꢀF
R2
100 kꢁ
COM B
IN+ B
Left
Output
8
OUT B
C4
10 ꢀF
INA1650-Q1
图 61. TRS Audio Interface in Single-Supply Applications
版权 © 2017–2019, Texas Instruments Incorporated
29
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
9 Power Supply Recommendations
The INA165x-Q1 operate from ±2.25-V to ±12-V supplies while maintaining excellent performance. However,
some applications do not require equal positive and negative output voltage swing. With the INA165x-Q1, power-
supply voltages do not need to be equal. For example, the positive supply can be set to 19 V with the negative
supply at –5 V.
10 Layout
10.1 Layout Guidelines
For best operational performance of the device, use good printed circuit board (PCB) layout practices, including:
•
Connect low-ESR, 1-µF and 0.1-µF ceramic bypass capacitors between each supply pin and ground, placed
as close as possible to the device. Connecting bypass capacitors only from V+ to ground is acceptable in
single-supply applications. Noise can propagate into analog circuitry through the power pins of this device.
The bypass capacitors reduce the coupled noise by providing low-impedance pathways to ground.
•
Connect the device REF pins to a low-impedance, low-noise, system reference point (such as an analog
ground or the VMID(OUT) pin) with the shortest trace possible.
•
•
Place the external components as close to the device as possible, as shown in 图 62 and 图 63.
Use ground pours and planes to shield input signal traces and minimize additional noise introduced into the
signal path.
•
Keep the length of input traces equal and as short as possible. Route the input traces as a differential pair
with as minimal spacing between them as possible.
30
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INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
10.2 Layout Example
+V
-V
C5
C6
C7
C8
C1
R3
IN+ A
VCC
1
2
VEE 14
13
R1
Input reference /
shield
IN+ A
OUT A
R2
3 COM A
REF A 12
IN- A
VMID(IN)
IN- A
IN- B
4
5
6
7
11
10
9
C2
C3
VMID(OUT)
REF B
IN+ B
COM B
IN+ B
R4
R4
C4
Input reference /
shield
8
OUT B
R5
INA1650-Q1
IN- B
Place bypass
capacitors as close to
IC as possible
+V
-V
GND
C5
C7
GND
GND
Connect COM pins to
input signal reference
C6
VCC
C8
IN+ A
C1
R3
C2
1
VEE 14
13
Input reference /
shield
2
3
4
5
6
7
IN+ A
COM A
IN- A
OUT A
REF A
12
11
10
9
IN- A
IN- B
VMID(IN)
VMID(OUT)
REF B
GND
IN- B
C3
COM B
IN+ B
Input reference /
shield
R4
C4
8
OUT B
INA1650-Q1
IN+ B
Input pairs routed
adjacent to each
other
Use ground pours for
shielding the input
signal pairs
GND
图 62. Layout Example for a Dual-Supply Line Receiver
版权 © 2017–2019, Texas Instruments Incorporated
31
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
Layout Example (接下页)
+V
C7
C6
C1
C2
VCC
1
2
3
4
5
6
7
VEE 14
13
IN+
R1
Input reference /
IN+ A
COM A
IN- A
OUT A
REF A 12
shield
R2
C5
VMID(IN)
IN-
11
10
9
IN-
IN- B
VMID(OUT)
REF B
C3
C4
R4
Input reference /
COM B
IN+ B
shield
8
OUT B
R5
INA1650-Q1
IN+
+V
GND
C7
C6
GND
Connect VEE to low-
impedance ground
Place VMID(IN) filter
capacitor as close to
IC as possible
IN+
C1
VCC
1
2
3
4
5
6
7
VEE 14
13
Input reference /
shield
IN+ A
COM A
IN- A
OUT A
REF A 12
C2
C3
IN-
IN-
GND
VMID(IN)
11
10
9
C5
IN- B
VMID(OUT)
COM B
IN+ B
REF B
OUT B
Input reference /
shield
Use a low-impedance
connection to
8
connect reference
pins to VMID(OUT)
INA1650-Q1
C4
IN+
GND
图 63. Layout Example for a Single-Supply Line Receiver
32
版权 © 2017–2019, Texas Instruments Incorporated
INA1650-Q1, INA1651-Q1
www.ti.com.cn
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
11 器件和文档支持
11.1 器件支持
11.1.1 开发支持
11.1.1.1 TINA-TI™(免费软件下载)
TINA™是一款简单、功能强大且易于使用的电路仿真程序,此程序基于 SPICE 引擎。TINA-TI 是 TINA 软件的一
款免费全功能版本,除了一系列无源和有源模型外,此版本软件还预先载入了一个宏模型库。TINA-TI 提供所有传
统的 SPICE 直流、瞬态和频域分析,以及其他设计功能。
TINA-TI 可从 WEBENCH® 设计中心免费下载,它提供全面的后续处理能力,使得用户能够以多种方式形成结果。
虚拟仪器提供选择输入波形和探测电路节点、电压和波形的功能,从而创建一个动态的快速入门工具。
注
这些文件需要安装 TINA 软件(由 DesignSoft™提供)或者 TINA-TI 软件。请从 TINA-TI 文
件夹 中下载免费的 TINA-TI 软件。
11.1.1.2 TI 高精度设计
欲获取 TI 高精度设计,请访问 http://www.ti.com.cn/ww/analog/precision-designs/。TI 高精度设计是由 TI 公司高
精度模拟 应用 专家创建的模拟解决方案,提供了许多实用电路的工作原理、组件选择、仿真、完整印刷电路板
(PCB) 电路原理图和布局布线、物料清单以及性能测量结果。
11.2 文档支持
11.2.1 相关文档
如需相关文档,请参阅:
•
•
德州仪器 (TI),《电路板布局技巧》
德州仪器 (TI),《片上薄膜电阻器可实现高性能音频电路》技术简介
11.3 接收文档更新通知
要接收文档更新通知,请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册,即可每周接收产
品信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.4 社区资源
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 商标
SoundPlus, E2E are trademarks of Texas Instruments.
TINA-TI is a trademark of Texas Instruments, Inc and DesignSoft, Inc.
Bluetooth is a registered trademark of Bluetooth SIG, Inc.
TINA, DesignSoft are trademarks of DesignSoft, Inc.
All other trademarks are the property of their respective owners.
版权 © 2017–2019, Texas Instruments Incorporated
33
INA1650-Q1, INA1651-Q1
ZHCSGP4C –AUGUST 2017–REVISED MAY 2019
www.ti.com.cn
11.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.7 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
34
版权 © 2017–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA1650QPWRQ1
INA1651QPWRQ1
ACTIVE
ACTIVE
TSSOP
TSSOP
PW
PW
14
14
2000 RoHS & Green
2000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
IN1650A
IN1651Q
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Feb-2022
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA1650QPWRQ1
INA1651QPWRQ1
TSSOP
TSSOP
PW
PW
14
14
2000
2000
330.0
330.0
12.4
12.4
6.9
6.9
5.6
5.6
1.6
1.6
8.0
8.0
12.0
12.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
26-Feb-2022
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA1650QPWRQ1
INA1651QPWRQ1
TSSOP
TSSOP
PW
PW
14
14
2000
2000
367.0
367.0
367.0
367.0
35.0
35.0
Pack Materials-Page 2
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