INA183A2IDBVT [TI]

INA183 2.7-V to 26-V, High-Precision Current Sense Amplifier;
INA183A2IDBVT
型号: INA183A2IDBVT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

INA183 2.7-V to 26-V, High-Precision Current Sense Amplifier

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INA183  
SBOSA08 – FEBRUARY 2021  
INA183 2.7-V to 26-V, High-Precision Current Sense Amplifier  
1 Features  
3 Description  
Wide Common-Mode Range: 2.7 V to 26 V  
The INA183 is a high-precision voltage-output,  
current-shunt monitor (also called current-sense  
amplifier) commonly used for overcurrent protection,  
Offset Voltage: ±170 μV (Maximum)  
(Enables Shunt Drops of 10-mV Full-Scale)  
Accuracy:  
precision-current  
measurement  
for  
system  
optimization, or in closed-loop feedback circuits. This  
device can sense drops across shunt resistors at  
common-mode voltages from 2.7 V to 26 V. Three  
fixed gains are available: 50 V/V, 100 V/V, and 200  
V/V. The low offset of the zero-drift architecture  
enables current sensing with maximum drops across  
the shunt as low as 10-mV full-scale.  
– Gain Error ±0.4% (Maximum Over  
Temperature):  
– 0.5-μV/°C Offset Drift (Maximum)  
– 10-ppm/°C Gain Drift (Maximum)  
Choice of Gains:  
– INA183A1: 50 V/V  
– INA183A2: 100 V/V  
– INA183A3: 200 V/V  
Quiescent Current: 130 μA (Maximum)  
Package: 5-Pin SOT-23  
This device operates by drawing power from the IN+  
pin drawing a maximum of 130 µA of supply current.  
All versions are specified from –40 °C to 125 °C and  
are offered in the 5-pin SOT-23 package.  
Device Information (1)  
2 Applications  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
Servers  
INA183  
SOT-23 (5)  
2.90 mm × 1.60 mm  
Power Supplies  
Battery Management  
Telecom Equipment  
(1) For all available packages, see the orderable addendum at  
the end of the data sheet.  
RSENSE  
0.1 F  
CBYP  
IN+  
IN-  
VS = 2.7 V to 26 V  
LOAD  
INA183  
OUT  
GND  
Typical Application  
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
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Table of Contents  
1 Features............................................................................1  
2 Applications.....................................................................1  
3 Description.......................................................................1  
4 Revision History.............................................................. 2  
5 Device Comparison.........................................................3  
6 Pin Configuration and Functions...................................3  
7 Specifications.................................................................. 4  
7.1 Absolute Maximum Ratings ....................................... 4  
7.2 ESD Ratings .............................................................. 4  
7.3 Recommended Operating Conditions ........................4  
7.4 Thermal Information ...................................................4  
7.5 Electrical Characteristics ............................................5  
7.6 Typical Characteristics................................................6  
8 Detailed Description......................................................10  
8.1 Overview...................................................................10  
8.2 Functional Block Diagram.........................................10  
8.3 Feature Description...................................................10  
8.4 Device Functional Modes..........................................11  
9 Application and Implementation..................................12  
9.1 Application Information............................................. 12  
9.2 Typical Application.................................................... 13  
10 Power Supply Recommendations..............................15  
11 Layout...........................................................................15  
11.1 Layout Guidelines................................................... 15  
11.2 Layout Example...................................................... 15  
12 Device and Documentation Support..........................16  
12.1 Documentation Support.......................................... 16  
12.2 Receiving Notification of Documentation Updates..16  
12.3 Support Resources................................................. 16  
12.4 Trademarks.............................................................16  
12.5 Electrostatic Discharge Caution..............................16  
12.6 Glossary..................................................................16  
13 Mechanical, Packaging, and Orderable  
Information.................................................................... 16  
4 Revision History  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
DATE  
VERSION  
NOTES  
February 2021  
*
Initial Release.  
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5 Device Comparison  
Table 5-1. Device Comparison  
PRODUCT  
GAIN  
50  
INA183A1  
INA183A2  
INA183A3  
100  
200  
6 Pin Configuration and Functions  
GND  
GND  
OUT  
IN+  
IN-  
Figure 6-1. DBV Package 5-Pin SOT-23 Top View  
Table 6-1. Pin Functions  
PIN  
I/O  
DESCRIPTION  
NAME  
GND  
IN–  
SOT-23  
1, 2  
4
Analog  
Device ground. Both pins must be connected to ground.  
Analog input Connect to load side of shunt resistor.  
Analog input Connect to supply side of shunt resistor.  
Analog output Output voltage.  
IN+  
5
OUT  
3
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7 Specifications  
7.1 Absolute Maximum Ratings  
over operating free-air temperature range (unless otherwise noted)  
MIN  
GND – 0.3  
GND – 0.3  
GND – 0.3  
–55  
MAX  
26  
UNIT  
V
Differential (VIN+) – (VIN–  
)
Analog inputs, , IN+, IN– (1)  
Common-mode (2)  
26  
V
Output (2)  
(IN+) + 0.3  
150  
V
Operating temperature  
Junction temperature  
Storage temperature, Tstg  
°C  
°C  
°C  
150  
–65  
150  
(1) VIN+ and VIN– are the voltages at the IN+ and IN– terminals, respectively.  
(2) Input voltage at any terminal may exceed the voltage shown if the current at that terminal is limited to 5 mA.  
7.2 ESD Ratings  
MIN  
MAX UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)  
Electrostatic  
±3500  
±1000  
V(ESD)  
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)  
discharge  
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
7.3 Recommended Operating Conditions  
over operating free-air temperature range (unless otherwise noted)  
MIN  
2.7  
NOM  
MAX  
26  
UNIT  
V
VS  
TA  
Supply voltage range, voltage at IN+ pin  
Operating free-air temperature  
12  
–40  
125  
°C  
7.4 Thermal Information  
INA183  
THERMAL METRIC (1)  
DBV (SOT-23)  
5 PINS  
164.2  
60.1  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
36.6  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
10.3  
ψJB  
36.3  
RθJC(bot)  
N/A  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report.  
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7.5 Electrical Characteristics  
at TA = 25 °C, VSENSE = VIN+ – VIN–, and VIN+ = 12 V, unless otherwise noted.  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX UNIT  
INPUT  
VCM  
Common-mode input range  
Common-mode rejection ratio  
Offset voltage, RTI (1)  
TA = –40 °C to +125 °C  
2.7  
26  
V
VIN+ = 2.7 V to 26 V, VSENSE = 10 mV,  
TA = –40 °C to +125 °C  
CMRR  
VOS  
100  
120  
dB  
μV  
VCM = 12 V  
±25  
0.1  
30  
±170  
dVOS/dT RTI vs temperature  
TA = –40 °C to +125 °C  
VSENSE = 0 mV  
0.5 μV/°C  
IIB  
Input bias current (IB-)  
40  
μA  
OUTPUT  
A1 devices  
50  
100  
200  
V/V  
V/V  
V/V  
G
Gain  
A2 devices  
A3 devices  
VOUT = 0.5 V to VIN+ – 0.5 V,  
TA = –40 °C to +125 °C  
EG  
Gain error  
±0.1%  
±0.4%  
Gain error vs temperature  
Nonlinearity error  
TA = –40 °C to +125 °C  
VOUT = 0.5 V to VIN+ – 0.5 V  
No sustained oscillation  
3
±0.01%  
1
10 ppm/°C  
nF  
Maximum capacitive load  
VOLTAGE OUTPUT  
(VIN+) –  
0.05  
VSP  
VSN  
Swing to IN+  
RL = 10 kΩ to GND, TA = –40 °C to +125 °C  
(VIN+) – 0.2  
V
V
RL = 10 kΩ to GND, VIN+ - VIN- = -10 mV,  
TA = –40 °C to +125 °C  
(VGND) +  
0.005  
(VGND) +  
0.05  
Swing to GND  
FREQUENCY RESPONSE  
A1 devices  
A2 devices  
A3 devices  
CLOAD = 10 pF  
CLOAD = 10 pF  
CLOAD = 10 pF  
80  
30  
kHz  
kHz  
kHz  
V/μs  
BW  
Bandwidth  
14  
SR  
Slew rate  
0.4  
NOISE, RTI (1)  
Voltage noise density  
POWER SUPPLY  
IQ Quiescent current, (IN+)  
IQ over temperature  
25  
83  
nV/√Hz  
VSENSE = 0 mV  
130  
140  
μA  
μA  
TA = –40 °C to +125 °C  
(1) RTI = referred-to-input.  
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7.6 Typical Characteristics  
TA = 25 °C, VS = VIN+ = 12 V (unless otherwise noted)  
Figure 7-2. Offset Voltage vs. Temperature  
Figure 7-1. Input Offset Voltage Production  
Distribution  
Figure 7-4. Common-Mode Rejection Production  
Distribution (A2 Devices)  
Figure 7-3. Common-Mode Rejection Production  
Distribution (A1 Devices)  
1.0  
0.8  
0.6  
0.4  
0.2  
0
-0.2  
-0.4  
-0.6  
-0.8  
-1.0  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature (°C)  
Figure 7-5. Common-Mode Rejection Production  
Distribution (A3 Devices)  
Figure 7-6. Common-Mode Rejection Ratio vs.  
Temperature  
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Figure 7-7. Gain Error Production Distribution (A1 Figure 7-8. Gain Error Production Distribution (A2  
Devices)  
Devices)  
1.0  
0.8  
0.6  
0.4  
0.2  
0
–0.2  
–0.4  
–0.6  
–0.8  
–1.0  
–50  
–25  
0
25  
50  
75  
100  
125  
150  
Temperature (°C)  
Figure 7-9. Gain Error Production Distribution (A3  
Devices)  
Figure 7-10. Gain Error vs. Temperature  
70  
160  
140  
120  
100  
80  
60  
G = 200  
50  
40  
30  
G = 50  
G = 100  
20  
10  
60  
40  
0
20  
-10  
0
10  
100  
1k  
10k  
Frequency (Hz)  
100k  
1M  
10M  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Figure 7-11. Gain vs. Frequency  
Figure 7-12. Common-Mode Rejection Ratio vs.  
Frequency  
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V+  
(V+) - 0.5  
(V+) - 1.0  
(V+) - 1.5  
VS = 5V to 26V  
(V+) - 2.0  
(V+) - 2.5  
(V+) - 3.0  
VS = 2.7V  
to 26V  
VS = 2.7V  
GND + 3.0  
GND + 2.5  
GND + 2.0  
GND + 1.5  
GND + 1.0  
GND + 0.5  
GND  
TA = -40°C  
TA = +25°C  
VS = 2.7V to 26V  
TA = +105°C  
0
5
10  
15  
20  
25  
30  
35  
40  
Output Current (mA)  
Figure 7-13. Output Voltage Swing vs. Output  
Current  
Figure 7-14. Input Bias Current vs. Common-Mode  
Voltage  
30  
29  
28  
27  
26  
25  
-50  
-25  
0
25  
50  
75  
100  
125  
Temperature (°C)  
Figure 7-15. Input Bias Current vs. Temperature  
Figure 7-16. Quiescent Current vs. Temperature  
100  
G = 50  
G = 200  
G = 100  
10  
1
10  
100  
1k  
Frequency (Hz)  
10k  
100k  
Time (1s/div)  
Figure 7-18. 0.1-Hz to 10-Hz Voltage Noise  
(Referred-to-Input)  
Figure 7-17. Input-Referred Voltage Noise vs.  
Frequency  
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18  
14  
10  
6
30  
VCM  
VOUT  
24  
2VPP Output Signal  
18  
12  
6
10mVPP Input Signal  
2
-2  
-6  
0
-6  
Time (100ms/div)  
Time (200µs/div)  
Figure 7-20. Common-Mode Voltage Transient  
Response  
Figure 7-19. Step Response (10-mVPP Input Step)  
VDIFF = 0 V  
VCM = 12-V Pulse  
Figure 7-22. Start-Up Response  
Figure 7-21. Inverting Differential Input Overload  
Figure 7-23. Brownout Recovery  
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8 Detailed Description  
8.1 Overview  
The INA183 is a 26-V common-mode, zero-drift topology, current-sensing amplifier meant for high-side, current-  
sensing applications. The device is a specially-designed, current-sensing amplifier that can accurately measure  
voltages developed across a current-sensing resistor. The device is capable of measuring current on input  
voltage rails as high as 26 V and as low as 2.7 V.  
The zero-drift topology enables high-precision measurements with maximum input offset voltages as low as  
170 µV with a maximum temperature contribution of 0.5 µV/°C over the full temperature range of –40 °C to +125  
°C.  
8.2 Functional Block Diagram  
The simplified functional diagram below shows the device power is provided by the voltage on the IN+ pin. This  
diagram also shows the nominal values for the internal gain set resistors. The nominal value of these resistors  
can vary by 20% or more; however, the matching between these resistors is tightly controlled. The matching of  
these internal resistors results in a precise fixed gain that varies very little over temperature.  
R2  
R1  
_
IN-  
OUT  
R1  
IN+  
+
R2  
DEVICE  
INA183A1  
INA183A2  
INA183A3  
GAIN  
50  
R1  
R2  
20 kΩ  
10 kΩ  
5 kΩ  
1 MΩ  
1 MΩ  
1 MΩ  
GND  
100  
200  
8.3 Feature Description  
8.3.1 Single-Supply Operation from IN+  
The INA183 does not have a dedicated power-supply. Instead, an internal connection to the IN+ pin serves as  
the power supply for this device. This allows the device to be used in applications where lower voltage or sub-  
regulated supply rails are not present. The operational voltage range on this pin is 2.7 V to 26 V and is designed  
for power-supply applications. The maximum current drawn from the IN+ pin is 130 μA, when the current sense  
voltage is zero.  
8.3.2 Low Gain Error and Offset Voltage  
The maximum gain error of the INA183 is 0.4% and is specified over the full operational temperature range. The  
low gain error allows for accurate measurements as the sense voltage increases, and is designed for  
applications that need to detect overcurrent conditions accurately. The offset voltage of the INA183 is specified  
to be ±170 μV for all gain options. The low offset voltage allows for increased accuracy when the sense voltage  
is small or allows for reduction in the size of the current sense resistor with less impact on the total measurement  
accuracy. Smaller value resistors reduce the power loss in the application which allows the use of lower wattage  
resistors that are generally lower cost.  
8.3.3 Low Drift Architecture  
The INA183 features low drift for both the gain error and offset voltage specifications. The low gain error drift of  
10 PPM/ºC results from the well matched internal resistor network that sets the device gain. The low offset drift  
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is due to the internal chopping architecture of the amplifier. Input chopping reduces both the offset and offset drift  
since any change in offset is canceled with each chopping cycle. The maximum input offset drift of the INA183 is  
0.5 μV/ºC. The low drift of the gain error and offset voltage provides accurate current measurement over the  
operational temperature range of -40ºC to 125ºC that exceeds the performance of most discrete current sensing  
implementations.  
8.4 Device Functional Modes  
8.4.1 Normal Operation  
The INA183 is in normal operation when the following conditions are met:  
The voltage at the IN+ pin is between 2.7 V and 26 V.  
The maximum differential input signal times the gain is less than VIN+ minus the output voltage swing to VIN+  
The minimum differential input signal times the gain is greater than the swing to GND.  
.
During normal operation, this device produces an output voltage that is the amplified representation of the  
difference voltage from IN+ to IN–.  
8.4.2 Unidirectional, High-Side Operation  
The INA183 measures the differential voltage developed by current flowing through a resistor that is commonly  
referred to as a current shunt resistor or current-sensing resistor. The INA183 operates in high-side,  
unidirectional mode only, meaning it only senses current sourced from a power supply to a system load as  
shown in Figure 8-1.  
12-V  
Supply  
R2  
ISENSE  
R1  
IN+  
+
Internal  
Amplifier  
OUT  
RSENSE  
R1  
œ
INœ  
R2  
Load  
GND  
Figure 8-1. High-Side Unidirectional Application  
8.4.3 Input Differential Overload  
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INA183  
drives the output as close as possible to the IN+ pin or ground, and does not provide accurate measurement of  
the differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value  
of the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If  
a differential overload occurs in a fault event, then the output of the INA183 returns to the expected value  
approximately 30 µs after removal of the fault condition. When the input differential voltage is overloaded the  
bias currents will increase by a significant amount. The increase in bias currents will occur even with the device  
is powered down. Input differential overloads less than the absolute maximum voltage rating do not damage the  
device or result in an output inversion.  
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9 Application and Implementation  
Note  
Information in the following applications sections is not part of the TI component specification, and TI  
does not warrant its accuracy or completeness. TI’s customers are responsible for determining  
suitability of components for their purposes, as well as validating and testing their design  
implementation to confirm system functionality.  
9.1 Application Information  
The INA183 measures the voltage developed across a current-sensing resistor when current passes through it.  
The ability to drive the reference pin to adjust the functionality of the output signal offers multiple configurations,  
as discussed throughout this section.  
9.1.1 RSENSE and Device Gain Selection  
Choosing the largest possible shunt resistor will maximize the accuracy of any current-sense amplifier. A large  
sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error  
contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor  
can be in a given application because of the resistor size and maximum allowable power dissipation. Equation 1  
gives the maximum value for the current-sense resistor for a given power dissipation budget:  
PDMAX  
RSENSE  
<
2
IMAX  
(1)  
where:  
PDMAX is the maximum allowable power dissipation in RSENSE  
IMAX is the maximum current expected to flow through RSENSE  
.
.
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply  
voltage at the IN+ pin, and device swing-to-rail limitations. To ensure that the current-sense signal is properly  
passed to the output, both positive and negative output swing limitations must be examined. Equation 2 provides  
the maximum values of RSENSE and GAIN to keep the device from exceeding the positive swing limitation.  
IMAX ª RSENSE ª GAIN < VSP  
(2)  
where:  
IMAX is the maximum current that will flow through RSENSE  
GAIN is the gain of the current-sense amplifier.  
VSP is the positive output swing as specified in the data sheet.  
.
Positive output swing limitations should be considered when selecting the value of RSENSE. There is always a  
trade-off between the value of the sense resistor and the gain of the device under consideration. If the sense  
resistor selected for the maximum power dissipation is too large, then it is possible to select a lower-gain device  
to avoid positive swing limitations.  
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The negative swing specification limits how small the sense resistor value can be for a given application.  
Equation 3 provides the limit on the minimum value of the sense resistor.  
IMIN ª RSENSE ª GAIN > VSN  
(3)  
where:  
IMIN is the minimum current that will flow through RSENSE  
GAIN is the gain of the current-sense amplifier.  
VSN is the negative output swing of the device.  
.
9.2 Typical Application  
Figure 9-1 shows the basic connections for the INA183. The input pins, IN+ and IN–, must be connected as  
close as possible to the shunt resistor to minimize any resistance in series with the shunt resistor.  
RSENSE  
0.1 F  
CBYP  
IN+  
IN-  
12V Server  
Power  
Supply  
Server 12-V  
Subsystem  
INA183  
OUT  
GND  
Figure 9-1. Typical Server Application  
A power-supply bypass capacitor is required on the IN+ pin. Applications with noisy or high-impedance power  
supplies may require additional decoupling capacitors to reject power-supply noise. Connect bypass capacitors  
close to the device pins.  
In server applications, the INA183 typically monitors the current on the 12-V bus that is distributed to various  
server sub-systems like memory, storage, or CPU power. The monitored current can be used by the server for  
fault detection or sub-system power optimization.  
9.2.1 Design Requirements  
Table 9-1 lists the design setup for this application.  
Table 9-1. Design Parameters  
DESIGN PARAMETERS  
EXAMPLE VALUE  
High-side supply voltage (VIN+  
)
12 V  
5 A  
Maximum sense current (IMAX  
Gain option  
)
50 V/V  
9.2.2 Detailed Design Procedure  
The maximum value of the current-sense resistor is calculated based on choice of gain, the value of the  
maximum current the be sensed (IMAX), and the power-supply voltage (VIN+). When operating at the maximum  
current, the output voltage must not exceed the positive output swing specification, VSP. Under the given design  
parameters, Equation 4 calculates the maximum value for RSENSE as 47.2 mΩ.  
VSP  
RSENSE  
<
IMAX ìGAIN  
(4)  
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For this design example, a value of 40.2 mΩ is selected because, while the 40.2 mΩ is less than the maximum  
value calculated, 40.2 mΩ is still large enough to give an adequate signal at the current-sense amplifier output.  
To reduce resistor power losses or to operate over a reduced output range, smaller value resistors can be used  
as the expense of dynamic range and low current accuracy.  
9.2.3 Application Curve  
Figure 9-2 shows the output response of the device to a sinusoidal current.  
VSENSE (20 mV/div)  
INA183A2 VOUT (1 V/div)  
Time (25µs/div)  
Figure 9-2. INA183 Output Response  
Copyright © 2021 Texas Instruments Incorporated  
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Product Folder Links: INA183  
 
INA183  
SBOSA08 – FEBRUARY 2021  
www.ti.com  
10 Power Supply Recommendations  
The device is powered from the IN+ pin with a voltage from 2.7 V to 26 V. The voltage at the output will also be  
limited by this voltage during overload or fault conditions. Also, the INA183 can withstand the full input signal  
range up to 26 V on the IN– pin, regardless of whether the device has power applied or not.  
11 Layout  
11.1 Layout Guidelines  
Connect the input pins to the sensing resistor using a kelvin or 4-wire connection. This connection technique  
ensures that only the current-sensing resistor impedance is detected between the input pins. Poor routing of  
the current-sensing resistor commonly results in additional resistance present between the input pins. Given  
the very low ohmic value of the current resistor, any additional high-current carrying impedance can cause  
significant measurement errors.  
Place the power-supply bypass capacitor as close as possible to the IN+ pin and ground pins. TI  
recommends using a bypass capacitor with a value of 0.1 μF. Additional decoupling capacitance can be  
added to compensate for noisy or high-impedance power supplies.  
11.2 Layout Example  
Direction of  
Current Flow  
RSHUNT  
Bus Voltage:  
2.7 V to 26 V  
LOAD  
CBYPASS  
VIA to Ground  
Plane  
IN+  
IN-  
GND  
GND  
OUT  
Current Sense  
Output  
Figure 11-1. Recommended Layout  
Copyright © 2021 Texas Instruments Incorporated  
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INA183  
SBOSA08 – FEBRUARY 2021  
www.ti.com  
12 Device and Documentation Support  
12.1 Documentation Support  
12.1.1 Related Documentation  
For related documentation see the following:  
INA183A1-A3EVM User's Guide  
TIDA-00302 Transient Robustness for Current Shunt Monitor  
12.2 Receiving Notification of Documentation Updates  
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on  
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For  
change details, review the revision history included in any revised document.  
12.3 Support Resources  
TI E2Esupport forums are an engineer's go-to source for fast, verified answers and design help — straight  
from the experts. Search existing answers or ask your own question to get the quick design help you need.  
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do  
not necessarily reflect TI's views; see TI's Terms of Use.  
12.4 Trademarks  
TI E2Eis a trademark of Texas Instruments.  
All trademarks are the property of their respective owners.  
12.5 Electrostatic Discharge Caution  
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled  
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.  
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may  
be more susceptible to damage because very small parametric changes could cause the device not to meet its published  
specifications.  
12.6 Glossary  
TI Glossary  
This glossary lists and explains terms, acronyms, and definitions.  
13 Mechanical, Packaging, and Orderable Information  
The following pages include mechanical, packaging, and orderable information. This information is the most  
current data available for the designated devices. This data is subject to change without notice and revision of  
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.  
Copyright © 2021 Texas Instruments Incorporated  
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PACKAGE OPTION ADDENDUM  
www.ti.com  
7-Feb-2021  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
INA183A1IDBVR  
INA183A1IDBVT  
INA183A2IDBVR  
INA183A2IDBVT  
INA183A3IDBVR  
INA183A3IDBVT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
5
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
3000 RoHS & Green  
250 RoHS & Green  
SN  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
-40 to 125  
2BRQ  
2BRQ  
2BSQ  
2BSQ  
2BTQ  
2BTQ  
SN  
SN  
SN  
SN  
SN  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
7-Feb-2021  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Feb-2021  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
INA183A1IDBVR  
INA183A1IDBVT  
INA183A2IDBVR  
INA183A2IDBVT  
INA183A3IDBVR  
INA183A3IDBVT  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
5
3000  
250  
178.0  
178.0  
178.0  
178.0  
178.0  
178.0  
9.0  
9.0  
9.0  
9.0  
9.0  
9.0  
3.3  
3.3  
3.3  
3.3  
3.3  
3.3  
3.2  
3.2  
3.2  
3.2  
3.2  
3.2  
1.4  
1.4  
1.4  
1.4  
1.4  
1.4  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
3000  
250  
3000  
250  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
7-Feb-2021  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
INA183A1IDBVR  
INA183A1IDBVT  
INA183A2IDBVR  
INA183A2IDBVT  
INA183A3IDBVR  
INA183A3IDBVT  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
5
5
5
5
5
5
3000  
250  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
190.0  
30.0  
30.0  
30.0  
30.0  
30.0  
30.0  
3000  
250  
3000  
250  
Pack Materials-Page 2  
PACKAGE OUTLINE  
DBV0005A  
SOT-23 - 1.45 mm max height  
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR  
C
3.0  
2.6  
0.1 C  
1.75  
1.45  
1.45  
0.90  
B
A
PIN 1  
INDEX AREA  
1
2
5
2X 0.95  
1.9  
3.05  
2.75  
1.9  
4
3
0.5  
5X  
0.3  
0.15  
0.00  
(1.1)  
TYP  
0.2  
C A B  
0.25  
GAGE PLANE  
0.22  
0.08  
TYP  
8
0
TYP  
0.6  
0.3  
TYP  
SEATING PLANE  
4214839/E 09/2019  
NOTES:  
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing  
per ASME Y14.5M.  
2. This drawing is subject to change without notice.  
3. Refernce JEDEC MO-178.  
4. Body dimensions do not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not  
exceed 0.15 mm per side.  
www.ti.com  
EXAMPLE BOARD LAYOUT  
DBV0005A  
SOT-23 - 1.45 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
5X (1.1)  
1
5
5X (0.6)  
SYMM  
(1.9)  
2
3
2X (0.95)  
4
(R0.05) TYP  
(2.6)  
LAND PATTERN EXAMPLE  
EXPOSED METAL SHOWN  
SCALE:15X  
SOLDER MASK  
OPENING  
SOLDER MASK  
OPENING  
METAL UNDER  
SOLDER MASK  
METAL  
EXPOSED METAL  
EXPOSED METAL  
0.07 MIN  
ARROUND  
0.07 MAX  
ARROUND  
NON SOLDER MASK  
DEFINED  
SOLDER MASK  
DEFINED  
(PREFERRED)  
SOLDER MASK DETAILS  
4214839/E 09/2019  
NOTES: (continued)  
5. Publication IPC-7351 may have alternate designs.  
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.  
www.ti.com  
EXAMPLE STENCIL DESIGN  
DBV0005A  
SOT-23 - 1.45 mm max height  
SMALL OUTLINE TRANSISTOR  
PKG  
5X (1.1)  
1
5
5X (0.6)  
SYMM  
(1.9)  
2
3
2X(0.95)  
4
(R0.05) TYP  
(2.6)  
SOLDER PASTE EXAMPLE  
BASED ON 0.125 mm THICK STENCIL  
SCALE:15X  
4214839/E 09/2019  
NOTES: (continued)  
7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate  
design recommendations.  
8. Board assembly site may have different recommendations for stencil design.  
www.ti.com  
IMPORTANT NOTICE AND DISCLAIMER  
TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE  
DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”  
AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY  
IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD  
PARTY INTELLECTUAL PROPERTY RIGHTS.  
These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate  
TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable  
standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you  
permission to use these resources only for development of an application that uses the TI products described in the resource. Other  
reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party  
intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages,  
costs, losses, and liabilities arising out of your use of these resources.  
TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either  
on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s  
applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2021, Texas Instruments Incorporated  

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