INA185A2IDRLT [TI]
采用超小型 (SOT-563) 封装的 26V、350kHz、双向高精度电流感应放大器 | DRL | 6 | -40 to 125;
| 型号： | INA185A2IDRLT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用超小型 (SOT-563) 封装的 26V、350kHz、双向高精度电流感应放大器 | DRL | 6 | -40 to 125 放大器 |
| 文件： | 总31页 (文件大小：1689K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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INA185
ZHCSJH3 –MARCH 2019
SOT-563 中的 INA185 超小型、双向、精密低侧和高侧电压输出
电流检测放大器
1 特性
3 说明
1
•
SOT-563 封装 (1.6mm × 1.6mm)
INA185 电流检测放大器专为成本敏感、空间受限的 应
用而设计。此器件是一个双向电流检测放大器（也称为
电流分流监控器），可在独立于电源电压的 –0.2V 至
+26V 范围内的共模电压中感测电流检测电阻器上的压
降。INA185 以四个固定增益器件选项集成匹配电阻器
增益网络：20V/V、50V/V、100V/V 或 200和V/V。该
匹配增益电阻器网络可最大限度地减小增益误差并降低
温度漂移。
–
–
尺寸比 SC70 小 39%
0.55mm 封装高度
•
•
•
共模范围 (VCM)：–0.2V 至 +26V
高带宽：350kHz（A1 器件）
失调电压：
–
–
±55µV（最大值），VCM = 0V
±100µV（最大值），VCM = 12V（A4 器件）
•
•
•
输出压摆率：2V/µs
双向电流检测功能
精度：
INA185 由 2.7V 至 5.5V 单电源供电。它消耗的最大电
源电流为 260µA， 拥有 高压摆率和带宽，因此是许多
电源和电机控制 解决方案的理想选择。
–
–
最大增益误差：±0.2%（A1、A2、A3）
最大温漂：0.5-µV/°C
INA185 采用 6 引脚 SOT-563 封装，包括器件引脚在
内的外形面积仅为 2.56 mm2。所有器件选项都具有
–40°C 至 +125°C 的扩展额定工作温度范围。
•
增益选项：
–
–
–
–
20V/V（A1 器件）
器件信息(1)
50V/V（A2 器件）
100V/V（A3 器件）
200V/V（A4 器件）
器件型号
INA185
封装
封装尺寸（标称值）
1.60mm × 1.60mm
（包括引脚）
SOT-563 (6)
•
瞬态电流：260µA（最大值）
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
2 应用
•
•
•
•
•
•
电机控制
电池监控
电源管理
照明控制
过流检测
光伏逆变器
典型应用电路
Bus Voltage, VCM
Up To 26 V
Power Supply, VS
2.7 V to 5.5 V
RSENSE
Load
INA185
VS
Microcontroller
INœ
œ
OUT
ADC
+
IN+
REF
GND
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS378
INA185
ZHCSJH3 –MARCH 2019
www.ti.com.cn
目录
1
2
3
4
5
6
特性.......................................................................... 1
8
9
Application and Implementation ........................ 17
8.1 Application Information............................................ 17
8.2 Typical Application .................................................. 21
Power Supply Recommendations...................... 23
9.1 Common-Mode Transients Greater Than 26 V ...... 23
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ..................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 6
Detailed Description ............................................ 12
7.1 Overview ................................................................. 12
7.2 Functional Block Diagrams ..................................... 12
7.3 Feature Description................................................. 12
7.4 Device Functional Modes........................................ 14
10 Layout................................................................... 24
10.1 Layout Guidelines ................................................. 24
10.2 Layout Example .................................................... 24
11 器件和文档支持 ..................................................... 25
11.1 器件支持................................................................ 25
11.2 文档支持................................................................ 25
11.3 接收文档更新通知 ................................................. 25
11.4 社区资源................................................................ 25
11.5 商标....................................................................... 25
11.6 静电放电警告......................................................... 25
11.7 术语表 ................................................................... 25
12 机械、封装和可订购信息....................................... 25
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
日期
修订版本
说明
2019 年 3 月
*
初始发行版。
2
Copyright © 2019, Texas Instruments Incorporated
INA185
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ZHCSJH3 –MARCH 2019
5 Pin Configuration and Functions
INA185: DRL Package
6-Pin SOT-563
Top View
OUT
GND
IN+
1
2
3
6
5
4
VS
REF
INœ
Not to scale
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
NO.
GND
2
Analog
Ground
Current-sense amplifier negative input. For high-side applications, connect to load
side of sense resistor. For low-side applications, connect to ground side of sense
resistor.
IN–
IN+
4
3
Analog input
Current-sense amplifier positive input. For high-side applications, connect to bus-
voltage side of sense resistor. For low-side applications, connect to load side of
sense resistor.
Analog input
OUT
REF
VS
1
5
6
Analog output
Analog input
Analog
Output voltage
Reference input
Power supply, 2.7 V to 5.5 V
Copyright © 2019, Texas Instruments Incorporated
3
INA185
ZHCSJH3 –MARCH 2019
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
6
UNIT
VS
Supply voltage
V
Differential (VIN+) – (VIN–
Common-mode(3)
)
–26
GND – 0.3
GND – 0.3
GND – 0.3
–55
26
Analog inputs, IN+, IN–(2)
V
26
VREF
VOUT
TA
Reference voltage
Output voltage(3)
VS + 0.3
VS + 0.3
150
V
V
Operating temperature
Junction temperature
Storage temperature
°C
°C
°C
TJ
150
Tstg
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
(3) Input voltage at any pin can exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
±3000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
-0.2
2.7
NOM
12
MAX
26
UNIT
VCM
VS
Common-mode input voltage
Operating supply voltage
V
V
5
5.5
TA
Operating free-air temperature
–40
125
°C
6.4 Thermal Information
INA185
THERMAL METRIC(1)
DRL (SOT-563)
6 PINS
230.9
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
94.1
Junction-to-board thermal resistance
112.8
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.8
ψJB
112.1
RθJC(bot)
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2019, Texas Instruments Incorporated
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ZHCSJH3 –MARCH 2019
6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
A1 device
86
96
100
100
120
±25
VIN+ = 0 V to 26 V, VSENSE = 0 mV,
TA = –40°C to +125°C
Common-mode rejection
ratio, RTI
CMRR
A2, A3 devices
A4 devices
A1 devices
dB
(1)
106
±135
±55
VSENSE = 0 mV, VIN+ = 0 V
A2, A3, A4
devices
±5
VOS
Offset voltage, RTI
Offset drift, RTI
μV
A1 devices
A2, A3 devices
A4 device
±100
±25
±25
0.2
±450
±130
±100
0.5
VSENSE = 0 mV, VIN+ = 12 V
dVOS/dT
PSRR
VSENSE = 0 mV, TA = –40°C to +125°C
μV/°C
μV/V
Power supply rejection ratio,
RTI
VS = 2.7 V to 5.5 V, VIN+ = 12 V, VSENSE = 0 mV
±8
±30
VSENSE = 0 mV, VCM = 0 V
VSENSE = 0 mV
-6
75
IIB
Input bias current
Input offset current
μA
μA
IIO
VSENSE = 0 mV
±0.05
OUTPUT
A1 devices
A2 devices
A3 devices
A4 devices
A1, A2, A3
20
50
G
Gain
V/V
100
200
±0.05%
±0.2%
VOUT = 0.5 V to VS – 0.5 V,
devices
EG
Gain error
TA = –40°C to +125°C
A4 device
±0.07%
1.5
±0.25%
8
Gain error drift
TA = –40°C to +125°C
VOUT = 0.5 V to VS – 0.5 V
No sustained oscillation
ppm/°C
nF
Nonlinearity error
±0.01%
1
Maximum capacitive load
(2)
VOLTAGE OUTPUT
VSP
Swing to VS
RL = 10 kΩ to GND, TA = –40°C to +125°C
(V+) – 0.02 (V+) – 0.026
V
V
RL = 10 kΩ to GND, VIN+ – VIN– = –10mV,
TA = –40°C to +125°C
(VGND) +
0.0005
(VGND) +
0.0035
VSN
Swing to GND
(VGND) +
0.0005
(VGND) +
0.006
A1 devices
RL = Open, VIN+ – VIN– = 0mV,
VREF = 0 V, TA = –40°C to +125°C
VSG
Zero current swing to GND
V
A2, A3, A4
devices
(VGND) +
0.0005
(VGND) +
0.012
FREQUENCY RESPONSE
A1 devices
A2 devices
A3 devices
A4 devices
350
210
150
105
2
BW
Bandwidth
CLOAD = 10 pF
kHz
SR
Slew rate
V/μs
(1)
NOISE, RTI
Voltage noise density
40
nV/√Hz
POWER SUPPLY
VSENSE = 0 mV
200
260
300
IQ
Quiescent current
μA
VSENSE = 0 mV, TA = –40°C to +125°C
(1) RTI = referred-to-input.
(2) See Typical Characteristic curve, Output Voltage Swing vs Output Current (图 19).
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6.6 Typical Characteristics
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D002
D001
Input Offset Voltage (mV)
Input Offset Voltage (mV)
图 1. Input Offset Voltage Production Distribution A1
图 2. Input Offset Voltage Production Distribution A2
D003
D004
Input Offset Voltage (mV)
Input Offset Voltage (mV)
图 3. Input Offset Voltage Production Distribution A3
图 4. Input Offset Voltage Production Distribution A4
100
A1
A2
A3
A4
50
0
-50
-100
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
D005
D006
Common-Mode Rejection Ratio (mV/V)
图 6. Common-Mode Rejection Production Distribution A1
版权 © 2019, Texas Instruments Incorporated
图 5. Offset Voltage vs Temperature
6
INA185
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Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D007
D008
Common-Mode Rejection Ratio (mV/V)
Common-Mode Rejection Ratio (mV/V)
图 7. Common-Mode Rejection Production Distribution A2
图 8. Common-Mode Rejection Production Distribution A3
10
A1
A2
8
A3
A4
6
4
2
0
-2
-4
-6
-8
-10
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
D010
D009
Common-Mode Rejection Ratio (mV/V)
图 9. Common-Mode Rejection Production Distribution A4
图 10. Common-Mode Rejection Ratio vs Temperature
D011
D012
Gain Error (%)
Gain Error (%)
图 11. Gain Error Production Distribution A1
版权 © 2019, Texas Instruments Incorporated
图 12. Gain Error Production Distribution A2
7
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ZHCSJH3 –MARCH 2019
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Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
D013
D014
Gain Error (%)
Gain Error (%)
图 13. Gain Error Production Distribution A3
图 14. Gain Error Production Distribution A4
50
40
30
20
10
0
0.4
0.3
0.2
0.1
0
A1
A1
A2
A3
A4
A2
A3
A4
-0.1
-0.2
-0.3
-0.4
-10
-50
-25
0
25
50
75
100
125
150
10
100
1k
10k
100k
1M
10M
Temperature (èC)
Frequency (Hz)
D015
D016
图 15. Gain Error vs Temperature
图 16. Gain vs Frequency
120
100
80
60
40
20
0
140
120
100
80
A1
A2
A3
A4
60
40
20
0
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
D017
D018
图 17. Power-Supply Rejection Ratio vs Frequency
图 18. Common-Mode Rejection Ratio vs Frequency
8
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ZHCSJH3 –MARCH 2019
Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
VS
VS – 1
VS – 2
120
100
80
60
40
20
0
–40°C
25°C
125°C
GND + 2
GND + 1
GND
-20
0
5
10 15 20 25 30 35 40 45 50 55 60
Output Current (mA)
-5
0
5
10
15
20
25
30
Common-Mode Voltage (V)
D019
D020
Supply voltage = 5 V
图 19. Output Voltage Swing vs Output Current
图 20. Input Bias Current vs Common-Mode Voltage
120
100
80
60
40
20
0
80
79
78
77
76
75
74
73
72
71
70
-20
-5
0
5
10
15
20
25
30
-50
-25
0
25
50
75
100
125
150
Common-Mode Voltage (V)
Temperature (èC)
D021
D022
Supply voltage = 0 V
图 21. Input Bias Current vs Common-Mode Voltage (Both
图 22. Input Bias Current vs Temperature
Inputs, Shutdown)
210
205
200
195
190
185
180
400
350
300
250
200
150
-50
-25
0
25
50
75
100
125
150
-5
0
5
10
15
20
25
30
Temperature (èC)
Common-Mode Voltage (V)
D023
D031
图 23. Quiescent Current vs Temperature
图 24. IQ vs Common-Mode Voltage
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Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
100
80
70
60
50
40
30
20
10
10
Time (1 s/div)
100
1k
10k
100k
1M
Frequency (Hz)
D025
D024
图 26. 0.1-Hz to 10-Hz Voltage Noise (Referred-to-Input)
图 25. Input-Referred Voltage Noise vs Frequency
(A3 Devices)
VCM
VOUT
Time (10 ms/div)
Time (25 ms/div)
D026
D027
80-mVPP input step
图 27. Step Response
图 28. Common-Mode Voltage Transient Response
Inverting Input
Output
Noninverting Input
Output
0 V
0 V
Time (250 ms/div)
Time (250 ms/div)
D028
D029
图 29. Inverting Differential Input Overload
图 30. Noninverting Differential Input Overload
10
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Typical Characteristics (接下页)
at TA = 25°C, VS = 5 V, VREF = VS / 2, and VIN+ = 12 V (unless otherwise noted)
Supply Voltage
Output Voltage
Supply Voltage
Output Voltage
0 V
0 V
Time (10
ms/div)
Time (100 ms/div)
D030
D032
图 31. Start-Up Response
图 32. Brownout Recovery
1000
500
A1
A2
A3
A4
200
100
50
20
10
5
2
1
0.5
0.2
0.1
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
D033
图 33. Output Impedance vs Frequency
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7 Detailed Description
7.1 Overview
The INA185 is a 26-V common-mode current-sensing amplifier used in both low-side and high-side
configurations. This specially-designed, current-sensing amplifier accurately measures voltages developed
across current-sensing resistors on common-mode voltages that far exceed the supply voltage powering the
device. Current can be measured on input voltage rails as high as 26 V, and the device can be powered from
supply voltages as low as 2.7 V.
7.2 Functional Block Diagrams
VS
INA185
INœ
œ
OUT
+
IN+
REF
GND
7.3 Feature Description
7.3.1 High Bandwidth and Slew Rate
The INA185 supports small-signal bandwidths as high as 350 kHz, and large-signal slew rates of 2 V/µs. The
ability to detect rapid changes in the sensed current, as well as the ability to quickly slew the output, make the
INA185 a good choice for applications that require a quick response to input current changes. One application
that requires high bandwidth and slew rate is low-side motor control, where the ability to follow rapid changing
current in the motor allows for more accurate control over a wider operating range. Another application that
requires higher bandwidth and slew rates is system fault detection, where the INA185 is used with an external
comparator and a reference to quickly detect when the sensed current is out of range.
7.3.2 Bidirectional Current Monitoring
The INA185 senses current flow through a sense resistor in both directions. The bidirectional current-sensing
capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive differential
voltage sensed at the inputs results in an output voltage that is greater than the applied reference voltage.
Likewise, a negative differential voltage at the inputs results in output voltage that is less than the applied
reference voltage. The output voltage of the current-sense amplifier is shown in 公式 1.
VOUT = ILOADì RSENSE ìGAIN + V
REF
where
•
•
•
•
ILOAD is the load current to be monitored.
RSENSE is the current-sense resistor.
GAIN is the gain option of the selected device.
VREF is the voltage applied to the REF pin.
(1)
12
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Feature Description (接下页)
7.3.3 Wide Input Common-Mode Voltage Range
The INA185 supports input common-mode voltages from –0.2 V to +26 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS) as long as VS stays within the operational
range of 2.7 V to 5.5 V. The ability to operate with common-mode voltages greater or less than VS allows the
INA185 to be used in high-side, as well as low-side, current-sensing applications, as shown in 图 34.
Bus Supply
œ0.2 V to +26 V
Direction of Positive
IN+
Current Flow
High-Side Sensing
RSENSE
Common-mode voltage (VCM
is bus-voltage dependent.
)
INœ
LOAD
Direction of Positive
Current Flow
IN+
Low-Side Sensing
Common-mode voltage (VCM
is always near ground and is
)
RSENSE
isolated from bus-voltage spikes.
INœ
图 34. High-Side and Low-Side Sensing Connections
7.3.4 Precise Low-Side Current Sensing
When used in low-side current sensing applications, the offset voltage of the INA185 is within ±55 µV for A2, A3
and A4 devices. The low offset performance of the INA185 has two main benefits. First, the low offset allows
these devices to be used in applications that must measure current over a wide dynamic range. In this case, the
low offset improves the accuracy when the sensed currents are on the low end of the measurement range. The
other advantage of low offset is the ability to sense lower voltage drop across the sense resistor accurately, thus
allowing a lower-value shunt resistor. Lower-value shunt resistors reduce power loss in the current sense circuit,
and help improve the power efficiency of the end application.
The gain error of the INA185 is specified to be within 0.2% of the actual value for A1, A2, and A3 devices. As the
sensed voltage becomes much larger than the offset voltage, this voltage becomes the dominant source of error
in the current sense measurement.
7.3.5 Rail-to-Rail Output Swing
The INA185 allows linear current sensing operation with the output close to the supply rail and GND. The
maximum specified output swing to the positive rail is 25 mV, and the maximum specified output swing to GND is
only 3.5 mV. In order to compare the output swing of the INA185 to an equivalent operational amplifier (op amp),
the inputs are overdriven to approximate the open-loop condition specified in many op amp data sheets. The
current-sense amplifier is a closed-loop system; therefore, the output swing to GND can be limited by the offset
voltage and amplifier gain during unidirectional operation (VREF = 0 V) when there is zero current flowing through
the sense resistor. To define the maximum output voltage under the zero current condition, the INA185 Electrical
Characteristics table specifies a maximum output voltage of 6 mV for the A1 device, and 12 mV for all other
devices.
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7.4 Device Functional Modes
7.4.1 Normal Mode
The INA185 is in normal operation when the following conditions are met:
•
•
•
The power supply voltage (VS) is between 2.7 V and 5.5 V.
The common-mode voltage (VCM) is within the specified range of –0.2 V to +26 V.
The maximum differential input signal times gain plus VREF is less than VS minus the output voltage swing to
VS.
•
The minimum differential input signal times gain plus VREF is greater than the swing to GND (see the Rail-to-
Rail Output Swing section).
During normal operation, these devices produce an output voltage that is the gained-up representation of the
difference voltage from IN+ to IN– plus the reference voltage at VREF
.
7.4.2 Unidirectional Mode
This device is capable of monitoring current flowing in one direction (unidirectional) or in both directions
(bidirectional) depending on how the REF pin is configured. The most common case is unidirectional, where the
output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in 图 35. When
the current flows from the bus supply to the load, the input signal across IN+ to IN– increases, and causes the
output voltage at the OUT pin to increase.
Bus Voltage
Power Supply, VS
2.7 V to 5.5 V
œ0.2 V to +26 V
CBYPASS
0.1 µF
RSENSE
Load
INA185
VS
INœ
OUT
œ
Output
+
IN+
REF
GND
图 35. Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under zero
input conditions. In unidirectional applications where measuring very low input currents is desirable, bias the REF
pin to a convenient value above 50 mV to get the output into the linear range of the device. To limit common-
mode rejection errors, buffer the reference voltage connected to the REF pin.
A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 25 mV less than the supply voltage when no differential input
signal is present. This method is similar to the output saturated low condition with no input signal when the REF
pin is connected to ground. The output voltage in this configuration only responds to negative currents that
develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the
differential input signal increases negatively, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
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Device Functional Modes (接下页)
7.4.3 Bidirectional Mode
The INA185 is a bidirectional current-sense amplifier capable of measuring currents through a resistive shunt in
two directions. This bidirectional monitoring is common in applications that include charging and discharging
operations where the current flowing through the resistor can change directions.
Bus Voltage
œ0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
Reference
Voltage
INœ
œ
OUT
REF
Output
+
IN+
+
œ
GND
图 36. Bidirectional Application
The ability to measure this current flowing in both directions is enabled by applying a voltage to the REF pin, as
shown in 图 36. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input level
state. The output then responds by increasing above VREF for positive differential signals (relative to the IN– pin)
and responds by decreasing below VREF for negative differential signals. This reference voltage applied to the
REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at mid-scale
for equal signal range in both current directions. In some cases, however, VREF is set at a voltage other than
midscale when the bidirectional current and corresponding output signal do not need to be symmetrical.
7.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain plus the reference voltage exceeds the voltage swing
specification, the INA185 drives the output as close as possible to the positive supply or ground, and does not
provide accurate measurement of the differential input voltage. If this input overload occurs during normal circuit
operation, then reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor
to avoid this mode of operation. If a differential overload occurs in a fault event, then the output of the INA185
returns to the expected value approximately 20 µs after the fault condition is removed.
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Device Functional Modes (接下页)
7.4.5 Shutdown Mode
Although the INA185 does not have a shutdown pin, the low power consumption of these devices allows the
output of a logic gate or transistor switch to power the INA185. This gate or switch turns on and off the INA185
power-supply quiescent current.
However, in current shunt monitoring applications, there is also a concern for how much current is drained from
the shunt circuit in shutdown conditions. Evaluating this current drain involves considering the simplified
schematic of the INA185 in shutdown mode, as shown in 图 37.
VS
2.7 V to 5.5 V
RPULL-UP
10 kꢀ
Bus Voltage
œ0.2 V to +26 V
Shutdown
RSENSE
Load
CBYPASS
0.1 µF
VS
INA185
INœ
OUT
REF
œ
Output
+
IN+
GND
图 37. Basic Circuit to Shut Down the INA185 With a Grounded Reference
There is typically more than 500 kΩ of impedance (from the combination of 500-kΩ feedback and
input gain set resistors) from each input of the INA185 to the OUT pin and to the REF pin. The amount of current
flowing through these pins depends on the voltage at the connection. For example, if the REF pin is grounded,
the calculation of the effect of the 500 kΩ impedance from the shunt to ground is straightforward. However, if the
reference is powered while the INA185 is in shutdown mode, instead of assuming 500 kΩ to ground, assume
500 kΩ to the reference voltage.
Regarding the 500-kΩ path to the output pin, the output stage of a disabled INA185 does constitute a good path
to ground. Consequently, this current is directly proportional to a shunt common-mode voltage present across a
500-kΩ resistor.
As a final note, as long as the shunt common-mode voltage is greater than VS when the device is powered up,
there is an additional and well-matched 55-µA typical current that flows in each of the inputs. If less than VS, the
common-mode input currents are negligible, and the only current effects are the result of the 500-kΩ resistors.
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA185 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground. The ability to drive the reference pin to adjust the functionality of the output signal
offers multiple configurations, as discussed in previous sections.
8.1.1 Basic Connections
图 38 shows the basic connections of the INA185. Connect the input pins (IN+ and IN–) as closely as possible to
the shunt resistor to minimize any resistance in series with the shunt resistor.
Bus Voltage
œ0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
INœ
Microcontroller
OUT
œ
ADC
+
IN+
REF
GND
NOTE: To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect
the REF pin to the ADC reference input and then to ground. For best performance, use an RC filter between the
output of the INA185 and the ADC. See the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using
ZOUT section for more details.
图 38. Basic Connections for the INA185
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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Application Information (接下页)
8.1.2 RSENSE and Device Gain Selection
Maximize the accuracy of the INA185 by choosing a current-sense resistor that is as large as possible. A large
sense resistor maximizes the differential input signal for a given amount of current flow and reduces the error
contribution of the offset voltage. However, there are practical limits as to how large the current-sense resistor
can be in a given application. The INA185 has a typical input bias current of 75 µA for each input when operated
at a 12-V common-mode voltage input. When large current-sense resistors are used, these bias currents cause
increased offset error and reduced common-mode rejection. Therefore, using current-sense resistors larger than
a few ohms is generally not recommended for applications that require current-monitoring accuracy. Another
common restriction on the value of the current-sense resistor is the maximum allowable power dissipation that is
budgeted for the resistor. 公式 2 gives the maximum value for the current sense resistor for a given power
dissipation budget:
PDMAX
RSENSE
<
2
IMAX
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE
.
IMAX is the maximum current that will flow through RSENSE
.
(2)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing to rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. 公式 3 provides the
maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX ìRSENSE ìGAIN < VSP - VREF
where:
•
•
•
•
IMAX is the maximum current that will flow through RSENSE
.
GAIN is the gain of the current sense-amplifier.
VSP is the positive output swing as specified in the data sheet.
VREF is the externally applied voltage on the REF pin.
(3)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The negative swing limitation places a limit on how small of a sense resistor can be used in a given application.
公式 4 provides the limit on the minimum size of the sense resistor.
IMIN ìRSENSE ìGAIN > VSN - VREF
where:
•
•
•
•
IMIN is the minimum current that will flow through RSENSE
.
GAIN is the gain of the current sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
VREF is the externally applied voltage on the REF pin.
(4)
In addition to adjusting the offset and gain, the voltage applied to the REF pin can be slightly increased to avoid
negative swing limitations.
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Application Information (接下页)
8.1.3 Signal Filtering
Provided that the INA185 output is connected to a high impedance input, the best location to filter is at the device
output using a simple RC network from OUT to GND. Filtering at the output attenuates high-frequency
disturbances in the common-mode voltage, differential input signal, and INA185 power-supply voltage. If filtering
at the output is not possible, or filtering of only the differential input signal is required, then apply a filter at the
input pins of the device. 图 39 provides an example of how a filter can be used on the input pins of the device.
Bus Voltage
œ0.2 V to +26 V
RSENSE
Load
VS
2.7 V to 5.5 V
1
VS
INA185
f-3dB
=
2p(RF + RF )CF
RF < 10 ꢀ
RINT
INœ
fœ3dB
VOUT
CF
œ
OUT
REF
Bias
+
RF < 10 ꢀ
RINT
VREF
IN+
图 39. Filter at Input Pins
The addition of external series resistance creates an additional error in the measurement; therefore, the value of
these series resistors must be kept to 10 Ω (or less, if possible) to reduce impact to accuracy. The internal bias
network shown in 图 39 present at the input pins creates a mismatch in input bias currents when a differential
voltage is applied between the input pins. If additional external series filter resistors are added to the circuit, the
mismatch in bias currents results in a mismatch of voltage drops across the filter resistors. This mismatch
creates a differential error voltage that subtracts from the voltage developed across the shunt resistor. This error
results in a voltage at the device input pins that is different than the voltage developed across the shunt resistor.
Without the additional series resistance, the mismatch in input bias currents has little effect on device operation.
The amount of error these external filter resistors add to the measurement can be calculated using 公式 6, where
the gain error factor is calculated using 公式 5.
The amount of variance in the differential voltage present at the device input relative to the voltage developed at
the shunt resistor is based both on the external series resistance (RF) value as well as the internal input resistor
RINT, as shown in 图 39. The reduction of the shunt voltage reaching the device input pins appears as a gain
error when comparing the output voltage relative to the voltage across the shunt resistor. A factor can be
calculated to determine the amount of gain error that is introduced by the addition of external series resistance.
Calculate the expected deviation from the shunt voltage to what is measured at the device input pins is given
using 公式 5:
1250ìRINT
(1250ìRF ) + (1250ìRINT ) + (RF ìRINT
Gain Error Factor =
)
where:
•
•
RINT is the internal input resistor.
RF is the external series resistance.
(5)
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Application Information (接下页)
With the adjustment factor from 公式 5, including the device internal input resistance, this factor varies with each
gain version, as shown in 表 1. Each individual device gain error factor is shown in 表 2.
表 1. Input Resistance
PRODUCT
INA185A1
INA185A2
INA185A3
INA185A4
GAIN
20
RINT (kΩ)
25
10
5
50
100
200
2.5
表 2. Device Gain Error Factor
PRODUCT
SIMPLIFIED GAIN ERROR FACTOR
25000
INA185A1
(21ìRF ) + 25000
10000
INA185A2
INA185A3
INA185A4
(9ìRF ) +10000
1000
RF +1000
2500
(3ìRF ) + 2500
The gain error that can be expected from the addition of the external series resistors can then be calculated
based on 公式 6:
Gain Error (%) = 100 - (100 ´ Gain Error Factor)
(6)
For example, using an INA185A2 and the corresponding gain error equation from 表 2, a series resistance of
10 Ω results in a gain error factor of 0.991. The corresponding gain error is then calculated using 公式 6,
resulting in an additional gain error of approximately 0.89% solely because of the external 10-Ω series resistors.
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8.2 Typical Application
One application for the INA185 is to monitor bidirectional currents. Bidirectional currents are present in systems
that have to monitor currents in both directions; common examples are monitoring the charging and discharging
of batteries and bidirectional current monitoring in motor control. The device configuration for bidirectional current
monitoring is shown in 图 40. Applying stable REF pin voltage closer to the middle of device supply voltage
allows both positive- and negative-current monitoring, as shown in this configuration. Configure the INA185 to
monitor unidirectional currents by grounding the REF pin.
Bus Voltage
œ0.2 V to +26 V
Power Supply, VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
INA185
Reference
Voltage
INœ
œ
OUT
REF
Output
+
IN+
+
œ
GND
图 40. Measuring Bidirectional Current
8.2.1 Design Requirements
The design requirements for the circuit shown in 图 40, are listed in 表 3
表 3. Design Parameters
DESIGN PARAMETER
Power-supply voltage, VS
Bus supply rail, VCM
EXAMPLE VALUE
5 V
12 V
RSENSE power loss
< 450 mW
±20 A
Maximum sense current, IMAX
Current sensing error
Less than 1% at maximum current, TJ = 25°C
> 100 kHz
Small-signal bandwidth
8.2.2 Detailed Design Procedure
The maximum value of the current sense resistor is calculated based on the maximum power loss requirement.
By applying 公式 2, the maximum value of the current-sense resistor is calculated to be 1.125 mΩ. This is the
maximum value for sense resistor RSENSE; therefore, select RSENSE to be 1 mΩ because it is the closest standard
resistor value that meets the power-loss requirement.
The next step is to select the appropriate gain and reduce RSENSE, if needed, to keep the output signal swing
within the VS range. The design requirements call for bidirectional current monitoring; therefore, a voltage
between 0 and VS must be applied to the REF pin. The bidirectional currents monitored are symmetric around 0
(that is, ±20 A); therefore, the ideal voltage to apply to VREF is VS / 2 or 2.5 V. If the positive current is greater
than the negative current, using a lower voltage on VREF has the benefit of maximizing the output swing for the
given range of expected currents. Using 公式 3, and given that IMAX = 20 A , RSENSE = 1 mΩ, and VREF = 2.5 V,
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the maximum current-sense gain calculated to avoid the positive swing-to-rail limitations on the output is 122.5.
Likewise, using 公式 4 for the negative-swing limitation results in a maximum gain of 124.75. Selecting the gain-
of-100 device maximizes the output range while staying within the output swing range. If the maximum calculated
gains are slightly less than 100, the value of the current-sense resistor can be reduced to keep the output from
hitting the output-swing limitations.
To calculate the accuracy at peak current, the two factors that must be determined are the gain error and the
offset error. The gain error of the INA185A3 is specified to be a maximum of 0.2%. The error due to the offset is
constant, and is specified to be 130 µV (maximum) for the conditions where VCM = 12 V and VS = 5 V. Using 公
式 7, the percentage error contribution of the offset voltage is calculated to be 0.65%, with total offset error = 130
µV, RSENSE = 1 mΩ, and ISENSE = 20 A.
Total Offset Error (V)
Total Offset Error (%) =
ì100%
ISENSE ìRSENSE
(7)
One method of calculating the total error is to add the gain error to the percentage contribution of the offset error.
However, in this case, the gain error and the offset error do not have an influence or correlation to each other. A
more statistically accurate method of calculating the total error is to use the RSS sum of the errors, as shown in
公式 8:
Total Error (%) = Total Gain Error (%)2 + Total Offset Error (%)2
(8)
After applying 公式 8, the total current sense error at maximum current is calculated to be 0.68%, which is less
than the design example requirement of 1%.
The INA185A3 (gain = 100) also has a bandwidth of 150 kHz that meets the small-signal bandwidth requirement
of 100 kHz. If higher bandwidth is required, lower-gain devices can be used at the expense of either reduced
output voltage range or an increased value of RSENSE
.
8.2.3 Application Curve
An example output response of a bidirectional configuration is shown in 图 41. With the REF pin connected to a
reference voltage (2.5 V in this case), the output voltage is biased upwards by this reference level. The output
rises above the reference voltage for positive differential input signals, and falls below the reference voltage for
negative differential input signals.
VOUT
VREF
0V
Time (500 µs/div)
C002
图 41. Bidirectional Application Output Response
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9 Power Supply Recommendations
The input circuitry of the INA185 allows for accurate measurements beyond the power-supply voltage, VS. For
example, VS can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 26 V. However, the
output voltage range of the OUT pin is limited by the voltages on the VS pin. The INA185 also withstands the full
differential input signal range up to 26 V at the IN+ and IN– input pins, regardless of whether or not the device
has power applied at the VS pin.
9.1 Common-Mode Transients Greater Than 26 V
With a small amount of additional circuitry, the INA185 can be used in circuits subject to transients higher than
26 V, such as automotive applications. Use only Zener diodes or Zener-type transient absorbers (sometimes
referred to as transzorbs)—any other type of transient absorber has an unacceptable time delay. Start by adding
a pair of resistors as a working impedance for the Zener diode; see 图 42. Keep these resistors as small as
possible; most often, around 10 Ω. Larger values can be used with an effect on gain that is discussed in the
Signal Filtering section. This circuit limits only short-term transients; therefore, many applications are satisfied
with a 10-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This
combination uses the least amount of board space. These diodes can be found in packages as small as SOT-
523 or SOD-523.
VS
2.7 V to 5.5 V
CBYPASS
0.1 µF
Bus Supply
œ0.2 V to +26 V
RSENSE
Load
INA185
VS
INœ
œ
OUT
RPROTECT
< 10 ꢀ
Output
+
REF
IN+
GND
图 42. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in 图 43. The most space-efficient solutions are dual, series-
connected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in 图 42 and 图 43,
the total board area required by the INA185 with all protective components is less than that of an SO-8 package,
and only slightly greater than that of an MSOP-8 package.
VS
CBYPASS
0.1 µF
2.7 V to 5.5 V
Bus Supply
œ0.2 V to +26 V
RSENSE
Load
VS
INA185
< 10 ꢀ
INœ
œ
OUT
Transorb
Output
+
< 10 ꢀ
REF
IN+
GND
图 43. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see Current Shunt Monitor With Transient Robustness Reference Design.
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10 Layout
10.1 Layout Guidelines
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
•
•
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current sense resistor to the device, keep the trace lengths as close
as possible in order to minimize any impedance mismatch..
10.2 Layout Example
Direction of Positive
Current Flow
Bus Voltage:
œ0.2V to +26 V
RSHUNT
4
5
6
3
2
IN+
INœ
REF
VS
Connect REF to low
impedance voltage reference
or to GND pin if not used.
GND
Current
Sense
1
OUT
VIA to Ground
Plane
CBYPASS
Power-Supply, VS
2.7 V to 5.5 V
图 44. Recommended Layout
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11 器件和文档支持
11.1 器件支持
11.1.1 开发支持
《具有瞬态稳定性的电流分流监控器参考设计》
11.2 文档支持
11.2.1 相关文档
请参阅如下相关文档：德州仪器 (TI)，《INA185EVM 用户指南》
11.3 接收文档更新通知
要接收文档更新通知，请导航至 TI.com.cn 上的器件产品文件夹。单击右上角的通知我 进行注册，即可每周接收产
品信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.4 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.7 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
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25
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Mar-2019
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA185A1IDRLR
INA185A1IDRLT
INA185A2IDRLR
INA185A2IDRLT
INA185A3IDRLR
INA185A3IDRLT
INA185A4IDRLR
INA185A4IDRLT
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
DRL
DRL
DRL
DRL
DRL
DRL
DRL
DRL
6
6
6
6
6
6
6
6
4000
250
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
1.98
1.98
1.98
1.98
1.98
1.98
1.98
1.98
1.78
1.78
1.78
1.78
1.78
1.78
1.78
1.78
0.69
0.69
0.69
0.69
0.69
0.69
0.69
0.69
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
4000
250
4000
250
4000
250
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
23-Mar-2019
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA185A1IDRLR
INA185A1IDRLT
INA185A2IDRLR
INA185A2IDRLT
INA185A3IDRLR
INA185A3IDRLT
INA185A4IDRLR
INA185A4IDRLT
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
SOT-5X3
DRL
DRL
DRL
DRL
DRL
DRL
DRL
DRL
6
6
6
6
6
6
6
6
4000
250
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
183.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
20.0
4000
250
4000
250
4000
250
Pack Materials-Page 2
PACKAGE OUTLINE
DRL0006A
SOT - 0.6 mm max height
S
C
A
L
E
8
.
0
0
0
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1
ID AREA
A
1
6
4X 0.5
1.7
1.5
2X 1
NOTE 3
4
3
1.3
1.1
0.3
6X
0.05
TYP
0.00
B
0.1
0.6 MAX
C
SEATING PLANE
0.05 C
0.18
0.08
6X
SYMM
SYMM
0.27
0.15
6X
0.1
0.05
C A B
0.4
0.2
6X
4223266/C 12/2021
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE
SCALE:30X
0.05 MIN
AROUND
0.05 MAX
AROUND
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDERMASK DETAILS
4223266/C 12/2021
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.
6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Land pattern design aligns to IPC-610, Bottom Termination Component (BTC) solder joint inspection criteria.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
6X (0.67)
SYMM
1
6
6X (0.3)
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/C 12/2021
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
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