INA186A3IYFDR [TI]

INA186 Bidirectional, Low-Power, Zero-Drift, Wide Dynamic Range, Current-Sense Amplifier With Enable;


型号：	INA186A3IYFDR
厂家：	TEXAS INSTRUMENTS
描述：	INA186 Bidirectional, Low-Power, Zero-Drift, Wide Dynamic Range, Current-Sense Amplifier With Enable
文件：	总46页 (文件大小：2602K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

INA186

SBOS318B – APRIL 2019 – REVISED JULY 2021

INA186 Bidirectional, Low-Power, Zero-Drift, Wide Dynamic Range,

Current-Sense Amplifier With Enable

1 Features

3 Description

•

Wide common-mode voltage range, V_CM

–0.2 V to +40 V

The INA186 is a low-power, voltage-output, current-

sense amplifier (also called a current-shunt monitor).

This device is commonly used for overcurrent

protection, precision current measurement for system

optimization, or in closed-loop feedback circuits. The

INA186 can sense drops across shunts at common-

mode voltages from –0.2 V to +40 V, independent of

the supply voltage.

Low input bias currents, I_IB: 500 pA (typical)

(enables microamp current measurement)

Low power:

– Low supply voltage, V_S: 1.7 V to 5.5 V

– Low quiescent current, I_Q: 48 µA (typical)

Accuracy:

•

– Common-mode rejection ratio: 120 dB

(minimum)

The low input bias current of the INA186 permits the

use of larger current-sense resistors, thus providing

accurate current measurements in the microamp

range. The low offset voltage of the zero-drift

architecture extends the dynamic range of the current

measurement. This feature allows for smaller sense

resistors with lower power loss, while still providing

accurate current measurements.

– Gain error, E_G: ±1% (maximum)

– Gain drift: 10 ppm/°C (maximum)

– Offset voltage, V_OS: ±50 μV (maximum)

– Offset drift: 0.5 μV/°C (maximum)

Bidirectional current sensing capability

Gain options:

•

– INA186A1: 25 V/V

The INA186 operates from a single 1.7-V to 5.5-V

power supply, and draws a maximum of 90 μA of

supply current . Five fixed gain options are available:

25 V/V, 50 V/V, 100 V/V, 200 V/V, or 500 V/V. The

device is specified over the operating temperature

range of –40°C to +125°C, and offered in SC70,

SOT-23-THIN, and DSBGA packages. The SC70 and

SOT-23 (DDF) packages support bidirectional current

measurement, whereas the DSBGA package only

supports current measurement in one direction.

– INA186A2: 50 V/V

– INA186A3: 100 V/V

– INA186A4: 200 V/V

– INA186A5: 500 V/V

2 Applications

•

Standard notebook PC

Smartphone

Consumer battery charger

Baseband unit (BBU)

Merchant network and server PSU

Battery test

Table 3-1. Device Information

PART NUMBER

PACKAGE⁽¹⁾

BODY SIZE (NOM)

2.00 mm × 1.25 mm

2.90 mm × 1.60 mm

1.17 mm × 0.765 mm

SC70 (6)

INA186

SOT-23 (8)

DSBGA (6)

(1) For all available packages, see the package option

addendum at the end of the data sheet.

Supply Voltage

R_SENSE

Bus Voltage

œ0.2 V to +40 V

1.7 V to 5.5 V

LOAD

0.1 …F

0.5 nA

(typ)

0.5 nA

(typ)

ENABLE⁽¹⁾

INœ

OUT

ADC

Microcontroller

INA186

IN+

REF⁽²⁾

GND

(1) The ENABLE pin is available only

in the DDF and YFD packages.

(2) The REF pin is available only in

the DDF and DCK packages.

Typical Application

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

INA186

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SBOS318B – APRIL 2019 – REVISED JULY 2021

Table of Contents

1 Features............................................................................1

2 Applications.....................................................................1

3 Description.......................................................................1

4 Revision History.............................................................. 2

5 Pin Configuration and Functions...................................3

6 Specifications.................................................................. 4

6.1 Absolute Maximum Ratings ....................................... 4

6.2 ESD Ratings .............................................................. 4

6.3 Recommended Operating Conditions ........................4

6.4 Thermal Information ...................................................4

6.5 Electrical Characteristics ............................................5

6.6 Typical Characteristics................................................6

7 Detailed Description......................................................11

7.1 Overview................................................................... 11

7.2 Functional Block Diagram......................................... 11

7.3 Feature Description...................................................12

7.4 Device Functional Modes..........................................14

8 Application and Implementation..................................18

8.1 Application Information............................................. 18

8.2 Typical Applications.................................................. 23

9 Power Supply Recommendations................................24

10 Layout...........................................................................25

10.1 Layout Guidelines................................................... 25

10.2 Layout Examples.................................................... 25

11 Device and Documentation Support..........................28

11.1 Documentation Support.......................................... 28

11.2 Receiving Notification of Documentation Updates..28

11.3 Support Resources................................................. 28

11.4 Trademarks............................................................. 28

11.5 Electrostatic Discharge Caution..............................28

11.6 Glossary..................................................................28

12 Mechanical, Packaging, and Orderable

Information.................................................................... 28

4 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision A (November 2019) to Revision B (July 2021)

Page

•

Added the YFD (DSBGA) package and associated content to data sheet ........................................................1

Changed Overview section...............................................................................................................................11

Added ENABLE pin information to the Functional Block Diagram ...................................................................11

Added REF pin information to the Bidirectional Current Monitoring section.....................................................12

Changed graphics in the Basic Connections section........................................................................................18

Added REF pin information to the R_SENSEand Device Gain Selection section................................................19

Added the YFD (DSBGA) layout example to Layout Examples ...................................................................... 25

Changes from Revision * (April 2019) to Revision A (November 2019)

Page

•

Added DDF (SOT-23) package and associated content to data sheet ..............................................................1

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5 Pin Configuration and Functions

REF

GND

OUT

INœ

IN+

OUT

IN+

INœ

GND

ENABLE

Not to scale

Figure 5-1. DCK Package 6-Pin SC70 Top View

Figure 5-2. YFD Package 6-Pin DSBGA Top View

ENABLE

REF

INœ

IN+

GND

OUT

Not to scale

Figure 5-3. DDF Package 8-Pin SOT-23 Top View

Table 5-1. Pin Functions

TYPE

DESCRIPTION

DCK

(SC70)

DDF

(SOT-23)

YFD

(DSBGA)

NAME

Enable Pin. When this pin is driven to VS, the device is on and functions

as a current sense amplifier. When this pin is driven to GND, the device

ENABLE

—

Digital input is off, the supply current is reduced, and the output is placed in a high-

impedance state. This pin must be driven externally, or connected to VS if

not used. DDF and YFD packages only.

GND

IN–

Analog

Ground

Current-sense amplifier negative input. For high-side applications,

Analog input connect to load side of sense resistor. For low-side applications, connect

to ground side of sense resistor.

Current-sense amplifier positive input. For high-side applications, connect

Analog input to bus voltage side of sense resistor. For low-side applications, connect to

load side of sense resistor.

IN+

—

No internal connection. Can be left floating, grounded, or connected to

supply.

—

OUT pin. This pin provides an analog voltage output that is the gained up

Analog output voltage difference from the IN+ to the IN– pins, and is offset by the voltage

applied to the REF pin.

OUT

Reference input. Enables bidirectional current sensing with an externally

Analog input applied voltage. DCK and DDF packages only. Devices without a REF pin

have the REF node grounded internally.

REF

—

Analog

Power supply, 1.7 V to 5.5 V

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾

MIN

MAX

UNIT

V_S

Supply voltage

(2)

Differential (V_IN+) – (V_IN–

)

–42

GND – 0.3

V_IN+, V_IN–Analog inputs

V_IN+, V_IN–, with respect to GND⁽³⁾

V_ENABLEENABLE

REF, OUT⁽³⁾

(V_S) + 0.3

Input current into any pin⁽³⁾

°C

T_A

Operating temperature

Junction temperature

Storage temperature

–55

–65

150

T_J

150

T_stg

150

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under

Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device

reliability.

(2) V_IN+and V_IN–are the voltages at the IN+ and IN– pins, respectively.

(3) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.

6.2 ESD Ratings

VALUE

±3000

±1000

UNIT

Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾

V_(ESD)

Electrostatic discharge

Charged-device model (CDM), per JEDEC specification JESD22-C101⁽²⁾

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

GND – 0.2

1.7

NOM

MAX

UNIT

V_CM

Common-mode input range

Input pin voltage range

V_IN+, V_IN–

V_S

Operating supply voltage

Reference pin voltage range

Operating free-air temperature

5.5

V_S

V_REF

T_A

GND

–40

125

°C

6.4 Thermal Information

INA186

THERMAL METRIC⁽¹⁾

YFD (DSBGA)

6 PINS

141.4

1.1

DCK (SC70)

6 PINS

170.7

132.7

65.3

DDF (SOT23)

UNIT

8 PINS

137.2

38.4

57.1

5.1

R_θJA

Junction-to-ambient thermal resistance

°C/W

R_θJC(top)Junction-to-case (top) thermal resistance

R_θJB

Ψ_JT

Ψ_JB

Junction-to-board thermal resistance

45.7

Junction-to-top characterization parameter

Junction-to-board characterization parameter

0.4

45.7

45.3

65.2

56.6

N/A

R_θJC(bot)Junction-to-case (bottom) thermal resistance

N/A

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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6.5 Electrical Characteristics

at T_A= 25°C, V_SENSE= V_IN+– V_IN–, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, and V_ENABLE= V_S(unless otherwise

noted)

PARAMETER

CONDITIONS

MIN

TYP

MAX UNIT

INPUT

CMRR

V_OS

Common-mode rejection ratio V_SENSE= 0 mV, V_IN+= –0.1 V to 40 V, T_A= –40°C to +125°C

120

150

–3

Offset voltage, RTI⁽¹⁾

V_S= 1.8 V, V_SENSE= 0 mV

±50

µV

dV_OS/dT Offset drift, RTI

V_SENSE= 0 mV, T_A= –40°C to +125°C

0.05

0.5 µV/°C

±10 µV/V

Power-supply rejection ratio,

PSRR

V_SENSE= 0 mV, V_S= 1.7 V to 5.5 V

–1

RTI

I_IB

Input bias current

Input offset current

V_SENSE= 0 mV

0.5

I_IO

±0.07

OUTPUT

A1 devices

A2 devices

Gain

A3 devices

100

V/V

A4 devices

200

A5 devices

500

E_G

Gain error

V_OUT= 0.1 V to V_S– 0.1 V

T_A= –40°C to +125°C

V_OUT= 0.1 V to V_S– 0.1 V

–0.04%

±1%

Gain error drift

Nonlinearity error

10 ppm/°C

±0.01%

Reference voltage rejection

ratio

V_REF= 100 mV to V_S– 100 mV,

T_A= –40°C to +125°C

RVRR

±2

±10 µV/V

Maximum capacitive load

No sustained oscillation

VOLTAGE OUTPUT

V_SP

V_SN

Swing to V_Spower-supply rail V_S= 1.8 V, R_L= 10 kΩ to GND, T_A= –40°C to +125°C

(V_S) – 20

(V_S) – 40

(V_GND) + 1

V_S= 1.8 V, R_L= 10 kΩ to GND, T_A= –40°C to +125°C,

Swing to GND

(V_GND) + 0.05

V_SENSE= –10 mV, V_REF= 0 V

V_S= 1.8 V, R_L= 10 kΩ to GND,

Zero current output voltage

V_ZL

(V_GND) + 2 (V_GND) + 10

T_A= –40°C to +125°C, V_SENSE= 0 mV, V_REF= 0 V

FREQUENCY RESPONSE

A1 devices, C_LOAD= 10 pF

0.3

A2 devices, C_LOAD= 10 pF

Bandwidth

A3 devices, C_LOAD= 10 pF

kHz

A4 devices, C_LOAD= 10 pF

A5 devices, C_LOAD= 10 pF

t_S

Slew rate

V_S= 5.0 V, V_OUT= 0.5 V to 4.5 V

From current step to within 1% of final value

V/µs

µs

Settling time

NOISE, RTI⁽¹⁾

Voltage noise density

nV/√Hz

ENABLE

I_EN

Leakage input current

High-level input voltage

Low-level input voltage

Hysteresis

0 V ≤ V_ENABLE≤ V_S

DDF Package

100

V_IH

0.7 × V_S

V_IL

0.3 × V_S

V_HYS

V_IH

300

High-level input voltage

Low-level input voltage

Hysteresis

1.35

5.5

0.4

V_IL

YFD package

V_HYS

I_ODIS

100

µA

Output leakage disabled

V_S= 5.0 V, V_OUT= 0 V to 5.0 V, V_ENABLE= 0 V

POWER SUPPLY

V_S= 1.8 V, V_SENSE= 0 mV

µA

I_QQuiescent current

V_S= 1.8 V, V_SENSE= 0 mV, T_A= –40°C to +125°C

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at T_A= 25°C, V_SENSE= V_IN+– V_IN–, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, and V_ENABLE= V_S(unless otherwise

noted)

PARAMETER

CONDITIONS

MIN

TYP

MAX UNIT

I_QDIS

Quiescent current disabled

V_ENABLE= 0 V, V_SENSE= 0 mV

100 nA

(1) RTI = referred-to-input.

6.6 Typical Characteristics

at T_A= 25°C, V_SENSE= V_IN+– V_IN-, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, V_ENABLE= V_S, and for all gain options

(unless otherwise noted)

140

120

100

-10

-20

100

1k 10k

Frequency (Hz)

100k

100

1k 10k

Frequency (Hz)

100k

D019

D020

V_S= 5 V

Figure 6-1. Gain vs. Frequency

V_S= 5 V

Figure 6-2. Power-Supply Rejection Ratio vs. Frequency

V_s

160

140

120

100

-40°C

25°C

125°C

V_s-0.4

V_s-0.8

GND+0.8

GND+0.4

GND

Output Current (mA)

10 11

100

1k 10k

Frequency (Hz)

100k

D010

D021

V_S= 1.8 V

Figure 6-4. Output Voltage Swing vs. Output Current

A3 devices

Figure 6-3. Common-Mode Rejection Ratio vs. Frequency

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6.6 Typical Characteristics (continued)

at T_A= 25°C, V_SENSE= V_IN+– V_IN-, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, V_ENABLE= V_S, and for all gain options

(unless otherwise noted)

V_s

0.25

0.2

-40°C

25°C

125°C

V_s-1

0.15

0.1

V_s-2

0.05

-0.05

-0.1

-0.15

-0.2

-0.25

GND+2

GND+1

GND

Common-Mode Voltage (V)

15 20

Output Current (mA)

D024

D009

V_S= 5.0 V

Figure 6-5. Output Voltage Swing vs. Output Current

Figure 6-6. Input Bias Current vs. Common-Mode Voltage

0.25

0.2

V_S= 1.8 V

V_S= 3.3 V

V_S= 5 V

0.15

0.1

0.05

-0.05

-0.1

-0.15

-0.2

-0.25

Common-Mode Voltage (V)

D025

-50

-25

100

125

150

V_ENABLE= 0 V

Temperature (èC)

D027

Figure 6-7. Input Bias Current vs. Common-Mode Voltage

(Shutdown)

Figure 6-8. Quiescent Current vs. Temperature (Enabled)

240

V_S= 1.8 V

V_S= 3.3 V

V_S= 5.0 V

V_S= 1.8 V

V_S= 5 V

210

180

150

120

-30

-50

-25

100

125

150

-5

Common-Mode Voltage (V)

Temperature (èC)

D002

D029

V_ENABLE= 0 V

V_S= 5.0 V

Figure 6-9. Quiescent Current vs. Temperature (Disabled)

Figure 6-10. Quiescent Current vs. Common-Mode Voltage

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6.6 Typical Characteristics (continued)

at T_A= 25°C, V_SENSE= V_IN+– V_IN-, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, V_ENABLE= V_S, and for all gain options

(unless otherwise noted)

100

Frequency (Hz)

10k

100k

Time (1 s/div)

D030

D031

A3 devices

Figure 6-11. Input-Referred Voltage Noise vs. Frequency

Figure 6-12. 0.1-Hz to 10-Hz Voltage Noise (Referred-To-Input)

V_CM

V_OUT

Time (20 ms/div)

Time (250 ms/div)

D032

D033

V_S= 5.0 V, A3 devices

A3 devices

Figure 6-13. Step Response (10-mV_PPInput Step)

Figure 6-14. Common-Mode Voltage Transient Response

Inverting Input

Output

Non-inverting Input

Output

0 V

Time (250 ms/div)

D034

D035

A3 devices

V_S= 5.0 V, A3 devices

Figure 6-15. Inverting Differential Input Overload

Figure 6-16. Noninverting Differential Input Overload

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6.6 Typical Characteristics (continued)

at T_A= 25°C, V_SENSE= V_IN+– V_IN-, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, V_ENABLE= V_S, and for all gain options

(unless otherwise noted)

Supply Voltage

Output Voltage

Supply Voltage

Output Voltage

0 V

Time (10 ms/div)

Time (100 ms/div)

D036

D037

V_S= 5.0 V, A3 devices

Figure 6-17. Start-Up Response

Figure 6-18. Brownout Recovery

100

Enable

Output

IBP

IBN

-20

-40

-60

-80

0 V

-100

-110 -90 -70 -50 -30 -10 10 30 50 70 90 110

Differential Input Voltage (mV)

Time (250 ms/div)

D039

D038

V_S= 5.0 V, V_REF= 2.5 V, A1 devices

V_S= 5.0 V, A3 devices

Figure 6-20. IB+ and IB– vs. Differential Input Voltage

Figure 6-19. Enable and Disable Response

1.25

IBP

IBN

-40èC

25èC

125èC

0.75

0.5

0.25

-5

-0.25

-0.5

-0.75

-1

-15

-25

0.5

1.5

2.5

Output Voltage (V)

3.5

4.5

-60

-40

-20

Differential Input Voltage (mV)

D040

D047

V_S= 5.0 V, V_ENABLE= 0 V, V_REF= 2.5 V

V_S= 5.0 V, V_REF= 2.5 V, A2, A3, A4, A5 devices

Figure 6-22. Output Leakage vs. Output Voltage (A1, A2, and A3

Devices)

Figure 6-21. IB+ and IB– vs. Differential Input Voltage

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6.6 Typical Characteristics (continued)

at T_A= 25°C, V_SENSE= V_IN+– V_IN-, V_S= 1.8 V to 5.0 V, V_IN+= 12 V, V_REF= V_S/ 2, V_ENABLE= V_S, and for all gain options

(unless otherwise noted)

5000

1000

2.5

25èC

-40èC

125èC

1.5

100

0.5

-0.5

-1

Gain Variants

-1.5

-2

-2.5

0.1

0.5

1.5

2.5

Output Voltage (V)

3.5

4.5

100

10k

Frequency (Hz)

100k

10M

D048

D050

V_S= 5.0 V, V_ENABLE= 0 V, V_REF= 2.5 V

V_S= 5.0 V, V_CM= 0 V

Figure 6-24. Output Impedance vs. Frequency

Figure 6-23. Output Leakage vs. Output Voltage (A4 and A5

Devices)

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7 Detailed Description

7.1 Overview

The INA186 is a low bias current, low offset, 40-V common-mode, current-sensing amplifier. The DDF SOT-23

and YFD DSBGA packages also come with an enable pin. The INA186 is a specially designed, current-sensing

amplifier that accurately measures voltages developed across current-sensing resistors on common-mode

voltages that far exceed the supply voltage. Current is measured on input voltage rails as high as 40 V at V_IN+

and V_IN–, with a supply voltage, V_S, as low as 1.7 V. When disabled, the output goes to a high-impedance state,

and the supply current draw is reduced to less than 0.1 µA. The INA186 is intended for use in both low-side and

high-side current-sensing configurations where high accuracy and low current consumption are required.

7.2 Functional Block Diagram

ENABLE⁽¹⁾

INA186

IN+

OUT

REF⁽²⁾

INœ

GND

1. The ENABLE pin is available only in the DDF and YFD packages.

2. YFD packages without a REF pin have this node internally connected to GND.

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7.3 Feature Description

7.3.1 Precision Current Measurement

The INA186 allows for accurate current measurements over a wide dynamic range. The high accuracy of the

device is attributable to the low gain error and offset specifications. The offset voltage of the INA186 is less than

±50 µV. In this case, the low offset improves the accuracy at light loads when V_IN+approaches V_IN–. Another

advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in the

current-sense circuit, and improves the power efficiency of the end application.

The maximum gain error of the INA186 is specified at ±1%. As the sensed voltage becomes much larger than

the offset voltage, the gain error becomes the dominant source of error in the current-sense measurement.

When the device monitors currents near the full-scale output range, the total measurement error approaches the

value of the gain error.

7.3.2 Low Input Bias Current

The INA186 is different from many current-sense amplifiers because this device offers very low input bias

current. The low input bias current of the INA186 has three primary benefits.

The first benefit is the reduction of the current consumed by the device . Classical current-sense amplifier

topologies typically consume tens of microamps of current at the inputs. For these amplifiers, the input current is

the result of the resistor network that sets the gain and additional current to bias the input amplifier. To reduce

the bias current to near zero, the INA186 uses a capacitively coupled amplifier on the input stage, followed by a

difference amplifier on the output stage.

The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before

the signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost

of reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the

measurement accuracy of the INA186.

The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the

device to accurately monitor currents as low as 1 µA.

7.3.3 Low Quiescent Current With Output Enable

The device features low quiescent current (I_Q), while still providing sufficient small-signal bandwidth to be usable

in most applications. The quiescent current of the INA186 is only 48 µA (typical), while providing a small-signal

bandwidth of 35 kHz in a gain of 100. The low I_Qand good bandwidth allow the device to be used in many

portable electronic systems without excessive drain on the battery. Because many applications only need to

periodically monitor current, the INA186 features an enable pin that turns off the device until needed. When in

the disabled state, the INA186 typically draws 10 nA of total supply current.

7.3.4 Bidirectional Current Monitoring

The INA186 devices that feature a REF pin can sense current flow through a sense resistor in both directions.

The bidirectional current-sensing capability is achieved by applying a voltage at the REF pin to offset the output

voltage. A positive differential voltage sensed at the inputs results in an output voltage that is greater than the

applied reference voltage. Likewise, a negative differential voltage at the inputs results in output voltage that

is less than the applied reference voltage. Use Equation 1 to calculate the output voltage of the current-sense

amplifier.

V_OUT= I_LOADì R_SENSEìGAIN + V

(

)

REF

(1)

where

•

I_LOADis the load current to be monitored.

R_SENSEis the current-sense resistor.

GAIN is the gain option of the selected device.

V_REFis the voltage applied to the REF pin.

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7.3.5 High-Side and Low-Side Current Sensing

The INA186 supports input common-mode voltages from –0.2 V to +40 V. Because of the internal topology,

the common-mode range is not restricted by the power-supply voltage (V_S). With the ability to operate with

common-mode voltages greater or less than V_S, Figure 7-1 shows an example on how the INA186 can be used

in high-side and low-side current-sensing applications.

Bus Supply

up to +40 V

IN+

High-Side Sensing

R_SENSE

Common-mode voltage (V_CM

is bus-voltage dependent.

)

INœ

LOAD

IN+

Low-Side Sensing

Common-mode voltage (V_CM

is always near ground and is

)

R_SENSE

isolated from bus-voltage spikes.

INœ

Figure 7-1. High-Side and Low-Side Sensing Connections

7.3.6 High Common-Mode Rejection

The INA186 uses a capacitively coupled amplifier on the front end. Therefore, dc common-mode voltages are

blocked from downstream circuits, resulting in very high common-mode rejection. Typically, the common-mode

rejection of the INA186 is approximately 150 dB. The ability to reject changes in the dc common-mode voltage

allows the INA186 to monitor both high-voltage and low-voltage rail currents with very little change in the offset

voltage.

7.3.7 Rail-to-Rail Output Swing

The INA186 allows linear current-sensing operation with the output close to the supply rail and ground. The

maximum specified output swing to the positive rail is V_S– 40 mV, and the maximum specified output swing

to GND is only GND + 1 mV. The close-to-rail output swing is useful to maximize the usable output range,

particularly when operating the device from a 1.8-V supply.

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7.4 Device Functional Modes

7.4.1 Normal Operation

The INA186 is in normal operation when the following conditions are met:

•

The power-supply voltage (V_S) is between 1.7 V and 5.5 V.

The common-mode voltage (V_CM) is within the specified range of –0.2 V to +40 V.

The maximum differential input signal times the gain plus V_REFis less than the positive swing voltage V_SP

The ENABLE pin is driven or connected to V_S.

The minimum differential input signal times the gain plus V_REFis greater than the zero load swing to GND,

V_ZL(see Rail-to-Rail Output Swing).

For devices that do not feature a REF pin that value for V_REFwill be zero. During normal operation, this device

produces an output voltage that is the amplified representation of the difference voltage from IN+ to IN– plus the

voltage applied to the REF pin.

7.4.2 Unidirectional Mode

This device can be configured to monitor current flowing in one direction (unidirectional) or in both directions

(bidirectional) depending on how the REF pin is connected. Figure 7-2 shows the most common case is

unidirectional where the output is set to ground when no current is flowing by connecting the REF pin to ground.

When the current flows from the bus supply to the load, the input voltage from IN+ to IN– increases and causes

the output voltage at the OUT pin to increase.

Bus Voltage

up to 40 V

V_S

1.7 V to 5.5 V

R_SENSE

C_BYPASS

0.1 µF

Load

I_SENSE

INA186

INœ

Capacitively

Coupled

Amplifier

OUT

V_OUT

REF

IN+

GND

Figure 7-2. Typical Unidirectional Application

The linear range of the output stage is limited by how close the output voltage can approach ground under

zero input conditions. The zero current output voltage of the INA186 is very small and for most unidirectional

applications the REF pin is simply grounded. However, if the measured current multiplied by the current sense

resistor and device gain is less than the zero current output voltage, then bias the REF pin to a convenient value

above the zero current output voltage to get the output into the linear range of the device. To limit common-mode

rejection errors, buffer the reference voltage connected to the REF pin.

A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, V_S. This

method results in the output voltage saturating at 40 mV less than the supply voltage when no differential input

voltage is present. This method is similar to the output saturated low condition with no differential input voltage

when the REF pin is connected to ground. The output voltage in this configuration only responds to currents

that develop negative differential input voltage relative to the device IN– pin. Under these conditions, when

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the negative differential input signal increases, the output voltage moves downward from the saturated supply

voltage. The voltage applied to the REF pin must not exceed V_S.

Another use for the REF pin in unidirectional operation is to level shift the output voltage. Figure 7-3 shows an

application where the device ground is set to a negative voltage so currents biased to negative supplies, as

seen in optical networking cards, can be measured. The GND of the INA186 can be set to negative voltages,

as long as the inputs do not violate the common-mode range specification and the voltage difference between

VS and GND does not exceed 5.5 V. In this example, the output of the INA186 is fed into a positive-biased

analog-to-digital converter (ADC). By grounding the REF pin, the voltages at the output will be positive and not

damage the ADC. To make sure the output voltage never goes negative, the supply sequencing must be the

positive supply first, followed by the negative supply.

+ 1.8 V

-3.3 V

C_BYPASS

0.1 µF

R_SENSE

Load

INA186

IN-

Capacitively

Coupled

Amplifier

OUT

ADC

REF

IN+

GND

- 3.3 V

Figure 7-3. Using the REF Pin to Level-Shift Output Voltage

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7.4.3 Bidirectional Mode

The INA186 is a bidirectional current-sense amplifier capable of measuring currents through a resistive shunt

in two directions. This bidirectional monitoring is common in applications that include charging and discharging

operations where the current flowing through the resistor can change directions.

Bus Voltage

up to 40 V

V_S

C_BYPASS

0.1 µF

R_SENSE

1.7 V to 5.5 V

Load

I_SENSE

INA186

INœ

Reference

Voltage

Capacitively

Coupled

Amplifier

OUT

V_OUT

REF

IN+

GND

Figure 7-4. Bidirectional Application

By applying a voltage to the REF pin, Figure 7-4 shows how you can measure this current flowing in both

directions. The voltage applied to REF (V_REF) sets the output state that corresponds to the zero-input level state.

The output then responds by increasing above V_REFfor positive differential signals (relative to the IN– pin) and

responds by decreasing below V_REFfor negative differential signals. This reference voltage applied to the REF

pin can be set anywhere between 0 V to V_S. For bidirectional applications, V_REFis typically set at V_S/2 for equal

signal range in both current directions. In some cases, V_REFis set at a voltage other than V_S/2; for example,

when the bidirectional current and corresponding output signal do not need to be symmetrical.

7.4.4 Input Differential Overload

If the differential input voltage (V_IN+– V_IN–) times gain exceeds the voltage swing specification, the INA186

drives its output as close as possible to the positive supply or ground, and does not provide accurate

measurement of the differential input voltage. If this input overload occurs during normal circuit operation, then

reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this

mode of operation. If a differential overload occurs in a time-limited fault event, then the output of the INA186

returns to the expected value approximately 80 µs after the fault condition is removed.

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7.4.5 Shutdown

The INA186 features an active-high ENABLE pin that shuts down the device when pulled to ground. When

the device is shut down, the quiescent current is reduced to 10 nA (typical), and the output goes to a high-

impedance state. In a battery-powered application, the low quiescent current extends the battery lifetime when

the current measurement is not needed. When the ENABLE pin is driven to the supply voltage, the device turns

back on. The typical output settling time when enabled is 130 µs.

The output of the INA186 goes to a high-impedance state when disabled. Figure 7-5 shows how to connect

multiple outputs of the INA186 together to a single ADC or measurement device.

When connected in this way, enable only one INA186 at a time, and make sure all devices have the same supply

voltage.

R_SENSE

Bus Voltage1

upto to +40 V

Supply Voltage

1.7 V to 5.5 V

LOAD

0.1 ꢀF

GPIO1

ENABLE

INœ

Microcontroller

ADC

OUT

INA186

IN+

GPIO2

REF

GND

R_SENSE

Bus Voltage2

upto to +40 V

Supply Voltage

1.7 V to 5.5 V

LOAD

0.1 ꢀF

ENABLE

INœ

OUT

INA186

IN+

REF

GND

Figure 7-5. Multiplexing Multiple Devices With the ENABLE Pin

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8 Application and Implementation

Note

Information in the following applications sections is not part of the TI component specification,

and TI does not warrant its accuracy or completeness. TI’s customers are responsible for

determining suitability of components for their purposes, as well as validating and testing their design

implementation to confirm system functionality.

8.1 Application Information

The INA186 amplifies the voltage developed across a current-sensing resistor as current flows through the

resistor to the load or ground. The high common-mode rejection of the INA186 makes it usable over a wide

range of voltage rails while still maintaining an accurate current measurement.

8.1.1 Basic Connections

Figure 8-1 shows the basic connections of the INA186. Place the device as close as possible to the current

sense resistor and connect the input pins (IN+ and IN–) to the current sense resistor through kelvin connections.

If present, the ENABLE pin must be controlled externally or connected to VS if not used.

Supply Voltage

1.7 V to 5.5 V

R_SENSE

Bus Voltage

œ0.2 V to +40 V

LOAD

0.1 …F

0.5 nA

(typ)

0.5 nA

(typ)

ENABLE⁽¹⁾

INœ

OUT

ADC

Microcontroller

INA186

IN+

REF⁽²⁾

GND

(1) The ENABLE pin is available only

in the DDF and YFD packages.

(2) The REF pin is available only in

the DDF and DCK packages.

A. To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect the REF pin to the ADC

reference input. When driving SAR ADCs, filter or buffer the output of the INA186 before connecting directly to the ADC.

Figure 8-1. Basic Connections

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8.1.2 R_SENSEand Device Gain Selection

The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large

as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow

and reduces the error contribution of the offset voltage. However, there are practical limits as to how large the

current-sense resistor can be in a given application because of the resistor size and maximum allowable power

dissipation. Equation 2 gives the maximum value for the current-sense resistor for a given power dissipation

budget:

PD_MAX

R_SENSE

I_MAX

(2)

where:

•

PD_MAXis the maximum allowable power dissipation in R_SENSE

I_MAXis the maximum current that will flow through R_SENSE

An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply

voltage, V_S, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly

passed to the output, both positive and negative output swing limitations must be examined. Equation 3 provides

the maximum values of R_SENSEand GAIN to keep the device from exceeding the positive swing limitation.

I_MAXìR_SENSEìGAIN < V_SP- V_REF

(3)

where:

•

I_MAXis the maximum current that will flow through R_SENSE

GAIN is the gain of the current-sense amplifier.

V_SPis the positive output swing as specified in the data sheet.

V_REFis the externally applied voltage on the REF pin. This voltage is zero for devices without a REF pin.

To avoid positive output swing limitations when selecting the value of R_SENSE, there is always a trade-off

between the value of the sense resistor and the gain of the device under consideration. If the sense resistor

selected for the maximum power dissipation is too large, then it is possible to select a lower-gain device in order

to avoid positive swing limitations.

The negative swing limitation places a limit on how small the sense resistor value can be for a given application.

Equation 4 provides the limit on the minimum value of the sense resistor.

I_MINìR_SENSEìGAIN > V_SN- V_REF

(4)

where:

•

I_MINis the minimum current that will flow through R_SENSE

GAIN is the gain of the current-sense amplifier.

V_SNis the negative output swing of the device (see Rail-to-Rail Output Swing).

V_REFis the externally applied voltage on the REF pin. This voltage is zero for devices without a REF pin.

In addition to adjusting R_SENSEand the device gain, the voltage applied to the REF pin can be slightly increased

above GND to avoid negative swing limitations.

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8.1.3 Signal Conditioning

When performing accurate current measurements in noisy environments, the current-sensing signal is often

filtered. The INA186 features low input bias currents. Therefore, adding a differential mode filter to the input

without sacrificing the current-sense accuracy is possible. Filtering at the input is advantageous because this

action attenuates differential noise before the signal is amplified. Figure 8-2 provides an example of how to use a

filter on the input pins of the device.

Bus Voltage

up to 40 V

V_S

1.7 V to 5.5 V

C_BYPASS

0.1 µF

R_SENSE

Load

Capacitively Coupled

Amplifier

INA186

R_F

INœ

C_F

f_3dB

OUT

V_OUT

R_DIFF

4pR_FC_F

R_F

REF

IN+

GND

Figure 8-2. Filter at the Input Pins

Figure 8-2 shows the differential input impedance (R_DIFF) limits the maximum value for R_F. Figure 8-3 shows the

value of R_DIFFis a function of the device temperature.

A2, A3, A4, A5

-50

-25

100

125

150

Temperature (èC)

D115

Figure 8-3. Differential Input Impedance vs. Temperature

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As the voltage drop across the sense resistor (V_SENSE) increases, the amount of voltage dropped across the

input filter resistors (R_F) also increases. The increased voltage drop results in additional gain error. The error

caused by these resistors is calculated by the resistor divider equation shown in Equation 5.

≈

∆

’

R_DIFF

Error(%) = 1-

ì100

∆

◊

R_SENSE+ R_DIFF+ 2ìR

(

)

(5)

where:

•

R_DIFFis the differential input impedance.

R_Fis the added value of the series filter resistance.

The input stage of the INA186 uses a capacitive feedback amplifier topology in order to achieve high dc

precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10

mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INA186, even

though the transients are greater than the device bandwidth. Use a differential input filter in these applications to

minimize disturbances at the INA186 output.

The high input impedance and low bias current of the INA186 provide flexibility in the input filter design without

impacting the accuracy of current measurement. For example, set R_F= 100 Ω and C_F= 22 nF to achieve

a low-pass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted high-

frequency signals at the input without severely impacting the current sensing bandwidth or precision. If a lower

corner frequency is desired, increase the value of C_F.

Filtering the input filters out differential noise across the sense resistor. If high-frequency, common-mode noise

is a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and

common mode noise, as well as internally generated noise from the device. The value for the resistance of the

RC filter is limited by the impedance of the load. Any current drawn by the load manifests as an external voltage

drop from the INA186 OUT pin to the load input. To select the optimal values for the output filter, use Output

Impedance vs. Frequency and see the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using

ZOUT application report

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8.1.4 Common-Mode Voltage Transients

With a small amount of additional circuitry, the INA186 can be used in circuits subject to transients that exceed

the absolute maximum voltage ratings. The most simple way to protect the inputs from negative transients is to

add resistors in series with the IN– and IN+ pins. Use resistors that are 1 kΩ or less, and limit the current in the

ESD structures to less than 5 mA. For example, using 1-kΩ resistors in series with the INA186 allows voltages

as low as –5 V, while limiting the ESD current to less than 5 mA. Use the circuits shown in Figure 8-4 and Figure

8-5 if protection from high-voltage or more-negative, common-voltage transients is needed. When implementing

these circuits, use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs);

any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a

working impedance for the Zener diode (see Figure 8-4). Keep these resistors as small as possible; most often,

use around 100 Ω. See Signal Conditioning for information on how larger values can be used with an effect on

gain. This circuit limits only short-term transients; therefore, many applications are satisfied with a 100-Ω resistor

along with conventional Zener diodes of the lowest acceptable power rating. This combination uses the least

amount of board space. These diodes can be found in packages as small as

SOT-523 or SOD-523.

Bus Voltage

up to 40 V

V_S

1.7 V to 5.5 V

C_BYPASS

0.1 µF

R_SENSE

Load

INA186

R_PROTECT

INœ

< 1 kW

Capacitively

Coupled

Amplifier

OUT

V_OUT

R_PROTECT

REF

IN+

< 1 kW

GND

Figure 8-4. Transient Protection Using Dual Zener Diodes

In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power

transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back

diodes between the device inputs, as shown in Figure 8-5. The most space-efficient solutions are dual, series-

connected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in Figure 8-4 and

Figure 8-5, the total board area required by the INA186 with all protective components is less than that of an

SO-8 package, and only slightly greater than that of an VSSOP-8 package.

Bus Voltage

up to 40 V

V_S

1.7 V to 5.5 V

C_BYPASS

0.1 µF

R_SENSE

Load

INA186

R_PROTECT

INœ

< 1 kW

Capacitively

Coupled

Amplifier

OUT

Transorb

V_OUT

R_PROTECT

REF

IN+

< 1 kW

GND

Figure 8-5. Transient Protection Using a Single Transzorb and Input Clamps

For more information, see the Current Shunt Monitor With Transient Robustness reference design.

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8.2 Typical Applications

The low input bias current of the INA186 allows accurate monitoring of small-value currents. To accurately

monitor currents in the microamp range, increase the value of the sense resistor to increase the sense

voltage so that the error introduced by the offset voltage is small. Figure 8-6 shows the circuit configuration

for monitoring low-value currents. As a result of the differential input impedance of the INA186, limit the value of

R_SENSEto 1 kΩ or less for best accuracy.

R_SENSE≤ 1 kO

5 V

12 V

LOAD

0.1 ꢀF

INœ

OUT

INA186

IN+

REF

GND

Figure 8-6. Microamp Current Measurement

8.2.1 Design Requirements

Table 8-1 lists the design requirements for the circuit shown in Figure 8-6.

Table 8-1. Design Parameters

DESIGN PARAMETER

EXAMPLE VALUE

Power-supply voltage (V_S)

5 V

12 V

Bus supply rail (V_CM

)

Minimum sense current (I_MIN

)

1 µA

Maximum sense current (I_MAX

Device gain (GAIN)

)

150 µA

25 V/V

0 V

Reference voltage (V_REF

)

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8.2.2 Detailed Design Procedure

The maximum value of the current-sense resistor is calculated based on choice of gain, value of the maximum

current the be sensed (I_MAX), and the power-supply voltage (V_S). When operating at the maximum current, the

output voltage must not exceed the positive output swing specification, V_SP. Using Equation 6, for the given

design parameters the maximum value for R_SENSEis calculated to be 1.321 kΩ.

V_SP

R_SENSE

I_MAXìGAIN

(6)

However, because this value exceeds the maximum recommended value for R_SENSE, a resistance value of 1

kΩ must be used. When operating at the minimum current value, I_MINthe output voltage must be greater than

the swing to GND (V_SN), specification. For this example, the output voltage at the minimum current is calculated

using Equation 7 to be 25 mV, which is greater than the value for V_SN

V_OUTMIN= I_MINìR_SENSEìGAIN

(7)

8.2.3 Application Curve

Figure 8-7 shows the output of the device under the conditions given in Table 8-1 and with R_SENSE= 1 kΩ.

3.5

2.5

1.5

0.5

Input Current (µA)

100

125

150

D031

Figure 8-7. Typical Application DC Transfer Function

9 Power Supply Recommendations

The input circuitry of the INA186 accurately measures beyond the power-supply voltage, V_S. For example, V_S

can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 40 V. However, the output voltage

range of the OUT pin is limited by the voltage on the VS pin. The INA186 also withstands the full differential input

signal range up to 40 V at the IN+ and IN– input pins, regardless of whether the device has power applied at the

VS pin. There is no sequencing requirement for V_Sand V_IN+or V_IN–

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10 Layout

10.1 Layout Guidelines

•

Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique

makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing

of the current-sensing resistor commonly results in additional resistance present between the input pins.

Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can

cause significant measurement errors.

•

Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.

The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added

to compensate for noisy or high-impedance power supplies.

When routing the connections from the current-sense resistor to the device, keep the trace lengths as short

as possible. The input filter capacitor C_Fshould be placed as close as possible to the input pins of the device.

10.2 Layout Examples

Current Sense

Output

Connect REF to GND for

Unidirectional Measurement

or to External Reference for

Bidirectional Measurement

n low

Note: R_Fand C_Fare optional i

noise/ripple environments

R_F

C_F

OUT

IN-

REF

GND

INA186

VIA to Ground Plane

R_SHUNT

Supply Voltage

(1.7 V to 5.5 V)

IN+

C_BYPASS

R_F

VIA to Ground Plane

Figure 10-1. Recommended Layout for SC70 (DCK) Package

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n low

Note: R_Fand C_Fare optional i

noise/ripple environments

R_F

C_F

C_BYPASS

Supply Voltage

(1.7 V to 5.5 V)

IN-

R_SHUNT

TI Device

IN+

ENABLE

Connect to VS

if not used

REF

N.C.

OUT

R_F

IN+

GND

VIA to Ground Plane

Current Sense

Output

Connect REF to GND for

Unidirectional Measurement

or to External Reference for

Bidirectional Measurement

Figure 10-2. Recommended Layout for SOT-23 (DDF) Package

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R_SHUNT

(1)

R_F

(1)

C_F

INœ

IN+

Connect to Supply

(1.7 V to 5.5 V)

VIA to Ground

Plane

GND

C_BYPASS

ENABLE

OUT

Current

Sense Output

Connect to Control or VS

(Do not float)

Figure 10-3. Recommended Layout DSBGA (YFD) Package

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11 Device and Documentation Support

11.1 Documentation Support

11.1.1 Related Documentation

For related documentation see the following: Texas Instruments, INA186EVM user's guide

11.2 Receiving Notification of Documentation Updates

To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on

Subscribe to updates to register and receive a weekly digest of any product information that has changed. For

change details, review the revision history included in any revised document.

11.3 Support Resources

TI E2E^™support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

11.4 Trademarks

TI E2E^™is a trademark of Texas Instruments.

All trademarks are the property of their respective owners.

11.5 Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled

with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may

be more susceptible to damage because very small parametric changes could cause the device not to meet its published

specifications.

11.6 Glossary

TI Glossary

This glossary lists and explains terms, acronyms, and definitions.

12 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

Submit Document Feedback

Product Folder Links: INA186

INA186

www.ti.com

SBOS318B – APRIL 2019 – REVISED JULY 2021

PACKAGE OUTLINE

YFD0006-C02

DSBGA - 0.4 mm max height

SCALE 14.000

DIE SIZE BALL GRID ARRAY

1.20

1.14

BALL A1

CORNER

0.80

0.73

0.4 MAX

SEATING PLANE

0.175

0.125

BALL TYP

0.8 TYP

SYMM

0.4

TYP

0.285

0.185

SYMM

0.015

C A B

0.4

TYP

4224626/B 02/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

www.ti.com

Submit Document Feedback

Product Folder Links: INA186

INA186

www.ti.com

SBOS318B – APRIL 2019 – REVISED JULY 2021

EXAMPLE BOARD LAYOUT

YFD0006-C02

DSBGA - 0.4 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

6X ( 0.225)

(0.4) TYP

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:50X

0.05 MAX

0.05 MIN

(

0.225)

METAL

(

0.225)

SOLDER MASK

OPENING

EXPOSED

METAL

EXPOSED

METAL

METAL UNDER

SOLDER MASK

OPENING

NON-SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK

DEFINED

SOLDER MASK DETAILS

NOT TO SCALE

4224626/B 02/2019

NOTES: (continued)

3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.

Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).

www.ti.com

Submit Document Feedback

Product Folder Links: INA186

INA186

www.ti.com

SBOS318B – APRIL 2019 – REVISED JULY 2021

EXAMPLE STENCIL DESIGN

YFD0006-C02

DSBGA - 0.4 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

(R0.05) TYP

6X ( 0.25)

SYMM

(0.4) TYP

METAL

TYP

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

SCALE:50X

4224626/B 02/2019

NOTES: (continued)

www.ti.com

Submit Document Feedback

Product Folder Links: INA186

PACKAGE OPTION ADDENDUM

www.ti.com

12-Aug-2021

PACKAGING INFORMATION

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

INA186A1IDCKR

INA186A1IDCKT

INA186A1IDDFR

INA186A1IDDFT

INA186A1IYFDR

INA186A2IDCKR

INA186A2IDCKT

INA186A2IDDFR

INA186A2IDDFT

INA186A2IYFDR

INA186A3IDCKR

INA186A3IDCKT

INA186A3IDDFR

INA186A3IDDFT

INA186A3IYFDR

INA186A4IDCKR

INA186A4IDCKT

INA186A4IDDFR

INA186A4IDDFT

INA186A4IYFDR

ACTIVE

SC70

DCK

DDF

YFD

DCK

DDF

YFD

DCK

DDF

YFD

DCK

DDF

YFD

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

250 RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

Level-1-260C-UNLIM

Level-2-260C-1 YEAR

Level-1-260C-UNLIM

Level-2-260C-1 YEAR

Level-1-260C-UNLIM

Level-2-260C-1 YEAR

Level-1-260C-UNLIM

-40 to 125

1E7

NIPDAU

SNAGCU

NIPDAU

SNAGCU

NIPDAU

SNAGCU

NIPDAU

SNAGCU

1E7

ACTIVE SOT-23-THIN

1ZLW

1IJ

ACTIVE

DSBGA

SC70

3000 RoHS & Green

1E8

SC70

250

3000 RoHS & Green

250 RoHS & Green

RoHS & Green

1E8

ACTIVE SOT-23-THIN

1ZMW

1IK

ACTIVE

DSBGA

SC70

3000 RoHS & Green

1E9

SC70

250

3000 RoHS & Green

250 RoHS & Green

RoHS & Green

1E9

ACTIVE SOT-23-THIN

1ZNW

1IL

ACTIVE

DSBGA

SC70

3000 RoHS & Green

1EA

SC70

250

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

RoHS & Green

1EA

ACTIVE SOT-23-THIN

1ZOW

1IM

ACTIVE

DSBGA

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

12-Aug-2021

Orderable Device

Status Package Type Package Pins Package

Eco Plan

Lead finish/

Ball material

MSL Peak Temp

Op Temp (°C)

Device Marking

Samples

Drawing

Qty

(1)

(2)

(3)

(4/5)

(6)

INA186A5IDCKR

INA186A5IDCKT

INA186A5IDDFR

INA186A5IDDFT

INA186A5IYFDR

ACTIVE

SC70

DCK

DDF

YFD

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

250 RoHS & Green

3000 RoHS & Green

NIPDAU

Level-2-260C-1 YEAR

Level-1-260C-UNLIM

-40 to 125

1EB

NIPDAU

SNAGCU

1EB

ACTIVE SOT-23-THIN

1ZPW

1IN

ACTIVE

DSBGA

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

⁽²⁾RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance

do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may

reference these types of products as "Pb-Free".

RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.

Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based

flame retardants must also meet the <=1000ppm threshold requirement.

⁽³⁾MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

⁽⁴⁾There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

⁽⁵⁾Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation

of the previous line and the two combined represent the entire Device Marking for that device.

(6)

Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two

lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information

provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and

Addendum-Page 2

PACKAGE OPTION ADDENDUM

www.ti.com

12-Aug-2021

continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.

TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

OTHER QUALIFIED VERSIONS OF INA186 :

Automotive : INA186-Q1

•

NOTE: Qualified Version Definitions:

Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects

•

Addendum-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

13-Aug-2021

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

INA186A1IDCKR

INA186A1IDCKT

INA186A1IDDFR

SC70

DCK

DDF

3000

250

178.0

180.0

9.0

8.4

2.4

3.2

2.5

3.2

1.2

1.4

4.0

8.0

SOT-

3000

23-THIN

INA186A1IYFDR

INA186A2IDCKR

INA186A2IDCKT

INA186A2IDDFR

DSBGA

SC70

YFD

DCK

DDF

3000

250

178.0

180.0

8.4

9.0

8.4

0.84

2.4

3.2

1.27

2.5

3.2

0.46

1.2

1.4

4.0

8.0

SC70

SOT-

3000

23-THIN

INA186A2IDDFT

SOT-

DDF

250

180.0

8.4

3.2

1.4

4.0

8.0

23-THIN

INA186A2IYFDR

INA186A3IDCKR

INA186A3IDCKT

INA186A3IDDFR

DSBGA

SC70

YFD

DCK

DDF

3000

250

178.0

180.0

8.4

9.0

8.4

0.84

2.4

3.2

1.27

2.5

3.2

0.46

1.2

1.4

4.0

8.0

SC70

SOT-

3000

23-THIN

INA186A3IDDFT

INA186A3IYFDR

SOT-

23-THIN

DDF

YFD

250

180.0

178.0

8.4

3.2

1.4

4.0

8.0

DSBGA

3000

0.84

1.27

0.46

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

13-Aug-2021

Device

Package Package Pins

Type Drawing

SPQ

Reel

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

INA186A4IDCKR

INA186A4IDCKT

INA186A4IDDFR

SC70

DCK

DDF

3000

250

178.0

180.0

9.0

8.4

2.4

3.2

2.5

3.2

1.2

1.4

4.0

8.0

SOT-

3000

23-THIN

INA186A4IYFDR

INA186A5IDCKR

INA186A5IDCKT

INA186A5IDDFR

DSBGA

SC70

YFD

DCK

DDF

3000

250

178.0

180.0

8.4

9.0

8.4

0.84

2.4

3.2

1.27

2.5

3.2

0.46

1.2

1.4

4.0

8.0

SC70

SOT-

3000

23-THIN

INA186A5IDDFT

INA186A5IYFDR

SOT-

23-THIN

DDF

YFD

250

180.0

178.0

8.4

3.2

1.4

4.0

8.0

DSBGA

3000

0.84

1.27

0.46

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

INA186A1IDCKR

INA186A1IDCKT

INA186A1IDDFR

INA186A1IYFDR

INA186A2IDCKR

INA186A2IDCKT

SC70

DCK

DDF

YFD

DCK

3000

250

180.0

210.0

220.0

180.0

185.0

220.0

180.0

18.0

35.0

18.0

SOT-23-THIN

DSBGA

SC70

3000

250

SC70

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

13-Aug-2021

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

INA186A2IDDFR

INA186A2IDDFT

INA186A2IYFDR

INA186A3IDCKR

INA186A3IDCKT

INA186A3IDDFR

INA186A3IDDFT

INA186A3IYFDR

INA186A4IDCKR

INA186A4IDCKT

INA186A4IDDFR

INA186A4IYFDR

INA186A5IDCKR

INA186A5IDCKT

INA186A5IDDFR

INA186A5IDDFT

INA186A5IYFDR

SOT-23-THIN

DSBGA

DDF

YFD

DCK

DDF

YFD

DCK

DDF

YFD

DCK

DDF

YFD

3000

250

210.0

220.0

180.0

210.0

220.0

180.0

210.0

220.0

180.0

210.0

220.0

185.0

220.0

180.0

185.0

220.0

180.0

185.0

220.0

180.0

185.0

220.0

35.0

18.0

35.0

18.0

35.0

18.0

35.0

3000

250

SC70

SOT-23-THIN

DSBGA

3000

250

3000

250

SC70

SOT-23-THIN

DSBGA

3000

250

SC70

SOT-23-THIN

DSBGA

3000

250

3000

Pack Materials-Page 3

PACKAGE OUTLINE

DDF0008A

SOT-23 - 1.1 mm max height

PLASTIC SMALL OUTLINE

2.95

2.65

SEATING PLANE

TYP

PIN 1 ID

AREA

0.1 C

6X 0.65

2.95

2.85

NOTE 3

1.95

0.4

0.2

0.1

C A

1.65

1.55

1.1 MAX

0.20

0.08

TYP

SEE DETAIL A

0.25

GAGE PLANE

0.1

0.0

0 - 8

0.6

0.3

DETAIL A

TYPICAL

4222047/B 11/2015

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed 0.15 mm per side.

www.ti.com

EXAMPLE BOARD LAYOUT

DDF0008A

SOT-23 - 1.1 mm max height

PLASTIC SMALL OUTLINE

8X (1.05)

SYMM

8X (0.45)

SYMM

6X (0.65)

(R0.05)

TYP

(2.6)

LAND PATTERN EXAMPLE

SCALE:15X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

SOLDER MASK

DEFINED

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4222047/B 11/2015

NOTES: (continued)

4. Publication IPC-7351 may have alternate designs.

5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

DDF0008A

SOT-23 - 1.1 mm max height

PLASTIC SMALL OUTLINE

8X (1.05)

SYMM

(R0.05) TYP

8X (0.45)

SYMM

6X (0.65)

(2.6)

SOLDER PASTE EXAMPLE

BASED ON 0.125 mm THICK STENCIL

SCALE:15X

4222047/B 11/2015

NOTES: (continued)

6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

7. Board assembly site may have different recommendations for stencil design.

www.ti.com

PACKAGE OUTLINE

YFD0006

DSBGA - 0.4 mm max height

SCALE 14.000

DIE SIZE BALL GRID ARRAY

BALL A1

CORNER

0.4 MAX

SEATING PLANE

0.05 C

0.175

0.125

SYMM

0.8

TYP

SYMM

0.4

TYP

0.25

0.15

0.015

C A B

0.4

TYP

4219510/A 11/2019

NOTES:

1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing

per ASME Y14.5M.

2. This drawing is subject to change without notice.

www.ti.com

EXAMPLE BOARD LAYOUT

YFD0006

DSBGA - 0.4 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

6X ( 0.225)

(0.4) TYP

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:40X

0.05 MAX

0.05 MIN

(

0.225)

METAL

METAL UNDER

SOLDER MASK

EXPOSED

METAL

EXPOSED

METAL

(

0.225)

SOLDER MASK

OPENING

SOLDER MASK

OPENING

NON-SOLDER MASK

SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAILS

NOT TO SCALE

4219510/A 11/2019

NOTES: (continued)

3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.

Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).

www.ti.com

EXAMPLE STENCIL DESIGN

YFD0006

DSBGA - 0.4 mm max height

DIE SIZE BALL GRID ARRAY

(0.4) TYP

(R0.05) TYP

6X ( 0.25)

(0.4)

TYP

SYMM

METAL

TYP

SYMM

SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL

SCALE:40X

4219510/A 11/2019

NOTES: (continued)

4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.

www.ti.com

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, or other requirements. These resources are subject to change without notice. TI grants you

permission to use these resources only for development of an application that uses the TI products described in the resource. Other

reproduction and display of these resources is prohibited. No license is granted to any other TI intellectual property right or to any third party

intellectual property right. TI disclaims responsibility for, and you will fully indemnify TI and its representatives against, any claims, damages,

costs, losses, and liabilities arising out of your use of these resources.

TI’s products are provided subject to TI’s Terms of Sale (https:www.ti.com/legal/termsofsale.html) or other applicable terms available either

on ti.com or provided in conjunction with such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s

applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

INA186A3IYFDR [TI]

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