INA190A5IDCKT [TI]
具有皮安级 IB 和 ENABLE 引脚的 40V 双向超精密电流检测放大器 | DCK | 6 | -40 to 125;
| 型号： | INA190A5IDCKT |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有皮安级 IB 和 ENABLE 引脚的 40V 双向超精密电流检测放大器 | DCK | 6 | -40 to 125 放大器 |
| 文件： | 总46页 (文件大小：1710K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
具有使能端的 INA190 双向、低功耗、零漂移、宽动态范围
精密电流检测放大器
1 特性
3 说明
1
•
低输入偏置电流：500pA（典型值）
（支持微安级电流测量）
INA190 是一款低功耗、电压输出、电流分流监控器
（也称为电流检测放大器）。此器件常用于过流保护、
针对系统优化的精密电流测量或闭环反馈电路。
INA190 可在独立于电源电压的 –0.2V 至 +40V 的共模
电压下检测分流器上的压降。
•
低功耗：
–
–
–
低电源电压 VS：1.7V 至 5.5V
低关断电流：100nA（最大值）
低静态电流：25°C 下为 50μA（典型值）
该器件的低输入偏置电流允许使用较大的电流检测电阻
器，从而能够提供微安级的精确电流测量。零漂移架构
的低失调电压扩展了电流测量的动态范围。此功能可支
持较小的感应电阻器在具有较低功率损耗的同时，仍提
供精确的电流测量。
•
精度：
–
–
–
–
–
共模抑制比：132dB（最小值）
增益误差：±0.2%（A1 器件）
增益漂移：7ppm/°C（最大值）
失调电压 VOS：±15μV（最大值）
温漂：80nV/°C（最大值）
INA190 由 1.7V 至 5.5V 的单电源供电，在启用时消耗
的最大电源电流为 65µA；而在禁用时仅为 0.1µA。提
供五个固定增益选项：25V/V、50V/V、100V/V、
200V/V 或 500V/V。该器件的额定工作温度范围为
–40°C 至 +125°C，并采用 UQFN、SC70 和 SOT-23
封装。
•
•
•
宽共模电压：–0.2V 至 +40V
双向电流检测功能
增益选项：
–
–
–
–
–
INA190A1：25V/V
INA190A2：50V/V
INA190A3：100V/V
INA190A4：200V/V
INA190A5：500V/V
器件信息(1)
器件型号
封装
SC70 (6)
封装尺寸（标称值）
2.00mm x 1.25mm
1.60mm × 2.90mm
1.80mm x 1.40mm
INA190
SOT-23 (8)
UQFN (10)
2 应用
•
•
•
•
•
•
标准笔记本电脑
(1) 如需了解所有可用封装，请参阅数据表末尾的封装选项附录。
智能手机
消费类电池充电器
基带单元 (BBU)
商用网络和服务器 PSU
电池测试
典型应用
Supply Voltage
1.7 V to 5.5 V
RSENSE
Bus Voltage
œ0.2 V to +40 V
LOAD
0.1 …F
0.5 nA
(typ)
0.5 nA
(typ)
ENABLE(1)
VS
INœ
OUT
ADC
Microcontroller
INA190
IN+
REF
GND
(1) The ENABLE pin is available only
in the DDF and RSW packages.
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SBOS863
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
目录
7.4 Device Functional Modes........................................ 16
Application and Implementation ........................ 20
8.1 Application Information............................................ 20
8.2 Typical Applications ................................................ 25
Power Supply Recommendations...................... 26
1
2
3
4
5
6
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
Detailed Description ............................................ 13
7.1 Overview ................................................................. 13
7.2 Functional Block Diagram ....................................... 13
7.3 Feature Description................................................. 14
8
9
10 Layout................................................................... 27
10.1 Layout Guidelines ................................................. 27
10.2 Layout Examples................................................... 27
11 器件和文档支持 ..................................................... 30
11.1 文档支持................................................................ 30
11.2 接收文档更新通知 ................................................. 30
11.3 支持资源................................................................ 30
11.4 商标....................................................................... 30
11.5 静电放电警告......................................................... 30
11.6 Glossary................................................................ 30
12 机械、封装和可订购信息....................................... 30
7
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision C (April 2019) to Revision D
Page
•
•
已添加 向数据表添加了 DDF (SOT-23-8) 封装和相关内容..................................................................................................... 1
已更改 更改了增益漂移和温漂精度项目符号，以匹配电气特征 表中的数值........................................................................... 1
Changes from Revision B (September 2018) to Revision C
Page
•
•
•
•
•
•
已添加 向数据表添加了 DCK (SC70) 封装 ............................................................................................................................. 1
已更改 为清楚起见，更改了首页 ............................................................................................................................................ 1
已更改 为保持一致，将所有 VVS 示例更改为 VS..................................................................................................................... 1
已更改 section title from Output Signal Conditioning to Signal Conditioning and reworded section for clarity ................... 22
已更改 Figure 41, Differential Input Impedance vs Temperature, to reflect improved device performance......................... 22
已更改 location of Common-Mode Voltage Transients section from Power Supply Recommendations to Application
and Implementation .............................................................................................................................................................. 24
Changes from Revision A (June 2018) to Revision B
Page
•
已更改 将器件状态从“预告信息”更改为“生产数据”.................................................................................................................. 1
2
Copyright © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
5 Pin Configuration and Functions
DCK Package
6-Pin SC70
Top View
DDF Package
8-Pin Thin SOT-23
Top View
REF
GND
VS
1
2
3
6
5
4
OUT
INœ
VS
ENABLE
REF
1
2
3
4
8
7
6
5
INœ
IN+
NC
IN+
GND
OUT
Not to scale
Not to scale
RSW Package
10-Pin Thin UQFN
Top View
NC
NC
1
2
7
6
ENABLE
VS
Not to scale
Pin Functions
PIN
TYPE
DESCRIPTION
NAME
DCK
DDF
RSW
Enable pin. When this pin is driven to VS, the device is on and functions as a
current sense amplifier. When this pin is driven to GND, the device is off, the
supply current is reduced, and the output is placed in a high-impedance state.
This pin must be driven externally, or connected to VS if not used. DDF and RSW
packages only.
Digital
input
ENABLE
—
2
7
GND
IN–
2
5
4
8
9
4
Analog Ground
Current-sense amplifier negative input. For high-side applications, connect to load
Analog
input
side of sense resistor. For low-side applications, connect to ground side of sense
resistor.
Current-sense amplifier positive input. For high-side applications, connect to bus
voltage side of sense resistor. For low-side applications, connect to load side of
sense resistor.
Analog
input
IN+
NC
4
—
6
7
6
5
3
Not internally connected. Either float these pins or connect to any voltage
between GND and VS.
1, 2, 5
10
—
OUT pin. This pin provides an analog voltage output that is the gained up voltage
difference from the IN+ to the IN– pins, and is offset by the voltage applied to the
REF pin.
Analog
output
OUT
Analog Reference input. Enables bidirectional current sensing with an externally applied
input voltage.
REF
VS
1
3
3
1
8
6
Analog Power supply, 1.7 V to 5.5 V
Copyright © 2018–2019, Texas Instruments Incorporated
3
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VS
Supply voltage
6
V
(2)
Differential (VIN+) – (VIN–
)
–42
GND – 0.3
GND – 0.3
GND – 0.3
42
VIN+, VIN– Analog inputs
V
VIN+, VIN–, with respect to GND(3)
42
VENABLE
ENABLE
REF, OUT(3)
6
(VS) + 0.3
5
V
V
Input current into any pin(3)
Operating temperature
Junction temperature
Storage temperature
mA
°C
°C
°C
TA
–55
150
TJ
150
Tstg
–65
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN– pins, respectively.
(3) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
±3000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
V(ESD)
Electrostatic discharge
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
GND – 0.2
GND – 0.2
1.7
NOM
MAX
UNIT
V
VCM
Common-mode input range
Input pin voltage range
40
40
VIN+, VIN–
VS
V
Operating supply voltage
Reference pin voltage range
Operating free-air temperature
5.5
VS
V
VREF
TA
GND
V
–40
125
°C
6.4 Thermal Information
INA190
THERMAL METRIC(1)
DCK (SC70)
6 PINS
137.2
38.4
DDF (SOT23)
8 PINS
170.7
132.7
65.3
RSW (UQFN)
10 PINS
163.8
78.7
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
57.1
93.3
ΨJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
5.1
45.7
4.1
ΨJB
56.6
65.2
92.8
RθJC(bot)
N/A
N/A
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
4
Copyright © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, and VENABLE = VS (unless otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
Common-mode
rejection ratio
CMRR
VSENSE = 0 mV, VIN+ = –0.1 V to 40 V, TA = –40°C to +125°C
132
150
dB
VOS
Offset voltage, RTI(1) VS = 1.8 V, VSENSE = 0 mV
–3
10
±15
80
µV
dVOS/dT
Offset drift, RTI
VSENSE = 0 mV, TA = –40°C to +125°C
nV/°C
Power-supply
rejection ratio, RTI
PSRR
VSENSE = 0 mV, VS = 1.7 V to 5.5 V
–1
±5
3
µV/V
IIB
Input bias current
Input offset current
VSENSE = 0 mV
VSENSE = 0 mV
0.5
nA
nA
IIO
±0.07
OUTPUT
A1 devices
A2 devices
A3 devices
A4 devices
A5 devices
25
50
G
Gain
100
V/V
200
500
A1 devices
–0.04%
±0.2%
±0.3%
A2, A3, A4
devices
EG
Gain error
VOUT = 0.1 V to VS – 0.1 V
–0.06%
A5 devices
–0.08%
2
±0.4%
7
Gain error drift
TA = –40°C to +125°C
ppm/°C
Nonlinearity error
VOUT = 0.1 V to VS – 0.1 V
±0.01%
±2
A1 devices
A2 devices
A3 devices
±10
±6
±1
Reference voltage
rejection ratio
VREF = 100 mV to VS – 100 mV,
TA = –40°C to +125°C
RVRR
µV/V
nF
±0.5
±4
A4, A5
devices
±0.25
1
±3
Maximum capacitive
load
No sustained oscillation
VOLTAGE OUTPUT
Swing to VS power-
supply rail
VSP
VSN
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C
(VS) – 20
(VGND) + 0.05
(VGND) + 1
(VS) – 40
(VGND) + 1
(VGND) + 3
mV
mV
mV
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C,
VSENSE = –10 mV, VREF = 0 V
Swing to GND
A1, A2, A3
devices
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C, VSENSE = 0 mV,
VREF = 0 V
Zero current output
voltage
VZL
A4 devices
A5 devices
(VGND) + 2
(VGND) + 3
(VGND) + 4
(VGND) + 9
mV
mV
FREQUENCY RESPONSE
A1 devices, CLOAD = 10 pF
45
37
35
33
27
0.3
30
A2 devices, CLOAD = 10 pF
BW
Bandwidth
A3 devices, CLOAD = 10 pF
kHz
A4 devices, CLOAD = 10 pF
A5 devices, CLOAD = 10 pF
SR
tS
Slew rate
VS = 5.0 V, VOUT = 0.5 V to 4.5 V
From current step to within 1% of final value
V/µs
µs
Settling time
(1) RTI = referred-to-input.
Copyright © 2018–2019, Texas Instruments Incorporated
5
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
Electrical Characteristics (continued)
at TA = 25°C, VSENSE = VIN+ – VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2, and VENABLE = VS (unless otherwise noted)
PARAMETER
NOISE, RTI(1)
CONDITIONS
MIN
TYP
75
1
MAX
UNIT
Voltage noise density
nV/√Hz
ENABLE
IEN
Leakage input current 0 V ≤ VENABLE ≤ VS
100
6
nA
V
High-level input
voltage
VIH
0.7 × VS
0
Low-level input
voltage
VIL
0.3 × VS
V
VHYS
Hysteresis
300
1
mV
µA
Output leakage
disabled
IODIS
VS = 5.0 V, VOUT = 0 V to 5.0 V, VENABLE = 0 V
5
POWER SUPPLY
VS = 1.8 V, VSENSE = 0 mV
48
10
65
90
µA
µA
IQ
Quiescent current
VS = 1.8 V, VSENSE = 0 mV, TA = –40°C to +125°C
Quiescent current
disabled
IQDIS
VENABLE = 0 V, VSENSE = 0 mV
100
nA
6
版权 © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
6.6 Typical Characteristics
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
15
10
5
0
-5
-10
-15
-50
-25
0
25
50
75
100
125
150
Input Offset Voltage (mV)
D001
Temperature (èC)
D006
图 1. Input Offset Voltage Production Distribution
图 2. Offset Voltage vs Temperature
0.1
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
-0.1
-50
-25
0
25
50
75
100
125
150
D007
Temperature (èC)
Common-Mode Rejection Ratio (mV/V)
D012
图 4. Common-Mode Rejection Ratio vs Temperature
图 3. Common-Mode Rejection Production Distribution
D013
D014
Gain Error (%)
Gain Error (%)
A1 devices
A2, A3, and A4 devices
图 5. Gain Error Production Distribution
图 6. Gain Error Production Distribution
版权 © 2018–2019, Texas Instruments Incorporated
7
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
0.2
0.16
0.12
0.08
0.04
0
-0.04
-0.08
-0.12
-0.16
-0.2
-50
-25
0
25
50
75
100
125
150
D017
Temperature (èC)
D018
Gain Error (%)
A5 devices
图 7. Gain Error Production Distribution
图 8. Gain Error vs Temperature
60
50
40
30
20
10
0
140
120
100
80
60
40
20
0
A1
A2
A3
A4
A5
-10
-20
10
100
1k 10k
Frequency (Hz)
100k
1M
10
100
1k 10k
Frequency (Hz)
100k
1M
D019
D020
VS = 5 V
VS = 5 V
图 9. Gain vs Frequency
图 10. Power-Supply Rejection Ratio vs Frequency
Vs
160
140
120
100
80
-40°C
25°C
125°C
Vs-0.4
Vs-0.8
GND+0.8
GND+0.4
GND
60
40
0
1
2
3
4
5
6
7
Output Current (mA)
8
9
10 11
10
100
1k 10k
Frequency (Hz)
100k
1M
D010
D021
VS = 1.8 V
A3 devices
图 12. Output Voltage Swing vs Output Current
图 11. Common-Mode Rejection Ratio vs Frequency
8
版权 © 2018–2019, Texas Instruments Incorporated
INA190
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ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
Typical Characteristics (接下页)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
Vs
0.25
-40°C
25°C
125°C
0.2
Vs-1
0.15
0.1
Vs-2
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.25
GND+2
GND+1
GND
0
5
10
15 20
Output Current (mA)
25
30
35
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
D009
D024
VS = 5.0 V
VS = 5.0 V
图 13. Output Voltage Swing vs Output Current
图 14. Input Bias Current vs Common-Mode Voltage
7
6
0.25
0.2
0.15
0.1
5
4
0.05
0
3
-0.05
-0.1
-0.15
-0.2
2
1
0
-1
-50
-0.25
0
-25
0
25
50
75
100
125
150
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
Temperature (èC)
D026
D025
VENABLE = 0 V
图 16. Input Bias Current vs Temperature
图 15. Input Bias Current vs Common-Mode Voltage
(Shutdown)
240
210
180
150
120
90
80
75
70
65
60
55
50
45
40
35
VS = 1.8 V
VS = 3.3 V
VS = 5.0 V
VS = 1.8 V
VS = 3.3 V
VS = 5 V
60
30
0
-30
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
D002
Temperature (èC)
D027
VENABLE = 0 V
图 18. Quiescent Current vs Temperature (Disabled)
图 17. Quiescent Current vs Temperature (Enabled)
版权 © 2018–2019, Texas Instruments Incorporated
9
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
Typical Characteristics (接下页)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
100
70
65
60
55
50
45
40
VS = 1.8 V
VS = 5 V
80
70
60
50
40
30
20
10
10
100
1k
Frequency (Hz)
10k
100k
-5
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
D030
D029
A3 devices
VS = 5.0 V
图 20. Input-Referred Voltage Noise vs Frequency
图 19. Quiescent Current vs Common Mode Voltage
Time (1 s/div)
Time (20 ms/div)
D031
D032
A3 devices
VS = 5.0 V, A3 devices
图 21. 0.1-Hz to 10-Hz Voltage Noise (Referred-To-Input)
图 22. Step Response (10-mVPP Input Step)
VCM
VOUT
Inverting Input
Output
0 V
Time (250 ms/div)
Time (250 ms/div)
D033
D034
A3 devices
A3 devices
图 24. Inverting Differential Input Overload
图 23. Common-Mode Voltage Transient Response
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Typical Characteristics (接下页)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
Non-inverting Input
Output
Supply Voltage
Output Voltage
0 V
0 V
Time (250 ms/div)
Time (10 ms/div)
D035
D036
VS = 5.0 V, A3 devices
VS = 5.0 V, A3 devices
图 25. Noninverting Differential Input Overload
图 26. Start-Up Response
Enable
Output
Supply Voltage
Output Voltage
0 V
0 V
Time (100 ms/div)
Time (250 ms/div)
D037
D038
VS = 5.0 V, A3 devices
VS = 5.0 V, A3 devices
图 28. Enable and Disable Response
图 27. Brownout Recovery
100
25
IBP
IBN
IBP
IBN
80
60
15
5
40
20
0
-20
-40
-60
-80
-100
-5
-15
-25
-110 -90 -70 -50 -30 -10 10 30 50 70 90 110
Differential Input Voltage (mV)
-60
-40
-20
0
20
Differential Input Voltage (mV)
40
60
D039
D047
VS = 5.0 V, VREF = 2.5 V, A1 devices
VS = 5.0 V, VREF = 2.5 V, A2, A3, A4, A5 devices
图 30. IB+ and IB– vs Differential Input Voltage
图 29. IB+ and IB– vs Differential Input Voltage
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Typical Characteristics (接下页)
at TA = 25°C, VS = 1.8 V, VIN+ = 12 V, VREF = VS / 2, VENABLE = VS, and for all gain options (unless otherwise noted)
1.25
3
2.5
2
-40èC
25èC
125èC
25èC
-40èC
125èC
1
0.75
0.5
1.5
1
0.25
0
0.5
0
-0.5
-1
-0.25
-0.5
-0.75
-1
-1.5
-2
-2.5
0
0.5
1
1.5
2
Output Voltage (V)
2.5
3
3.5
4
4.5
5
0
0.5
1
1.5
2
Output Voltage (V)
2.5
3
3.5
4
4.5
5
D040
D048
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V
图 31. Output Leakage vs Output Voltage
图 32. Output Leakage vs Output Voltage
(A1, A2, and A3 Devices)
(A4 and A5 Devices)
5000
1000
A5
A1
A4
A2
A3
100
10
1
Gain Variants
A1
A2
A3
A4
A5
0.1
10
100
1k
10k
Frequency (Hz)
100k
1M
10M
D050
VS = 5.0 V, VCM = 0 V
图 33. Output Impedance vs Frequency
12
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7 Detailed Description
7.1 Overview
The INA190 is a low bias current, low offset, 40-V common-mode, current-sensing amplifier. The DDF SOT-23
and RSW UQFN packages also feature an enable pin. The INA190 is a specially designed, current-sensing
amplifier that accurately measures voltages developed across current-sensing resistors on common-mode
voltages that far exceed the supply voltage. Current is measured on input voltage rails as high as 40 V at VIN+
and VIN–, with a supply voltage, VS, as low as 1.7 V. When disabled, the output goes to a high-impedance state,
and the supply current draw is reduced to less than 0.1 µA. The INA190 is intended for use in both low-side and
high-side current-sensing configurations where high accuracy and low current consumption are required.
7.2 Functional Block Diagram
ENABLE(1)
VS
INA190
IN+
œ
œ
+
OUT
REF
œ
+
+
INœ
GND
(1) The ENABLE pin is available only in the DDF and RSW packages.
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7.3 Feature Description
7.3.1 Precision Current Measurement
The INA190 allows for accurate current measurements over a wide dynamic range. The high accuracy of the
device is attributable to the low gain error and offset specifications. The offset voltage of the INA190 is less than
15 µV. In this case, the low offset improves the accuracy at light loads when VIN+ approaches VIN–. Another
advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in the
current-sense circuit, and improves the power efficiency of the end application.
The maximum gain error of the INA190 is specified between 0.2% and 0.4% of the actual value, depending on
the gain option. As the sensed voltage becomes much larger than the offset voltage, the gain error becomes the
dominant source of error in the current-sense measurement. When the device monitors currents near the full-
scale output range, the total measurement error approaches the value of the gain error.
7.3.2 Low Input Bias Current
The INA190 is different from many current-sense amplifiers because this device offers very low input bias
current. The low input bias current of the INA190 has three primary benefits.
The first benefit is the reduction of the current consumed by the device in both the enabled and disabled states.
Classical current-sense amplifier topologies typically consume tens of microamps of current at the inputs. For
these amplifiers, the input current is the result of the resistor network that sets the gain and additional current to
bias the input amplifier. To reduce the bias current to near zero, the INA190 uses a capacitively coupled amplifier
on the input stage, followed by a difference amplifier on the output stage.
The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before the
signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost of
reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the
measurement accuracy of the INA190.
The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the
device to accurately monitor currents as low as 1 µA.
7.3.3 Low Quiescent Current With Output Enable
The device features low quiescent current (IQ), while still providing sufficient small-signal bandwidth to be usable
in most applications. The quiescent current of the INA190 is only 48 µA (typ), while providing a small-signal
bandwidth of 35 kHz in a gain of 100. The low IQ and good bandwidth allow the device to be used in many
portable electronic systems without excessive drain on the battery. Because many applications only need to
periodically monitor current, the INA190 features an enable pin that turns off the device until needed. When in
the disabled state, the INA190 typically draws 10 nA of total supply current.
7.3.4 Bidirectional Current Monitoring
INA190 devices can sense current flow through a sense resistor in both directions. The bidirectional current-
sensing capability is achieved by applying a voltage at the REF pin to offset the output voltage. A positive
differential voltage sensed at the inputs results in an output voltage that is greater than the applied reference
voltage. Likewise, a negative differential voltage at the inputs results in output voltage that is less than the
applied reference voltage. The output voltage of the current-sense amplifier is shown in 公式 1.
VOUT = ILOADì RSENSE ìGAIN + V
REF
where
•
•
•
•
ILOAD is the load current to be monitored.
RSENSE is the current-sense resistor.
GAIN is the gain option of the selected device.
VREF is the voltage applied to the REF pin.
(1)
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Feature Description (接下页)
7.3.5 High-Side and Low-Side Current Sensing
The INA190 supports input common-mode voltages from –0.2 V to +40 V. Because of the internal topology, the
common-mode range is not restricted by the power-supply voltage (VS). The ability to operate with common-
mode voltages greater or less than VS allows the INA190 to be used in high-side and low-side current-sensing
applications, as shown in 图 34.
Bus Supply
up to +40 V
IN+
High-Side Sensing
RSENSE
Common-mode voltage (VCM
is bus-voltage dependent.
)
INœ
LOAD
IN+
Low-Side Sensing
Common-mode voltage (VCM
is always near ground and is
)
RSENSE
isolated from bus-voltage spikes.
INœ
图 34. High-Side and Low-Side Sensing Connections
7.3.6 High Common-Mode Rejection
The INA190 uses a capacitively coupled amplifier on the front end. Therefore, dc common-mode voltages are
blocked from downstream circuits, resulting in very high common-mode rejection. Typically, the common-mode
rejection of the INA190 is approximately 150 dB. The ability to reject changes in the dc common-mode voltage
allows the INA190 to monitor both high- and low-voltage rail currents with very little change in the offset voltage.
7.3.7 Rail-to-Rail Output Swing
The INA190 allows linear current-sensing operation with the output close to the supply rail and ground. The
maximum specified output swing to the positive rail is VS – 40 mV, and the maximum specified output swing to
GND is only GND + 1 mV. The close-to-rail output swing is useful to maximize the usable output range,
particularly when operating the device from a 1.8-V supply.
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7.4 Device Functional Modes
7.4.1 Normal Operation
The INA190 is in normal operation when the following conditions are met:
•
•
•
•
•
The power-supply voltage (VS) is between 1.7 V and 5.5 V.
The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V.
The maximum differential input signal times the gain plus VREF is less than the positive swing voltage VSP
The ENABLE pin is driven or connected to VS.
The minimum differential input signal times the gain plus VREF is greater than the zero load swing to GND, VZL
(see the Rail-to-Rail Output Swing section).
.
During normal operation, this device produces an output voltage that is the amplified representation of the
difference voltage from IN+ to IN– plus the voltage applied to the REF pin.
7.4.2 Unidirectional Mode
This device can be configured to monitor current flowing in one direction (unidirectional) or in both directions
(bidirectional) depending on how the REF pin is connected. The most common case is unidirectional where the
output is set to ground when no current is flowing by connecting the REF pin to ground, as shown in 图 35. When
the current flows from the bus supply to the load, the input voltage from IN+ to IN– increases and causes the
output voltage at the OUT pin to increase.
Bus Voltage
up to 40 V
RSENSE
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
Load
ISENSE
VS
ENABLE
INA190
INœ
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
IN+
GND
图 35. Typical Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under zero
input conditions. The zero current output voltage of the INA190 is very small and for most unidirectional
applications the REF pin is simply grounded. However, if the measured current multiplied by the current sense
resistor and device gain is less than the zero current output voltage then bias the REF pin to a convenient value
above the zero current output voltage to get the output into the linear range of the device. To limit common-mode
rejection errors, buffer the reference voltage connected to the REF pin.
A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 40 mV less than the supply voltage when no differential input
voltage is present. This method is similar to the output saturated low condition with no differential input voltage
when the REF pin is connected to ground. The output voltage in this configuration only responds to currents that
develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the
negative differential input signal increases, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
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Device Functional Modes (接下页)
Another use for the REF pin in unidirectional operation is to level shift the output voltage. 图 36 shows an
application where the device ground is set to a negative voltage so currents biased to negative supplies, as seen
in optical networking cards, can be measured. The GND of the INA190 can be set to negative voltages, as long
as the inputs do not violate the common-mode range specification and the voltage difference between VS and
GND does not exceed 5.5 V. In this example, the output of the INA190 is fed into a positive-biased ADC. By
grounding the REF pin, the voltages at the output will be positive and not damage the ADC. To make sure the
output voltage never goes negative, the supply sequencing must be the positive supply first, followed by the
negative supply.
+ 1.8 V
-3.3 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
INA190
IN-
Capacitively
Coupled
Amplifier
œ
OUT
ADC
+
REF
IN+
GND
- 3.3 V
图 36. Using the REF Pin to Level-Shift Output Voltage
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Device Functional Modes (接下页)
7.4.3 Bidirectional Mode
The INA190 devices are bidirectional current-sense amplifiers capable of measuring currents through a resistive
shunt in two directions. This bidirectional monitoring is common in applications that include charging and
discharging operations where the current flowing through the resistor can change directions.
Bus Voltage
up to 40 V
RSENSE
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
Load
ISENSE
VS
ENABLE
INA190
INœ
Reference
Voltage
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
+
IN+
œ
GND
图 37. Bidirectional Application
The ability to measure this current flowing in both directions is achieved by applying a voltage to the REF pin, as
shown in 图 37. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input level
state. The output then responds by increasing above VREF for positive differential signals (relative to the IN– pin)
and responds by decreasing below VREF for negative differential signals. This reference voltage applied to the
REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at VS/2 for
equal signal range in both current directions. In some cases, VREF is set at a voltage other than VS/2; for
example, when the bidirectional current and corresponding output signal do not need to be symmetrical.
7.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain exceeds the voltage swing specification, the INA190 drives
its output as close as possible to the positive supply or ground, and does not provide accurate measurement of
the differential input voltage. If this input overload occurs during normal circuit operation, then reduce the value of
the shunt resistor or use a lower-gain version with the chosen sense resistor to avoid this mode of operation. If a
differential overload occurs in a time-limited fault event, then the output of the INA190 returns to the expected
value approximately 80 µs after the fault condition is removed.
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Device Functional Modes (接下页)
7.4.5 Shutdown
The INA190 features an active-high ENABLE pin that shuts down the device when pulled to ground. When the
device is shut down, the quiescent current is reduced to 10 nA (typ), and the output goes to a high-impedance
state. In a battery-powered application, the low quiescent current extends the battery lifetime when the current
measurement is not needed. When the ENABLE pin is driven to the supply voltage, the device turns back on.
The typical output settling time when enabled is 130 µs.
The output of the INA190 goes to a high-impedance state when disabled. Therefore, you can connect multiple
outputs of the INA190 together to a single ADC or measurement device, as shown in 图 38.
When connected in this way, enable only one INA190 at a time, and make sure all devices have the same supply
voltage.
RSENSE
Bus Voltage1
upto to +40 V
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 ꢀF
GPIO1
ENABLE
VS
INœ
Microcontroller
ADC
OUT
INA190
IN+
GPIO2
REF
GND
RSENS E
Bus Voltage2
upto to +40 V
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 ꢀF
ENABLE
VS
INœ
OUT
INA190
IN+
REF
GND
图 38. Multiplexing Multiple Devices With the ENABLE Pin
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8 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
The INA190 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground. The high common-mode rejection of the INA190 make it usable over a wide range
of voltage rails while still maintaining an accurate current measurement.
8.1.1 Basic Connections
图 39 shows the basic connections of the INA190. Place the device as close as possible to the current sense
resistor and connect the input pins (IN+ and IN–) to the current sense resistor through kelvin connections.If
present, the ENABLE pin must be controlled externally or connected to VS if not used.
Supply Voltage
1.7 V to 5.5 V
RSENSE
Bus Voltage
œ0.2 V to +40 V
LOAD
0.1 …F
0.5 nA
(typ)
0.5 nA
(typ)
ENABLE(1)
VS
INœ
OUT
ADC
Microcontroller
INA190
IN+
REF
GND
(1) The ENABLE pin is available only in the DDF and RSW packages.
NOTE: To help eliminate ground offset errors between the device and the analog-to-digital converter (ADC), connect
the REF pin to the ADC reference input. When driving SAR ADCs, filter or buffer the output of the INA190 before
connecting directly to the ADC.
图 39. Basic Connections for the INA190
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Application Information (接下页)
8.1.2 RSENSE and Device Gain Selection
The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large
as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and
reduces the error contribution of the offset voltage. However, there are practical limits as to how large the
current-sense resistor can be in a given application because of the resistor size and maximum allowable power
dissipation. 公式 2 gives the maximum value for the current-sense resistor for a given power dissipation budget:
PDMAX
RSENSE
<
2
IMAX
where:
•
•
PDMAX is the maximum allowable power dissipation in RSENSE
.
IMAX is the maximum current that will flow through RSENSE
.
(2)
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. 公式 3 provides the
maximum values of RSENSE and GAIN to keep the device from exceeding the positive swing limitation.
IMAX ìRSENSE ìGAIN < VSP - VREF
where:
•
•
•
•
IMAX is the maximum current that will flow through RSENSE
.
GAIN is the gain of the current-sense amplifier.
VSP is the positive output swing as specified in the data sheet.
VREF is the externally applied voltage on the REF pin.
(3)
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off between
the value of the sense resistor and the gain of the device under consideration. If the sense resistor selected for
the maximum power dissipation is too large, then it is possible to select a lower-gain device in order to avoid
positive swing limitations.
The negative swing limitation places a limit on how small the sense resistor value can be for a given application.
公式 4 provides the limit on the minimum value of the sense resistor.
IMIN ìRSENSE ìGAIN > VSN - VREF
where:
•
•
•
•
IMIN is the minimum current that will flow through RSENSE
.
GAIN is the gain of the current-sense amplifier.
VSN is the negative output swing of the device (see Rail-to-Rail Output Swing).
VREF is the externally applied voltage on the REF pin.
(4)
In addition to adjusting RSENSE and the device gain, the voltage applied to the REF pin can be slightly increased
above GND to avoid negative swing limitations.
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Application Information (接下页)
8.1.3 Signal Conditioning
When performing accurate current measurements in noisy environments, the current-sensing signal is often
filtered. The INA190 features low input bias currents. Therefore, adding a differential mode filter to the input
without sacrificing the current-sense accuracy is possible. Filtering at the input is advantageous because this
action attenuates differential noise before the signal is amplified. 图 40 provides an example of how to use a filter
on the input pins of the device.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
Capacitively Coupled
Amplifier
ENABLE
INA190
RF
INœ
1
CF
œ
f3dB
=
OUT
REF
VOUT
RDIFF
4pRFCF
+
RF
IN+
GND
图 40. Filter at the Input Pins
The differential input impedance (RDIFF) shown in 图 40 limits the maximum value for RF. The value of RDIFF is a
function of the device temperature, as shown in 图 41.
6
A1
A2, A3, A4, A5
5
4
3
2
1
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
D115
图 41. Differential Input Impedance vs Temperature
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Application Information (接下页)
As the voltage drop across the sense resistor (VSENSE) increases, the amount of voltage dropped across the input
filter resistors (RF) also increases. The increased voltage drop results in additional gain error. The error caused
by these resistors is calculated by the resistor divider equation shown in 公式 5.
≈
∆
«
’
RDIFF
Error(%) = 1-
ì100
∆
÷
÷
◊
RSENSE+ RDIFF + 2ìR
(
)
F
where:
•
•
RDIFF is the differential input impedance.
RF is the added value of the series filter resistance.
(5)
The input stage of the INA190 uses a capacitive feedback amplifier topology in order to achieve high dc
precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10
mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INA190, even though
the transients are greater than the device bandwidth. Use a differential input filter in these applications to
minimize disturbances at the INA190 output.
The high input impedance and low bias current of the INA190 provide flexibility in the input filter design without
impacting the accuracy of current measurement. For example, set RF = 100 Ω and CF = 22 nF to achieve a low-
pass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted high-frequency
signals at the input without severely impacting the current sensing bandwidth or precision. If a lower corner
frequency is desired, increase the value of CF.
Filtering the input filters out differential noise across the sense resistor. If high-frequency, common-mode noise is
a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and
common mode noise, as well as, internally generated noise from the device. The value for the resistance of the
RC filter is limited by the impedance of the load. Any current drawn by the load manifests as an external voltage
drop from the INA190 OUT pin to the load input. To select the optimal values for the output filter, use 图 33 and
see the Closed-Loop Analysis of Load-Induced Amplifier Stability Issues Using ZOUT application report
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Application Information (接下页)
8.1.4 Common-Mode Voltage Transients
With a small amount of additional circuitry, the INA190 can be used in circuits subject to transients that exceed
the absolute maximum voltage ratings. The most simple way to protect the inputs from negative transients is to
add resistors in series to the IN– and IN+ pins. Use resistors that are 1 kΩ or less, and limit the current in the
ESD structures to less than 5 mA. For example, using 1-kΩ resistors in series with the INA190 allows voltages
as low as –5 V, while limiting the ESD current to less than 5 mA. If protection from high-voltage or more-
negative, common-voltage transients is needed, use the circuits shown in 图 42 and 图 43. When implementing
these circuits, use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs);
any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a
working impedance for the Zener diode, as shown in 图 42. Keep these resistors as small as possible; most
often, use around 100 Ω. Larger values can be used with an effect on gain that is discussed in the Signal
Conditioning section. This circuit limits only short-term transients; therefore, many applications are satisfied with
a 100-Ω resistor along with conventional Zener diodes of the lowest acceptable power rating. This combination
uses the least amount of board space. These diodes can be found in packages as small as SOT-523 or SOD-
523.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
INA190
INœ
< 1 kW
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
RPROTECT
IN+
< 1 kW
GND
图 42. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in 图 43. The most space-efficient solutions are dual, series-
connected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in 图 42 and 图 43,
the total board area required by the INA190 with all protective components is less than that of an SO-8 package,
and only slightly greater than that of an VSSOP-8 package.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
INA190
INœ
< 1 kW
Transorb
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
RPROTECT
IN+
< 1 kW
GND
图 43. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see the Current Shunt Monitor With Transient Robustness reference design.
24
版权 © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
8.2 Typical Applications
The low input bias current of the INA190 allows accurate monitoring of small-value currents. To accurately
monitor currents in the microamp range, increase the value of the sense resistor to increase the sense voltage
so that the error introduced by the offset voltage is small. The circuit configuration for monitoring low-value
currents is shown in 图 44. As a result of the differential input impedance of the INA190, limit the value of RSENSE
to 1 kΩ or less for best accuracy.
RSENSE ≤ 1 kO
12 V
LOAD
5 V
0.1 ꢀF
ENABLE
VS
INœ
OUT
INA190
IN+
REF
GND
图 44. Microamp Current Measurement
8.2.1 Design Requirements
The design requirements for the circuit shown in 图 44 are listed in 表 1.
表 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage (VS)
5 V
12 V
Bus supply rail (VCM
)
Minimum sense current (IMIN
)
1 µA
Maximum sense current (IMAX
)
150 µA
25 V/V
0 V
Device gain (GAIN)
Reference voltage (VREF
)
Amplifier current in sleep or disabled state
< 1 µA
版权 © 2018–2019, Texas Instruments Incorporated
25
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
8.2.2 Detailed Design Procedure
The maximum value of the current-sense resistor is calculated based choice of gain, value of the maximum
current the be sensed (IMAX), and the power supply voltage(VS). When operating at the maximum current, the
output voltage must not exceed the positive output swing specification, VSP. Using 公式 6, for the given design
parameters the maximum value for RSENSE is calculated to be 1.321 kΩ.
VSP
RSENSE
<
IMAX ìGAIN
(6)
However, because this value exceeds the maximum recommended value for RSENSE, a resistance value of 1 kΩ
must be used. When operating at the minimum current value, IMIN the output voltage must be greater than the
swing to GND (VSN), specification. For this example, the output voltage at the minimum current is calculated
using 公式 7 to be 25 mV, which is greater than the value for VSN
.
VOUTMIN = IMIN ìRSENSE ìGAIN
(7)
8.2.3 Application Curve
图 45 shows the output of the device when disabled and enabled while measuring a 40-µA load current. When
disabled, the current draw from the device supply and inputs is less than 106 nA.
Enable
Output
0 V
Time (250 ms/div)
D030
图 45. Output Disable and Enable Response
9 Power Supply Recommendations
The input circuitry of the INA190 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN– can be as high as 40 V. However, the output voltage
range of the OUT pin is limited by the voltage on the VS pin. The INA190 also withstands the full differential input
signal range up to 40 V at the IN+ and IN– input pins, regardless of whether the device has power applied at the
VS pin. There is no sequencing requirement for VS and VIN+ or VIN–
.
26
版权 © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
10 Layout
10.1 Layout Guidelines
•
Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
•
•
Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. Additional decoupling capacitance can be added
to compensate for noisy or high-impedance power supplies.
When routing the connections from the current-sense resistor to the device, keep the trace lengths as short
as possible. The input filter capacitor CF should be placed as close as possible to the input pins of the device.
10.2 Layout Examples
Current Sense
Output
Connect REF to GND for
Unidirectional Measurement
or to External Reference for
Bidirectional Measurement
l in low
Note: RF and CF are optiona
noise/ripple environments
RF
CF
1
2
3
6
5
4
OUT
IN-
REF
GND
VS
INA190
VIA to Ground Plane
RSHUNT
Supply Voltage
(1.7 V to 5.5 V)
IN+
CBYPASS
RF
VIA to Ground Plane
图 46. Recommended Layout for SC70 (DCK) Package
版权 © 2018–2019, Texas Instruments Incorporated
27
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
Layout Examples (接下页)
l in low
Note: RF and CF are optiona
noise/ripple environments
RF
CF
CBYPASS
Supply Voltage
(1.7 V to 5.5 V)
VS
1
2
3
4
8
7
6
5
IN-
RSHUNT
TI Device
IN+
ENABLE
Connect to VS
if not used
N.C.
OUT
REF
RF
IN+
GND
VIA to Ground Plane
Current Sense
Output
Connect REF to GND for
Unidirectional Measurement
or to External Reference for
Bidirectional Measurement
图 47. Recommended Layout for SOT23-8 (DDF) Package
28
版权 © 2018–2019, Texas Instruments Incorporated
INA190
www.ti.com.cn
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
Layout Examples (接下页)
RSHUNT
RF
RF
Note: RF and CF are optional in low
noise/ripple environments
CF
NC IN- IN+
5
4
3
CBYPASS
Connect to Supply
(1.7 V to 5.5 V)
6
7
2
1
NC
NC
VS
ENABLE
Connect to Control or VS
(Do Not Float)
8
9
10
REF GND OUT
Current
Sense Output
VIA to Ground
Plane
Connect REF to GND for
Unidirectional Measurement
or to External Reference for
Bidirectional Measurement
图 48. Recommended Layout for UQFN (RSW) Package
版权 © 2018–2019, Texas Instruments Incorporated
29
INA190
ZHCSHW3D –MARCH 2018–REVISED NOVEMBER 2019
www.ti.com.cn
11 器件和文档支持
11.1 文档支持
11.1.1 相关文档
请参阅如下相关文档：德州仪器 (TI)，《INA190EVM 用户指南》
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册，即可每周接收产品
信息更改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
11.4 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.5 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
11.6 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
30
版权 © 2018–2019, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA190A1IDCKR
INA190A1IDCKT
INA190A1IDDFR
INA190A1IDDFT
INA190A1IRSWR
INA190A1IRSWT
INA190A2IDCKR
INA190A2IDCKT
INA190A2IDDFR
INA190A2IDDFT
INA190A2IRSWR
INA190A2IRSWT
INA190A3IDCKR
INA190A3IDCKT
INA190A3IDDFR
INA190A3IDDFT
INA190A3IRSWR
INA190A3IRSWT
INA190A4IDCKR
INA190A4IDCKT
ACTIVE
ACTIVE
SC70
SC70
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
6
6
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1DP
1DP
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
8
1ZGW
1ZGW
1AN
8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
UQFN
UQFN
SC70
SC70
10
10
6
1AN
1DQ
1DQ
1ZHW
1ZHW
1AM
1AM
1DR
6
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
8
8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
UQFN
UQFN
SC70
SC70
10
10
6
6
1DR
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
8
1ZIW
1ZIW
1AO
8
ACTIVE
ACTIVE
ACTIVE
ACTIVE
UQFN
UQFN
SC70
SC70
10
10
6
1AO
1DS
6
250
RoHS & Green
1DS
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA190A4IDDFR
INA190A4IDDFT
INA190A4IRSWR
INA190A4IRSWT
INA190A5IDCKR
INA190A5IDCKT
INA190A5IDDFR
INA190A5IDDFT
INA190A5IRSWR
INA190A5IRSWT
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
8
8
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
3000 RoHS & Green
250 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1ZJW
1ZJW
1AP
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
ACTIVE
ACTIVE
ACTIVE
ACTIVE
UQFN
UQFN
SC70
SC70
10
10
6
1AP
1DT
6
1DT
ACTIVE SOT-23-THIN
ACTIVE SOT-23-THIN
8
1ZKW
1ZKW
1AQ
8
ACTIVE
ACTIVE
UQFN
UQFN
10
10
1AQ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA190A1IDCKR
INA190A1IDCKT
INA190A1IDDFR
SC70
SC70
DCK
DCK
DDF
6
6
8
3000
250
178.0
178.0
180.0
9.0
9.0
8.4
2.4
2.4
3.2
2.5
2.5
3.2
1.2
1.2
1.4
4.0
4.0
4.0
8.0
8.0
8.0
Q3
Q3
Q3
SOT-23-
THIN
3000
INA190A1IDDFT
SOT-23-
THIN
DDF
8
250
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
INA190A1IRSWR
INA190A1IRSWT
INA190A2IDCKR
INA190A2IDCKT
INA190A2IDDFR
UQFN
UQFN
SC70
SC70
RSW
RSW
DCK
DCK
DDF
10
10
6
3000
250
180.0
180.0
178.0
178.0
180.0
9.5
9.5
9.0
9.0
8.4
1.6
1.6
2.4
2.4
3.2
2.0
2.0
2.5
2.5
3.2
0.8
0.8
1.2
1.2
1.4
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q3
Q3
Q3
3000
250
6
SOT-23-
THIN
8
3000
INA190A2IDDFT
SOT-23-
THIN
DDF
8
250
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
INA190A2IRSWR
INA190A2IRSWT
INA190A3IDCKR
UQFN
UQFN
SC70
RSW
RSW
DCK
10
10
6
3000
250
180.0
180.0
178.0
9.5
9.5
9.0
1.6
1.6
2.4
2.0
2.0
2.5
0.8
0.8
1.2
4.0
4.0
4.0
8.0
8.0
8.0
Q1
Q1
Q3
3000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA190A3IDCKT
INA190A3IDDFR
SC70
DCK
DDF
6
8
250
178.0
180.0
9.0
8.4
2.4
3.2
2.5
3.2
1.2
1.4
4.0
4.0
8.0
8.0
Q3
Q3
SOT-23-
THIN
3000
INA190A3IDDFT
SOT-23-
THIN
DDF
8
250
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
INA190A3IRSWR
INA190A3IRSWT
INA190A4IDCKR
INA190A4IDCKT
INA190A4IDDFR
UQFN
UQFN
SC70
SC70
RSW
RSW
DCK
DCK
DDF
10
10
6
3000
250
180.0
180.0
178.0
178.0
180.0
9.5
9.5
9.0
9.0
8.4
1.6
1.6
2.4
2.4
3.2
2.0
2.0
2.5
2.5
3.2
0.8
0.8
1.2
1.2
1.4
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q3
Q3
Q3
3000
250
6
SOT-23-
THIN
8
3000
INA190A4IDDFT
SOT-23-
THIN
DDF
8
250
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
INA190A4IRSWR
INA190A4IRSWT
INA190A5IDCKR
INA190A5IDCKT
INA190A5IDDFR
UQFN
UQFN
SC70
SC70
RSW
RSW
DCK
DCK
DDF
10
10
6
3000
250
180.0
180.0
178.0
178.0
180.0
9.5
9.5
9.0
9.0
8.4
1.6
1.6
2.4
2.4
3.2
2.0
2.0
2.5
2.5
3.2
0.8
0.8
1.2
1.2
1.4
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
Q1
Q1
Q3
Q3
Q3
3000
250
6
SOT-23-
THIN
8
3000
INA190A5IDDFT
SOT-23-
THIN
DDF
8
250
180.0
8.4
3.2
3.2
1.4
4.0
8.0
Q3
INA190A5IRSWR
INA190A5IRSWT
UQFN
UQFN
RSW
RSW
10
10
3000
250
180.0
180.0
9.5
9.5
1.6
1.6
2.0
2.0
0.8
0.8
4.0
4.0
8.0
8.0
Q1
Q1
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA190A1IDCKR
INA190A1IDCKT
INA190A1IDDFR
INA190A1IDDFT
INA190A1IRSWR
INA190A1IRSWT
INA190A2IDCKR
INA190A2IDCKT
INA190A2IDDFR
INA190A2IDDFT
INA190A2IRSWR
INA190A2IRSWT
INA190A3IDCKR
INA190A3IDCKT
INA190A3IDDFR
INA190A3IDDFT
INA190A3IRSWR
INA190A3IRSWT
SC70
SC70
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
6
6
3000
250
180.0
180.0
210.0
210.0
189.0
189.0
180.0
180.0
210.0
210.0
189.0
189.0
180.0
180.0
210.0
210.0
189.0
189.0
180.0
180.0
185.0
185.0
185.0
185.0
180.0
180.0
185.0
185.0
185.0
185.0
180.0
180.0
185.0
185.0
185.0
185.0
18.0
18.0
35.0
35.0
36.0
36.0
18.0
18.0
35.0
35.0
36.0
36.0
18.0
18.0
35.0
35.0
36.0
36.0
SOT-23-THIN
SOT-23-THIN
UQFN
8
3000
250
8
10
10
6
3000
250
UQFN
SC70
3000
250
SC70
6
SOT-23-THIN
SOT-23-THIN
UQFN
8
3000
250
8
10
10
6
3000
250
UQFN
SC70
3000
250
SC70
6
SOT-23-THIN
SOT-23-THIN
UQFN
8
3000
250
8
10
10
3000
250
UQFN
Pack Materials-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Jun-2023
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA190A4IDCKR
INA190A4IDCKT
INA190A4IDDFR
INA190A4IDDFT
INA190A4IRSWR
INA190A4IRSWT
INA190A5IDCKR
INA190A5IDCKT
INA190A5IDDFR
INA190A5IDDFT
INA190A5IRSWR
INA190A5IRSWT
SC70
SC70
DCK
DCK
DDF
DDF
RSW
RSW
DCK
DCK
DDF
DDF
RSW
RSW
6
6
3000
250
180.0
180.0
210.0
210.0
189.0
189.0
180.0
180.0
210.0
210.0
189.0
189.0
180.0
180.0
185.0
185.0
185.0
185.0
180.0
180.0
185.0
185.0
185.0
185.0
18.0
18.0
35.0
35.0
36.0
36.0
18.0
18.0
35.0
35.0
36.0
36.0
SOT-23-THIN
SOT-23-THIN
UQFN
8
3000
250
8
10
10
6
3000
250
UQFN
SC70
3000
250
SC70
6
SOT-23-THIN
SOT-23-THIN
UQFN
8
3000
250
8
10
10
3000
250
UQFN
Pack Materials-Page 4
PACKAGE OUTLINE
RSW0010A
UQFN - 0.55 mm max height
S
C
A
L
E
7
.
0
0
0
PLASTIC QUAD FLATPACK - NO LEAD
1.45
1.35
A
B
PIN 1 INDEX AREA
1.85
1.75
0.55
0.45
C
NOTE 3
SEATING PLANE
0.05 C
0.05
0.00
2X 0.8
SYMM
(0.13) TYP
3
5
0.45
0.35
9X
2
6
7
SYMM
6X 0.4
1
0.25
10X
0.15
0.07
0.05
C A B
10
8
0.55
0.45
PIN 1 ID
4224897/A 03/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package complies to JEDEC MO-288 variation UDEE, except minimum package height.
www.ti.com
EXAMPLE BOARD LAYOUT
RSW0010A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
8
10
SEE SOLDER MASK
DETAIL
10X (0.2)
(0.7)
1
7
SYMM
6X (0.4)
(1.6)
6
2
(R0.05) TYP
9X (0.6)
3
5
(1.2)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 30X
0.05 MIN
ALL AROUND
0.05 MAX
ALL AROUND
METAL UNDER
SOLDER MASK
METAL EDGE
EXPOSED METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
NON SOLDER MASK
DEFINED
SOLDER MASK DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4224897/A 03/2019
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RSW0010A
UQFN - 0.55 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
SYMM
8
10
10X (0.2)
6X (0.4)
(0.7)
1
7
SYMM
(1.6)
6
2
(R0.05) TYP
9X (0.6)
3
5
(1.2)
SOLDER PASTE EXAMPLE
BASED ON 0.125 MM THICK STENCIL
SCALE: 30X
4224897/A 03/2019
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
PACKAGE OUTLINE
DDF0008A
SOT-23 - 1.1 mm max height
S
C
A
L
E
4
.
0
0
0
PLASTIC SMALL OUTLINE
C
2.95
2.65
SEATING PLANE
TYP
PIN 1 ID
AREA
0.1 C
A
6X 0.65
8
1
2.95
2.85
NOTE 3
2X
1.95
4
5
0.38
0.22
8X
0.1
C A B
1.65
1.55
B
1.1 MAX
0.20
0.08
TYP
SEE DETAIL A
0.25
GAGE PLANE
0.1
0.0
0 - 8
0.6
0.3
DETAIL A
TYPICAL
4222047/C 10/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
www.ti.com
EXAMPLE BOARD LAYOUT
DDF0008A
SOT-23 - 1.1 mm max height
PLASTIC SMALL OUTLINE
8X (1.05)
SYMM
1
8
8X (0.45)
SYMM
6X (0.65)
5
4
(R0.05)
TYP
(2.6)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
SOLDER MASK
DEFINED
NON SOLDER MASK
DEFINED
SOLDER MASK DETAILS
4222047/C 10/2022
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DDF0008A
SOT-23 - 1.1 mm max height
PLASTIC SMALL OUTLINE
8X (1.05)
SYMM
(R0.05) TYP
8
1
8X (0.45)
SYMM
6X (0.65)
5
4
(2.6)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
SCALE:15X
4222047/C 10/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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Copyright © 2023，德州仪器 (TI) 公司
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