INA191A3IYFDR [TI]
采用 WCSP 封装、具有皮安级 IB 和使能引脚的 40V、双向、超精密电流感应放大器 | YFD | 6 | -40 to 125;
| 型号： | INA191A3IYFDR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 采用 WCSP 封装、具有皮安级 IB 和使能引脚的 40V、双向、超精密电流感应放大器 | YFD | 6 | -40 to 125 放大器 |
| 文件： | 总43页 (文件大小：1989K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INA191, INA2191
ZHCSJE3C –FEBRUARY 2019 –REVISED AUGUST 2021
INAx191 采用WCSP 封装、具有皮安级IB 和使能引脚的40V、双向、超精密电
流检测放大器
1 特性
3 说明
• 低功耗：
INAx191 是一款低功耗、电压输出、电流分流监控器
（也称为电流检测放大器），常用于过流保护和精密电
流测量（用于实现系统优化），此外它还可用于闭环反
馈电路中。该器件可在独立于电源电压之外的 –0.2V
至 +40V 共模电压下检测分流器上的压降。INAx191
的低输入偏置电流允许使用更大的电流检测电阻器，从
而能够提供 µA 级的精确电流测量。共有五种固定增益
可供选择： 25V/V 、50V/V 、100V/V 、200V/V 或
500V/V。零漂移架构的低失调电压扩展了电流测量的
动态范围，并允许使用具有更低功率损耗的更小检测电
阻器，同时仍提供精确的电流测量。
– 电源电压VS：1.7V 至5.5V
– 关断电流：100nA（INA191 的最大值）
– 静态电流：43μA (INA191 25°C 时)
• 低输入偏置电流：100pA（典型值）
（支持微安级电流测量）
• 双向电流测量(INA2191)
• 精度：
– ±0.25% 的最大增益误差（A2 至A5 器件）
– 7ppm/°C 的增益漂移（最大值）
– ±12μV（最大值）的失调电压
– 0.13µV/°C 的温漂（最大值）
• 宽共模电压：-0.2 V 至+40 V
• 增益选项：
INA191 由 1.7V 至 5.5V 单电源供电，在启用时消耗的
最大电源电流为 65µA，在禁用时仅为 100nA。该器件
的额定工作温度范围为 –40°C 至 +125°C，采用
DSBGA-6 (INA191) 和DSBGA-12 (INA2191) 封装。
– INAx191A1：25 V/V
– INAx191A2：50V/V
– INAx191A3：100V/V
– INAx191A4：200V/V
– INAx191A5：500V/V
• 封装：
器件信息(1)
封装尺寸（标称值）
器件型号
INA191
INA2191
封装
DSBGA (6)
DSBGA (12)
1.17mm × 0.765mm
1.17 mm × 1.53 mm
– INA191：0.895mm2 DSBGA
– INA2191：1.79mm2 DSBGA
(1) 要了解所有可用封装，请参见数据表末尾的封装选项附录。
2 应用
• 笔记本电脑
• 手机
• 电池供电设备
• 电信设备
• 电源管理
• 电池充电器
Supply Voltage
1.7 V to 5.5 V
RSENSE
Bus Voltage
up to 40 V
LOAD
0.1 …F
100 pA
(typical)
100 pA
(typical)
ENABLE
VS
INœ
INA191
INA2191 (½)
OUT
ADC
Microcontroller
IN+
REF(1)
GND
(1) REF pin only available on INA2191
简化版原理图
本文档旨在为方便起见，提供有关TI 产品中文版本的信息，以确认产品的概要。有关适用的官方英文版本的最新信息，请访问
www.ti.com，其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLYS020
INA191, INA2191
ZHCSJE3C –FEBRUARY 2019 –REVISED AUGUST 2021
www.ti.com.cn
Table of Contents
8 Application and Implementation..................................22
8.1 Application Information............................................. 22
8.2 Typical Application.................................................... 27
9 Power Supply Recommendations................................28
10 Layout...........................................................................29
10.1 Layout Guidelines................................................... 29
10.2 Layout Examples.................................................... 29
11 Device and Documentation Support..........................31
11.1 Documentation Support.......................................... 31
11.2 接收文档更新通知................................................... 31
11.3 支持资源..................................................................31
11.4 Trademarks............................................................. 31
11.5 静电放电警告...........................................................31
11.6 术语表..................................................................... 31
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings ....................................... 5
6.2 ESD Ratings .............................................................. 5
6.3 Recommended Operating Conditions ........................5
6.4 Thermal Information ...................................................5
6.5 Electrical Characteristics ............................................6
6.6 Typical Characteristics................................................8
7 Detailed Description......................................................15
7.1 Overview...................................................................15
7.2 Functional Block Diagram.........................................15
7.3 Feature Description...................................................16
7.4 Device Functional Modes..........................................18
Information.................................................................... 31
4 Revision History
Changes from Revision B (February 2021) to Revision C (August 2021)
Page
• 将数据表状态从“混合量产”更改为“量产数据”............................................................................................ 1
• 将INA2191 器件状态从“预告信息”更改为“量产数据”................................................................................1
• Added INA191 and INA2191 test conditions to gain error, gain error drift, swing to VS, and enable
logic parameters................................................................................................................................................. 6
• Changed INA191 and INA2191 test conditions for output leakage disabled parameters...................................6
• Changed INA2191 values for the quiescent current parameters for production data.........................................6
• Changed the Typical Characteristics section......................................................................................................8
• Changed INA2191 information in the Low Quiescent Current With Output Enable section............................. 16
• Changed INA2191 information in the Unidirectional Mode section.................................................................. 18
• Changed 图8-3 and the filtering information in the Signal Conditioning section..............................................24
Changes from Revision A (April 2019) to Revision B (February 2021)
Page
• 将数据表状态从“量产数据”更改为“混合量产”............................................................................................ 1
• 向数据表添加了状态为“预告信息”的INA2191 器件.......................................................................................1
Changes from Revision * (February 2019) to Revision A (April 2019)
Page
• 将器件状态从预告信息更改为量产数据（正在供货）.........................................................................................1
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English Data Sheet: SLYS020
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www.ti.com.cn
5 Pin Configuration and Functions
1
2
3
A
IN+
VS
OUT
B
INœ
GND
ENABLE
Not to scale
图5-1. INA191 YFD Package 6-Pin DSBGA Top View
表5-1. Pin Functions (INA191)
PIN
TYPE
DESCRIPTION
NAME
NO.
Enable pin. When this pin is driven to VS, the device is on and functions as a current sense
amplifier. When this pin is driven to GND, the device is off, the supply current is reduced,
and the output is placed in a high-impedance state. This pin must be driven externally, or
connected to VS if not used.
ENABLE
B3
Digital input
GND
IN+
B2
A1
Analog
Ground.
Current-shunt monitor positive input. For high-side applications, connect this pin to the bus
voltage side of the sense resistor. For low-side applications, connect this pin to the load side
of the sense resistor.
Analog input
Current-shunt monitor negative input. For high-side applications, connect this pin to the load
side of the sense resistor. For low-side applications, connect this pin to the ground side of
the sense resistor.
B1
Analog input
IN–
This pin provides an analog voltage output that is the amplified voltage difference from the
IN+ to the IN–pins.
OUT
VS
A3
A2
Analog output
Analog
Power supply, 1.7 V to 5.5 V.
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3
1
2
A
OUT1
IN+1
VS
IN-1
IN-2
IN+2
REF1
REF2
OUT2
B
C
EN1
EN2
D
GND
图5-2. INA2191 YBJ Package 12-Pin DSBGA Top View
表5-2. Pin Functions (INA2191)
PIN
TYPE
DESCRIPTION
NAME
NO.
Enable pin for output 1. When this pin is driven to VS, channel 1 is on and functions as a
current sense amplifier. When both enable pins are driven to GND, the device is off and the
supply current is reduced. This pin must be driven externally, or connected to VS if not used.
ENABLE1
B2
Digital input
Enable pin for output 2. When this pin is driven to VS, channel 2 is on and functions as a
current sense amplifier. When both enable pins are driven to GND, the device is off and the
supply current is reduced. This pin must be driven externally, or connected to VS if not used.
ENABLE2
GND
C2
D2
A1
Digital input
Analog
Ground.
Current-shunt monitor positive input for channel 1. For high-side applications, connect this
pin to the bus voltage side of the sense resistor. For low-side applications, connect this pin
to the load side of the sense resistor.
IN+1
Analog input
Current-shunt monitor positive input for channel 2. For high-side applications, connect this
pin to the bus voltage side of the sense resistor. For low-side applications, connect this pin
to the load side of the sense resistor.
IN+2
D1
B1
C1
Analog input
Analog input
Analog input
Current-shunt monitor negative input for channel 1. For high-side applications, connect this
pin to the load side of the sense resistor. For low-side applications, connect this pin to the
ground side of the sense resistor.
IN–1
IN–2
Current-shunt monitor negative input for channel 2. For high-side applications, connect this
pin to the load side of the sense resistor. For low-side applications, connect this pin to the
ground side of the sense resistor.
This pin provides an analog voltage output that is the amplified voltage difference from the
IN+1 to the IN–1 pins, and is offset by the voltage applied to the REF1 pin.
OUT1
OUT2
REF1
A3
D3
B3
Analog output
Analog output
Analog input
This pin provides an analog voltage output that is the amplified voltage difference from the
IN+2 to the IN–2 pins, and is offset by the voltage applied to the REF2 pin.
Reference input for channel 1. Enables bidirectional current sensing for channel 1 with an
externally applied voltage.
Reference input for channel 2. Enables bidirectional current sensing for channel 2 with an
externally applied voltage.
REF2
VS
C3
A2
Analog input
Analog
Power supply, 1.7 V to 5.5 V.
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English Data Sheet: SLYS020
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ZHCSJE3C –FEBRUARY 2019 –REVISED AUGUST 2021
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
UNIT
VS
Supply voltage
Analog inputs
6
V
(2)
42
Differential (VIN+) –(VIN–
)
–42
GND –0.3
GND –0.3
GND –0.3
VIN+
VIN–
,
V
VIN+, VIN–, with respect to GND(3)
42
VENABLE ENABLE
REF, OUT(3)
6
(VS) + 0.3
5
V
V
Input current into any pin(3)
Operating temperature
Junction temperature
Storage temperature
mA
°C
°C
°C
TA
150
–55
–65
TJ
150
Tstg
150
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under
Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device
reliability.
(2) VIN+ and VIN– are the voltages at the IN+ and IN–pins, respectively.
(3) Input voltage at any pin may exceed the voltage shown if the current at that pin is limited to 5 mA.
6.2 ESD Ratings
VALUE
±2000
±1000
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
V(ESD)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
–0.2
–0.2
1.7
NOM
MAX
40
UNIT
V
VCM
Common-mode input range
VIN+, VIN– Input pin voltage range
40
V
VS
Operating supply voltage
5.5
VS
V
VREF
TA
Reference pin voltage range
Operating free-air temperature
0
V
125
°C
–40
6.4 Thermal Information
INA191
YFD (DSBGA)
6 PINS
141.4
INA2191
THERMAL METRIC(1)
YBJ (DSBGA)
12 PINS
94.1
UNIT
RθJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
1.1
0.6
45.7
23.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.4
0.3
ΨJT
45.3
23.8
ΨJB
RθJC(bot)
N/A
N/A
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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English Data Sheet: SLYS020
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6.5 Electrical Characteristics
at TA = 25°C, VSENSE = VIN+ –VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2 (INA2191), and VENABLE = VS (unless
otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
INPUT
Common-mode
CMRR
132
150
dB
µV
VIN+ = –0.1 V to 40 V, TA = –40°C to +125°C
rejection ratio, RTI(1)
VOS
Offset voltage, RTI(1)
Offset drift, RTI
VS = 1.8 V
±12
–2.5
dVOS/dT
10
130 nV/°C
TA = –40°C to +125°C
Power-supply rejection
ratio, RTI
PSRR
VS = 1.7 V to 5.5 V
±5
3
µV/V
–1
IIB
Input bias current
Input offset current
VSENSE = 0 mV
VSENSE = 0 mV
0.1
nA
nA
IIO
±0.07
OUTPUT
A1 devices
A2 devices
A3 devices
A4 devices
A5 devices
25
50
G
Gain
100
V/V
200
500
A1 devices, INA191
±0.35%
±0.25%
–0.17%
+0.05%
A1 devices, INA2191
EG
Gain error
VOUT = 0.1 V to VS –0.1 V
A2, A3, A4, A5
devices
±0.25%
7
–0.04%
Gain error drift
2
±0.01%
±2
ppm/°C
TA = –40°C to +125°C
Nonlinearity error
VOUT = 0.1 V to VS –0.1 V
A1 devices
A2 devices
A3 devices
A4, A5 devices
±12
±6
INA2191 only,
VREF = 100 mV to VS –100 mV,
TA = –40°C to +125°C
±1
Reference voltage
rejection ratio
RVRR
µV/V
nF
±0.5
±4
±0.25
±3
Maximum capacitive
load
No sustained oscillation
1
VOLTAGE OUTPUT
Swing to VS power-
supply rail
VSP
VSN
mV
mV
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C
(VS) –23
(VS) –40
VS = 1.8 V, RL = 10 kΩ to GND, TA = –40°C to +125°C,
VSENSE = –10 mV, VREF = 0 V (INA2191)
Swing to GND
(VGND) + 0.05
(VGND) + 1
A1, A2, A3 devices
A4 devices
(VGND) + 1
(VGND) + 2
(VGND) + 3
(VGND) + 3
(VGND) + 4
(VGND) + 7
mV
mV
mV
VS = 1.8 V, RL = 10 kΩ to GND,
TA = –40°C to +125°C, VSENSE = 0
mV,
Zero current output
voltage
VZL
A5 devices
for INA2191 VREF = 0 V
FREQUENCY RESPONSE
A1 devices
A2 devices
A3 devices
A4 devices
A5 devices
45
37
35
33
27
0.3
30
BW
Bandwidth
CLOAD = 10 pF
kHz
SR
tS
Slew rate
VS = 5.0 V, VOUT = 0.5 V to 4.5 V
V/µs
µs
Settling time
From current step to within 1% of final value
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at TA = 25°C, VSENSE = VIN+ –VIN–, VS = 1.8 V to 5.0 V, VIN+ = 12 V, VREF = VS / 2 (INA2191), and VENABLE = VS (unless
otherwise noted)
PARAMETER
CONDITIONS
MIN
TYP
75
1
MAX
UNIT
NOISE, RTI(1)
Voltage noise density
nV/√Hz
ENABLE
IEN
Leakage input current
High-level input voltage
Low-level input voltage
Hysteresis
100
5.5
0.4
nA
V
0 V ≤VENABLE ≤VS
TA = –40°C to +125°C
TA = –40°C to +125°C
VIH
1.35
0
VIL
V
VHYS
100
1
mV
Output leakage
disabled
VS = 1.8 V, VOUT = 0 V to 1.8 V, VENABLE = 0 V
VS = 5 V, VOUT = 0 V to 5.0 V, VENABLE = 0 V
5
5
µA
µA
IODIS
Output leakage
disabled (INA2191)
1
POWER SUPPLY
VS = 1.8 V, VSENSE = 0 mV
43
96
65
85
µA
µA
µA
µA
Quiescent current
(INA191)
VS = 1.8 V, VSENSE = 0 mV, TA = –40°C to +125°C
VS = 1.8 V, VSENSE = 0 mV (Dual Channel)
VS = 1.8 V, VSENSE = 0 mV, TA = –40°C to +125°C
IQ
130
180
Quiescent current
(INA2191)
Quiescent current
disabled (INA191)
IQDIS
IQDIS
VENABLE < 0.4 V, VSENSE = 0 mV (Single Channel)
VENABLE1 < 0.4 V, VENABLE2 = < 0.4 V, VSENSE = 0 mV
10
20
100
200
nA
nA
Quiescent current
disabled (INA2191)
(1) RTI = referred-to-input.
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6.6 Typical Characteristics
at TA = 25 °C, VS = 1.8 V, VIN+ = 12 V, VENABLE = VS, VREF = GND and all gain options (unless otherwise noted)
15
10
5
0
-5
-10
-15
-50
-25
0
25
50
75
100
125
150
D118
Input Offset Voltage (mV)
Temperature (èC)
D006
图6-1. Input Offset Voltage Production Distribution
图6-2. Offset Voltage vs. Temperature
0.1
33000
30000
27000
24000
21000
18000
15000
12000
9000
0.08
0.06
0.04
0.02
0
-0.02
-0.04
-0.06
-0.08
-0.1
6000
3000
0
-50
-25
0
25
50
75
100
125
150
D119
Temperature (èC)
D012
Common-Mode Rejection Ratio (mV/V)
图6-4. Common-Mode Rejection Ratio vs.
图6-3. Common-Mode Rejection Production
Temperature
Distribution
D116
Gain Error (%)
Gain Error (%)
A1 Devices
A1 devices
图6-6. Gain Error Production Distribution
图6-5. Gain Error Production Distribution (INA191)
(INA2191)
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0.2
0.16
0.12
0.08
0.04
0
-0.04
-0.08
-0.12
-0.16
-0.2
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
D117
D018
Gain Error (%)
A2, A3, A4, A5 devices
图6-8. Gain Error vs. Temperature
图6-7. Gain Error Production Distribution
60
50
40
30
20
140
120
100
80
60
10
A1
A2
40
0
A3
A4
A5
20
-10
-20
0
10
100
1k 10k
Frequency (Hz)
100k
1M
10
100
1k 10k
Frequency (Hz)
100k
1M
D020
D019
VS = 5 V
VS = 5 V
图6-9. Gain vs. Frequency
图6-10. Power-Supply Rejection Ratio vs.
Frequency
Vs
160
140
120
100
80
-40°C
25°C
125°C
Vs-0.4
Vs-0.8
GND+0.8
GND+0.4
GND
60
0
1
2
3
4
5
6
7
Output Current (mA)
8
9
10 11
40
10
D010
100
1k 10k
Frequency (Hz)
100k
1M
VS = 1.8 V
D021
图6-12. Output Voltage Swing vs. Output Current
图6-11. Common-Mode Rejection Ratio vs.
Frequency
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Vs
0.25
0.2
-40°C
25°C
125°C
Vs-1
0.15
0.1
Vs-2
0.05
0
-0.05
-0.1
-0.15
-0.2
-0.25
GND+2
GND+1
GND
0
5
10
15 20
Output Current (mA)
25
30
35
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
D009
D024
VS = 5.0 V
VS = 5.0 V, VSENSE = 0 V
图6-13. Output Voltage Swing vs. Output Current
图6-14. Input Bias Current vs. Common-Mode
Voltage
7
6
0.25
0.2
0.15
0.1
5
4
0.05
0
3
-0.05
-0.1
-0.15
-0.2
-0.25
2
1
0
-1
-50
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
-25
0
25
50
75
100
125
150
D025
Temperature (èC)
D026
VENABLE = 0 V, VSENSE = 0 V
VSENSE = 0 V
图6-15. Input Bias Current vs. Common-Mode
图6-16. Input Bias Current vs. Temperature
Voltage (Shutdown)
90
70
V
S = 1.8V
VS = 3.3V
VS = 5V
VS = 1.8V
VS = 3.3V
VS = 5V
65
60
55
50
45
40
35
30
25
80
70
60
50
40
30
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
Temperature (èC)
D101
Single channel enabled, VREF = VS /2
VENABLE = VS
图6-18. Quiescent Current vs. Temperature
图6-17. Quiescent Current vs. Temperature
(INA2191 )
(INA191)
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160
150
140
130
120
110
100
90
240
210
180
150
120
90
V
S = 1.8V
VS = 3.3V
VS = 5V
VS = 1.8 V
VS = 3.3 V
VS = 5.0 V
60
80
30
70
0
60
-50
-30
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
VENABLE1 = VENABLE2 = VS
, VREF = VS /2
Temperature (èC)
D002
VENABLE = 0 V
图6-20. Quiescent Current vs. Temperature
图6-19. Quiescent Current vs. Temperature
(INA191 Disabled)
(INA2191 )
350
60
VS = 1.8V
VS = 3.3V
VS = 5V
VS = 1.8V
VS = 5V
300
250
200
150
100
50
55
50
45
40
35
30
0
-50
-50
-25
0
25
50
75
100
125
150
-5
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
Temperature (èC)
D103
VENABLE1 = VENABLE2 = 0 V, VREF = VS /2
图6-21. Quiescent Current vs. Temperature
图6-22. Quiescent Current vs. Common-Mode
(INA2191 Disabled)
Voltage (INA191)
120
500
V
S = 1.8V
VS = 5V
300
200
115
110
105
100
95
100
70
50
30
20
90
-5
10
10
0
5
10
15
20
25
Common-Mode Voltage (V)
30
35
40
100
1k
Frequency (Hz)
10k
100k
VREF = VS /2
图6-24. Input-Referred Voltage Noise vs.
Frequency
图6-23. Quiescent Current vs. Common-Mode
Voltage (INA2191)
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0V
0V
Time (20ms/div)
Time (1 s/div)
D111
D031
VS = 5.0 V, 10-mVPP input step
图6-25. 0.1-Hz to 10-Hz Input-Referred Voltage
Noise
图6-26. Step Response
60
Inverting Input
Output
VCM
VOUT
50
40
30
20
10
0
-10
-20
-30
-40
-50
0V
-60
Time (500 ms/div)
Time (20 ms/div)
D114
图6-27. Common-Mode Voltage Transient
Response
图6-28. Inverting Differential Input Overload
Recovery
Noninverting Input
Output
Supply Voltage
Output Voltage
0 V
0 V
Time (20 ms/div)
Time (10ms/div)
D113
D108
VS = 5.0 V
VS = 5.0 V, A2 device
图6-29. Noninverting Differential Input Overload
图6-30. Start-Up Response
Recovery
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Enable
Output
Supply Voltage
Output Voltage
0 V
0 V
Time (250 ms/div)
Time (100ms/div)
D021
D110
VS = 5.0 V, A3 device
VS = 5.0 V, A3 device
图6-32. Enable and Disable Response
图6-31. Brownout Recovery
30
120
100
80
IBP
IBN
IBN
IBP
20
10
60
40
20
0
0
-20
-40
-60
-80
-100
-10
-20
-30
-120
0
20
40
60
Differential Input Voltage (mV)
80 100 120 140 160 180 200
0
5
10 15 20 25 30 35 40 45 50 55
Differential Input Voltage (mV)
D120
D007
VS = 5.0 V, A1 device
VS = 5.0 V, A2, A3, A4, A5 devices
图6-33. IB+ and IB–vs. Differential Input Voltage
图6-34. IB+ and IB–vs. Differential Input Voltage
(INA191)
(INA191)
120
35
IBN
IBP
IBN
IBP
100
80
25
60
40
15
5
20
0
-5
-20
-40
-60
-80
-100
-15
-25
-35
-120
-60
-40
-20
0
20
40
60
-110 -90 -70 -50 -30 -10 10 30 50 70 90 110
Differential Input Voltage (mV)
Differential Input Voltage (mV)
VS = 5.0 V, VREF = VS /2, A2, A3, A4, A5 devices
VS = 5.0 V, VREF = VS /2, A1 device
图6-36. IB+ and IB–vs. Differential Input Voltage
图6-35. IB+ and IB–vs. Differential Input Voltage
(INA2191)
(INA2191)
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2.75
5.5
5
-40èC
25èC
125èC
-40èC
2.5
25èC
4.5
4
125èC
2.25
2
3.5
3
1.75
1.5
1.25
1
2.5
2
1.5
1
0.75
0.5
0.25
0
0.5
0
0
0.5
1
1.5
2
2.5
3
Output Voltage (V)
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
Output Voltage (V)
3.5
4
4.5
5
D107
D105
VS = 5.0 V, VENABLE = 0 V, A4, A5 devices
VS = 5.0 V, VENABLE = 0 V, A1, A2, A3 devices
图6-38. Output Leakage vs. Output Voltage
图6-37. Output Leakage vs. Output Voltage
1.25
3
-40èC
25èC
2.5
1
25èC
-40èC
125èC
125èC
2
1.5
1
0.75
0.5
0.25
0
0.5
0
-0.5
-1
-0.25
-0.5
-0.75
-1
-1.5
-2
-2.5
0
0.5
1
1.5
2
2.5
3
Output Voltage (V)
3.5
4
4.5
5
0
0.5
1
1.5
2
2.5
3
Output Voltage (V)
3.5
4
4.5
5
D040
D048
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V, A1, A2, A3 devices
VS = 5.0 V, VENABLE = 0 V, VREF = 2.5 V, A4, A5 devices
图6-39. Output Leakage vs. Output Voltage
图6-40. Output Leakage vs. Output Voltage
(INA2191)
(INA2191)
5000
1000
160
140
120
100
80
A5
A4
A3
A2
100
10
1
Gain Variants
A1
A2
A3
A4
A5
A1
0.1
60
10
100
1k
10k
Frequency (Hz)
100k
1M
10M
10
100
1k
Frequency (Hz)
10k
100k
VS = 5.0 V, VCM = 0 V
VS = 5.0 V, VCM = 0 V, VREF = VS /2
图6-41. Output Impedance vs. Frequency
图6-42. Channel Separation vs. Frequency
(INA2191)
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7 Detailed Description
7.1 Overview
The INAx191 is a low bias current, 40-V common-mode, current-sensing amplifier with an enable pin. When
disabled, the output goes to a high-impedance state, and the supply current draw is reduced to less than 0.1 µA
per channel. The INAx191 is intended for use in either low-side and high-side current-sensing configurations
where high accuracy and low current consumption are required. The INAx191 is a specially designed current-
sensing amplifier, that accurately measure voltages developed across current-sensing resistors on common-
mode voltages that far exceed the supply voltage. Current can be measured on input voltage rails as high as 40
V, with a supply voltage (VS) as low as 1.7 V.
7.2 Functional Block Diagram
ENABLE
VS
INA191
IN+
œ
œ
+
OUT
œ
+
+
INœ
GND
图7-1. INA191 Diagram
VS
INA2191
ENABLE1
IN+1
œ
œ
+
OUT1
REF1
œ
+
+
INœ1
ENABLE2
IN+2
œ
œ
+
OUT2
œ
+
+
INœ2
REF2
GND
图7-2. INA2191 Diagram
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7.3 Feature Description
7.3.1 Precision Current Measurement
The INAx191 provides accurate current measurements over a wide dynamic range. The high accuracy of the
device is attributable to the low gain error and offset specifications. The offset voltage of the INAx191 is less than
12 µV. In this case, the low offset improves the accuracy at light loads when VIN+ approaches VIN–
.
Another advantage of low offset is the ability to use a lower-value shunt resistor that reduces the power loss in
the current-sense circuit, and improves the power efficiency of the end application.
The maximum gain error of the INAx191 is specified to be within 0.25% for most gain options. As the sensed
voltage becomes much larger than the offset voltage, the gain error becomes the dominant source of error in the
current-sense measurement. When the device monitors currents near the full-scale output range, the total
measurement error approaches the value of the gain error.
7.3.2 Low Input Bias Current
The INAx191 is different from many current-sense amplifiers because this device offers very low input bias
current. The low input bias current of the INAx191 has three primary benefits.
The first benefit is the reduction of the current consumed by the device in both the enabled and disabled states.
Classical current-sense amplifier topologies typically consume tens of microamps of current at the inputs. For
these amplifiers, the input current is the result of the resistor network that sets the gain and additional current to
bias the input amplifier. To reduce the bias current to near zero, the INAx191 uses a capacitively coupled
amplifier on the input stage, followed by a difference amplifier on the output stage.
The second benefit of low bias current is the ability to use input filters to reject high-frequency noise before the
signal is amplified. In a traditional current-sense amplifier, the addition of input filters comes at the cost of
reduced accuracy. However, as a result of the low bias currents, input filters have little effect on the
measurement accuracy of the INAx191.
The third benefit of low bias current is the ability to use a larger current-sense resistor. This ability allows the
device to accurately monitor currents as low as 1 µA.
7.3.3 Low Quiescent Current With Output Enable
The device features low quiescent current (IQ), while still providing sufficient small-signal bandwidth to be usable
in most applications. The quiescent current of the INA191 is only 43 µA (typical), while providing a small-signal
bandwidth of 35 kHz in a gain of 100. The low IQ and good bandwidth allow the device to be used in many
portable electronic systems without excessive drain on the battery. Because many applications only need to
periodically monitor current, the INAx191 features an enable pin for each output that turns off the device until
needed. When in the disabled state, the INAx191 typically draws 10 nA of total supply current per channel.
7.3.4 Bidirectional Current Monitoring (INA2191 Only)
The INA2191 can sense current flow through a sense resistor in both directions. The bidirectional current-
sensing capability is achieved by applying a voltage at the REF pin to offset the desired output voltage. A
positive differential voltage sensed at the inputs results in an output voltage that is greater than the applied
reference voltage. Likewise, a negative differential voltage at the inputs results in output voltage that is less than
the applied reference voltage. The output voltage of the current-sense amplifier is shown in 方程式 1. Equation
variables such as VOUT are valid for either VOUT1 or VOUT2 depending on which channel used.
VOUT = ILOADì RSENSE ìGAIN + V
REF
(1)
where
• ILOAD is the load current to be monitored.
• RSENSE is the current-sense resistor.
• GAIN is the gain option of the selected device.
• VREF is the voltage applied to the REF pin.
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7.3.5 High-Side and Low-Side Current Sensing
The INAx191 supports input common-mode voltages from –0.2 V to +40 V. Because of the internal topology,
the common-mode range is not restricted by the power-supply voltage (VS). The ability to operate with common-
mode voltages greater or less than VS allows the INAx191 to be used in high-side and low-side current-sensing
applications, as shown in 图7-3.
Bus Supply
up to +40 V
IN+
High-Side Sensing
RSENSE
Common-mode voltage (VCM
is bus-voltage dependent.
)
INœ
LOAD
IN+
Low-Side Sensing
Common-mode voltage (VCM
is always near ground and is
)
RSENSE
isolated from bus-voltage spikes.
INœ
图7-3. High-Side and Low-Side Sensing Connections
7.3.6 High Common-Mode Rejection
The INAx191 uses a capacitively coupled amplifier on the front end. Therefore, dc common-mode voltages are
blocked from downstream circuits, resulting in very high common-mode rejection. The common-mode rejection
of the INAx191 is 150 dB (typical). The ability to reject changes in the DC common-mode voltage allows the
INAx191 to monitor both high- and low-voltage rail currents with very little change in the offset voltage.
7.3.7 Rail-to-Rail Output Swing
The INAx191 supports linear current-sensing operation with the output close to the supply rail and ground. The
maximum specified output swing to the positive rail is VS – 40 mV, and the maximum specified output swing to
GND is only GND + 1 mV with –10 mV of differential overdrive. For cases where the sense current is zero, the
swing to ground is determined by the zero current output specification. The value of the zero current output
voltage can differ from the specified value depending on the common-mode voltage, supply voltage, and output
load. The close-to-rail output swing maximizes the usable output range, particularly when operating the device
from a 1.8-V supply.
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7.4 Device Functional Modes
7.4.1 Normal Operation
The INAx191 is in normal operation when the following conditions are met:
• The power-supply voltage (VS) is between 1.7 V and 5.5 V.
• The common-mode voltage (VCM) is within the specified range of –0.2 V to +40 V.
• The maximum differential input signal times the gain plus VREF is less than the positive output voltage swing
VSP. VREF = 0 V for INA191.
• The ENABLE pin is driven or connected to VS.
• The minimum differential input signal times the gain plus VREF is greater than the swing to GND, VZL (see 节
7.3.7). VREF = 0 V for INA191.
During normal operation, this device produces an output voltage that is the amplified representation of the
difference voltage from IN+ to IN– plus the voltage applied to the REF pin. For devices without a REF pin the
REF voltage is 0 V.
7.4.2 Unidirectional Mode
The INA191 always monitors current flow in a single direction, however, the INA2191 can be configured to
monitor current flowing in one direction (unidirectional) or in both directions (bidirectional) depending on how the
REF pin is connected. The most common case is unidirectional where the output is set to ground when no
current is flowing by connecting the REF pin to ground, as shown in 图 7-4. When the current flows from the bus
supply to the load, the input voltage from IN+ to IN– increases and causes the output voltage at the OUT pin to
increase. Pin names such as OUT apply to either OUT1 or OUT2 in the diagrams below depending on which
channel is used.
Bus Voltage
up to 40 V
RSENSE
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
Load
ISENSE
VS
ENABLE
INA2191 (½)
INœ
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
IN+
GND
图7-4. Typical Unidirectional Application
The linear range of the output stage is limited by how close the output voltage can approach ground under zero
input conditions. The zero current output voltage of the INA2191 is very small and for most unidirectional
applications the REF pin is simply grounded. However, if the measured current multiplied by the current sense
resistor and device gain is less than the zero current output voltage then bias the REF pin to a convenient value
above the zero current output voltage to get the output into the linear range of the device. To limit reference
rejection errors, buffer the reference voltage connected to the REF pin.
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A less-frequently used output biasing method is to connect the REF pin to the power-supply voltage, VS. This
method results in the output voltage saturating at 40 mV less than the supply voltage when no differential input
voltage is present. This method is similar to the output saturated low condition with no differential input voltage
when the REF pin is connected to ground. The output voltage in this configuration only responds to currents that
develop negative differential input voltage relative to the device IN– pin. Under these conditions, when the
negative differential input signal increases, the output voltage moves downward from the saturated supply
voltage. The voltage applied to the REF pin must not exceed VS.
Another use for the REF pin in unidirectional operation is to level shift the output voltage. 图 7-5 shows an
application where the device ground is set to a negative voltage so currents biased to negative supplies, as seen
in optical networking cards, can be measured. The GND of the INA2191 can be set to negative voltages, as long
as the inputs do not violate the common-mode range specification and the voltage difference between VS and
GND does not exceed 5.5 V. In this example, the output of the INA2191 is fed into a positive-biased ADC. By
grounding the REF pin, the voltages at the output will be positive and not damage the ADC. To make sure the
output voltage never goes negative, the supply sequencing must be the positive supply first, followed by the
negative supply.
+ 1.8 V
-3.3 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
INA2191 (½)
IN-
Capacitively
Coupled
Amplifier
œ
OUT
REF
ADC
+
IN+
GND
- 3.3 V
图7-5. Using the REF Pin to Level-Shift Output Voltage
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7.4.3 Bidirectional Mode (INA2191 Only)
The INA2191 is a dual channel bidirectional current-sense amplifier capable of measuring currents through a
resistive shunt in two directions. This bidirectional monitoring is common in applications that include charging
and discharging operations where the current flowing through the resistor can change directions.
Bus Voltage
up to 40 V
RSENSE
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
Load
ISENSE
VS
ENABLE
INA2191 (½)
INœ
Reference
Voltage
Capacitively
Coupled
Amplifier
œ
OUT
REF
VOUT
+
+
IN+
œ
GND
图7-6. Bidirectional Application
The ability to measure this current flowing in both directions is achieved by applying a voltage to the REF pin, as
shown in 图7-6. The voltage applied to REF (VREF) sets the output state that corresponds to the zero-input level
state. The output then responds by increasing above VREF for positive differential signals (relative to the IN–
pin) and responds by decreasing below VREF for negative differential signals. This reference voltage applied to
the REF pin can be set anywhere between 0 V to VS. For bidirectional applications, VREF is typically set at VS/2
for equal signal range in both current directions. In some cases, VREF is set at a voltage other than VS/2, like
when the bidirectional current and corresponding output signal do not need to be symmetrical.
7.4.4 Input Differential Overload
If the differential input voltage (VIN+ – VIN–) times gain (plus VREF for INA2191) exceeds the voltage swing
specification, the INAx191 drives the output as close as possible to the positive supply or ground, and does not
provide accurate measurement of the differential input voltage. If this input overload occurs during normal circuit
operation, then reduce the value of the shunt resistor or use a lower-gain version with the chosen sense resistor
to avoid this mode of operation. If a differential overload occurs in a fault event, then the output of the INAx191
returns to the expected value approximately 40 µs after the fault condition is removed. When the differential
voltage exceeds approximately 300 mV, the differential input impedance reduces to 3.3 kΩ, and results in a
rapid increase in bias currents as the differential voltage increases. A 3.3-kΩresistance exists between IN+ and
IN– during a differential overload condition; therefore, currents flowing into the IN+ pin flow out of the IN– pin.
An increase in bias currents during a input differential overload occurs even with the device is powered down.
Input differential overloads less than the absolute maximum voltage rating do not damage the device or result in
an output inversion.
7.4.5 Shutdown
The INAx191 features an active-high ENABLE pin(s) that shuts down the device when pulled to ground. When
the device is shut down, the quiescent current is reduced to 10 nA per channel (typical), the input bias currents
are further reduced, and the disabled output goes to a high-impedance state. When disabled, the low quiescent
and input currents extend the battery lifetime when the current measurement is not needed. When the ENABLE
pin is driven above the enable threshold voltage, the device turns back on. When enabled, the typical output
settling time is 130 µs.
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The output of the INAx191 goes to a high-impedance state when disabled; therefore, it is possible to connect
multiple outputs of the INAx191 together to a single ADC or measurement device, as shown in 图 7-7. When
connected in this way, enable only one INAx191 at a time, and make sure both devices have the same supply
voltage. Using the INA2191 with the same approach as shown in 图 7-7 provides the capability to monitor two
currents with a single device.
RSENSE
Bus Voltage1
up to 40 V
Supply Voltage
LOAD
1.7 V to 5.5 V
0.1 ꢀF
GPIO1
ENABLE
VS
INœ
Microcontroller
GPIO2
TI Device
OUT
ADC
IN+
GND
RSENSE
Bus Voltage2
up to 40 V
Supply Voltage
1.7 V to 5.5 V
LOAD
0.1 ꢀF
ENABLE
VS
OUT
INœ
TI Device
IN+
GND
图7-7. Multiplexing Multiple Devices With the ENABLE Pin
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
8.1 Application Information
The INAx191 amplifies the voltage developed across a current-sensing resistor as current flows through the
resistor to the load or ground.
8.1.1 Basic Connections
图8-1 shows the basic connections of the INAx191. Connect the input pins (IN+ and IN–) as closely as possible
to the shunt resistor to minimize any resistance in series with the shunt resistor. The ENABLE pin must be
controlled externally or connected to VS if not used.
Supply Voltage
1.7 V to 5.5 V
RSENSE
Bus Voltage
up to 40 V
LOAD
0.1 …F
100 pA
(typical)
100 pA
(typical)
ENABLE
VS
INœ
INA191
INA2191 (½)
OUT
ADC
Microcontroller
IN+
REF(1)
GND
(1) REF pin only available on INA2191
图8-1. Basic Connections for the INAx191
A power-supply bypass capacitor of at least 0.1 µF is required for proper operation. Applications with noisy or
high-impedance power supplies may require additional decoupling capacitors to reject power-supply noise.
Connect bypass capacitors close to the device pins.
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8.1.2 RSENSE and Device Gain Selection
The accuracy of any current-sense amplifier is maximized by choosing the current-sense resistor to be as large
as possible. A large sense resistor maximizes the differential input signal for a given amount of current flow and
reduces the error contribution of the offset voltage. However, there are practical limits as to how large the
current-sense resistor can be in a given application because of the resistor size and maximum allowable power
dissipation. 方程式 2 gives the maximum value for the current-sense resistor for a given power dissipation
budget:
PDMAX
RSENSE
<
2
IMAX
(2)
where:
• PDMAX is the maximum allowable power dissipation in RSENSE
• IMAX is the maximum current that flows through RSENSE
.
.
An additional limitation on the size of the current-sense resistor and device gain is due to the power-supply
voltage, VS, and device swing-to-rail limitations. In order to make sure that the current-sense signal is properly
passed to the output, both positive and negative output swing limitations must be examined. 方程式 3 provides
the maximum values of RSENSE and GAIN to keep the device from hitting the positive swing limitation.
IMAX ìRSENSE ìGAIN < VSP - VREF
where:
(3)
• IMAX is the maximum current that flows through RSENSE
• GAIN is the gain of the current-sense amplifier.
.
• VSP is the positive output swing as specified in the data sheet.
• VREF is the reference input. This is node is internally grounded for the INA191 and a value of 0 V should be
used for that device.
To avoid positive output swing limitations when selecting the value of RSENSE, there is always a trade-off
between the value of the sense resistor and the gain of the device under consideration. If the sense resistor
selected for the maximum power dissipation is too large, then it is possible to select a lower-gain device in order
to avoid positive swing limitations.
The zero current output voltage places a limit on how small of a sense resistor can be used in a given
application. 方程式4 provides the limit on the minimum size of the sense resistor.
IMIN × RSENSE × GAIN > VZL - VREF
(4)
where:
• IMIN is the minimum current flows through RSENSE
• GAIN is the gain of the current-sense amplifier.
.
• VZL is the zero current output voltage of the device (see the 节7.3.7 section for more information).
• VREF is the reference input. This node is internally grounded for the INA191 and a value of 0 V should be
used for that device.
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8.1.3 Signal Conditioning
When performing accurate current measurements in noisy environments, the current-sensing signal is often
filtered. The INAx191 features low input bias currents. Therefore, it is possible to add a differential mode filter to
the input without sacrificing the current-sense accuracy. Filtering at the input is advantageous because this
action attenuates differential noise before the signal is amplified. 图 8-2 provides an example of how to use a
filter on the input pins of the device.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
RSENSE
Load
VS
ENABLE
Capacitively Coupled
Amplifier
RF
INœ
1
CF
œ
f3dB
=
OUT
VOUT
RDIFF
4pRFCF
+
RF
IN+
TI Device
图8-2. Filter at the Input Pins
The differential input impedance (RDIFF) shown in 图8-2 limits the maximum value for RF. The value of RDIFF is a
function of the device temperature and gain option, as shown in 图8-3.
4
A1
A2, A3, A4, A5
3.5
3
2.5
2
1.5
1
-50
-25
0
25
50
75
100
125
150
Temperature (èC)
图8-3. Differential Input Impedance vs. Temperature
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As the voltage drop across the sense resistor (VSENSE) increases, the amount of voltage dropped across the
input filter resistors (RF) also increases. The increased voltage drop results in additional gain error. The error
caused by these resistors is calculated by the resistor divider equation shown in 方程式5.
≈
∆
«
’
RDIFF
Error(%) = 1-
ì100
∆
÷
÷
◊
RSENSE+ RDIFF + 2ìR
(
)
F
(5)
where:
• RSENSE is the current sense resistor, as defined in 方程式2.
• RDIFF is the differential input impedance.
• RF is the added value of the series filter resistance.
The input stage of the INAx191 uses a capacitive feedback amplifier topology in order to achieve high DC
precision. As a result, periodic high-frequency shunt voltage (or current) transients of significant amplitude (10
mV or greater) and duration (hundreds of nanoseconds or greater) may be amplified by the INAx191, even
though the transients are greater than the device bandwidth. Use a differential input filter in these applications to
minimize disturbances at the INAx191 output.
The high input impedance and low bias current of the INAx191 provides flexibility in the input filter design without
impacting the accuracy of current measurement. For example, set RF = 100 Ωand CF = 22 nF to achieve a low-
pass filter corner frequency of 36.2 kHz. These filter values significantly attenuate most unwanted high-
frequency signals at the input without severely impacting the current-sensing bandwidth or precision. If a lower
corner frequency is desired, increase the value of CF.
Filtering at the input reduces differential noise across the sense resistor. If high-frequency, common-mode noise
is a concern, add an RC filter from the OUT pin to ground. The RC filter helps filter out both differential and
common mode noise, as well as internally generated noise from the device. The value for the resistance of the
RC filter is limited by the impedance of the output load. Any current drawn by the load manifests as an external
voltage drop from the INAx191 OUT pin to the load input. To select the optimal values for the output filter when
driving SAR ADCs or other dynamic loads, use 图 6-41 and see the Closed-Loop Analysis of Load-Induced
Amplifier Stability Issues Using ZOUT Application Report
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8.1.4 Common-Mode Voltage Transients
With a small amount of additional circuitry, the INAx191 can be used in circuits subject to transients that exceed
the absolute maximum voltage ratings. The most simple way to protect the inputs from negative transients is to
add resistors in series to the IN– and IN+ pins. Use resistors that are 1 kΩ or less, and limit the current in the
ESD structures to less than 5 mA. For example, using 1-kΩ resistors in series with the INAx191 allows voltages
as low as –5 V, while limiting the ESD current to less than 5 mA. If protection from high-voltage or more-
negative, common-voltage transients is needed, use the circuits shown in 图8-4 and 图8-5. When implementing
these circuits, use only Zener diodes or Zener-type transient absorbers (sometimes referred to as transzorbs);
any other type of transient absorber has an unacceptable time delay. Start by adding a pair of resistors as a
working impedance for the Zener diode, as shown in 图 8-4. Keep these resistors as small as possible; most
often, use around 100 Ω. Larger values can be used with an effect on gain that is discussed in 节 8.1.3. This
circuit limits only short-term transients; therefore, many applications are satisfied with a 100-Ω resistor along with
conventional Zener diodes of the lowest acceptable power rating. This combination uses the least amount of
board space. These diodes can be found in packages as small as SOT-523 or SOD-523.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
TI Device
RPROTECT
INœ
< 1 kW
Capacitively
Coupled
Amplifier
œ
OUT
VOUT
+
RPROTECT
IN+
< 1 kW
GND
图8-4. Transient Protection Using Dual Zener Diodes
In the event that low-power Zener diodes do not have sufficient transient absorption capability, a higher-power
transzorb must be used. The most package-efficient solution involves using a single transzorb and back-to-back
diodes between the device inputs, as shown in 图 8-5. The most space-efficient solutions are dual, series-
connected diodes in a single SOT-523 or SOD-523 package. In either of the examples shown in 图 8-4 and 图
8-5, the total board area required by the INA191 with all protective components is less than that of an SO-8
package, and only slightly greater than that of an VSSOP-8 package.
Bus Voltage
up to 40 V
VS
1.7 V to 5.5 V
CBYPASS
0.1 µF
RSENSE
Load
VS
ENABLE
TI Device
RPROTECT
INœ
< 1 kW
Capacitively
Coupled
Amplifier
œ
OUT
Transorb
VOUT
+
RPROTECT
IN+
< 1 kW
GND
图8-5. Transient Protection Using a Single Transzorb and Input Clamps
For more information, see Current Shunt Monitor With Transient Robustness Reference Design.
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8.2 Typical Application
8.2.1 Microamp Current Measurement
The low input bias current of the INAx191 provides accurate monitoring of small-value currents. To accurately
monitor currents in the microamp range, increase the value of the sense resistor to increase the sense voltage
so that the error introduced by the offset voltage is small. The circuit configuration to monitor low-value currents
is shown in 图 8-6. As a result of the differential input impedance of the INAx191, limit the value of RSENSE to 1
kΩor less for best accuracy.
RSENSE ≤ 1 kO
12 V
LOAD
5 V
0.1 ꢀF
ENABLE
VS
INœ
INA191
INA2191 (½)
OUT
IN+
REF(1)
GND
(1) REF pin only available on INA2191
图8-6. Measuring Microamp Currents
8.2.1.1 Design Requirements
The design requirements for the circuit shown in 图8-6, are listed in 表8-1
表8-1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Power-supply voltage (VS)
5 V
12 V
Bus supply rail (VCM
)
Minimum sense current (IMIN
)
1 µA
Maximum sense current (IMAX
Device gain (GAIN)
)
150 µA
25 V/V
VREF = 0 V
Unidirectional Application
8.2.1.2 Detailed Design Procedure
The maximum value of the current-sense resistor is calculated based on choice of gain, value of the maximum
current the be sensed (IMAX), and the power supply voltage (VS). When operating at the maximum current, the
output voltage must not exceed the positive output swing specification, VSP. For the given design parameters,
the maximum value for RSENSE calculated in 方程式6 is 1.321 kΩ.
VSP
RSENSE
<
IMAX ìGAIN
(6)
However, because this value exceeds the maximum recommended value for RSENSE, a resistance value of 1 kΩ
must be used. When operating at the minimum current value, IMIN the output voltage must be greater than the
swing to GND (VSN), specification. For this example, the output voltage at the minimum current (VOUTMIN
)
calculated in 方程式7 is 25 mV, which is greater than the value for VSN
.
VOUTMIN = IMIN ìRSENSE ìGAIN
(7)
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8.2.1.3 Application Curve
图 8-7 shows the output of the device when disabled and enabled while measuring a 40-µA load current. When
disabled, the current draw from the device supply and inputs is less than 106 nA.
Enable
Output
0 V
Time (250 ms/div)
D030
图8-7. Output Disable and Enable Response
9 Power Supply Recommendations
The input circuitry of the INAx191 accurately measures beyond the power-supply voltage, VS. For example, VS
can be 5 V, whereas the bus supply voltage at IN+ and IN–can be as high as 40 V. However, the output voltage
range of the OUT pin is limited by the voltage on the VS pin. The INAx191 also withstands the full differential
input signal range up to 40 V at the IN+ and IN– input pins, regardless of whether or not the device has power
applied at the VS pin. There is no sequencing requirement for VS and VIN+ or VIN–
.
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10 Layout
10.1 Layout Guidelines
• Connect the input pins to the sensing resistor using a Kelvin or 4-wire connection. This connection technique
makes sure that only the current-sensing resistor impedance is detected between the input pins. Poor routing
of the current-sensing resistor commonly results in additional resistance present between the input pins.
Given the very low ohmic value of the current resistor, any additional high-current carrying impedance can
cause significant measurement errors.
• Place the power-supply bypass capacitor as close as possible to the device power supply and ground pins.
The recommended value of this bypass capacitor is 0.1 µF. To compensate for noisy or high-impedance
power supplies, add more decoupling capacitance.
• When routing the connections from the current-sense resistor to the device, keep the trace lengths as short
as possible. Place input filter capacitor CF as close as possible to the input pins of the device.
10.2 Layout Examples
RSHUNT
(1)
(1)
RF
RF
(1)
CF
INœ
IN+
VS
B1
B2
B3
A1
A2
A3
Connect to Supply
(1.7 V to 5.5 V)
VIA to Ground
Plane
GND
CBYPASS
ENABLE
OUT
Current
Sense Output
Connect to Control or VS
(Do not float)
图10-1. Recommended Layout DSBGA (YFD) Package
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RSHUNT1
(1)
(1)
RF1
RF1
Connect to Supply
(1.7 V to 5.5 V)
Standard VIA
Filled VIA
CBYPASS
(1)
Top Layer Trace
VIA to Ground
Plane
CF1
Bottom/Mid Layer Trace
Current Sense
Output Channel 1
OUT1
REF1
IN+1
IN-1
VS
EN1
EN2
Connect to GND for unidirectional
measurement or external reference
for bidirectional measurements.
Connect to external control if enable
feature is used. Connect to VS if enable is
not needed. Do not leave floating.
IN-2
REF2
OUT2
Current Sense
Output Channel 2
IN+2
GND
(1)
CF2
VIA to Ground
Plane
(1) RF and CF components are optional in low noise/ripple environments.
(1)
(1)
RF2
RF2
RSHUNT2
图10-2. Recommended Layout Dual Channel DSBGA (YBJ) Package
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
Texas Instruments, INA191EVM user's guide
11.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册，即可每周接收产品信息更
改摘要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料，可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 静电放电警告
静电放电(ESD) 会损坏这个集成电路。德州仪器(TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OUTLINE
YFD0006-C02
DSBGA - 0.4 mm max height
SCALE 14.000
DIE SIZE BALL GRID ARRAY
A
1.20
1.14
B
BALL A1
CORNER
0.80
0.73
0.4 MAX
C
SEATING PLANE
0.175
0.125
BALL TYP
0.8 TYP
B
SYMM
0.4
TYP
A
0.285
0.185
6X
0.015
3
1
2
SYMM
C A B
0.4
TYP
4224626/B 02/2019
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
6X ( 0.225)
1
2
A
(0.4) TYP
B
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:50X
0.05 MAX
0.05 MIN
(
0.225)
METAL
(
0.225)
SOLDER MASK
OPENING
EXPOSED
METAL
EXPOSED
METAL
METAL UNDER
SOLDER MASK
SOLDER MASK
OPENING
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK
DEFINED
SOLDER MASK DETAILS
NOT TO SCALE
4224626/B 02/2019
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
Refer to Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
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EXAMPLE STENCIL DESIGN
YFD0006-C02
DSBGA - 0.4 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
6X ( 0.25)
1
3
2
A
SYMM
(0.4) TYP
B
METAL
TYP
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE:50X
4224626/B 02/2019
NOTES: (continued)
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PACKAGE OUTLINE
YBJ0012-C01
DSBGA - 0.35 mm max height
SCALE 10.000
DIE SIZE BALL GRID ARRAY
1.20
1.14
A
B
BALL A1
CORNER
1.558
1.498
C
0.35 MAX
SEATING PLANE
0.05 C
0.135
0.075
BALL TYP
SYMM
D
C
1.2
TYP
SYMM
B
A
0.4
TYP
1
2
3
0.20
0.16
12X
0.4
TYP
0.015
C A B
4229771/A 06/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
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EXAMPLE BOARD LAYOUT
YBJ0012-C01
DSBGA - 0.35 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
12X ( 0.2)
(0.4) TYP
1
2
3
A
B
C
SYMM
D
SYMM
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE: 40X
0.05 MIN
0.05 MAX
METAL UNDER
SOLDER MASK
(
0.2)
METAL
(
0.2)
EXPOSED
METAL
SOLDER MASK
OPENING
EXPOSED
METAL
SOLDER MASK
OPENING
SOLDER MASK
DEFINED
NON-SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
NOT TO SCALE
4229771/A 06/2023
NOTES: (continued)
3. Final dimensions may vary due to manufacturing tolerance considerations and also routing constraints.
See Texas Instruments Literature No. SNVA009 (www.ti.com/lit/snva009).
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EXAMPLE STENCIL DESIGN
YBJ0012-C01
DSBGA - 0.35 mm max height
DIE SIZE BALL GRID ARRAY
(0.4) TYP
(R0.05) TYP
3
12X ( 0.21)
1
2
A
(0.4) TYP
B
C
SYMM
METAL
TYP
D
SYMM
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
SCALE: 40X
4229771/A 06/2023
NOTES: (continued)
4. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release.
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重要声明和免责声明
TI 提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，不保证没
有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担保。
这些资源可供使用TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他安全、安保或其他要求。这些资源如有变更，恕不另行通知。TI 授权您仅可
将这些资源用于研发本资源所述的TI 产品的应用。严禁对这些资源进行其他复制或展示。您无权使用任何其他TI 知识产权或任何第三方知
识产权。您应全额赔偿因在这些资源的使用中对TI 及其代表造成的任何索赔、损害、成本、损失和债务，TI 对此概不负责。
TI 提供的产品受TI 的销售条款(https:www.ti.com/legal/termsofsale.html) 或ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI
提供这些资源并不会扩展或以其他方式更改TI 针对TI 产品发布的适用的担保或担保免责声明。重要声明
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2021，德州仪器(TI) 公司
PACKAGE OPTION ADDENDUM
www.ti.com
26-Mar-2022
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
INA191A1IYFDR
INA191A2IYFDR
INA191A3IYFDR
INA191A4IYFDR
INA191A5IYFDR
INA2191A1IYBJR
INA2191A2IYBJR
INA2191A3IYBJR
INA2191A4IYBJR
INA2191A5IYBJR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFD
YFD
YFD
YFD
YFD
YBJ
YBJ
YBJ
YBJ
YBJ
6
6
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
SNAGCU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
1E3
SNAGCU
SNAGCU
SNAGCU
SNAGCU
SAC396
SAC396
SAC396
SAC396
SAC396
1E2
6
1E4
6
1E5
6
1E6
12
12
12
12
12
29J1
29K1
29L1
29M1
29N1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Mar-2022
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
K0
P1
W
B0
Reel
Diameter
Cavity
A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
Overall width of the carrier tape
W
P1 Pitch between successive cavity centers
Reel Width (W1)
QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2
Q3 Q4
Q1 Q2
Q3 Q4
User Direction of Feed
Pocket Quadrants
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
INA191A1IYFDR
INA191A1IYFDR
INA191A2IYFDR
INA191A2IYFDR
INA191A3IYFDR
INA191A3IYFDR
INA191A4IYFDR
INA191A4IYFDR
INA191A5IYFDR
INA191A5IYFDR
INA2191A1IYBJR
INA2191A2IYBJR
INA2191A3IYBJR
INA2191A4IYBJR
INA2191A5IYBJR
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YBJ
YBJ
YBJ
YBJ
YBJ
6
6
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
180.0
178.0
178.0
180.0
178.0
180.0
180.0
178.0
180.0
178.0
180.0
180.0
180.0
180.0
180.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
0.84
0.84
0.84
0.84
0.84
0.84
0.84
0.84
0.84
0.84
1.3
1.25
1.27
1.27
1.25
1.27
1.25
1.25
1.27
1.25
1.27
1.66
1.66
1.66
1.66
1.66
0.5
0.46
0.46
0.5
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q2
Q1
Q1
Q1
Q1
Q1
6
6
6
0.46
0.5
6
6
0.5
6
0.46
0.5
6
6
0.46
0.47
0.47
0.47
0.47
0.47
12
12
12
12
12
1.3
1.3
1.3
1.3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jun-2022
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
L
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA191A1IYFDR
INA191A1IYFDR
INA191A2IYFDR
INA191A2IYFDR
INA191A3IYFDR
INA191A3IYFDR
INA191A4IYFDR
INA191A4IYFDR
INA191A5IYFDR
INA191A5IYFDR
INA2191A1IYBJR
INA2191A2IYBJR
INA2191A3IYBJR
INA2191A4IYBJR
INA2191A5IYBJR
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
DSBGA
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YFD
YBJ
YBJ
YBJ
YBJ
YBJ
6
6
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
3000
182.0
220.0
220.0
182.0
220.0
182.0
182.0
220.0
182.0
220.0
182.0
182.0
182.0
182.0
182.0
182.0
220.0
220.0
182.0
220.0
182.0
182.0
220.0
182.0
220.0
182.0
182.0
182.0
182.0
182.0
20.0
35.0
35.0
20.0
35.0
20.0
20.0
35.0
20.0
35.0
20.0
20.0
20.0
20.0
20.0
6
6
6
6
6
6
6
6
12
12
12
12
12
Pack Materials-Page 2
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2023，德州仪器 (TI) 公司
相关型号：
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INA191_V02
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