INA333AIDGKRG4 [TI]
Micro-Power (50mA), Zer?-Drift, Rail-to-Rail Out Instrumentation Amplifier; 微功率（ 50毫安） ，泽尔？ -Drift ，轨到轨输出仪表放大器
| 型号： | INA333AIDGKRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Micro-Power (50mA), Zer?-Drift, Rail-to-Rail Out Instrumentation Amplifier |
| 文件： | 总25页 (文件大小：858K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INA333
www.ti.com ..................................................................................................................................................... SBOS445B–JULY 2008–REVISED OCTOBER 2008
Micro-Power (50µA), Zerø-Drift, Rail-to-Rail Out
Instrumentation Amplifier
1
FEATURES
DESCRIPTION
2
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LOW OFFSET VOLTAGE: 25µV (max), G ≥ 100
The INA333 is a low-power, precision instrumentation
amplifier offering excellent accuracy. The versatile
3-op amp design, small size, and low power make it
ideal for a wide range of portable applications.
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LOW DRIFT: 0.1µV/°C, G ≥ 100
LOW NOISE: 50nV/√Hz, G ≥ 100
HIGH CMRR: 100dB (min), G ≥ 10
A single external resistor sets any gain from 1 to
1000. The INA333 is designed to use an
industry-standard gain equation: G = 1 + (100kΩ/RG).
LOW INPUT BIAS CURRENT: 200pA (max)
SUPPLY RANGE: +1.8V to +5.5V
INPUT VOLTAGE: (V–) +0.1V to (V+) –0.1V
OUTPUT RANGE: (V–) +0.05V to (V+) –0.05V
LOW QUIESCENT CURRENT: 50µA
OPERATING TEMPERATURE: –40°C to +125°C
RFI FILTERED INPUTS
The INA333 provides very low offset voltage (25µV,
G ≥ 100), excellent offset voltage drift (0.1µV/°C,
G ≥ 100), and high common-mode rejection (100dB
at G ≥ 10). It operates with power supplies as low as
1.8V (±0.9V), and quiescent current is only
50µA—ideal for battery-operated systems. Using
autocalibration techniques to ensure excellent
precision over the extended industrial temperature
range, the INA333 also offers exceptionally low noise
density (50nV/√Hz) that extends down to dc.
MSOP-8 AND DFN-8 PACKAGES
APPLICATIONS
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BRIDGE AMPLIFIERS
ECG AMPLIFIERS
The INA333 is available in both MSOP-8 and DFN-8
surface-mount packages and is specified over the
TA = –40°C to +125°C temperature range.
PRESSURE SENSORS
MEDICAL INSTRUMENTATION
PORTABLE INSTRUMENTATION
WEIGH SCALES
THERMOCOUPLE AMPLIFIERS
RTD SENSOR AMPLIFIERS
DATA ACQUISITION
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V+
7
2
VIN-
RFI Filtered Inputs
150kW
150kW
A1
RFI Filtered Inputs
1
50kW
6
5
VOUT
A3
RG
50kW
8
RFI Filtered Inputs
RFI Filtered Inputs
150kW
150kW
REF
A2
3
VIN+
INA333
4
100kW
V-
G = 1 +
RG
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008, Texas Instruments Incorporated
INA333
SBOS445B–JULY 2008–REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PACKAGE/ORDERING INFORMATION(1)
PRODUCT
PACKAGE-LEAD
MSOP-8
PACKAGE DESIGNATOR
PACKAGE MARKING
DGK
DRG
I333
INA333
DFN-8
I333A
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS(1)
INA333
+7
UNIT
V
Supply voltage
Analog input voltage range(2)
Output short-circuit(3)
(V–) – 0.3 to (V+) + 0.3
V
Continuous
Operating temperature range, TA
Storage temperature range, TA
Junction temperature, TJ
–40 to +150
–65 to +150
+150
°C
°C
°C
V
Human body model (HBM)
4000
ESD rating
Charged device model (CDM)
Machine model (MM)
1000
V
200
V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not implied.
(2) Input terminals are diode-clamped to the power-supply rails. Input signals that can swing more than 0.3V beyond the supply rails should
be current limited to 10mA or less.
(3) Short-circuit to ground.
PIN CONFIGURATIONS
DGK PACKAGE
DRG PACKAGE
MSOP-8
DFN-8
(TOP VIEW)
(TOP VIEW)
RG
VIN-
VIN+
V-
RG
1
2
3
4
8
7
6
5
RG
VIN-
VIN+
V-
RG
1
2
3
4
8
7
6
5
Exposed
Thermal
Die Pad
on
V+
V+
VOUT
VOUT
Underside
REF
REF
INA333
INA333
2
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ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 10kΩ, VREF = VS/2, and G = 1, unless otherwise noted.
INA333
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
INPUT(1)
Offset voltage, RTI(2)
vs Temperature
vs Power supply
Long-term stability
Turn-on time to specified VOSI
Impedance
VOSI
PSR
±10 ±25/G
±25 ±75/G
±0.1 ±0.5/G
±5 ±15/G
µV
µV/°C
µV/V
1.8V ≤ VS ≤ 5.5V
±1 ±5/G
(3)
See note
See Typical characteristics
Differential
ZIN
ZIN
100 || 3
100 || 3
GΩ || pF
GΩ || pF
V
Common-mode
Common-mode voltage range
Common-mode rejection
G = 1
VCM
CMR
VO = 0V
(V–) + 0.1
(V+) – 0.1
DC to 60Hz
VCM = (V–) + 0.1V to (V+) – 0.1V
VCM = (V–) + 0.1V to (V+) – 0.1V
VCM = (V–) + 0.1V to (V+) – 0.1V
VCM = (V–) + 0.1V to (V+) – 0.1V
80
90
dB
dB
dB
dB
G = 10
100
100
100
110
115
115
G = 100
G = 1000
INPUT BIAS CURRENT
Input bias current
vs Temperature
Input offset current
vs Temperature
INPUT VOLTAGE NOISE
Input voltage noise
f = 10Hz
IB
±70
±200
pA
pA/°C
pA
See Typical Characteristic curve
±50 ±200
IOS
See Typical Characteristic curve
pA/°C
eNI
G = 100, RS = 0Ω
50
50
50
1
nV/√Hz
nV/√Hz
nV/√Hz
µVPP
f = 100Hz
f = 1kHz
f = 0.1Hz to 10Hz
Input current noise
f = 10Hz
iN
100
2
fA/√Hz
f = 0.1Hz to 10Hz
GAIN
pAPP
Gain equation
Range of gain
Gain error
G
1 + (100kΩ/RG)
V/V
V/V
1
1000
VS = 5.5V, (V–) + 100mV ≤ VO ≤ (V+) – 100mV
G = 1
±0.01
±0.05
±0.07
±0.25
±0.1
±0.25
±0.25
±0.5
%
%
%
%
G = 10
G = 100
G = 1000
(1) Total VOS, Referred-to-input = (VOSI) + (VOSO/G).
(2) RTI = Referred-to-input.
(3) 300-hour life test at +150°C demonstrated randomly distributed variation of approximately 1µV.
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ELECTRICAL CHARACTERISTICS: VS = +1.8V to +5.5V (continued)
Boldface limits apply over the specified temperature range, TA = –40°C to +125°C.
At TA = +25°C, RL = 10kΩ, VREF = VS/2, and G = 1, unless otherwise noted.
INA333
PARAMETER
GAIN (continued)
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Gain vs Temperature
G = 1
G > 1(4)
±1
±5
ppm/°C
ppm/°C
±15
±50
Gain nonlinearity
G = 1 to 1000
OUTPUT
VS = 5.5V, (V–) + 100mV ≤ VO ≤ (V+) – 100mV
RL = 10kΩ
10
ppm
(5)
Output voltage swing from rail(5)
Capacitive load drive
Short-circuit current
FREQUENCY RESPONSE
Bandwidth, –3dB
G = 1
VS = 5.5V, RL = 10kΩ
See note
500
50
mV
pF
ISC
Continuous to common
–40, +5
mA
150
35
kHz
kHz
kHz
Hz
G = 10
G = 100
3.5
350
G = 1000
Slew rate
SR
tS
VS = 5V, VO = 4V Step
G = 1
0.16
0.05
V/µs
V/µs
G = 100
Settling time to 0.01%
G = 1
VSTEP = 4V
VSTEP = 4V
50
µs
µs
G = 100
400
Settling time to 0.001%
G = 1
tS
VSTEP = 4V
VSTEP = 4V
60
500
75
µs
µs
µs
G = 100
Overload recovery
REFERENCE INPUT
RIN
50% overdrive
300
kΩ
Voltage range
POWER SUPPLY
Voltage range
Single
V–
V+
V
+1.8
±0.9
+5.5
±2.75
75
V
V
Dual
Quiescent current
vs Temperature
TEMPERATURE RANGE
Specified temperature range
Operating temperature range
Thermal resistance
MSOP
IQ
VIN = VS/2
50
µA
µA
80
–40
–40
+125
+150
°C
°C
θJA
100
65
°C/W
°C/W
DFN
(4) Does not include effects of external resistor RG.
(5) See Typical Characteristics curve, Output Voltage Swing vs Output Current (Figure 29).
4
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TYPICAL CHARACTERISTICS
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
INPUT VOLTAGE OFFSET DRIFT
INPUT OFFSET VOLTAGE
(–40°C to +125°C)
VS = 5.5V
VS = 5.5V
Input Offset Voltage (mV)
Input Voltage Offset Drift (mV/°C)
Figure 1.
Figure 2.
OUTPUT VOLTAGE OFFSET DRIFT
(–40°C to +125°C)
OUTPUT OFFSET VOLTAGE
VS = 5.5V
VS = 5.5V
Output Offset Voltage (mV)
Output Voltage Offset Drift (mV/°C)
Figure 3.
Figure 4.
OFFSET VOLTAGE vs COMMON-MODE VOLTAGE
0.1Hz TO 10Hz NOISE
0
-5
Gain = 1
VS = 1.8V
VS = 5V
-10
-15
-20
-25
Time (1s/div)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
VCM (V)
Figure 5.
Figure 6.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
0.1Hz TO 10Hz NOISE
SPECTRAL NOISE DENSITY
1000
100
10
1000
100
10
Gain = 100
Output Noise
Current Noise
Input Noise
2
(Output Noise)
G
Total Input-Referred Noise =
(Input Noise)2
+
1
1
0.1
1
10
100
Frequency (Hz)
Figure 8.
1k
10k
Time (1s/div)
Figure 7.
NONLINEARITY ERROR
LARGE SIGNAL RESPONSE
0.012
0.008
0.004
0
Gain = 1
G = 1000
VS = ±2.75V
G = 100
G = 10
G = 1
-0.004
-0.008
-0.012
Time (25ms/div)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
VOUT (V)
Figure 9.
Figure 10.
LARGE-SIGNAL STEP RESPONSE
SMALL-SIGNAL STEP RESPONSE
Gain = 100
Gain = 1
Time (100ms/div)
Time (10ms/div)
Figure 11.
Figure 12.
6
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
SMALL-SIGNAL STEP RESPONSE
SETTLING TIME vs GAIN
10000
1000
100
Gain = 100
0.001%
0.01%
0.1%
10
Time (100ms/div)
1
10
100
1000
Gain (V/V)
Figure 13.
Figure 14.
STARTUP SETTLING TIME
GAIN vs FREQUENCY
80
60
Gain = 1
G = 1000
Supply
G = 100
G = 10
40
VOUT
20
G = 1
0
-20
-40
-60
Time (50ms/div)
10
100
1k
10k
100k
1M
Frequency (Hz)
Figure 15.
Figure 16.
COMMON-MODE REJECTION RATIO
COMMON-MODE REJECTION RATIO vs TEMPERATURE
10
VS = ±2.75V
VS = 5.5V
8
G = 1
VS = ±0.9V
6
4
G = 10
2
0
-2
-4
-6
-8
-10
G = 100,
G = 1000
-50
-25
0
25
50
75
100
125
150
Temperature (°C)
CMRR (mV/V)
Figure 17.
Figure 18.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
COMMON-MODE REJECTION RATIO vs FREQUENCY
160
TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE
2.5
VS = ±2.5V
2.0
140
120
100
80
VREF = 0
G = 1000
G = 100
1.0
All Gains
0
60
G = 1
-1.0
40
G = 10
20
-2.0
2.5
0
10
100
1k
10k
100k
-2.5 -2.0
-1.0
0
1.0
2.0 2.5
Frequency (Hz)
Output Voltage (V)
Figure 20.
Figure 19.
TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE
TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE
0.9
VS = ±0.9V
5
VS = +5V
0.7
VREF = 0
VREF = 0
4
0.5
0.3
3
0.1
All Gains
All Gains
-0.1
-0.3
-0.5
-0.7
-0.9
2
1
0
0
1
2
3
4
5
-0.9
-0.5 -0.3 -0.1 0.1 0.3
Output Voltage (V)
Figure 22.
0.5
0.7
0.9
-0.7
Output Voltage (V)
Figure 21.
TYPICAL COMMON-MODE RANGE vs OUTPUT VOLTAGE
1.8
VS = +1.8V
POSITIVE POWER-SUPPLY REJECTION RATIO
160
140
120
100
80
1.6
VREF = 0
G = 1000
1.4
1.2
G = 100
1.0
All Gains
0.8
0.6
0.4
0.2
0
60
G = 10
G = 1
40
20
0
0
0.2
0.4
0.5
0.8
1.0 1.2
1.4
1.6
1.8
1
10
100
1k
10k
100k
1M
Output Voltage (V)
Frequency (Hz)
Figure 24.
Figure 23.
8
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
NEGATIVE POWER-SUPPLY REJECTION RATIO
INPUT BIAS CURRENT vs TEMPERATURE
160
140
120
100
80
1200
1000
800
600
400
200
0
VS = 5V
+IB
-IB
G = 100
G = 1000
G = 10
60
V
= ±0.9V
V
= ±2.75V
S
S
40
G = 1
20
0
-200
-20
0.1
1
10
100
1k
10k
100k
1M
-50
-25
0
25
50
75
100
125
150
Frequency (Hz)
Temperature (°C)
Figure 25.
Figure 26.
| INPUT BIAS CURRENT | vs COMMON-MODE VOLTAGE
200
INPUT OFFSET CURRENT vs TEMPERATURE
250
200
150
100
50
180
160
140
120
100
80
V
V
= ±2.75V
= ±0.9V
S
60
0
VS = 5V
S
40
-50
-100
20
VS = 1.8V
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-50
-25
0
25
50
75
100
125
150
VCM (V)
Temperature (°C)
Figure 27.
Figure 28.
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
(V+)
QUIESCENT CURRENT vs TEMPERATURE
80
70
60
50
40
30
20
10
0
VS = ±2.75V
VS = ±0.9V
(V+) - 0.25
(V+) - 0.50
(V+) - 0.75
(V+) - 1.00
(V+) - 1.25
(V+) - 1.50
(V+) - 1.75
VS = 5V
(V-) + 1.75
(V-) + 1.50
(V-) + 1.25
(V-) + 1.00
(V-) + 0.75
(V-) + 0.50
(V-) + 0.25
(V-)
VS = 1.8V
+125°C
+25°C
-40°C
-50
-25
0
25
50
75
100
125
150
0
10
20
30
40
50
60
Temperature (°C)
IOUT (mA)
Figure 29.
Figure 30.
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TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, VS = 5V, RL = 10kΩ, VREF = midsupply, and G = 1, unless otherwise noted.
QUIESCENT CURRENT vs COMMON-MODE VOLTAGE
80
70
VS = 5V
60
50
40
VS = 1.8V
30
20
10
0
0
1.0
2.0
3.0
4.0
5.0
VCM (V)
Figure 31.
10
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APPLICATION INFORMATION
Figure 32 shows the basic connections required for
operation of the INA333. Good layout practice
mandates the use of bypass capacitors placed close
to the device pins as shown.
Table 1 lists several commonly-used gains and
resistor values. The 100kΩ term in Equation 1 comes
from the sum of the two internal feedback resistors of
A1 and A2. These on-chip resistors are laser trimmed
to accurate absolute values. The accuracy and
temperature coefficient of these resistors are included
in the gain accuracy and drift specifications of the
INA333.
The output of the INA333 is referred to the output
reference (REF) terminal, which is normally
grounded. This connection must be low-impedance to
assure good common-mode rejection. Although 15Ω
or less of stray resistance can be tolerated while
maintaining specified CMRR, small stray resistances
of tens of ohms in series with the REF pin can cause
noticeable degradation in CMRR.
The stability and temperature drift of the external gain
setting resistor, RG, also affects gain. The contribution
of RG to gain accuracy and drift can be directly
inferred from the gain Equation 1. Low resistor values
required for high gain can make wiring resistance
important. Sockets add to the wiring resistance and
contribute additional gain error (possibly an unstable
gain error) in gains of approximately 100 or greater.
To ensure stability, avoid parasitic capacitance of
more than a few picofarads at the RG connections.
Careful matching of any parasitics on both RG pins
maintains optimal CMRR over frequency.
SETTING THE GAIN
Gain of the INA333 is set by a single external
resistor, RG, connected between pins 1 and 8. The
value of RG is selected according to Equation 1:
G = 1 + (100kΩ/RG)
(1)
V+
0.1mF
7
2
1
RFI Filter
RFI Filter
VIN-
150kW
150kW
A1
VO = G ´ (VIN+ - VIN-
)
100kW
50kW
G = 1 +
RG
6
5
RG
A3
50kW
+
8
3
VO
Load
-
RFI Filter
RFI Filter
150kW
150kW
A2
VIN+
Ref
INA333
4
0.1mF
V-
Also drawn in simplified form:
VIN-
RG
VO
INA333
Ref
VIN+
Figure 32. Basic Connections
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Table 1. Commonly-Used Gains and Resistor Values
DESIRED GAIN
RG (Ω)
NC(1)
100k
NEAREST 1% RG (Ω)
1
2
NC
100k
24.9k
11k
5
25k
10
11.1k
5.26k
2.04k
1.01k
502.5
200.4
100.1
20
5.23k
2.05
1k
50
100
200
500
1000
499
200
100
(1) NC denotes no connection. When using the SPICE model, the simulation will not converge unless a resistor is connected to the RG pins;
use a very large resistor value.
NOISE PERFORMANCE
INTERNAL OFFSET CORRECTION
The auto-calibration technique used by the INA333
results in reduced low frequency noise, typically only
50nV/√Hz, (G = 100). The spectral noise density can
be seen in detail in Figure 8. Low frequency noise of
the INA333 is approximately 1µVPP measured from
0.1Hz to 10Hz, (G = 100).
The INA333 internal op amps use an auto-calibration
technique with a time-continuous 350kHz op amp in
the signal path. The amplifier is zero-corrected every
8µs using a proprietary technique. Upon power-up,
the amplifier requires approximately 100µs to achieve
specified VOS accuracy. This design has no aliasing
or flicker noise.
INPUT BIAS CURRENT RETURN PATH
OFFSET TRIMMING
The input impedance of the INA333 is extremely
high—approximately 100GΩ. However, a path must
be provided for the input bias current of both inputs.
This input bias current is typically ±70pA. High input
impedance means that this input bias current
changes very little with varying input voltage.
Most applications require no external offset
adjustment; however, if necessary, adjustments can
be made by applying a voltage to the REF terminal.
Figure 33 shows an optional circuit for trimming the
output offset voltage. The voltage applied to REF
terminal is summed at the output. The op amp buffer
provides low impedance at the REF terminal to
preserve good common-mode rejection.
Input circuitry must provide a path for this input bias
current for proper operation. Figure 34 illustrates
various provisions for an input bias current path.
Without a bias current path, the inputs will float to a
potential that exceeds the common-mode range of
the INA333, and the input amplifiers will saturate. If
the differential source resistance is low, the bias
current return path can be connected to one input
(see the thermocouple example in Figure 34). With
higher source impedance, using two equal resistors
provides a balanced input with possible advantages
of lower input offset voltage as a result of bias current
and better high-frequency common-mode rejection.
mIN-
m+
RG
mO
INA333
Ref
100mA
1/2 REF200
mIN+
100W
100W
OPA333
10ꢀm
Adjustꢀent Range
10kW
100mA
1/2 REF200
m-
Figure 33. Optional Trimming of Output Offset
Voltage
12
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Product Folder Link(s): INA333
INA333
www.ti.com ..................................................................................................................................................... SBOS445B–JULY 2008–REVISED OCTOBER 2008
OPERATING VOLTAGE
The INA333 operates over a power-supply range of
Microphone,
Hydrophone,
etc.
INA333
+1.8V to +5.5V (±0.9V to ±2.75V). Supply voltages
higher than +7V (absolute maximum) can
permanently damage the device. Parameters that
vary over supply voltage or temperature are shown in
the Typical Characteristics section of this data sheet.
47kW
47kW
LOW VOLTAGE OPERATION
The INA333 can be operated on power supplies as
low as ±0.9V. Most parameters vary only slightly
throughout this supply voltage range—see the Typical
Characteristics section. Operation at very low supply
voltage requires careful attention to assure that the
input voltages remain within the linear range. Voltage
swing requirements of internal nodes limit the input
common-mode range with low power-supply voltage.
Thermocouple
INA333
10kW
The
Typical
Characteristic
curves
Typical
Common-Mode Range vs Output Voltage (Figure 20
to Figure 23) show the range of linear operation for
various supply voltages and gains.
INA333
SINGLE-SUPPLY OPERATION
Center tap provides
bias current return.
The INA333 can be used on single power supplies of
+1.8V to +5.5V. Figure 35 illustrates
a basic
Figure 34. Providing an Input Common-Mode
Current Path
single-supply circuit. The output REF terminal is
connected to mid-supply. Zero differential input
voltage demands an output voltage of mid-supply.
Actual output voltage swing is limited to
approximately 50mV above ground, when the load is
referred to ground as shown. The typical
characteristic curve Output Voltage Swing vs Output
Current (Figure 29) shows how the output voltage
swing varies with output current.
INPUT COMMON-MODE RANGE
The linear input voltage range of the input circuitry of
the INA333 is from approximately 0.1V below the
positive supply voltage to 0.1V above the negative
supply. As a differential input voltage causes the
output voltage to increase, however, the linear input
range is limited by the output voltage swing of
amplifiers A1 and A2. Thus, the linear common-mode
input range is related to the output voltage of the
complete amplifier. This behavior also depends on
supply voltage—see Typical Characteristic curves
Typical Common-Mode Range vs Output Voltage
(Figure 20 to Figure 23).
With single-supply operation, VIN+ and VIN– must both
be 0.1V above ground for linear operation. For
instance, the inverting input cannot be connected to
ground to measure a voltage connected to the
noninverting input.
To illustrate the issues affecting low voltage
operation, consider the circuit in Figure 35. It shows
the INA333 operating from a single 3V supply. A
resistor in series with the low side of the bridge
assures that the bridge output voltage is within the
common-mode range of the amplifier inputs.
Input overload conditions can produce an output
voltage that appears normal. For example, if an input
overload condition drives both input amplifiers to the
respective positive output swing limit, the difference
voltage measured by the output amplifier is near
zero. The output of the INA333 is near 0V even
though both inputs are overloaded.
Copyright © 2008, Texas Instruments Incorporated
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13
Product Folder Link(s): INA333
INA333
SBOS445B–JULY 2008–REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com
GENERAL LAYOUT GUIDELINES
+3V
3V
Attention to good layout practices is always
recommended. Keep traces short and, when
possible, use a printed circuit board (PCB) ground
plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1µF
bypass capacitor closely across the supply pins.
These guidelines should be applied throughout the
analog circuit to improve performance and provide
2V - DV
RG
VO
INA333
300W
Ref
1.5V
2V + DV
150W
(1)
R1
benefits
such
as
reducing
the
electromagnetic-interference (EMI) susceptibility.
(1) R1 creates proper common-mode voltage, only for low-voltage
operation—see the Single-Supply Operation section.
Instrumentation amplifiers vary in the susceptibility to
radio-frequency interference (RFI). RFI can generally
be identified as a variation in offset voltage or dc
signal levels with changes in the interfering RF signal.
The INA333 has been specifically designed to
minimize susceptibility to RFI by incorporating
passive RC filters with an 8MHz corner frequency at
the VIN+ and VIN– inputs. As a result, the INA333
demonstrates remarkably low sensitivity compared to
previous generation devices. Strong RF fields may
continue to cause varying offset levels, however, and
may require additional shielding.
Figure 35. Single-Supply Bridge Amplifier
INPUT PROTECTION
The input terminals of the INA333 are protected with
internal diodes connected to the power-supply rails.
These diodes clamp the applied signal to prevent it
from damaging the input circuitry. If the input signal
voltage can exceed the power supplies by more than
0.3V, the input signal current should be limited to less
than 10mA to protect the internal clamp diodes. This
current limiting can generally be done with a series
input resistor. Some signal sources are inherently
current-limited and do not require limiting resistors.
APPLICATION IDEAS
Additional application ideas are shown in Figure 36 to
Figure 39.
2.8kW
VO
LA
RG/2
INA333
Ref
RA
2.8kW
G = 10
390kW
1/2
OPA2333
1/2
10kW
RL
OPA2333
390kW
Figure 36. ECG Amplifier With Right-Leg Drive
14
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): INA333
INA333
www.ti.com ..................................................................................................................................................... SBOS445B–JULY 2008–REVISED OCTOBER 2008
+VS
fLPF = 150Hz
C4
R1
1/2
1.06nF
100kW
OPA2333
RA
R14
GTOT = 1kV/V
1MW
R7
+VS
7
100kW
+VS
2
1
GINA = 5
6
R12
R6
+VS
5kW
100kW
R2
1/2
RG
INA333
100kW
OPA2333
8
3
VOUT
GOPA = 200
OPA333
LL
4
C3
5
1mF
R13
R8
318kW
100kW
+VS
+VS
dc
ac
R3
1/2
100kW
1/2
OPA2333
Wilson
OPA2333
LA
VCENTRAL
C1
(RA + LA + LL)/3
47pF
fHPF = 0.5Hz
(provides ac signal coupling)
1/2 VS
R5
390kW
+VS
VS = +2.7V to +5.5V
BW = 0.5Hz to 150Hz
R9
+VS
20kW
R4
1/2
100kW
OPA2333
1/2
RL
OPA2333
Inverted
VCM
+VS
R10
1MW
1/2 VS
R11
C2
1MW
0.64mF
fO = 0.5Hz
Figure 37. Single-Supply, Very Low Power, ECG Circuit
Copyright © 2008, Texas Instruments Incorporated
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15
Product Folder Link(s): INA333
INA333
SBOS445B–JULY 2008–REVISED OCTOBER 2008 ..................................................................................................................................................... www.ti.com
TINA-TI
Virtual instruments offer users the ability to select
input waveforms and probe circuit nodes, voltages,
and waveforms, creating a dynamic quick-start tool.
(FREE DOWNLOAD SOFTWARE)
Using TINA-TI SPICE-Based Analog Simulation
Program with the INA333
Figure 38 and Figure 39 show example TINA-TI
circuits for the INA333 that can be used to develop,
modify, and assess the circuit design for specific
applications. Links to download these simulation files
are given below.
TINA is a simple, powerful, and easy-to-use circuit
simulation program based on a SPICE engine.
TINA-TI is a free, fully functional version of the TINA
software, preloaded with a library of macromodels in
addition to a range of both passive and active
models. It provides all the conventional dc, transient,
and frequency domain analysis of SPICE as well as
additional design capabilities.
NOTE: these files require that either the TINA
software (from DesignSoft) or TINA-TI software be
installed. Download the free TINA-TI software from
the TINA-TI folder.
Available as a free download from the Analog eLab
Design
Center,
TINA-TI
offers
extensive
post-processing capability that allows users to format
results in a variety of ways.
VoA1
1/2 of matched
monolithic dual
RELATED PRODUCTS
NPN transistors
(example: MMDT3904)
For monolithic logarithmic amplifiers (such as LOG112 or LOG114) see the link in footnote 1.
Vout
2
_
4
U1 INA333
3
V-
RG
2
-
-
R8 10k
+
1
8
Out
6
+
1
V
Input I 10n
Ref
5
4
+
+
+
VM1
RG
V+
5
U1 OPA335
U5 OPA369
+
3
7
Vdiff
Optional buffer for driving
SAR converters with
sampling systems of ³ 33kHz.
1/2 of matched
monolithic dual
NPN transistors
(example: MMDT3904)
VoA2
V1 5
Rset 2.5M
uC Vref/2 2.5
3
1
2
-
+
NOTE: Temperature compensation
of logging transistors is not shown.
+
4
5
U6 OPA369
(1) The following link launches the TI logarithmic amplifiers web page: Logarithmic Amplifier Products Home Page
Figure 38. Low-Power Log Function Circuit for Portable Battery-Powered Systems
(Example Glucose Meter)
To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link:
Log Circuit.
16
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): INA333
INA333
www.ti.com ..................................................................................................................................................... SBOS445B–JULY 2008–REVISED OCTOBER 2008
3V
R1
2kW
RWa
3W
EMU21 RTD3
Pt100 RTD
-
U2
OPA333
RWb
3W
+
+
2
VT+
RTD+
_
4
U1 INA333
Out
VT 25
3V
V-
RG
VT-
RTD-
VDIFF
1
8
MSP430
RGAIN
PGA112
Mon+ Mon-
100kW
Ref
6
RG
+
V+
RWc
4W
5
RZERO
100W
3
7
Temp (°C)
+
V
(Volts = °C)
VREF+
3V
VRTD
RWd
3W
RTD Resistance
(Volts = Ohms)
+
+
IREF1
IREF2
A
A
3V
VREF
3V
VREF
VREF
U1 REF3212
Use BF861A
T3 BF256A
S
3V
Use BF861A
T1 BF256A
EN
In
OUTF
OUTS
+
+
+
+
OPA3331 OPA333
GNDF GNDS
U3
OPA333
3V
C7
-
G
-
470nF
V4 3
RSET2
RSET1
2.5kW
2.5kW
RWa, RWb, RWc, and RWd simulate wire resistance. These resistors are included to show the four-wire sense technique immunity to line
mismatches. This method assumes the use of a four-wire RTD.
Figure 39. Four-Wire, 3V Conditioner for a PT100 RTD With Programmable Gain Acquisition System
To download a compressed file that contains the TINA-TI simulation file for this circuit, click the following link:
PT100 RTD.
Copyright © 2008, Texas Instruments Incorporated
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17
Product Folder Link(s): INA333
PACKAGE OPTION ADDENDUM
www.ti.com
8-Jun-2009
PACKAGING INFORMATION
Orderable Device
INA333AIDGKR
INA333AIDGKRG4
INA333AIDGKT
INA333AIDGKTG4
INA333AIDRGR
INA333AIDRGT
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
MSOP
DGK
8
8
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP
MSOP
MSOP
SON
DGK
DGK
DGK
DRG
DRG
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SON
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
INA333AIDGKR
INA333AIDGKT
INA333AIDRGR
MSOP
MSOP
SON
DGK
DGK
DRG
8
8
8
2500
250
330.0
180.0
330.0
12.4
12.4
12.4
5.3
5.3
3.3
3.3
3.3
3.3
1.3
1.3
1.1
8.0
8.0
8.0
12.0
12.0
12.0
Q1
Q1
Q2
1000
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
10-Jun-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
INA333AIDGKR
INA333AIDGKT
INA333AIDRGR
MSOP
MSOP
SON
DGK
DGK
DRG
8
8
8
2500
250
370.0
195.0
346.0
355.0
200.0
346.0
55.0
45.0
29.0
1000
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
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Products
Amplifiers
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
DSP
Clocks and Timers
Interface
www.ti.com/automotive
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www.ti.com/security
www.ti.com/telephony
www.ti.com/video
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Logic
Power Mgmt
Microcontrollers
RFID
Telephony
Video & Imaging
Wireless
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
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